JP5440901B2 - Heat treatment method for silicon wafer - Google Patents

Description

  The present invention relates to a heat treatment method for silicon wafers, more specifically, a silicon wafer that is charged with a large number of silicon wafers into a vertical wafer boat and subjected to heat treatment such as CVD (chemical vapor deposition), thermal oxidation, thermal diffusion, etc. The present invention relates to a heat treatment method.

A vertical heat treatment method using a vertical wafer boat is known when performing CVD film growth, thermal oxide film formation, thermal diffusion of impurities, etc. on the surfaces of a plurality of silicon wafers.
The vertical wafer boat includes a plurality of support columns, and a top plate and a bottom plate that connect these support columns. A large number of wafer support portions are formed at a constant pitch in the length direction on the inner side surface (surface on the boat center side) of each column. Each silicon wafer is placed on the upper surface of a disk-shaped shielding plate via an annular support ring, and supported by each wafer support portion via each shielding plate (for example, Patent Document 1). ).

The heating furnace is a main body of the heat treatment apparatus. A wafer boat is loaded into the furnace from below by a loading apparatus, and each silicon wafer is, for example, 1100 ° C. or more by a resistance heating heater provided outside the heating furnace. Heat treated.
At this time, in the conventional heat treatment apparatus, the diameter of the silicon wafer 100 and the diameter of the shielding plate 101 were substantially the same as shown in FIG. In addition, argon gas or hydrogen gas, which is an atmosphere gas for heat treatment, flows down from the upper part of the heating furnace 102 into the internal space of the heating furnace 102.
In FIG. 4, 103 is a wafer boat, 104 is a support ring, 105 is a support of the wafer boat 103, and 106 is a heater.

JP 2007-73923 A

  However, according to the silicon wafer heat treatment method disclosed in Patent Document 1, there is a problem that the outer peripheral portion of the wafer after the heat treatment is contaminated with impurities. In particular, in the manufacturing process of a SIMOX wafer, it was found that nickel (Ni) contamination on the outer peripheral portion of the wafer is large when high-temperature heat treatment for forming a buried silicon oxide film inside the wafer is performed.

  The inventors investigated the cause of Ni contamination on the outer periphery of the wafer. As a result, in the outer peripheral region of the gap between the silicon wafer and the shield plate one above it, atmospheric gas (argon gas, hydrogen gas, etc.) that flows from top to bottom in the internal space of the heating furnace is swirled. I found out that The cause is considered to be that impurities generated from the inner wall of the heating furnace are taken into the atmospheric gas during the heat treatment, and the eddy current containing the impurities stays on the wafer surface to contaminate the outer periphery of the wafer.

In particular, in the manufacture of a SIMOX wafer, a severe heat treatment is performed at 1350 ° C. for several tens of hours in an oxidizing gas atmosphere after oxygen ions are implanted into the surface layer of the silicon wafer. As a result, Ni contained in the heating furnace material is thermally diffused in the furnace, and the eddy current of the atmosphere gas containing Ni comes into contact with the outer peripheral portion of the wafer, thereby causing Ni contamination (Ni: 4 × 10 ¹¹ atoms / cm ² or more). It is estimated that This Ni contamination due to the vortex could not be eliminated by increasing the flow rate of the atmospheric gas.

  Therefore, as a result of earnest research, the inventor paid attention to the spatial structure in the outer peripheral region of the gap between the silicon wafer and the shielding plate one above it, and even if the above-described vortex generation itself could not be prevented, Attempts were made to avoid contact with the wafer surface. That is, the inventors have conceived that the diameter of the shielding plate should be 20 mm or more larger than the diameter of the silicon wafer, and the interval between the shielding plates should be 5 to 50 mm. As a result, it was possible to form a vortex buffer space that is outside the diameter of the silicon wafer and that does not affect the outer periphery of the wafer between the vertical intervals of the shielding plates. As a result, it was found that the contamination (including Ni contamination) of the outer peripheral portion of the silicon wafer due to impurities from the furnace wall caused by the vortex of the atmospheric gas can be eliminated, and the present invention has been completed.

  The present invention relates to a heat treatment method for a silicon wafer that can reduce impurity contamination caused by impurities from the furnace wall adhering to the outer peripheral portion of the silicon wafer due to the eddy flow of the atmospheric gas flowing down in the heating furnace. It is intended to provide.

The invention described in claim 1
A cylindrical vertical heating furnace is charged with a vertical wafer boat from below, and a large number of silicon wafers supported in a horizontal state on the wafer boat are allowed to flow down atmospheric gas in the heating furnace. In the heat treatment method for silicon wafers to be heat-treated, the wafer boat has a plurality of vertically long columns, and a top plate and a bottom plate that connect the columns to each other. A large number of wafer support portions are formed at a constant pitch toward each other, and each of the silicon wafers is placed on an upper surface of a disk-shaped shielding plate via an annular support ring, and each of the shielding plates is interposed is supported on the respective wafer support, the a dimensional difference 60mm or more and the inside diameter of the heating furnace and the diameter of each of the silicon wafers, the outer peripheral portion of the silicon wafer of the heating furnace Flow velocity of the atmospheric gas flowing down the, 5 × a ^{10 -4 ~4 × 10 -2 m /} sec, the time the diameter of each shield plate is less than said 100mm large at 20mm or more than the diameter of each of the silicon wafers, each vertical spacing of the shielding plates and 5-12 mm, when said diameter of each shield plate is the less large 200mm at least 100mm than the diameter of each of the silicon wafers, the upper and lower interval of the shielding plate is subjected to heat treatment as a 5~30mm This is a heat treatment method for a silicon wafer.

According to invention of Claim 1, each shielding board was mounted on the wafer support part so that the vertical space | interval of each shielding board might be 5-50 mm, and it mounted on the upper surface of this each shielding board. Each silicon wafer is placed on each support ring. At this time, the diameter of the shielding plate is made 20 mm or more larger than the diameter of the silicon wafer. As a result, an annular eddy current buffering space is formed between the upper and lower shielding plates outside the diameter direction of the silicon wafer. As a result, the vortex flow of the atmospheric gas is mainly generated in the vortex buffer space, and the influence thereof hardly reaches the outer peripheral portion of the wafer. Therefore, it is possible to reduce the impurity contamination caused by the impurities from the furnace wall adhering to the outer peripheral portion of the silicon wafer due to the vortex of the atmospheric gas flowing down in the heating furnace.
Further, if the dimensional difference between the diameter of the silicon wafer and the inner diameter of the heating furnace is less than 60 mm, it is too close to the furnace wall heated to a high temperature, so impurities contained in the furnace wall or a member (such as a heater) constituting the heating device Is transferred to the wafer surface by thermal diffusion and the risk of impurity contamination increases. In addition, it is desirable to make a dimensional difference into 150 mm or less from a viewpoint of suppressing the enlargement of a heating furnace, and the gas amount to be used.
When the flow rate of the atmospheric gas flowing down the outer periphery of the silicon wafer in the heating furnace, specifically, the flow rate of the gas flowing through the gap between the heating furnace wall and the shielding plate is less than 5 × 10 ⁻⁴ m / sec, Since the gas flow rate is too slow, it is difficult to obtain a stable downflow gas flow from above to below. As a result, the atmosphere gas does not spread uniformly in the furnace, which may cause variations in wafer quality. For this reason, it is effective to secure a gas flow rate of 5 × 10 ⁻⁴ m / sec or more, but from the viewpoint of reducing the cost of using expensive atmospheric gas, the gas flow rate is 4 × 10 ⁻² m / sec or less. It is desirable to keep it on.

As the silicon wafer, for example, a SIMOX wafer, a single crystal silicon wafer, an epitaxial wafer or the like can be employed. As the diameter of the silicon wafer, for example, a 200 mm wafer, a 300 mm wafer, a 450 mm wafer, or the like can be adopted.
The heating furnace (reaction furnace, process tube) is made of, for example, silicon carbide or quartz. The upper end of the heating furnace is sealed in a dome shape, and the entrance / exit of the wafer boat is provided at the lower end. Moreover, as an atmospheric gas to be used, argon gas, hydrogen gas, etc. are employable, for example.

As a material of each component of the wafer boat, silicon, silicon carbide, quartz or the like can be employed from the viewpoint of heat resistance and mechanical strength.
The number of columns used is, for example, three or four. The formation pitch of the wafer support portions formed on each support column is a pitch at which the vertical distance of each shielding plate placed on each wafer support portion is 5 to 50 mm. As the vertical distance between the shielding plates is increased, the eddy current generation position of the atmospheric gas is positioned on the outer peripheral surface of the wafer. Therefore, in order to suppress impurity contamination on the outer peripheral portion of the wafer, it is necessary to set the vertical interval of each shielding plate to 50 mm or less. However, when the pitch interval is less than 5 mm, it becomes difficult to load the silicon wafer, the support ring, and the shielding plate itself into the wafer support portion.

As a material of the support ring, silicon, silicon carbide, quartz, or the like can be employed from the viewpoint of heat resistance and mechanical strength. In particular, from the viewpoint of reducing the occurrence of contact scratches between the back surface of the silicon wafer and the support ring, it is desirable that the support ring is made of a silicon material, and the surface portion in contact with the silicon wafer is cristobalited (crystallized). It is more desirable.
The support ring is arranged concentrically with the shielding plate so as to separate the back surface of the silicon wafer from the shielding plate. This is because when the silicon wafer is placed on the surface of the shielding plate as it is, the contact area between the shielding plate and the silicon wafer is large, and there is a problem that slip dislocation or the like occurs in the silicon wafer.

  The inner diameter of the support ring is 50 to 90% of the diameter of the silicon wafer. If it is less than 50%, the contact area in contact with the back surface of the silicon wafer becomes too small, local stress concentration is applied to the silicon wafer, and slip dislocation may occur. If it exceeds 90%, the outermost peripheral part of the silicon wafer is almost held by the support ring, and the stress (deflection) due to the weight of the silicon wafer becomes too large, and slip dislocation tends to occur in the silicon wafer. Moreover, when a silicon wafer is placed on the support ring, it becomes difficult to carry the wafer by a robot.

The material of the shielding plate is preferably silicon carbide or quartz from the viewpoint of heat resistance and mechanical strength, for example. The thickness of the shielding plate is a thickness (for example, 0.5 to 10 mm) that can be taken in and out of the wafer support.
If the dimensional difference between the diameter of the shielding plate and the diameter of the silicon wafer is less than 20 mm, the vortex of the atmosphere gas containing Ni generated from the furnace wall comes into contact with the outer periphery of the wafer, and a metal such as Ni is formed on the outer periphery of the silicon wafer. Contamination is likely to occur. Therefore, it is effective to set the diameter of the shielding plate to 20 mm or more. However, as the diameter of the shielding plate increases, the effect of reducing Ni contamination on the outer periphery of the wafer can be achieved, but the heat treatment apparatus itself must be enlarged. Therefore, it is desirable to keep the dimensional difference between the diameter of the shielding plate and the diameter of the silicon wafer within 200 mm at the maximum. For example, when the diameter of the silicon wafer is 300 mm, the diameter of the shielding plate is made 20 to 200 mm larger than the diameter of the silicon wafer.

The invention according to claim 2 is the silicon wafer heat treatment method according to claim 1, wherein a dimensional difference between an inner diameter of the heating furnace and a diameter of each shielding plate is 160 mm or more .

According to a third aspect of the present invention, the eddy current buffering space is formed between the respective shielding plates and outward in the diameter direction of the silicon wafer so that the influence of the vortex is not exerted on the outer peripheral portion of the wafer. It is the heat processing method of the described silicon wafer.

  According to this invention, the eddy current buffering space is formed between the shielding plates on the outer side in the diameter direction of the silicon wafer. As a result, the influence of the vortex is less likely to be exerted on the outer periphery of the wafer. Therefore, it is possible to reduce impurity contamination in the outer peripheral portion of the silicon wafer due to the vortex of the atmospheric gas. In particular, it is suitable for reducing Ni contamination in the production of a SIMOX wafer in which high-temperature heat treatment at 1350 ° C. or higher is performed.

It is a principal part expanded longitudinal cross-sectional view of the wafer heat processing apparatus with which the heat processing method of the silicon wafer which concerns on Example 1 of this invention was applied. It is a perspective view of the wafer boat used with the heat processing method of the silicon wafer which concerns on Example 1 of this invention. It is a graph which shows Ni contamination distribution in the wafer radial direction of the surface of a silicon wafer in the test example and comparative example of this invention. It is a principal part expanded longitudinal cross-sectional view of the wafer heat processing apparatus to which the heat processing method of the silicon wafer which concerns on the conventional means was applied.

  Examples of the present invention will be specifically described below.

Next, a heat treatment method for a silicon wafer according to Embodiment 1 of the present invention will be described. Here, a heat treatment method of a silicon wafer when manufacturing a SIMOX wafer having a diameter of 300 mm is taken as an example.
In FIG. 1, reference numeral 10 denotes a wafer heat treatment apparatus (hereinafter referred to as a heat treatment apparatus) used in the silicon wafer heat treatment method according to the first embodiment. The heat treatment apparatus 10 is vertically inserted into a cylindrical vertical heating furnace 11 from below. A wafer boat 12 of a mold is inserted, and a large number of silicon wafers 13 supported in a horizontal state on the wafer boat 12 are heat-treated while flowing down argon gas (atmosphere gas) in the heating furnace 11.

Hereinafter, the heat treatment apparatus 10 will be specifically described with reference to FIGS. 1 and 2.
The heat treatment apparatus 10 has a vertically long cylindrical heating furnace 11 as a main body. In the heating furnace 11, a wafer boat 12 is charged into the furnace from below by a loading device with a predetermined interval in the internal space. A gas inlet is formed at the center of the upper lid of the heating furnace 11, and argon gas flows down into the furnace. A resistance heating type heater 14 is provided outside the heating furnace 11. Thereby, each silicon wafer 13 is heat-treated.

The wafer boat 12 has four vertically long columns 15 arranged at predetermined intervals on the side opposite to the loading / unloading side of the silicon wafer 13, and a top plate 20 and a bottom plate 21 that connect the columns 15 to each other. ing. A large number of wafer support portions 22 are formed at a constant pitch in the length direction on the loading / unloading side surface (inner side surface) of the silicon wafer 13 of each column 15.
A method for manufacturing each silicon wafer 13 will be described. That is, first, a single crystal silicon ingot having a diameter of 306 mm, a specific resistance of 10 mΩ · cm, and an initial oxygen concentration of 1.0 × 10 ¹⁸ atoms / cm ³ is pulled up by the Czochralski method. Next, the single crystal silicon ingot is subjected to block cutting, peripheral grinding, and slicing to obtain a large number of wafers. Thereafter, chamfering, lapping, etching, and polishing are sequentially performed on each wafer. Then, each silicon wafer 13 is loaded one by one into an ion implantation apparatus, and an oxygen ion implantation layer is formed at a depth of 1 μm from the wafer surface.

Next, each silicon wafer 13 is placed on the upper surface of a disk-shaped shielding plate 17 via an annular support ring 16. The support ring 16 is made of silicon and has an inner diameter of 160 mm and an outer diameter of 200 mm. Therefore, the width of the support ring 16 in the diameter direction is 20 mm. The height (thickness) of the support ring 16 is 5 mm. The shielding plate 17 is made of silicon carbide and has a thickness of 2 mm.
The silicon wafer 13, the support ring 16, and the shielding plate 17 are accommodated in the interior space of the wafer boat 12 and eventually the heating furnace 11, with their center lines superimposed on the central axis of the heating furnace 11. Each silicon wafer 13 is inserted horizontally into the wafer support portion 22 existing at the same height position of the four columns 15 with the support rings 16 and the shielding plates 17 interposed therebetween.

At this time, the diameter D of each silicon wafer 13 is 300 mm, and the diameter D1 of each shielding plate 17 is 400 mm larger than each silicon wafer 13. That is, the dimensional difference a between the diameter D of the silicon wafer 13 and the diameter D1 of the shielding plate 17 is 100 mm.
On the other hand, since the inner diameter D2 of the heating furnace 11 is 560 mm, the dimensional difference b between the inner diameter D2 of the heating furnace 11 and the diameter D of the silicon wafer 13 becomes 260 mm, and the inner diameter D2 of the heating furnace 11 and the diameter of the shielding plate 17. The dimensional difference c from D1 is 160 mm. Therefore, in the gap between the inner peripheral surface of the heating furnace 11 and the outer peripheral surface of each shielding plate 17, an annular flow path with a width of 80 mm (dimension difference 1 / 2c) through which argon (Ar) gas flows vertically is formed. The

  In addition, a gap between the inner peripheral surface of the heating furnace 11 and the outer peripheral surface of the shielding plate 17 that is one above the silicon wafer 13 is formed between the inner peripheral surface of the heating furnace 11 and the outer peripheral surface of each silicon wafer 13. An annular eddy current relaxation space E in which the argon gas that has passed becomes a vortex is formed (FIG. 1). The radial width (dimension difference 1 / 2b) of the vortex relaxation space E of each stage is 130 mm. Further, the upper wall of the eddy current relaxation space E at each stage is an outer peripheral portion of the shielding plate 17 that is one above the silicon wafer 13, and the lower wall of the eddy current relaxation space E at each stage is one lower than the silicon wafer 13. It becomes an outer peripheral portion of the shielding plate 17. A number of wafer support portions 22 are formed on each support column 15 at a constant pitch interval so that the vertical distance between the shielding plate 17 and the shielding plate 17, that is, the height d of the eddy current relaxation space E is 12 mm.

Next, with reference to FIG. 1 and FIG. 2, the heat processing method of the silicon wafer 13 of Example 1 using the heat processing apparatus 10 is demonstrated.
First, each silicon wafer 13 is placed on each support ring 16 placed on the upper surface of the shielding plate 17. Then, each shielding plate 17 is inserted and supported in a horizontal state on the wafer support portion 22 of each support column 15. At this time, the silicon wafer 13, the support ring 16, and the shielding plate 17 are stored in the wafer boat 12 with their respective center lines superimposed on the central axis of the heating furnace 11 (the central axis of the wafer boat 12). Moreover, the diameter D1 of the shielding plate 17 is larger than the diameter D of the silicon wafer 13 by 100 mm, and the dimensional difference b between the diameter D of the silicon wafer 13 and the inner diameter D2 of the heating furnace 11 is 260 mm. Therefore, an annular eddy current buffering space E is formed in the gap d between the shielding plate 17 one above and below the silicon wafer 13 in the diameter direction of the silicon wafer 13. It is formed.

Next, the flow rate of the atmospheric gas flowing down in the internal space of the heating furnace 11, that is, the flow rate of the gas flowing through the space between the heating furnace 11 and the shielding plate 17 (part of the dimensional difference c) is 4 × 10 ⁻³ m / sec. Argon gas (atmosphere gas) is caused to flow down through the gas inlet of the upper lid of the heating furnace 11 so that While continuing to supply the argon gas, each silicon wafer 13 is heated by the heater 14 at 1350 ° C. for 30 hours. As a result, the oxygen ion implanted layer of the silicon wafer 13 becomes a buried silicon oxide film, and an SOI layer is formed on the wafer surface side through this buried silicon oxide film, and a bulk layer is formed on the opposite side of the SOI layer. Is done.

  During this heat treatment, a part of the argon gas passes through the gap between the inner circumferential surface of the heating furnace 11 and the outer circumferential surface of the shielding plate 17 that is one above the silicon wafer 13, and immediately after that, the volume is larger than this gap. A large eddy current relaxation space E is reached. Here, the argon gas becomes a vortex. At this time, the eddy current relaxation space E is a sufficient space for accommodating the generated eddy current, with the radial width of the heating furnace 130 being 130 mm (dimension difference ½ b) and the height d being 12 mm. As a result, the vortex of the argon gas is generated only in the vortex buffer space E, and the influence does not easily reach the outer peripheral portion of the silicon wafer 13. Therefore, during the heat treatment of the silicon wafer (SIMOX wafer) 13, Ni released by outward diffusion from the furnace wall of the heating furnace 11 due to the vortex of the argon gas flowing down in the heating furnace 11 is generated in the silicon wafer 13. It is possible to reduce the amount of Ni contamination on the outer periphery of the wafer caused by adhering to the outer periphery.

The amount of Ni contamination on the surface portion of the silicon wafer 13 after the heat treatment performed in Example 1 was measured by secondary ion mass spectrometry (SIMS method), and the test example 1 was obtained. Further, as Test Example 2 of the present invention, an experiment was performed in which the diameter of the shielding plate was changed to 320 mm. Furthermore, as Test Example 3 of the present invention, an experiment was performed in which the pitch of the wafer support portions was changed so that the vertical distance between the shielding plates was 30 mm. In Test Examples 2 and 3, a SIMOX wafer was produced under the same heat treatment conditions as in Test Example 1, and the amount of Ni contamination was measured.
Similarly, as Comparative Example 1, an experiment was performed in which the diameter of the shielding plate was changed to 300 mm. Further, as Comparative Example 2, an experiment was performed in which the flow rate of each shielding plate was changed to 1 × 10 ⁻⁴ m / sec. Further, as Comparative Example 3, an experiment was performed in which the distance between the shielding plate and the shielding plate was changed to 55 mm. These measurement results are shown in the graph of FIG.

As is apparent from the graph of FIG. 3, the silicon wafers of Test Examples 1 to 3 all had a Ni concentration of 2 × 10 ¹¹ atoms / cm ² or less over the entire radial direction. On the other hand, in the silicon wafers of Comparative Examples 1 to 3, Ni having a concentration of 4 × 10 ¹¹ atoms / cm ² or more was detected at the outer periphery of the wafer. In Comparative Examples 1 to 3, a SIMOX wafer was produced under the same heat treatment conditions as in Test Example 1, and the amount of Ni contamination was measured.

  The present invention is effective as a heat treatment method of a silicon wafer that can reduce impurity contamination of the silicon wafer, and is particularly useful for manufacturing a SIMOX wafer in which Ni contamination is reduced as much as possible.

11 Heating furnace,
12 wafer boats,
13 Silicon wafer,
15 struts,
16 support ring,
17 Shield plate,
20 Top plate,
21 Bottom plate,
22 Wafer support.

Claims (3)

A cylindrical vertical heating furnace is charged with a vertical wafer boat from below, and a large number of silicon wafers supported in a horizontal state on the wafer boat are allowed to flow down atmospheric gas in the heating furnace. In the heat treatment method of the silicon wafer to be heat-treated,
The wafer boat has a plurality of vertically long columns, and a top plate and a bottom plate that connect the columns to each other. On the inner surface of each column, a large number of wafers are supported at a constant pitch in the length direction. Part is formed,
Each silicon wafer is mounted on the upper surface of a disk-shaped shielding plate via a ring-shaped support ring, and supported by each wafer support portion via each shielding plate,
The dimensional difference between the diameter of each silicon wafer and the inner diameter of the heating furnace is 60 mm or more,
The flow rate of the atmospheric gas flowing down the outer periphery of the silicon wafer in the heating furnace is 5 × 10 ⁻⁴ to 4 × 10 ⁻² m / sec,
When the diameter of each shielding plate is 20 mm or more and less than 100 mm larger than the diameter of each silicon wafer, the vertical spacing of each shielding plate is 5 to 12 mm,
Wherein when the diameter of each shield plate is the less large 200mm at least 100mm than the diameter of each of the silicon wafers, the heat treatment method of a silicon wafer vertical intervals the heat treatment is performed as a 5~30mm of each shielding plate. The silicon wafer heat treatment method according to claim 1, wherein a dimensional difference between an inner diameter of the heating furnace and a diameter of each shielding plate is 160 mm or more .   3. The method for heat-treating a silicon wafer according to claim 1, wherein an eddy current buffering space that does not exert an influence of the eddy current on the outer peripheral portion of the wafer is formed between the shielding plates and outward in the diameter direction of the silicon wafer.

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