JP5447296B2 - Manufacturing method of semiconductor device - Google Patents

Description

  The present invention relates to a method for manufacturing a semiconductor device in which a heat treatment process is performed after a back grinding process of a semiconductor wafer.

  Conventionally, for example, Patent Document 1 proposes a method of grinding a back surface of a semiconductor wafer by attaching a surface protection tape to the surface of the semiconductor wafer.

  Specifically, in Patent Document 1, a surface protection tape provided with a base material layer and an adhesive layer is applied to the surface of the semiconductor wafer having the irregularities before grinding by back grinding, and the base material layer and the adhesive are bonded by heating. A method has been proposed in which the surface of the base material layer is flattened by softening the agent layer to relieve irregularities on the device surface. By this method, the warpage of the semiconductor wafer after the back grinding process is reduced.

JP 2005-317570 A

  However, if a heat treatment of, for example, 70 ° C. or higher is performed in a subsequent process after the back grinding process in which the back surface of the semiconductor wafer is ground, the tape shrinks when the surface protection tape is cooled, and a force for pulling the semiconductor wafer works. As a result, the warpage of the semiconductor wafer is increased, which makes it difficult to transport the semiconductor wafer and causes the semiconductor wafer to break.

  In order to avoid this, the device wafer is affixed to the semiconductor wafer with a heat-resistant adhesive on the support substrate such as a glass plate or silicon wafer having the same diameter as the device wafer to be used instead of the surface protection tape before the back grinding process. There is a method. However, this method is more expensive than a method using a surface protection tape, such as a device for attaching to a support substrate or a support substrate.

  In view of the above, the present invention provides a method for manufacturing a semiconductor device that can reduce the warpage of a semiconductor wafer without increasing the warpage of the semiconductor wafer even if heat treatment is performed in a subsequent process after the back grinding process of the semiconductor wafer. The purpose is to provide.

  In order to achieve the above object, the invention according to claim 1 is provided with a semiconductor wafer (10) having a front surface (11) and a back surface (12) having an uneven pattern (13) formed on the front surface (11). A protective tape (20) comprising a step of performing, a pressure-sensitive adhesive layer (21) and a tape base material (22) that shrinks when cooled after heating, and covering the concave-convex pattern (13) with the pressure-sensitive adhesive layer (21) An attaching step of attaching the protective tape (20) to the front surface (11) of the semiconductor wafer (10), and a back grinding step of grinding the back surface (12) of the semiconductor wafer (10) after the attaching step; A method for manufacturing a semiconductor device including the following features:

  That is, after the back grinding process, a heat treatment process in which the semiconductor wafer (10) is heat-treated with the protective tape (20) attached to the semiconductor wafer (10), and a stage in which the groove (31) is provided ( 30) is prepared, and the semiconductor wafer (10) after the heat treatment process is placed on the stage (30) so that the tape base material (22) is positioned on the stage (30), and a groove is formed in the tape base material (22). A step of deforming a portion corresponding to (31) to enter the groove (31) to form a convex portion (23) on the tape base material (22) and cooling the semiconductor wafer (10); It is characterized by including.

  According to this, the protective tape (20) shrinks after the semiconductor wafer (10), that is, the protective tape (20) is cooled, but the convex portion (23) formed on the tape base material (22) will return to the original plane. As described above, it spreads in the surface direction of the surface (11) of the semiconductor wafer (10), so that the spread of the projection (23) can absorb the shrinkage of the protective tape (20). Therefore, the warp of the semiconductor wafer (10) can be reduced without increasing the warp of the semiconductor wafer (10) due to the shrinkage of the protective tape (20).

  In the second aspect of the present invention, in the step of preparing the semiconductor wafer (10), the semiconductor wafer (10) is formed as the semiconductor wafer (10) according to the crystal plane orientation of the surface (11) of the semiconductor wafer (10). A semiconductor wafer (10) with a U-shaped warp is prepared so that the surface (11) is concave.

  And in a cooling process, what provided the groove | channel (31) so that the bottom part of a U-shape when a semiconductor wafer (10) warps in a U shape may be extended as a stage (30). It is characterized by that.

  According to this, the convex part (23) is formed on the protective tape (20) in parallel with one direction of the semiconductor wafer (10). For this reason, the warp of the semiconductor wafer (10), which tends to warp according to the crystal plane orientation, can be effectively mitigated by the spread of the convex portion (23) to return to the original state.

  According to a third aspect of the present invention, in the step of preparing the semiconductor wafer (10), the semiconductor wafer (10) is used as the semiconductor wafer (10) according to the device pattern on the surface (11) of the semiconductor wafer (10). A semiconductor wafer (10) that warps downward in a U shape is prepared so that the surface (11) of the substrate is concave.

  Further, by performing the cooling step in the same manner as in the invention described in claim 2, it is possible to effectively relieve the warpage of the semiconductor wafer that tends to warp according to the pattern of the surface device.

  As a method of forming the convex portion (23) on the protective tape (20), as in the invention according to claim 4, a stage (30) that adsorbs the protective tape (20) is used as the stage (30). By adsorbing the tape base material (22), the convex portion (23) can be formed on the tape base material (22).

  Further, as in the invention described in claim 5, the convex portion (23) is formed on the tape substrate (22) by pressing the back surface (12) of the semiconductor wafer (10) against the stage (30) side. You can also.

  In particular, the tape substrate (22) can be more easily deformed by pressing the semiconductor wafer (10) against the stage (30) while adsorbing the tape substrate (22).

  The invention according to claim 6 is characterized in that, in the attaching step, the protective tape (20) is a tape base material (22) provided with a cut (24).

  Thereby, since shrinkage | contraction of a tape base material (22) is no longer continuous, the part which shrink | contracts in a tape base material (22) is disperse | distributed. Therefore, the curvature of the semiconductor wafer (10) due to the shrinkage of the tape base material (22) can be reduced.

  In the invention according to claim 7, the notch (24) is concave on the surface (11) of the semiconductor wafer (10) in accordance with the crystal plane orientation or surface device pattern of the surface (11) of the semiconductor wafer (10). Thus, the semiconductor wafer (10) is provided along one direction in which the bottom portion of the U-shape when the U-shape warps down.

  According to this, since the notch (24) is formed in parallel to one direction of the semiconductor wafer (10), it is possible to reduce the warp of the semiconductor wafer (10) that is likely to warp according to the crystal plane orientation.

  In addition, the code | symbol in the bracket | parenthesis of each means described in this column and the claim shows the correspondence with the specific means as described in embodiment mentioned later.

It is the figure which showed the manufacturing method of the semiconductor device which concerns on 1st Embodiment of this invention. It is a perspective view of a stage with a groove. (A) is a schematic diagram of the curvature suppression of the semiconductor wafer by the convex part of a tape base material, (b) is a schematic diagram of the curvature of a semiconductor wafer in case a convex part is not formed in a tape base material. In 2nd Embodiment of this invention, it is a perspective view of the semiconductor wafer and stage which the curvature produced according to the crystal plane orientation or the surface device pattern. It is sectional drawing which showed the cooling process which concerns on 3rd Embodiment of this invention. (A) is a top view of a tape base material, (b) is sectional drawing before sticking a protective tape on a semiconductor wafer. In other embodiment, it is the figure which showed an example of the notch | groove of the groove | channel of a stage, or a tape base material. In other embodiment, it is the figure which showed an example of the notch | groove of the groove | channel of a stage and a tape base material.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, the same or equivalent parts are denoted by the same reference numerals in the drawings.

(First embodiment)
FIG. 1 is a view showing a method for manufacturing a semiconductor device according to the present embodiment. A method for manufacturing a semiconductor device will be described below in accordance with the manufacturing process of FIG. In the present embodiment, a semiconductor device such as a MOSFET, IGBT, or diode is formed as a semiconductor device.

  First, a semiconductor wafer 10 having a front surface 11 and a back surface 12 is prepared. For example, a silicon wafer is used as the semiconductor wafer 10. Then, a semiconductor device is formed on the semiconductor wafer 10 on the surface 11 side. Further, by forming an interlayer insulating film or the like on the surface 11 of the semiconductor wafer 10, the uneven pattern 13 is formed on the surface 11 of the semiconductor wafer 10.

  Next, in the process shown in FIG. 1A, a back grinding process for grinding the back surface 12 side of the semiconductor wafer 10 to make it thinner is performed. For this reason, an attaching step of attaching a protective tape 20 that protects the surface 11 side of the semiconductor wafer 10 to the surface 11 of the semiconductor wafer 10 is performed.

  The protective tape 20 is a back-grinding tape, and includes an adhesive layer 21 and a tape base material 22 as shown in FIG. The adhesive layer 21 is a layer that softens when heated to a predetermined temperature. For example, the adhesive layer 21 softens when heated at 50 to 60 ° C., that is, has fluidity. Moreover, the tape base material 22 is a base | substrate formed, for example with resin. Since the resin used for the tape base material 22 generally shrinks when cooled from a heated state, the tape base material 22 also shrinks when cooled from a heated state.

  Then, as shown in FIG. 1A, a protective tape 20 is attached to the front surface 11 side of the semiconductor wafer 10 so as to cover the uneven pattern 13 with the adhesive layer 21, and the back surface 12 of the semiconductor wafer 10 is ground. The wafer 10 is thinned. In addition, the surface of the tape base material 22 of the protective tape 20 becomes uneven by inheriting the shape of the uneven pattern 13.

  The protective tape 20 is also used in the subsequent steps as a support material for reducing warpage of the semiconductor wafer 10 and suppressing cracks and chipping of the semiconductor wafer 10. That is, a heat treatment process is performed in which the semiconductor wafer 10 is subjected to a heat treatment of, for example, about 70 to 150 ° C. with the protective tape 20 attached to the semiconductor wafer 10. The heat treatment is, for example, a treatment such as performing ion implantation on the back surface 12 of the semiconductor wafer 10 or forming an electrode on the back surface 12.

  Subsequently, in the process illustrated in FIG. 1B, a cooling process for cooling the semiconductor wafer 10 is performed. For this reason, a stage 30 provided with a groove 31 is prepared. FIG. 2 is a perspective view of the stage 30 according to the present embodiment. As shown in FIG. 2, the stage 30 is a metal stage having a disk shape and having a groove 31 on the stage surface 32. The stage 30 is provided with two linear grooves 31 passing through the center of the circular stage surface 32 and a plurality of concentric grooves 31 centered on the center of the circular stage surface 32.

  The stage 30 is provided with a suction mechanism that can vacuum-suck an object mounted on the stage surface 32. For this reason, a plurality of suction holes (not shown) are provided at equal intervals on the bottom of the groove 31. The suction hole communicates with a vacuum pump (not shown), and the semiconductor wafer 10 (protective tape 20) on the stage 30 is sucked onto the stage surface 32 by sucking air from the suction hole. .

  Therefore, the semiconductor wafer 10 after the heat treatment process is placed on the stage 30 so that the tape base material 22 is in contact with the stage surface 32, and the tape base material 22 is vacuum-adsorbed by the stage 30. Thereby, a portion of the tape base material 22 corresponding to the groove 31 is sucked into the groove 31 and deformed. As described above, when the portion of the tape base material 22 corresponding to the groove 31 is deformed by vacuum suction and enters the groove 31, the convex portion 23 in which the same position as the groove 31 of the stage 30 protrudes from the tape base material 22. Can be formed. The convex portion 23 is a ridge of the tape base material 22 that is forcibly formed on the tape base material 22, and a portion in the vicinity of the groove 31 of the tape base material 22 is a portion collected in the groove 31.

  If the convex part 23 is formed in the tape base material 22, the adhesion layer 21 will also deform | transform corresponding to the convex part 23. FIG. As described above, since the adhesive layer 21 is softened when heated, the adhesive layer 21 can be deformed in accordance with the deformation of the tape base material 22.

  The height of the convex portion 23 is determined by the depth of the groove 31 of the stage 30. Specifically, the depth of the groove 31 of the stage 30 is most desirably about 0.2 to 2 mm. If the groove 31 is deep, the effect of correcting the warp of the semiconductor wafer 10 is large, but the convex portion 23 remains on the tape base material 22 (contact surface to the arm or the like during conveyance). This leads to troubles such as the wafer 10 not sticking. On the other hand, if the groove 31 is shallow, the warping correction effect of the semiconductor wafer 10 is reduced. It is effective to form the deep groove 31 within a range that does not affect the subsequent process.

  Then, the semiconductor wafer 10 is cooled while the tape base material 22 is sucked by the stage 30 to form the convex portion 23 as described above. Since the stage 30 is made of metal as described above, the heat of the semiconductor wafer 10 is released to the stage 30 and is naturally cooled until the semiconductor wafer 10 reaches room temperature. The cooling method is not limited to natural cooling, and other methods may be used.

  Thereafter, in the step shown in FIG. 1C, the semiconductor wafer 10 cooled to room temperature is removed from the stage 30. Then, the semiconductor wafer 10 is divided into chips by carrying out processes such as conveyance of the semiconductor wafer 10 and dicing cut. The above is the manufacturing flow of the semiconductor device according to the present embodiment.

  Next, warpage suppression of the semiconductor wafer 10 when the semiconductor wafer 10 is removed from the stage 30 in the step of FIG. 1C will be described with reference to FIG. FIG. 3A is a schematic diagram of warpage suppression of the semiconductor wafer 10 by the convex portion 23 of the tape base material 22, and FIG. 3B is a diagram of the semiconductor wafer 10 when the convex portion 23 is not formed on the tape base material 22. It is a schematic diagram of curvature. In FIG. 3, the uneven pattern 13 on the surface 11 side of the semiconductor wafer 10 is omitted.

  As shown in FIG. 3B, when the tape base material 22 cools in a state where the convex portions 23 are not formed on the tape base material 22, the tape base material 22 contracts. As a result, the semiconductor wafer 10 affixed to the protective tape 20 is pulled by the shrinkage of the tape base material 22, and the surface 11 of the semiconductor wafer 10 is concavely warped.

  However, in the present embodiment, as shown in FIG. 3A, before the semiconductor wafer 10 is cooled, a part of the tape base material 22 is collected in the groove 31 to form the convex portion 23. Thereby, when the tape base material 22 contracts with the cooling of the semiconductor wafer 10, the convex portion 23 of the tape base material 22 tries to return to the original plane with respect to the contraction of the tape base material 22. It spreads in the surface direction of the surface 11. Thus, since the expansion of the convex part 23 of the tape base material 22 absorbs the shrinkage of the tape base material 22, the warpage of the semiconductor wafer 10 is reduced without increasing the warpage of the semiconductor wafer 10.

  Since the convex part 23 spreads to return to the original state, the height of the convex part 23 becomes lower than that before cooling, as shown in FIG. In addition, although the convex part 23 remains in the tape base material 22 without annihilating completely, the convex part 23 left on the tape base material 22 by defining the depth of the groove 31 as described above is a later process. There is no effect.

  As described above, in this embodiment, even if the heat treatment process is performed after the back grinding process and the semiconductor wafer 10 is cooled, a part of the tape base material 22 is collected on the tape base material 22 of the protective tape 20. It is characterized in that the convex portion 23 is formed. Thereby, since the shrinkage | contraction of the tape base material 22 at the time of cooling of the semiconductor wafer 10 is absorbed by the breadth of the convex part 23 of the tape base material 22, the curvature of the semiconductor wafer 10 can be suppressed. Therefore, the warp of the semiconductor wafer 10 can be reduced without increasing the warp of the semiconductor wafer 10 due to the shrinkage of the protective tape 20.

(Second Embodiment)
In the present embodiment, parts different from the first embodiment will be described. In the present embodiment, as the semiconductor wafer 10, a semiconductor wafer 10 that warps in a U shape so that the surface 11 of the semiconductor wafer 10 becomes concave according to the crystal plane orientation of the surface 11 of the semiconductor wafer 10 is used.

  For example, when an 8-inch silicon wafer is used as the semiconductor wafer 10, the warpage becomes significant when the wafer thickness becomes thinner than about 150 μm, although it depends on the surface pattern. Further, when warping occurs, warping tends to occur in a fixed direction depending on the crystal direction.

  Specifically, the silicon wafer has a (111) plane as a cleavage plane, and a silicon wafer having a plane orientation (100) warps in a direction along two cleavage planes orthogonal to the surface. The warping direction is also affected by the surface pattern. By previously forming the groove 31 of the stage 30 along the warping direction of these silicon wafers, the above effect is enhanced.

  Therefore, in the present embodiment, a stage 30 is used in which a groove 31 is provided for the warp of the semiconductor wafer 10 that is likely to warp according to the crystal plane orientation.

  FIG. 4 is a perspective view of the semiconductor wafer 10 and the stage 30 that are warped in accordance with the crystal plane orientation. As shown in this figure, the stage 30 is provided with grooves 31 in stripes along one direction in which the bottom of the U-shape extends when the semiconductor wafer 10 warps in a U-shape. In FIG. 4, the protective tape 20 is omitted.

  Thereby, a plurality of convex portions 23 are formed on the tape base material 22 in parallel with one direction of the semiconductor wafer 10. For this reason, since the convex part 23 of the tape base material 22 spreads so as to eliminate the warp of the semiconductor wafer 10 that tends to warp according to the crystal plane orientation, the warp of the semiconductor wafer 10 can be effectively mitigated. .

  Although the warp according to the crystal plane orientation of the semiconductor wafer 10 has been described above, depending on the surface device pattern of the semiconductor wafer 10, the warp direction may be influenced more than the plane orientation of the semiconductor wafer 10. In particular, the influence of the warp of the semiconductor wafer 10 becomes significant in a surface device pattern such as a trench groove pattern in which a plurality of trenches are formed along one direction parallel to the surface 11 of the semiconductor wafer 10. Even in such a case, the warpage can be effectively reduced by forming the stage groove 31 in the same manner as the U-shaped downward warp due to the above-described plane orientation.

  As described above, the stage 30 provided with the grooves 31 according to the direction in which the semiconductor wafer 10 is easily warped can be used.

(Third embodiment)
In the present embodiment, parts different from the first and second embodiments will be described. In each of the above embodiments, the tape base material 22 is vacuum-sucked to the stage 30 to deform a part of the tape base material 22 to form the convex portion 23. However, in this embodiment, the semiconductor wafer 10 is further It is characterized by being pressed against the stage 30 side.

  FIG. 5 is a sectional view showing a cooling process according to the present embodiment. As shown in this figure, the ring-shaped pressing member 40 is brought into contact with the outer edge portion of the back surface 12 of the thinned semiconductor wafer 10 and the back surface 12 of the semiconductor wafer 10 is pressed against the stage 30 by the pressing member 40. Thereby, the convex part 23 can be formed in the tape base material 22. In this embodiment, since both vacuum suction and pressing are performed, the tape base material 22 can be easily deformed.

  The reason why the pressing member 40 is ring-shaped is that the semiconductor device formed on the back surface 12 of the semiconductor wafer 10 is not damaged. Therefore, when the back surface 12 of the semiconductor wafer 10 may be damaged, it may be pressed by the plate-like pressing member 40.

  In the present embodiment, the semiconductor wafer 10 is pressed by the pressing member 40 while vacuum-adsorbing the tape base material 22, but the convex portion is formed on the tape base material 22 only by pressing by the pressing member 40 without performing vacuum suction. 23 may be formed.

(Fourth embodiment)
In the present embodiment, parts different from the first to third embodiments will be described. In this embodiment, the protective tape 20 is characterized by using a tape base material 22 that has been previously cut.

  FIG. 6A is a plan view of the tape base material 22, and FIG. 6B is a cross-sectional view before the protective tape 20 is attached to the semiconductor wafer 10. As shown in FIG. 6B, the tape base material 22 is provided with a notch 24 having a depth enough to prevent the tape base material 22 from being completely divided. In FIG. 6B, the uneven pattern 13 on the surface 11 side of the semiconductor wafer 10 is omitted.

  The cut 24 causes the tape base material 22 to contract intermittently rather than continuously. For this reason, the shrinking part in the tape base material 22 is dispersed, and the tension due to the shrinkage of the tape base material 22 can be suppressed.

  As shown in FIG. 6A, the notch 24 is formed in the semiconductor wafer 10 so that the surface 11 of the semiconductor wafer 10 becomes concave according to the crystal plane orientation of the surface 11 of the semiconductor wafer 10 as in the second embodiment. It is preferable that the tape base material 22 is provided in a stripe shape along one direction in which the bottom of the U-shape extends when the U-shape warps downward. Thereby, the curvature of the semiconductor wafer 10 which is easy to warp according to a crystal plane orientation can be reduced.

  As described above, warpage of the semiconductor wafer 10 due to shrinkage of the tape base material 22 can be reduced by using the tape base material 22 provided with the cuts 24.

(Other embodiments)
The layout of the grooves 31 of the stage 30 and the notches 24 of the tape base material 22 shown in the above embodiments is merely an example, and is not limited to the layout shown above, and other layouts may be used.

  For example, as shown in FIG. 7, a plurality of circular grooves 31 may be provided on the stage 30. In addition, it is preferable that the groove | channel 31 is provided along the groove | channel 31 of the stage 30 shown, for example in FIG. As shown in FIG. 7, a circular cut 24 may be provided in the tape base material 22.

  And as shown to Fig.8 (a), the slit 24 may be provided in the grid | lattice form in the tape base material 22. FIG. Moreover, as shown in FIG.8 (b), the notch 24 may be provided in the tape base material 22 concentrically. When the cuts 24 are concentric, it is effective in the direction in which the tape base material 22 is deposited less. As shown in FIG. 8, lattice-like or concentric grooves 31 may be provided on the stage 30.

  Furthermore, as described above, in order to effectively reduce the warp of the semiconductor wafer 10 that tends to warp according to the crystal plane orientation by the spread of the convex portion 23, a portion of the stage 30 where the warp of the semiconductor wafer 10 is the largest is mounted. Alternatively, the grooves 31 may be provided densely. Thereby, many convex parts 23 can be provided in the tape base material 22 of the part with the largest curvature of the semiconductor wafer 10, and the effect of curvature suppression of the semiconductor wafer 10 can be heightened.

  Moreover, in each said embodiment, although the protective tape 20 was comprised by two layers of the adhesion layer 21 and the tape base material 22, this is an example of the protective tape 20, and another structure may be sufficient. For example, a three-layer structure in which an intermediate layer is sandwiched between the adhesive layer 21 and the tape base material 22 may be used. In this case, if the intermediate layer has the fluidity of softening at a predetermined temperature, the intermediate layer can be deformed in accordance with the deformation of the tape base material 22. In the case of a three-layer structure including an intermediate layer, the adhesive layer 21 and the layer formed by the intermediate layer correspond to the “adhesive layer” in the claims.

DESCRIPTION OF SYMBOLS 10 Semiconductor wafer 11 The surface of a semiconductor wafer 12 The back surface of a semiconductor wafer 13 Concave / convex pattern 20 Protective tape 21 Adhesive layer 22 Tape base material 23 Protrusion part 24 Notch 30 Stage 31 Groove

Claims (7)

Preparing a semiconductor wafer (10) having a front surface (11) and a back surface (12), the surface (11) of which a concavo-convex pattern (13) is formed,
A protective tape (20) having an adhesive layer (21) and a tape base material (22) that shrinks when cooled after heating is prepared so that the uneven pattern (13) is covered with the adhesive layer (21). An attaching step of attaching the protective tape (20) to the surface (11) of the semiconductor wafer (10);
A backgrinding step of grinding the back surface (12) of the semiconductor wafer (10) after the attaching step,
After the back grinding step, a heat treatment step of performing a heat treatment on the semiconductor wafer (10) in a state where the protective tape (20) is attached to the semiconductor wafer (10);
A stage (30) provided with grooves (31) is prepared, and the semiconductor wafer (10) after the heat treatment step is placed on the stage so that the tape base material (22) is positioned on the stage (30). (30), a portion corresponding to the groove (31) of the tape base material (22) is deformed to enter the groove (31), whereby a convex portion (23 And a cooling step of cooling the semiconductor wafer (10). In the step of preparing the semiconductor wafer (10), the surface (11) of the semiconductor wafer (10) is formed as the semiconductor wafer (10) according to the crystal plane orientation of the surface (11) of the semiconductor wafer (10). Prepare the semiconductor wafer (10) to be warped in a U shape so as to be concave,
In the cooling step, as the stage (30), the groove (31) is provided so as to be along one direction in which the bottom of the U-shape extends when the semiconductor wafer (10) warps in a U-shape. The method of manufacturing a semiconductor device according to claim 1, wherein: In the step of preparing the semiconductor wafer (10), as the semiconductor wafer (10), the surface (11) of the semiconductor wafer (10) is concave according to the device pattern of the surface (11) of the semiconductor wafer (10). Prepare a semiconductor wafer (10) that warps in a U-shape so that
In the cooling step, as the stage (30), the groove (31) is provided so as to be along one direction in which the bottom of the U-shape extends when the semiconductor wafer (10) warps in a U-shape. The method of manufacturing a semiconductor device according to claim 1, wherein:   In the cooling step, the stage (30) that adsorbs the protective tape (20) is used, and the tape base (22) is adsorbed by the stage (30), whereby the tape base (22) The method of manufacturing a semiconductor device according to claim 1, wherein the convex portion is formed on the semiconductor device.   In the cooling step, the protrusion (23) is formed on the tape base (22) by pressing the back surface (12) of the semiconductor wafer (10) against the stage (30). A method for manufacturing a semiconductor device according to claim 1.   6. The method according to claim 1, wherein in the attaching step, the protective tape (20) is a tape base (22) provided with a cut (24). 7. The manufacturing method of the semiconductor device of description.   The notches (24) are formed on the semiconductor wafer (10) so that the surface (11) of the semiconductor wafer (10) is concave according to the crystal plane orientation of the surface (11) of the semiconductor wafer (10). The method of manufacturing a semiconductor device according to claim 6, wherein the bottom portion of the U-shape when warped downward is provided along one extending direction.

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