JP5451430B2 - Light emitting element driving circuit and image forming apparatus - Google Patents

Description

  The present invention relates to a light emitting element driving circuit, and relates to a light emitting element driving circuit in a CMOS semiconductor integrated circuit used for image formation in a copying machine, a laser beam printer (hereinafter referred to as LBP), and the like, and a method for generating a constant current pulse output. About.

  Conventionally, as a drive circuit for a semiconductor light emitting device, for example, a circuit using a differential circuit as shown in Patent Document 1 or a circuit using a cascode circuit as shown in Patent Document 2 is known.

  FIG. 6 shows light conversion characteristics between a general driving current and a light emission amount of a semiconductor laser diode (hereinafter abbreviated as LD) which is a semiconductor light emitting element. In FIG. 6, A is a characteristic when the LD is in an initial use state, and B is a characteristic when the LD is deteriorated by use. Further, the forward voltage of the LD necessary for obtaining an equivalent amount of light increases as the LD deteriorates. The forward voltage of the LD starts to emit light at about 1.5 to 1.6 V in the initial state of use, but increases as the deterioration progresses to about 2.4 V. In a copying machine or LBP, in order to guarantee the number of printed sheets, it is necessary to control a desired light amount and pulse width by a drive circuit even when the LD is deteriorated. Further, due to the recent improvement in LD performance, the light emission threshold value is several mA, and it is possible to obtain a desired light amount with a lower current than in the past.

Japanese Patent Laid-Open No. 05-152626 JP 09-232635 A

  However, considering the state where the LD has deteriorated, in the conventional drive circuit, in addition to the forward voltage of the LD, an operation voltage for two stages of MOS transistors is required as a power supply voltage, and a 5V system is required as a general power supply. Become. This is because, for example, in a system using a 3V power supply for the control system and 12V or 24V for the power system (such as a copying machine or an LBP device), a 5V power supply is required for LD driving. Therefore, there is a problem that the system cost is increased. Further, the LD is a current drive device, and constant current drive is necessary to obtain a constant light amount, but the light emission threshold gradually increases with the deterioration of the LD as with the forward voltage. For this reason, from the viewpoint of guaranteeing the number of printed sheets, constant current drive up to several tens of mA is still required as in the past, and the MOS transistor that supplies constant current to the LD is designed to have a size that can supply a sufficient maximum drive current. There is a need to. As a result, in the low current region, it is necessary to drive the “MOS transistor designed to the required size” with a small current as described above, and the responsiveness of the drive circuit is lowered. In particular, in order to charge the parasitic capacitance including the gate capacitance of the “MOS transistor designed to have a required size”, there is a problem that a desired optical pulse width cannot be obtained due to a slow rise time. In addition, when a cathode common type LD is used, there is a problem that it is necessary to use a PMOS having a current supply capability or a current drive capability inferior to that of an NMOS.

  In view of the above-described problems of the prior art, the present invention improves the control accuracy of the light emission pulse width of an LD based on a data signal, enables a reduction in voltage, and suppresses overshoot and undershoot of output current. A drive circuit is provided.

  In order to solve the problems described above, a light-emitting element driving circuit according to the present invention is a light-emitting element driving circuit that drives a light-emitting element according to a differential data signal for causing the light-emitting element to emit light or extinguish. 1 transistor, a first constant current source connected to the drain and gate of the first transistor, and passing a constant current between the drain and source of the first transistor, and a predetermined current with respect to the constant current A second transistor for passing a current having a mirror ratio to the light emitting element, and a gate of the first transistor and a gate of the second transistor through a first resistor in accordance with one of the differential data signals. A control circuit for connecting or disconnecting, and the control circuit disconnects the gate of the first transistor and the gate of the second transistor, And a potential supply means for supplying an intermediate potential between a potential at which the second transistor is completely turned on and a potential at which the second transistor is completely turned off to the gate of the second transistor according to the other of the differential data signals. To do.

  According to the present invention, the required power supply voltage is the forward voltage of the LD and one stage of the driving MOS transistor that supplies a constant current to the LD, and the voltage can be reduced. Such a low voltage power supply can reduce the cost required for the power supply. The drain electrode of the MOS transistor that turns off the driving MOS transistor is connected to a constant current source (constant current value I) via a resistor (resistance value R). Therefore, the source-gate voltage Vgs of the driving MOS transistor is not zero but is fixed at a potential determined by Vgs = I × R (hereinafter referred to as pre-bias for convenience). This potential is set below the threshold voltage of the driving MOS transistor. As a result, no drive current is output unless an ON signal is generated at the gate of the drive MOS transistor. When an ON signal is generated at the gate of the driving MOS transistor, the source-gate voltage of the driving MOS transistor may be increased from the pre-bias Vgs to a voltage that generates a required driving current. That is, it is not necessary to charge the gate capacitance of the driving MOS transistor in order to raise the potential from zero at the initial driving stage to the pre-bias Vgs, and the rise time can be increased.

It is a figure which shows the circuit structural example of Example 1 concerning this invention. It is a figure which shows the waveform of the simulation result of Example 1 concerning this invention. It is a figure which shows the circuit structural example of Example 2 concerning this invention. It is a figure which shows the waveform of the simulation result of Example 2 concerning this invention. It is the figure which showed typically the effect by Example 1 and 2 concerning this invention. It is a figure which shows the characteristic of a laser diode.

  Hereinafter, embodiments of the light emitting element driving circuit of the present invention will be described in detail with reference to the accompanying drawings.

[Example 1]
<Circuit Configuration Example of First Embodiment> In FIG. 1, a current mirror circuit having a predetermined mirror ratio is configured by MOS transistors M1 and M4 referred to as a first transistor and a second transistor. The gate and drain of the MOS transistor M1 are respectively connected to the other end of the first constant current source I1 whose one end is connected to GND (ground), and the source of the MOS transistor M1 is connected to the power supply potential Vcc. The drain of the MOS transistor M2, referred to as the first switch transistor, is connected to both the gate and drain of the MOS transistor M1. The source of the MOS transistor M2 is connected to the other end of the first resistor R1 whose one end is connected to the gate of the MOS transistor M4. The source of the MOS transistor M2 is connected to the other end of the second resistor Rbias1 having one end connected to the drain of the MOS transistor M3 referred to as the second switch transistor. Further, the source of the MOS transistor M2 is connected to the other end of the second constant current source Ibias whose one end is connected to GND (ground). That is, the second resistor Rbias1 and the second constant current source Ibias are connected in series. The gate of the MOS transistor M2 is connected to the first output Von of the differential output signal generation circuit DIFF, which is referred to as one of the differential data signals. The gate of the MOS transistor M3 is connected to the second output Voff of the differential output signal generation circuit DIFF, which is referred to as the other differential data signal. The MOS transistor M4 has a size m (m is an integer) times that of the MOS transistor M1. The drain of the MOS transistor M4 is connected to the other end of the semiconductor light emitting element LD whose one end is connected to GND, and supplies a current of m × I1 to the semiconductor light emitting element LD. The back gates of the MOS transistors M1 to M4 are connected to the source and operate as self-biased MOS transistors. In FIG. 1, a configuration including the MOS transistors M2 and M3, the second resistor Rbias1, and the second constant current source Ibias is referred to as a control circuit.

  <Circuit Operation Example of Embodiment 1> V− and V + are complementary digital signal inputs to the differential output signal generation circuit DIFF. When V-> V +, Von = Low, the gate potential of the MOS transistor M2 = Low, and Voff = High, the gate potential of the MOS transistor M3 = High. Accordingly, the current mirror constituted by the MOS transistors M1 and M4 is deactivated by cutting the MOS transistor M2. On the other hand, due to the conduction of the MOS transistor M3, the second constant current Ibias flows through the second resistor Rbias and supplies a potential to the gate of the MOS transistor M4. However, since the source-gate voltage Vgs4≈Rbias × Ibias (<threshold voltage of the MOS transistor M4) of the MOS transistor M4 is designed, the LD is turned off. That is, the potential supplied to the gate of the MOS transistor M4 is an intermediate potential between the potential at which the MOS transistor M4 is completely turned on and the potential at which it is completely turned off. This intermediate potential is desirably closer to the potential at which the MOS transistor M4 is completely turned on than the potential at which the MOS transistor M4 is completely turned off. In the state of V− <V +, when Von = High, the gate potential of the MOS transistor M2 becomes High, and when Voff = Low, the gate potential of the MOS transistor M3 becomes Low. Accordingly, the conductive MOS transistor M2 connects the gates of the MOS transistors M1 and M4. Therefore, the current mirror composed of the MOS transistors M1 and M4 is in an operating state, the MOS transistor M4 generates a current m times that of the first current source I1, and the LD is in a light emitting state.

  <Characteristics of Circuit of First Embodiment> Here, it is necessary to control the operating state of the LD based on a data signal to perform light emission / extinguishing at high speed, but in order to obtain a desired current value and pulse width, a MOS transistor The gate potential of M4 needs to quickly reach a desired potential. For example, it is assumed that there is no second resistor Rbias and second constant current source Ibias. In this case, the time until the gate potential of the MOS transistor M4 reaches the desired potential is the time required to charge the gate capacitance of the MOS transistor M4 to the desired potential by the first constant current I1. It depends on the magnitude of the first constant current I1. Therefore, in the low current region, the time for charging the gate capacitance of the MOS transistor M4 becomes longer, and therefore the time for the gate potential of the MOS transistor M4 to reach a desired potential is delayed. As a result, the light emission start time of the LD is delayed and the light emission time of the LD is shortened, so that accurate image data cannot be obtained. In FIG. 1, the source-gate voltage Vgs4 of the MOS transistor M4 is kept at the pre-bias potential (Rbias × Ibias) even when the MOS transistor M4 is off and the LD is off. Therefore, the time for turning on the MOS transistor M4 can be shortened. As a result, the rise time of the output drain current Iout of the MOS transistor M4 can be shortened.

  <Waveforms and Effects in the Circuit of the First Embodiment> FIG. 2 shows the second resistor Rbias = 1.5 kΩ in the first embodiment and the pre-bias of the source-gate voltage Vgs4 of the MOS transistor M4 = 0.3V. It is a simulation waveform at the time. The rise time of the present invention is about 0.6 ns faster than in the case of the conventional example in which no pre-bias is applied. This is equivalent to an improvement in the accuracy of the pulse width of 10% or more since the pulse width is 5 ns considering, for example, 200 Mbps data.

[Example 2]
<Circuit Configuration Example of Example 2> In Example 2 of FIG. 3, the potential applied to the gate of the MOS transistor M4 is obtained by the following resistor circuit. Such a resistor circuit is configured by connecting a diode D and two resistors Rbias1 and Rbias2 connected in series in parallel. The forward voltage of the diode D generated from the second constant current Ibias is divided by the two resistors Rbias1 and Rbias2 connected in series, and given to the gate of the MOS transistor M4 from the connection point of the two resistors Rbias1 and Rbias2. Getting potential. Since other configurations are the same as those of the first embodiment, they are not repeated here. In the second embodiment, the pre-bias voltage at the connection point of the two resistors Rbias1 and Rbias2 is given by Vbias = VF × {Rbias2 / (Rbias1 + Rbias2)}. In the simulation of the second embodiment, Rbias1 = 1 kΩ and Rbias2 = 2 kΩ are set higher than the second resistance Rbias of the first embodiment = 1.5 kΩ. In the first embodiment, when an actual semiconductor integrated circuit (hereinafter referred to as an IC) is used, it is necessary to prevent the output PMOS transistor M4 from generating a current when the output PMOS transistor M4 is off due to variations in Ibias, Rbias, and PMOS thresholds. Because. For this purpose, the pre-bias voltage needs to be set much lower than the PMOS threshold voltage. In Example 2, since the effect of speeding up is higher as the pre-bias voltage is closer to the threshold value, the forward voltage of the diode with low current dependence is extracted by resistance voltage division to cancel the resistance variation.

  <Characteristics of Circuit of Second Embodiment> This can be explained by the following equation.

Therefore, even if the current is doubled, the forward voltage changes only 18 mV,

Therefore, the resistance variation is offset by the denominator / numerator relationship. In fact, the variation of Ibias assumed in the IC is about ± 30%, and the change of Vbias becomes slight due to the effect of the resistance voltage division, and the fluctuation of the output current Iout can be ignored. Thus, by applying a pre-bias using a diode to the gate electrode of the MOS transistor M4, a pre-bias near the threshold can be applied without variation and exceeding the threshold.

  <Waveforms and Effects in Circuit of Second Embodiment> FIG. 4 shows simulation waveforms of the second embodiment. Compared to the conventional example, the rise time of the output drain current Iout of the MOS transistor M4 is increased.

  <LD Light Emission Effect According to this Example> FIG. 5 schematically shows the effect obtained according to Examples 1 and 2. When the solid line is the conventional example, the dotted line indicates the rise time of the gate potential of the MOS transistor M4. Shows the case. As shown in FIG. 5, the light emission pulse width of the LD is close to the pulse width given to the gate of the MOS transistor M4, and the accuracy is improved.

  As described above, according to the present invention, in an LBP that outputs an image using a laser diode, a copying machine, or the like, the optical pulse width at the time of forming an image is accurately matched to a desired pulse width in a 3V system power supply. It is possible to provide a constant current circuit that can be used. Driving the laser diode with such a constant current circuit contributes to improving the performance of the system. Furthermore, a power supply system of 5 V or more can be eliminated as in the conventional example. In the conventional example, in order to perform comparison with a 3V system power supply, the circuit is changed to a circuit operable with a 3V system.

[Other embodiments]
In the first and second embodiments, the circuit for driving the cathode common type laser diode has been described. Even in the anode common type, the PMOS configuration is the NMOS configuration, and the target circuit is connected to the power supply and GND. By using this, the same effect can be obtained.

  Vcc: 3V system power supply potential, GND: ground potential, DIFF: differential signal data generator, V +, V-: complementary differential signal, I1: first constant current source, Ibias: second constant current source, LD : Laser diode, M1 to M4: PMOS transistor, R1, Rbias1, Rbias2: Resistor, OUT: Output terminal

Claims (8)

A light emitting element driving circuit for driving the light emitting element according to a differential data signal for causing the light emitting element to emit light or extinguish,
A first transistor;
A first constant current source connected to a drain and a gate of the first transistor and configured to pass a constant current between the drain and the source of the first transistor;
A second transistor for causing a current having a predetermined mirror ratio to the constant current to flow through the light emitting element;
A control circuit for connecting or disconnecting the gate of the first transistor and the gate of the second transistor via a first resistor according to one of the differential data signals;
The control circuit connects the second transistor to the gate of the second transistor according to the other of the differential data signals while disconnecting the gate of the first transistor and the gate of the second transistor. A light-emitting element driving circuit comprising: potential supply means for supplying an intermediate potential between a potential at which the light is completely turned on and a potential at which the light is completely turned off   2. The light emitting element driving circuit according to claim 1, wherein the intermediate potential is closer to a potential for completely turning on the second transistor than a potential for completely turning off the second transistor. Wherein the control circuit includes a first switching transistor, said differential by Rukoto said data signal while being input to the gate of the first switching transistor, a gate and said second transistor of said first transistor light-emitting element driving circuit according to claim 1 or 2 and the gate is connected or disconnected via said first resistor and said first switching transistor and said Rukoto. The potential supply means includes
A second resistor and a second constant current source connected in series having a connection point for supplying the intermediate potential to the gate of the second transistor;
A second switching transistor having the other of the differential data signal is inputted to the gate, the series connected second resistor and a second said connecting or disconnecting the one end to the supply of the constant current source The light emitting element drive circuit according to claim 3, further comprising a second switch transistor. The potential supply means includes
A series-connected resistor circuit and a second constant current source for supplying the intermediate potential to the gate of the second transistor;
The differential said data signal and a second switching transistor and the other is input to the gate, the series connected resistor circuit and the second the second connect or disconnect one end to the supply of the constant current source Switch transistors,
The resistor circuit is a circuit in which a diode and two resistors connected in series are connected in parallel, and the intermediate potential is supplied from a connection point of the two resistors connected in series. The light emitting element drive circuit according to claim 3. The first transistor, the second transistor, the first switch transistor, and the second switch transistor are all PMOS transistors,
One end of the first constant current source is grounded, and the other end of the first constant current source is connected to a drain and a gate of the first transistor;
The second end of the constant current source is grounded, the other end of said second constant current source is connected to one end of said second resistor,
A source and a back gate of the first transistor are connected to a power supply potential;
The gate of the first switching transistor is connected to said one of said differential data signal, the drain of the first switching transistor is connected to the gate and drain of said first transistor, said first switching transistor source connected to one end and the second one terminal of the resistor of the first resistor,
The gate of the second transistor is connected to the other end of the first resistor, the source and back gate of the second transistor are connected to a power supply potential, and the drain of the second transistor is one end of the light emitting element. Connected with
The gate of the second switching transistor is connected to the other of the differential data signal, the drain of the second switching transistor is connected to the other end of said second resistor, the source of the second switch transistor The light emitting element drive circuit according to claim 4 , wherein the back gate is connected to a power supply potential.   The first transistor, the second transistor, the first switch transistor, and the second switch transistor are all PMOS transistors,
  One end of the first constant current source is grounded, and the other end of the first constant current source is connected to a drain and a gate of the first transistor;
  One end of the second constant current source is grounded, and the other end of the second constant current source is connected to one end of the resistor circuit;
  A source and a back gate of the first transistor are connected to a power supply potential;
  A gate of the first switch transistor is connected to the one of the differential data signals; a drain of the first switch transistor is connected to a gate and a drain of the first transistor; A source is connected to one end of the first resistor and a connection point of two resistors in the resistor circuit;
  The gate of the second transistor is connected to the other end of the first resistor, the source and back gate of the second transistor are connected to a power supply potential, and the drain of the second transistor is one end of the light emitting element. Connected with
  The gate of the second switch transistor is connected to the other of the differential data signals, the drain of the second switch transistor is connected to the other end of the resistor circuit, and the source and back of the second switch transistor 6. The light emitting element driving circuit according to claim 5, wherein the gate is connected to a power supply potential. A light emitting element driving circuit according to any one of claims 1 to 7,
  An image forming apparatus comprising: a light emitting element driven by the light emitting element driving circuit.

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