JP5458252B2 - Simplified fabrication method of intrinsic Josephson tunnel device - Google Patents
Simplified fabrication method of intrinsic Josephson tunnel device Download PDFInfo
- Publication number
- JP5458252B2 JP5458252B2 JP2009079643A JP2009079643A JP5458252B2 JP 5458252 B2 JP5458252 B2 JP 5458252B2 JP 2009079643 A JP2009079643 A JP 2009079643A JP 2009079643 A JP2009079643 A JP 2009079643A JP 5458252 B2 JP5458252 B2 JP 5458252B2
- Authority
- JP
- Japan
- Prior art keywords
- tunnel device
- josephson tunnel
- intrinsic
- intrinsic josephson
- single crystal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
Description
本発明は、超伝導単結晶の表面に絶縁層と電極を配置してなる固有ジョセフソントンネルデバイスの簡易作製法に関する。 The present invention relates to a simple manufacturing method of a specific Josephson tunnel device in which an insulating layer and an electrode are arranged on the surface of a superconducting single crystal.
特許文献１に示すように、固有ジョセフソントンネルデバイスについては公知であり、その有用性については十分知られている。特許文献１に記載の固有ジョセフソントンネルデバイスは、（ａ）超伝導体単結晶内部に形成される微細な超電流経路と、（ｂ）該超電流経路を埋め込むようにイオン注入により形成される絶縁化層と、（ｃ）前記超電流経路と絶縁化層上に形成されるエピタキシャル高温超伝導電極層とを具備することを特徴とする層状高温超伝導体固有ジョセフソン効果装置（請求項１）である。 As shown in Patent Document 1, the intrinsic Josephson tunnel device is known and its usefulness is well known. The intrinsic Josephson tunnel device described in Patent Document 1 is formed by (a) a fine supercurrent path formed inside a superconductor single crystal, and (b) ion implantation so as to embed the supercurrent path. A layered high temperature superconductor intrinsic Josephson effect device comprising: an insulating layer; and (c) an epitaxial high temperature superconducting electrode layer formed on the supercurrent path and the insulating layer. ).
しかしながら、特許文献１などに記載の従来の固有ジョセフソントンネルデバイスは、イオン注入やイオンビームエッチングおよびリソグラフィーなど高度で複雑な技術を要するという欠点があり、またコスト面からも実用的ではなかった。 However, the conventional intrinsic Josephson tunnel device described in Patent Document 1 or the like has a drawback that it requires advanced and complicated techniques such as ion implantation, ion beam etching, and lithography, and is not practical from the viewpoint of cost.
そこで、本発明は、このような実情に鑑み、イオン注入やイオンビームエッチングおよびリソグラフィーなど高度で複雑な技術を要することなく、固有ジョセフソントンネルデバイスを作製する固有ジョセフソントンネルデバイスの簡易作製法を提供することを課題とした。 Therefore, in view of such circumstances, the present invention provides a simple method for manufacturing an intrinsic Josephson tunnel device for producing an intrinsic Josephson tunnel device without requiring sophisticated and complicated techniques such as ion implantation, ion beam etching, and lithography. It was an issue to provide.
上記課題を解決するために、第１に、超伝導単結晶の表面に絶縁層と電極を配置してなる固有ジョセフソントンネルデバイスの簡易作製法であって、前記表面の絶縁層を前記超伝導単結晶の結晶面を表面とし、当該表面を還元雰囲気に暴露しながら加熱して、当該表面を還元して絶縁化し、形成することを特徴とする固有ジョセフソントンネルデバイスの簡易作製法の構成とした。 In order to solve the above problems, first, there is provided a simple method for producing an intrinsic Josephson tunnel device in which an insulating layer and an electrode are arranged on the surface of a superconducting single crystal, wherein the superconducting layer is formed on the surface. A structure of a simple manufacturing method of an intrinsic Josephson tunnel device characterized in that the surface of a single crystal is a surface, and the surface is heated while being exposed to a reducing atmosphere to reduce and insulate the surface. did.
さらに、前記超伝導単結晶が、Ｂｉ−２２１２であることを特徴とする前記固有ジョセフソントンネルデバイスの簡易作製法の構成、また前記還元雰囲気が、モル比９５〜９８％の不活性ガスと、モル比２〜５％の水素ガスの混合ガスであることを特徴とする前記何れかに記載の固有ジョセフソントンネルデバイスの簡易作製法の構成、或いは前記加熱が、１５０〜５００℃の範囲で、０．２〜５時間行われることを特徴とする前記何れかに記載の固有ジョセフソントンネルデバイスの簡易作製法の構成とした。そして、前記何れかに記載の固有ジョセフソントンネルデバイスの簡易作製法によって製造されることを特徴とする固有ジョセフソントンネルデバイスの構成とした。 Furthermore, the superconducting single crystal is Bi-2212, the configuration of a simple method for producing the intrinsic Josephson tunnel device, and the reducing atmosphere includes an inert gas having a molar ratio of 95 to 98%, The structure of the simple method for producing the intrinsic Josephson tunnel device according to any one of the above, wherein the heating is performed in a range of 150 to 500 ° C. It is carried out for 0.2 to 5 hours, and it is set as the structure of the simple manufacturing method of the intrinsic | native Josephson tunnel device in any one of the said characterized by the above-mentioned. And it was set as the structure of the intrinsic | native Josephson tunnel device characterized by being manufactured by the simple manufacturing method of the intrinsic | native Josephson tunnel device in any one of the said.
本発明は、上記構成であるから、次の効果を有する。特許文献１に記載の技術ではイオン注入技術により必要とする絶縁層を形成していたが、本発明では代わりに還元雰囲気中での熱処理を用いた非常に簡便な手法で、特許文献１と同様な絶縁層を形成でき、電流パスを制御できた。即ち、本発明では、超伝導単結晶の表面近傍のみを絶縁化することができる。ここいう表面近傍とは、最表面から数ｎｍ〜数十ｎｍの領域である。これにより、電流の流れる経路が変化し、c軸方向（深さ方向）を通るようになる。それに伴い、固有ジョセフソン特性が観測できる固有ジョセフソントンネルデバイスを簡易に作製することができる。また、本発明は上記従来の欠点を解決できるのみならず、より均一な特性を有する固有ジョセフソントンネルデバイスを得られる。これは、本発明においては絶縁層が深さ方向に１層単位ずつ順次形成されていくためである。 Since this invention is the said structure, it has the following effect. In the technique described in Patent Document 1, an insulating layer required by the ion implantation technique is formed. However, in the present invention, a very simple method using heat treatment in a reducing atmosphere is used instead, as in Patent Document 1. An insulating layer could be formed and the current path could be controlled. That is, in the present invention, only the vicinity of the surface of the superconducting single crystal can be insulated. Here, the vicinity of the surface refers to a region from several nm to several tens of nm from the outermost surface. As a result, the path through which the current flows changes and passes through the c-axis direction (depth direction). Accordingly, an intrinsic Josephson tunnel device capable of observing the intrinsic Josephson characteristics can be easily produced. In addition, the present invention can not only solve the above-mentioned conventional drawbacks, but also obtain a unique Josephson tunnel device having more uniform characteristics. This is because in the present invention, the insulating layers are sequentially formed one by one in the depth direction.
上記特許文献１の「イオン注入により絶縁化層を形成する工程」を「還元雰囲気中熱処理」に置換えても同様な作用効果を発揮させ得ることは、特許文献１の図２で示されるプロセスで形成されるデバイスの電流パスと、本発明で形成されるデバイスの電流パスが類似していることに起因する。 Even if the “step of forming an insulating layer by ion implantation” in the above-mentioned Patent Document 1 is replaced with “heat treatment in a reducing atmosphere”, the same effect can be achieved by the process shown in FIG. This is because the current path of the device formed is similar to the current path of the device formed in the present invention.
下記実施例では、Ｂｉ−２２１２超伝導単結晶を例示したが、その他、以下のような超伝導単結晶についても同様な方法で、絶縁層を超伝導単結晶表面部に形成することができる。 In the following examples, Bi-2212 superconducting single crystals are exemplified, but in addition, an insulating layer can be formed on the surface of the superconducting single crystal by the same method for the following superconducting single crystals.
以下、本発明である固有ジョセフソントンネルデバイスの一例の作製方法のフローを説明する。本発明によって得られるＢｉ−２２１２超伝導単結晶を用いた固有ジョセフソントンネルデバイスは、次の（１）〜（４）のプロセスを経て得られた。 Hereinafter, a flow of a manufacturing method of an example of the intrinsic Josephson tunnel device according to the present invention will be described. The intrinsic Josephson tunnel device using the Bi-2212 superconducting single crystal obtained by the present invention was obtained through the following processes (1) to (4).
Ｂｉ−２２１２は、ビスマス（Ｂｉ）を中心とした銅酸化物で、構成する元素記号（割合）を示すと、Ｂｉ（２）、Ｓｒ（２）、Ｃａ（１）、Ｃｕ（２）、Ｏｙである。ビスマス−２２１２は、結晶を作るだけで、自然に、超伝導層と絶縁層が交互に配置されたサンドイッチ層（ジョセフソン接合列）を形成する。さらに、それら層は極めて薄くできる優れた特性があることから、半導体に代わる素子として期待されている。 Bi-2212 is a copper oxide centering on bismuth (Bi), and the constituent symbols (ratio) constituting it are Bi (2), Sr (2), Ca (1), Cu (2), Oy. It is. Bismuth-2212 naturally forms a sandwich layer (a Josephson junction array) in which superconducting layers and insulating layers are alternately arranged by simply forming a crystal. Furthermore, since these layers have excellent properties that can be made extremely thin, they are expected as devices that can replace semiconductors.
（１）劈開工程
１０ｍｍ×５ｍｍ×０．３ｍｍ程度のサイズを有するＢｉ−２２１２超伝導単結晶をスコッチ（スリーエム社登録商標）テープを用いて劈開し、清浄面を出した。
(1) Cleaving step A Bi-2212 superconducting single crystal having a size of about 10 mm × 5 mm × 0.3 mm was cleaved using a Scotch (registered trademark of 3M) tape to reveal a clean surface.
（２）電極形成工程
工程（１）で用意した単結晶劈開面上に銀ペーストを用いて電極を４つ配列した（図１）。
(2) Electrode formation process Four electrodes were arranged on the single crystal cleavage plane prepared in the step (1) using a silver paste (FIG. 1).
（３）還元熱処理工程
工程（２）で作製したものを２％Ｈ２＋９８％Ｎ２の還元雰囲気中において、４００℃で１ｈ熱処理して還元処理を施した。還元熱処理工程により、Ｂｉ−２２１２超伝導単結晶の表面近傍層が絶縁体になった。絶縁化は光電子分光による測定で観測されたＣｕ２ｐ内殻光電子スペクトルで確認された。具体的には、Ｃｕ２ｐ光電子スペクトルにおけるサテライトピーク（２ｐ５３ｄ９）の強度が超伝導を示す場合のそれに比べて著しく低下していることから判別した。
(3) Reduction heat treatment step The material produced in the step (2) was subjected to reduction treatment by heat treatment at 400 ° C. for 1 h in a reducing atmosphere of 2% H 2 + 98% N 2 . The near-surface layer of the Bi-2212 superconducting single crystal became an insulator by the reduction heat treatment step. Insulation was confirmed by the Cu2p core photoelectron spectrum observed by photoelectron spectroscopy. Specifically, it was determined from the fact that the intensity of the satellite peak (2p 5 3d 9 ) in the Cu2p photoelectron spectrum was significantly lower than that in the case of showing superconductivity.
（４）電気パス偏向工程
工程（３）で作製したものにおいてＩＨ端子およびＩＬ端子を電流端子として用い、一方でＶＨ端子およびＶＬ端子を電圧端子として用いることで、電流パスを固有ジョセフソン接合列が存在する深さ方向に偏向できた。
(4) Electric path deflection process In the one produced in step (3), the I H terminal and the IL terminal are used as current terminals, while the V H terminal and the VL terminal are used as voltage terminals, thereby making the current path unique. It was possible to deflect in the depth direction where Josephson junctions exist.
電流パスは、図２に示すように抵抗−温度特性測定で観測された「超伝導転移温度が不変の状態にも関わらず電気抵抗値が半導体的振舞いを示す」ことから確認された。また、固有ジョセフソントンネルデバイスとしての動作の確認は、図３に示すように電流−電圧特性測定で観測された「電圧の不連続な飛び」から確認された。 As shown in FIG. 2, the current path was confirmed from the fact that “the electric resistance value exhibits a semiconductor behavior despite the fact that the superconducting transition temperature is unchanged” observed in the resistance-temperature characteristic measurement. The operation of the intrinsic Josephson tunnel device was confirmed from “discontinuous voltage jumps” observed in the current-voltage characteristic measurement as shown in FIG.
これらのプロセスにより高温超伝導体の単結晶上に、ｃ軸方向に存在する固有ジョセフソン接合列を活かした形態のトンネルデバイスが形成された。 By these processes, a tunnel device having a form utilizing the intrinsic Josephson junction array existing in the c-axis direction was formed on the single crystal of the high-temperature superconductor.
従来の層状高温超伝導固有ジョセフソントンネルデバイス作製方法では高度で複雑な技術を要するという点およびコスト面から実用的ではないという問題があった。本発明により非常に安価に安定したデバイスを簡易に作製することが可能になった。本プロセスで作製した層状高温超伝導固有ジョセフソントンネルデバイスを用いたＨＴＳ（Ｈｉｇｈ Ｔｅｍｐｅｒａｔｕｒｅ Ｓｕｐｅｒｃｏｎｄｕｃｔｏｒ：高温超伝導体）−ＳＱＵＩＤ（Ｓｕｐｅｒｃｏｎｄｕｃｔｉｎｇ Ｑｕａｎｔｕｍ Ｉｎｔｅｒｆｅｒｅｎｃｅ Ｄｅｖｉｃｅ：超伝導量子干渉素子）は低コスト及びメンテナンスフリーである為、各種検査装置（食品・薬品内異物検査装置や半導体デバイス検査装置などの非破壊検査）に応用することが可能である。従って、産業分野への貢献も大きく、経済的効果をもたらす。 The conventional layered high-temperature superconducting intrinsic Josephson tunnel device fabrication method has problems that it requires advanced and complicated technology and is not practical from the viewpoint of cost. The present invention makes it possible to easily produce a stable device at a very low cost. HTS (High Temperature Superconductor) using a layered high-temperature superconducting intrinsic Josephson tunnel device fabricated by this process-SQUID (Superducting Quantum Interference Device is a low-cost superconducting quantum interference device). Therefore, it can be applied to various inspection devices (non-destructive inspection such as food / chemical foreign matter inspection devices and semiconductor device inspection devices). Therefore, it contributes greatly to the industrial field and brings economic effects.
Claims (4)
前記絶縁層を、
前記超伝導単結晶の結晶面を表面とし、当該表面を、モル比９５〜９８％の不活性ガスとモル比２〜５％の水素ガスの混合ガスからなる還元雰囲気に暴露しながら加熱して、当該表面を還元して絶縁化し、形成することを特徴とする固有ジョセフソントンネルデバイスの簡易作製法。 It is a simple fabrication method of an intrinsic Josephson tunnel device in which an insulating layer and electrodes are arranged on the surface of a superconducting single crystal,
The insulating layer;
The surface of the superconducting single crystal is the surface, and the surface is heated while being exposed to a reducing atmosphere composed of a mixed gas of an inert gas having a molar ratio of 95 to 98% and a hydrogen gas having a molar ratio of 2 to 5%. A simple method for fabricating a unique Josephson tunnel device, characterized in that the surface is reduced to insulate and form.
An intrinsic Josephson tunnel device manufactured by the simple method for producing an intrinsic Josephson tunnel device according to any one of claims 1 to 3 .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009079643A JP5458252B2 (en) | 2009-03-27 | 2009-03-27 | Simplified fabrication method of intrinsic Josephson tunnel device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009079643A JP5458252B2 (en) | 2009-03-27 | 2009-03-27 | Simplified fabrication method of intrinsic Josephson tunnel device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2010232500A JP2010232500A (en) | 2010-10-14 |
| JP5458252B2 true JP5458252B2 (en) | 2014-04-02 |
Family
ID=43048034
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009079643A Expired - Fee Related JP5458252B2 (en) | 2009-03-27 | 2009-03-27 | Simplified fabrication method of intrinsic Josephson tunnel device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP5458252B2 (en) |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01106492A (en) * | 1987-10-20 | 1989-04-24 | Mitsubishi Electric Corp | Manufacture of superconductive wiring substrate |
| JPH06120576A (en) * | 1992-10-07 | 1994-04-28 | Fujitsu Ltd | Superconducting device manufacturing method |
| JPH11274584A (en) * | 1998-03-23 | 1999-10-08 | Japan Science & Technology Corp | Layered high temperature superconductor intrinsic Josephson effect device and method of manufacturing the same |
| JP5207271B2 (en) * | 2007-09-05 | 2013-06-12 | 独立行政法人物質・材料研究機構 | In-plane Josephson junction formation on high-temperature superconducting single crystals. |
-
2009
- 2009-03-27 JP JP2009079643A patent/JP5458252B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2010232500A (en) | 2010-10-14 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7767564B2 (en) | Nanowire electronic devices and method for producing the same | |
| Kim et al. | Post ionized defect engineering of the screen-printed Bi2Te2. 7Se0. 3 thick film for high performance flexible thermoelectric generator | |
| CN1428020B (en) | Thermal diode for energy conversion and method for refrigeration using same | |
| Taskin et al. | Electron-hole asymmetry in GdBaCo 2 O 5+ x: Evidence for spin blockade of electron transport in a correlated electron system | |
| JP5677713B2 (en) | Thermal-electrical conversion device using the Savebeck / Pelty effect using processed layers made of semiconductor material without the need for nanostructures | |
| WO2008010569A1 (en) | Josephson junction and josephson device | |
| CN1018114B (en) | superconducting device | |
| JP2017500756A (en) | Integrated superconductor device and manufacturing method thereof | |
| Kim et al. | Realization of high‐performance screen‐printed flexible thermoelectric generator by improving contact characteristics | |
| JPH104223A (en) | Oxide superconductor Josephson device | |
| JP5458252B2 (en) | Simplified fabrication method of intrinsic Josephson tunnel device | |
| JP4762911B2 (en) | Thermoelectric conversion material and method for producing thermoelectric conversion material | |
| KR102296386B1 (en) | The method for preparation of transparent thermoelectric materials and transparent and flexible thermoelectric generators using the same | |
| Takano et al. | A cross-whiskers junction as a novel fabrication process for intrinsic Josephson junctions | |
| JP7182177B2 (en) | Thin film forming method | |
| Stankiewicz et al. | Electrical properties of p‐type MnxCd1− x Te crystals | |
| JP5207271B2 (en) | In-plane Josephson junction formation on high-temperature superconducting single crystals. | |
| EP0371462B1 (en) | Oxide superconducting device | |
| Chu et al. | Origin of photovoltaic effect in (Bi, Pb) 2Sr2Ca2Cu3O10+ δ/Ag heterostructure | |
| JP2018113330A (en) | Thermoelectric conversion element and manufacturing method thereof | |
| JP3922651B2 (en) | Thermoelectric conversion material, thermoelectric conversion element using the same, and electronic device and cooling device provided with the element | |
| JP3995810B2 (en) | High temperature single electron pair tunneling device manufacturing method using layered oxide superconductor | |
| JP5748519B2 (en) | Josephson element and method of manufacturing the same | |
| KR100400080B1 (en) | Josephson junction including superconducting MgB2 thin film and method for manufacturing the same | |
| Grigorashvili et al. | Fabrication of nanosized superconductor structures with a critical temperature exceeding 100 K |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20111213 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A821 Effective date: 20111213 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120113 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20130621 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20130625 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20130723 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20131125 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20131210 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 5458252 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| LAPS | Cancellation because of no payment of annual fees |