JP5526617B2 - Dielectric ceramic and multilayer ceramic capacitors - Google Patents
Dielectric ceramic and multilayer ceramic capacitors Download PDFInfo
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- JP5526617B2 JP5526617B2 JP2009147728A JP2009147728A JP5526617B2 JP 5526617 B2 JP5526617 B2 JP 5526617B2 JP 2009147728 A JP2009147728 A JP 2009147728A JP 2009147728 A JP2009147728 A JP 2009147728A JP 5526617 B2 JP5526617 B2 JP 5526617B2
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- 239000000919 ceramic Substances 0.000 title claims description 60
- 239000003985 ceramic capacitor Substances 0.000 title claims description 26
- 229910018072 Al 2 O 3 Inorganic materials 0.000 claims description 8
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 8
- 101100513612 Microdochium nivale MnCO gene Proteins 0.000 claims description 7
- 239000000843 powder Substances 0.000 description 24
- 238000009413 insulation Methods 0.000 description 8
- 239000002994 raw material Substances 0.000 description 8
- 229910006404 SnO 2 Inorganic materials 0.000 description 7
- 239000012299 nitrogen atmosphere Substances 0.000 description 6
- 238000001035 drying Methods 0.000 description 4
- 239000002904 solvent Substances 0.000 description 4
- 239000007858 starting material Substances 0.000 description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 4
- 239000012298 atmosphere Substances 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 2
- 230000002411 adverse Effects 0.000 description 2
- 239000011230 binding agent Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 150000001768 cations Chemical class 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000010304 firing Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 238000005245 sintering Methods 0.000 description 2
- 239000002002 slurry Substances 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- 229910000906 Bronze Inorganic materials 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 239000010974 bronze Substances 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- KUNSUQLRTQLHQQ-UHFFFAOYSA-N copper tin Chemical compound [Cu].[Sn] KUNSUQLRTQLHQQ-UHFFFAOYSA-N 0.000 description 1
- 238000007606 doctor blade method Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000012071 phase Substances 0.000 description 1
- 229920002037 poly(vinyl butyral) polymer Polymers 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000010532 solid phase synthesis reaction Methods 0.000 description 1
- 238000003786 synthesis reaction Methods 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
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Description
この発明は、誘電体セラミックおよびそれを用いて構成される積層セラミックコンデンサに関するもので、特に、正の誘電率温度特性を有する誘電体セラミックに関する。 The present invention relates to a dielectric ceramic and a multilayer ceramic capacitor formed using the dielectric ceramic, and more particularly to a dielectric ceramic having a positive dielectric constant temperature characteristic.
各種電子回路には、温度補償用セラミックコンデンサが用いられることがある。これには、静電容量の温度変化に直線性が求められる。好ましくは、静電容量の温度係数がゼロのものが用いられるが、温度係数が正値のもの、温度係数が負値のものもある。 Temperature compensation ceramic capacitors may be used in various electronic circuits. For this, linearity is required for the temperature change of the capacitance. Preferably, the one having a capacitance temperature coefficient of zero is used, but there is a temperature coefficient having a positive value and a temperature coefficient having a negative value.
温度補償用セラミックコンデンサの静電容量の温度係数は、誘電体セラミックの誘電率の温度係数によって主に支配される。また、温度係数をゼロにするのは、温度係数が正値の材料と、温度係数が負値の材料とを組み合わせて、全体として温度係数をゼロにする手法も用いられる。 The temperature coefficient of the capacitance of the temperature compensating ceramic capacitor is mainly governed by the temperature coefficient of the dielectric constant of the dielectric ceramic. In order to make the temperature coefficient zero, a method of making the temperature coefficient zero as a whole by combining a material having a positive temperature coefficient and a material having a negative temperature coefficient is also used.
また、温度補償用セラミックコンデンサの静電容量の値は誘電体セラミックの誘電率によって決まるが、このとき、誘電率が大きいと、温度補償用セラミックコンデンサの小型化に有利となる。 The capacitance value of the temperature compensating ceramic capacitor is determined by the dielectric constant of the dielectric ceramic. At this time, if the dielectric constant is large, it is advantageous for downsizing the temperature compensating ceramic capacitor.
したがって、温度補償用セラミックコンデンサ用の誘電体セラミックのバリエーションとしては、誘電率が高く、かつ様々な温度係数を有する複数の材料を有しているのが好ましい。 Therefore, as a variation of the dielectric ceramic for the temperature compensating ceramic capacitor, it is preferable to have a plurality of materials having a high dielectric constant and various temperature coefficients.
温度補償用セラミックコンデンサに用いられる誘電体セラミックが、たとえば特許文献１に示されている。 For example, Patent Document 1 discloses a dielectric ceramic used for a temperature compensating ceramic capacitor.
しかしながら、特許文献１に記載の誘電体セラミックにおいては、温度係数が正値である誘電体セラミックを得ようとした場合、誘電率が小さくなるという問題があった。また、Ｃｕを主成分とする内部電極は使用可能であるものの、Ｎｉを主成分とする内部電極を使用するにはセラミックの耐還元性が不足しているという問題もあった。 However, the dielectric ceramic described in Patent Document 1 has a problem that the dielectric constant becomes small when an attempt is made to obtain a dielectric ceramic having a positive temperature coefficient. Moreover, although the internal electrode which has Cu as a main component can be used, there also existed a problem that the reduction resistance of a ceramic was insufficient when using the internal electrode which has Ni as a main component.
そこで、本発明の目的は、誘電率の温度係数が正値でありながら、誘電率の比較的高い誘電体セラミック材料を提供することである。 Accordingly, an object of the present invention is to provide a dielectric ceramic material having a relatively high dielectric constant while having a positive temperature coefficient of dielectric constant.
すなわち、本発明は、ＳｎmＮｂ2Ｏ6（０．７≦ｍ≦１．３）を主成分とし、抵抗率の対数logρ（ρ／Ω・ｍ）が９．１以上であることを特徴とする誘電体セラミックである。
That is, the present invention is characterized in that Sn m Nb 2 O 6 (0.7 ≦ m ≦ 1.3) is a main component and the logarithm log ρ (ρ / Ω · m) of resistivity is 9.1 or more. It is a dielectric ceramic.
また、本発明は、前記主成分１００重量部に対し、副成分として、Ｍｎ、Ｖ、Ｍｇ、Ｓｉのうち少なくとも一種を、ＭｎＣＯ3、Ｖ2Ｏ5、ＭｇＣＯ3、ＳｉＯ2に換算して合計１０重量部以下含むことも好ましい。さらに、本発明は、前記主成分１００重量部に対し、Ａｌ2Ｏ3、ＺｒＯ2のうち少なくとも一種を１０重量部以下含むことも好ましい。 In addition, according to the present invention, with respect to 100 parts by weight of the main component, at least one of Mn, V, Mg, and Si is converted into MnCO 3 , V 2 O 5 , MgCO 3 , and SiO 2 as subcomponents. It is also preferable to contain 10 parts by weight or less. Furthermore, the present invention preferably includes 10 parts by weight or less of at least one of Al 2 O 3 and ZrO 2 with respect to 100 parts by weight of the main component.
また、本発明は、積層された複数の誘電体セラミック層および前記誘電体セラミック層間の特定の界面に沿って形成された内部電極を含む積層体と、前記内部電極の特定のものに電気的に接続されるように前記積層体の外表面上に形成された外部電極とを備え、前記誘電体セラミック層が本発明の誘電体セラミックからなる積層セラミックコンデンサにも向けられる。 The present invention also provides a laminate including a plurality of laminated dielectric ceramic layers and a specific internal electrode formed along a specific interface between the dielectric ceramic layers, and a specific one of the internal electrodes. An external electrode formed on the outer surface of the multilayer body so as to be connected, and the dielectric ceramic layer is also directed to the multilayer ceramic capacitor made of the dielectric ceramic of the present invention.
本発明によれば、誘電率の温度係数が正値であり、十分な絶縁性を示し、かつ高い誘電率を有する誘電体セラミックを得ることができる。 According to the present invention, it is possible to obtain a dielectric ceramic that has a positive dielectric constant temperature coefficient, exhibits sufficient insulation, and has a high dielectric constant.
また、本発明の誘電体セラミックによれば、静電容量温度係数のバリエーションに富み、小型化に有利な積層セラミックコンデンサを得ることができる。 In addition, according to the dielectric ceramic of the present invention, it is possible to obtain a multilayer ceramic capacitor that is rich in variations in capacitance temperature coefficient and is advantageous for downsizing.
また、本発明の誘電体セラミックは耐還元性に優れるため、積層セラミックコンデンサの内部電極にＮｉを使用することが可能となり、低コストの積層セラミックコンデンサを得ることができる。 Further, since the dielectric ceramic of the present invention is excellent in reduction resistance, Ni can be used for the internal electrode of the multilayer ceramic capacitor, and a low-cost multilayer ceramic capacitor can be obtained.
図１は、この発明の一実施形態による積層セラミックコンデンサ１を示す断面図である。 FIG. 1 is a cross-sectional view showing a multilayer ceramic capacitor 1 according to an embodiment of the present invention.
積層セラミックコンデンサ１は、積層体２を備えている。積層体２は、積層された複数の誘電体セラミック層３と、複数の誘電体セラミック層３間の特定の複数の界面に沿ってそれぞれ形成された複数の内部電極４および５とをもって構成されている。 The multilayer ceramic capacitor 1 includes a multilayer body 2. The multilayer body 2 includes a plurality of laminated dielectric ceramic layers 3 and a plurality of internal electrodes 4 and 5 respectively formed along a plurality of specific interfaces between the plurality of dielectric ceramic layers 3. Yes.
内部電極４および５は、好ましくは、Ｎｉを主成分としている。内部電極４および５は、積層体２の外表面にまで到達するように形成されるが、積層体２の一方の端面６にまで引き出される内部電極４と他方の端面７にまで引き出される内部電極５とが、積層体２の内部において交互に配置されている。 The internal electrodes 4 and 5 are preferably composed mainly of Ni. The internal electrodes 4 and 5 are formed so as to reach the outer surface of the laminate 2, but the internal electrode 4 that is drawn to one end face 6 of the laminate 2 and the internal electrode that is drawn to the other end face 7. 5 are alternately arranged inside the stacked body 2.
積層体２の外表面であって、端面６および７上には、それぞれ、外部電極８および９が形成されている。外部電極８および９は、たとえば、Ｃｕを主成分とする導電性ペーストを塗布し、焼付けることによって形成される。一方の外部電極８は、端面６上において、内部電極４と電気的に接続され、他方の外部電極９は、端面７上において、内部電極５と電気的に接続される。 External electrodes 8 and 9 are formed on the outer surfaces of the laminate 2 on the end faces 6 and 7, respectively. The external electrodes 8 and 9 are formed, for example, by applying and baking a conductive paste mainly composed of Cu. One external electrode 8 is electrically connected to the internal electrode 4 on the end face 6, and the other external electrode 9 is electrically connected to the internal electrode 5 on the end face 7.
外部電極８および９上には、はんだ付け性を良好にするため、必要に応じて、Ｎｉなどからなる第１のめっき膜１０および１１、さらにその上に、Ｓｎなどからなる第２のめっき膜１２および１３がそれぞれ形成される。 On the external electrodes 8 and 9, in order to improve the solderability, the first plating films 10 and 11 made of Ni or the like and the second plating film made of Sn or the like thereon are further formed as necessary. 12 and 13 are formed, respectively.
このような積層セラミックコンデンサ１において、誘電体セラミック層３はＳｎmＮｂ2Ｏ6（０．７≦ｍ≦１．３）を主成分とする誘電体セラミックである。本発明の誘電体セラミックの結晶構造は、タングステンブロンズ構造が支配的である。 In such a multilayer ceramic capacitor 1, the dielectric ceramic layer 3 is a dielectric ceramic whose main component is Sn m Nb 2 O 6 (0.7 ≦ m ≦ 1.3). The crystal structure of the dielectric ceramic of the present invention is dominated by a tungsten bronze structure.
本発明の誘電体セラミックにおいて、Ｓｎのモル比ｍは１前後であるが、０．７〜１．３の間であれば、焼結性が良好であり、かつ、異相も少ない。 In the dielectric ceramic of the present invention, the molar ratio m of Sn is around 1, but if it is between 0.7 and 1.3, the sinterability is good and there are few heterogeneous phases.
また、本発明の誘電体セラミックにおけるＳｎは主に２価の陽イオンであるが、本発明の目的を損なわない限り、別の価数のＳｎイオンを含んでいても構わない。 In addition, Sn in the dielectric ceramic of the present invention is mainly a divalent cation, but may contain Sn ions of other valences as long as the object of the present invention is not impaired.
本発明の誘電体セラミックの製造方法においては、通常の固相法において製造することができるが、好ましくは、ＳｎmＮｂ2Ｏ6の合成時や、セラミックの焼結時には、Ｓｎが安定して２価の陽イオンとなるよう、雰囲気を還元雰囲気にすることが好ましい。 The dielectric ceramic production method of the present invention can be produced by an ordinary solid phase method, but preferably, Sn is stable during the synthesis of Sn m Nb 2 O 6 or when the ceramic is sintered. The atmosphere is preferably a reducing atmosphere so as to be a divalent cation.
また、本発明は、前記主成分１００重量部に対し、副成分として、Ｍｎ、Ｖ、Ｍｇ、Ｓｉのうち少なくとも一種を、ＭｎＣＯ3、Ｖ2Ｏ5、ＭｇＣＯ3、ＳｉＯ2に換算して合計１０重量部以下含む場合、誘電率に悪影響を与えることなく、効果的に絶縁抵抗率が改善される。 In addition, according to the present invention, with respect to 100 parts by weight of the main component, at least one of Mn, V, Mg, and Si is converted into MnCO 3 , V 2 O 5 , MgCO 3 , and SiO 2 as subcomponents. When the content is 10 parts by weight or less, the insulation resistivity is effectively improved without adversely affecting the dielectric constant.
さらに、本発明の誘電体セラミックでは、Ａｌ2Ｏ3、ＺｒＯ2のうち少なくとも一種を含むことも好ましい。これらの添加量が主成分１００重量部に対して１０重量部以下であると、誘電率にさほど悪影響を与えることなく、効果的に絶縁抵抗率が改善される。 Furthermore, the dielectric ceramic of the present invention preferably contains at least one of Al 2 O 3 and ZrO 2 . When the added amount is 10 parts by weight or less with respect to 100 parts by weight of the main component, the insulation resistivity is effectively improved without adversely affecting the dielectric constant.
次に、この発明による効果を確認するために実施した実験例について説明する。 Next, experimental examples carried out to confirm the effects of the present invention will be described.
［実験例１］まず、主成分の出発原料として、ＳｎＯ2粉末およびＮｂ2Ｏ5粉末を用意した。これらを、表１のｍの値となるよう秤量し、水を溶媒としたボールミルにて混合した。そして乾燥後、窒素雰囲気中において、５００〜１０００℃の温度で２時間仮焼した。このようにして、セラミック原料を得た。 [Experimental Example 1] First, SnO 2 powder and Nb 2 O 5 powder were prepared as starting materials for the main component. These were weighed so as to have the value of m in Table 1, and mixed by a ball mill using water as a solvent. And it dried and calcined for 2 hours at the temperature of 500-1000 degreeC in nitrogen atmosphere after drying. In this way, a ceramic raw material was obtained.
次いで、得られたセラミック原料粉末に、ポリビニルブチラール系バインダおよびエタノール等の有機溶剤を加えて、ボールミルにより混合し、セラミックスラリーを得た。このセラミックスラリーをドクターブレード法によってシート成形し、セラミックグリーンシートを得た。 Next, a polyvinyl butyral binder and an organic solvent such as ethanol were added to the obtained ceramic raw material powder, and mixed by a ball mill to obtain a ceramic slurry. This ceramic slurry was formed into a sheet by a doctor blade method to obtain a ceramic green sheet.
次に、上記セラミックグリーンシート上に、Ｎｉを主成分とする導電性ペーストをスクリーン印刷し、内部電極となるべき導電性ペースト膜を形成した。そして、この導電性ペースト膜が形成されたセラミックグリーンシートを、導電性ペースト膜が引き出される側が互い違いになるように積層し、生の積層体を得た。 Next, a conductive paste mainly composed of Ni was screen-printed on the ceramic green sheet to form a conductive paste film to be an internal electrode. And the ceramic green sheet in which this conductive paste film was formed was laminated | stacked so that the side from which a conductive paste film | membrane was pulled out could become alternate, and the raw laminated body was obtained.
次に、生の積層体を、窒素雰囲気中において３００℃の温度に加熱し、バインダを燃焼させた後、酸素分圧が１０-9〜１０-20ＭＰａのＨ2−Ｎ2−Ｈ2Ｏガスからなる還元性雰囲気中において、表１に示す温度で２時間焼成し、焼結した積層体を得た。この積層体は、セラミックグリーンシートが焼結して得られた誘電体層および導電性ペースト膜が焼結して得られた内部電極を備えているものである。 Next, the raw laminate is heated to a temperature of 300 ° C. in a nitrogen atmosphere to burn the binder, and then H 2 —N 2 —H 2 O having an oxygen partial pressure of 10 −9 to 10 −20 MPa. In a reducing atmosphere composed of gas, firing was performed at the temperature shown in Table 1 for 2 hours to obtain a sintered laminate. This laminate includes a dielectric layer obtained by sintering a ceramic green sheet and an internal electrode obtained by sintering a conductive paste film.
焼成後の積層体の両端面にＢ2Ｏ3-ＳｉＯ2-ＢａＯ系のガラスフリットを含有する銀ペーストを塗布し、窒素雰囲気中において８００℃の温度で焼き付け、内部電極と電気的に接続された外部電極を形成した。 A silver paste containing B 2 O 3 —SiO 2 —BaO glass frit is applied to both end faces of the fired laminate, and is baked at a temperature of 800 ° C. in a nitrogen atmosphere to be electrically connected to the internal electrodes. External electrodes were formed.
このようにして得られた積層セラミックコンデンサの外形寸法は、長さ２．０ｍｍ、幅１．２ｍｍおよび厚さ０．６ｍｍであり、内部電極間に介在する誘電体セラミック層の厚みは０．６μｍであった。また、静電容量形成に有効な誘電体セラミック層の数は５であり、誘電体セラミック層１層当たりの対向電極面積は２．１ｍｍ2であった。 The outer dimensions of the multilayer ceramic capacitor thus obtained are 2.0 mm in length, 1.2 mm in width and 0.6 mm in thickness, and the thickness of the dielectric ceramic layer interposed between the internal electrodes is 0.6 μm. Met. In addition, the number of dielectric ceramic layers effective for capacitance formation was 5, and the counter electrode area per dielectric ceramic layer was 2.1 mm 2 .
上記の各試料に係る積層セラミックコンデンサにおける誘電体セラミック層を構成する誘電体セラミックの誘電率εを、２５℃、１ｋＨｚ、１Ｖrmsの条件下で測定した。 The dielectric constant ε of the dielectric ceramic constituting the dielectric ceramic layer in the multilayer ceramic capacitor according to each of the above samples was measured under the conditions of 25 ° C., 1 kHz, and 1 V rms .
また、静電容量値をの−５５℃〜１２５℃における温度変化を測定し、２０℃の静電容量Ｃ20と１２５℃における静電容量Ｃ125を基準とした、下記の式に示す静電容量温度係数Ｔｃを測定した。 In addition, the electrostatic capacitance value shown in the following equation is measured based on the change in temperature at −55 ° C. to 125 ° C. and based on the capacitance C 20 at 20 ° C. and the capacitance C 125 at 125 ° C. The capacity temperature coefficient Tc was measured.
Ｔｃ＝（Ｃ125−Ｃ20）／Ｃ20／（１２５−２０）×１０6（ppm.／℃）
また、試料番号６の試料の静電容量の温度カーブを図２に示す（１００℃のときの静電容量を基準とした変化率で表す）。
Tc = (C 125 -C 20 ) / C 20 / (125-20) × 10 6 (ppm./° C.)
Moreover, the temperature curve of the electrostatic capacitance of the sample of the sample number 6 is shown in FIG. 2 (it represents with the change rate on the basis of the electrostatic capacitance in the case of 100 degreeC).
次に、誘電体セラミック層を構成する誘電体セラミックの抵抗率ρを、２５℃の温度にて１００Ｖの電圧を１２０秒間チャージして測定した絶縁抵抗から求めた。 Next, the resistivity ρ of the dielectric ceramic constituting the dielectric ceramic layer was determined from the insulation resistance measured by charging a voltage of 100 V for 120 seconds at a temperature of 25 ° C.
以上、誘電率ε、静電容量温度係数Ｔｃ、抵抗率の対数logρの結果を表１に示す。 Table 1 shows the results of the dielectric constant ε, the capacitance temperature coefficient Tc, and the logarithm log ρ of the resistivity.
表１の結果より、試料番号３〜１１の試料において、十分な絶縁性を保ちつつ、正の静電容量温度係数と、５０以上の誘電率εが得られた。 From the results shown in Table 1, in samples Nos. 3 to 11, a positive capacitance temperature coefficient and a dielectric constant ε of 50 or more were obtained while maintaining sufficient insulation.
また、試料番号７の試料において、ＸＲＤ（線源ＣｕＫα、電圧４０ｋＶ）による結晶構造解析を行った。ＸＲＤチャートを図３に示す。これより、単斜晶系のタングステンブロンズ型結晶構造であることがわかった。 In addition, the sample No. 7 was subjected to crystal structure analysis by XRD (radiation source CuKα, voltage 40 kV). An XRD chart is shown in FIG. From this, it was found that it was a monoclinic tungsten bronze type crystal structure.
さらに、試料番号５の試料において、Novocontrol社製RT6000HVSを用いて、印加電圧５０Ｖp-p、周波数５０Ｈｚの条件にてＤ−Ｅヒステリシスカーブを測定した。結果を図４に示す。結果として、ヒステリシスは殆ど観察されず、常誘電性を示すことが明らかとなった。 Furthermore, in the sample of sample number 5, a DE hysteresis curve was measured under the conditions of an applied voltage of 50 V pp and a frequency of 50 Hz using a Novocontrol RT6000HVS. The results are shown in FIG. As a result, almost no hysteresis was observed, and it became clear that paraelectricity was exhibited.
［実験例２］ 次に、出発原料として、ＳｎＯ2、Ｎｂ2Ｏ5、ＭｎＣＯ3、Ｖ2Ｏ5、ＭｇＣＯ3、ＳｉＯ2の粉末をそれぞれ用意した。これらを、これらを、ＳｎＯ2粉末およびＮｂ2Ｏ5粉末は表２のｍの値となるよう秤量し、ＭｎＣＯ3、Ｖ2Ｏ5、ＭｇＣＯ3、ＳｉＯ2の粉末はＳｎmＮｂ2Ｏ6１００重量部に対し表２に示す重量部となるよう秤量した。秤量した粉を水を溶媒としたボールミルにて混合した。そして乾燥後、窒素雰囲気中において、５００〜１０００℃の温度で２時間仮焼した。このようにして、セラミック原料を得た。 Experimental Example 2 Next, SnO 2 , Nb 2 O 5 , MnCO 3 , V 2 O 5 , MgCO 3 , and SiO 2 powders were prepared as starting materials. These were weighed so that SnO 2 powder and Nb 2 O 5 powder had the value of m in Table 2, and MnCO 3 , V 2 O 5 , MgCO 3 and SiO 2 powders were Sn m Nb 2 O 6. It measured so that it might become a weight part shown in Table 2 with respect to 100 weight part. The weighed powder was mixed in a ball mill using water as a solvent. And it dried and calcined for 2 hours at the temperature of 500-1000 degreeC in nitrogen atmosphere after drying. In this way, a ceramic raw material was obtained.
得られたセラミック原料を用いて、実験例１と同様にして、積層セラミックコンデンサを得た。なお、焼成温度は表２に示す値に設定した。 Using the obtained ceramic raw material, a multilayer ceramic capacitor was obtained in the same manner as in Experimental Example 1. The firing temperature was set to the values shown in Table 2.
得られた積層セラミックコンデンサに対し、実験例１と同様にして、誘電率ε、静電容量温度係数Ｔｃ、抵抗率の対数logρを求め、表２に示した。 For the obtained multilayer ceramic capacitor, the dielectric constant ε, the capacitance temperature coefficient Tc, and the logarithm log ρ of the resistivity were obtained in the same manner as in Experimental Example 1 and shown in Table 2.
ｍの値が０．７〜１．３の範囲にある試料番号１０３〜１２１の試料においては、εが５０以上でかつ、log（ρ/Ω・m）にして９．５以上と、より高い絶縁性が得られた。 In the samples of sample numbers 103 to 121 in which the value of m is in the range of 0.7 to 1.3, ε is 50 or higher and log (ρ / Ω · m) is higher than 9.5 or higher. Insulation was obtained.
［実験例３］次に、当実験例は、本願発明の主成分に対し、Ａｌ2Ｏ3、ＺｒＯ2を添加した効果をみたものである。 [Experimental Example 3] Next, this experimental example shows the effect of adding Al 2 O 3 and ZrO 2 to the main component of the present invention.
まず、主成分の出発原料として、ＳｎＯ2粉末、Ｎｂ2Ｏ5粉末、Ａｌ2Ｏ3粉末、およびＺｒＯ2粉末を用意した。これらを、ＳｎＯ2粉末およびＮｂ2Ｏ5粉末は表３のｍの値となるよう秤量し、Ａｌ2Ｏ3粉末およびＺｒＯ2粉末はＳｎmＮｂ2Ｏ6１００重量部に対し表３に示す重量部となるよう秤量した。この秤量粉を、水を溶媒としたボールミルにて混合した。そして乾燥後、窒素雰囲気中において、５００〜１０００℃の温度で２時間仮焼した。このようにして、セラミック原料を得た。 First, SnO 2 powder, Nb 2 O 5 powder, Al 2 O 3 powder, and ZrO 2 powder were prepared as starting materials for the main components. These are weighed so that SnO 2 powder and Nb 2 O 5 powder have the value of m in Table 3, and Al 2 O 3 powder and ZrO 2 powder are shown in Table 3 with respect to 100 parts by weight of Sn m Nb 2 O 6. Weighed to be part by weight. This weighed powder was mixed in a ball mill using water as a solvent. And it dried and calcined for 2 hours at the temperature of 500-1000 degreeC in nitrogen atmosphere after drying. In this way, a ceramic raw material was obtained.
次に、上記セラミック原料を用いて、実験例１と同じ工程を経て、積層セラミックコンデンサを作製した。そして、実験例１と同様にして、誘電率ε、静電容量温度係数Ｔｃ、抵抗率の対数logρを評価した。結果を表３に示す。 Next, using the ceramic raw material, a multilayer ceramic capacitor was manufactured through the same process as in Experimental Example 1. In the same manner as in Experimental Example 1, the dielectric constant ε, the capacitance temperature coefficient Tc, and the logarithm logρ of the resistivity were evaluated. The results are shown in Table 3.
試料番号２０１〜２１９の試料においては、log（ρ/Ω・m）にして１０以上と、より高い絶縁性が得られた。 In the samples of Sample Nos. 201 to 219, log (ρ / Ω · m) was 10 or more, and higher insulation was obtained.
［実験例４］次に、出発原料として、ＳｎＯ2、Ｎｂ2Ｏ5、ＭｎＣＯ3、Ｖ2Ｏ5、ＭｇＣＯ3、ＳｉＯ2、Ａｌ2Ｏ3粉末、およびＺｒＯ2粉末を用意した。これらを、ＳｎＯ2粉末およびＮｂ2Ｏ5粉末は表４のｍの値となるよう秤量し、ＭｎＣＯ3、Ｖ2Ｏ5、ＭｇＣＯ3、ＳｉＯ2、Ａｌ2Ｏ3粉末、およびＺｒＯ2粉末は、ＳｎmＮｂ2Ｏ6１００重量部に対し表４に示す重量部となるよう秤量した。この秤量粉を、水を溶媒としたボールミルにて混合した。そして乾燥後、窒素雰囲気中において、５００〜１０００℃の温度で２時間仮焼した。このようにして、セラミック原料を得た。 [Experimental Example 4] Next, SnO 2 , Nb 2 O 5 , MnCO 3 , V 2 O 5 , MgCO 3 , SiO 2 , Al 2 O 3 powder, and ZrO 2 powder were prepared as starting materials. These were weighed so that SnO 2 powder and Nb 2 O 5 powder had the value of m in Table 4, and MnCO 3 , V 2 O 5 , MgCO 3 , SiO 2 , Al 2 O 3 powder, and ZrO 2 powder were , Sn m Nb 2 O 6 100 parts by weight was weighed so as to have the weight parts shown in Table 4. This weighed powder was mixed in a ball mill using water as a solvent. And it dried and calcined for 2 hours at the temperature of 500-1000 degreeC in nitrogen atmosphere after drying. In this way, a ceramic raw material was obtained.
次に、上記セラミック原料を用いて、実験例１と同じ工程を経て、積層セラミックコンデンサを作製した。そして、実験例１と同様にして、誘電率ε、静電容量温度係数Ｔｃ、抵抗率の対数logρを評価した。結果を表４に示す。 Next, using the ceramic raw material, a multilayer ceramic capacitor was manufactured through the same process as in Experimental Example 1. In the same manner as in Experimental Example 1, the dielectric constant ε, the capacitance temperature coefficient Tc, and the logarithm logρ of the resistivity were evaluated. The results are shown in Table 4.
試料番号３０１〜３０６の試料においては、log（ρ/Ω・m）にして１０以上と、より高い絶縁性が得られた。 In the samples of sample numbers 301 to 306, log (ρ / Ω · m) was 10 or more, and higher insulation was obtained.
本発明の誘電体セラミック、およびそれを用いた積層セラミックコンデンサは、各種電子回路において、温度補償用のコンデンサとして有用である。 The dielectric ceramic of the present invention and the multilayer ceramic capacitor using the dielectric ceramic are useful as a capacitor for temperature compensation in various electronic circuits.
１ 積層セラミックコンデンサ
２ 積層体
３ 誘電体セラミック層
４，５ 内部電極
８，９ 外部電極
DESCRIPTION OF SYMBOLS 1 Multilayer ceramic capacitor 2 Laminate 3 Dielectric ceramic layer 4,5 Internal electrode 8,9 External electrode
Claims (5)
前記誘電体セラミック層は請求項１〜３に記載の誘電体セラミックからなる積層セラミックコンデンサ。 A laminate including a plurality of laminated dielectric ceramic layers and an internal electrode formed along a specific interface between the dielectric ceramic layers; and the electrical connection to a specific one of the internal electrodes An external electrode formed on the outer surface of the laminate, and
The said dielectric ceramic layer is a multilayer ceramic capacitor which consists of dielectric ceramics of Claims 1-3.
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