JP5534575B2 - Assembly board - Google Patents

Description

  The present invention relates to a collective substrate.

  The collective board has a configuration in which a plurality of circuit boards on which components are mounted are connected so as to be divided. Such a collective board is used to efficiently manufacture a small-sized and similar circuit board. Electronic parts and the like are incorporated as they are in the collective board, and after being subjected to a reflow soldering process, they are separated into circuit boards.

  Here, in order to reduce the stress acting on the circuit board when the board is divided, it is preferable that the circuit board is easily separated. Therefore, conventionally, a slit is made from one side of the collective substrate to facilitate separation. The slit is formed, for example, so as to completely separate one side of the circuit board and maintain the connection between the two adjacent circuit boards by leaving the substrate material on the other side. The portion where is left is the connection portion of the circuit board. The length of the slit is as large as possible within a range in which the force to connect two adjacent circuit boards by the connecting portion can be maintained. When the circuit boards are separated, since the bending stress is applied only to the connecting portion, the stress acting on the circuit board can be reduced.

Japanese Utility Model Publication No. 63-50158

However, in the conventional configuration, if the cross-sectional area of the connecting portion is reduced, the stress acting on the circuit board at the time of board separation can be reduced, but the strength of the collective board as a whole is reduced. For this reason, when heat is applied to the collective substrate in a soldering process or the like, warpage is likely to occur near the connecting portion. If the circuit board is warped, the inspection point may be misaligned in the subsequent inspection process, so that the inspection may not be performed efficiently. On the other hand, if the slit is shortened in order to suppress the warp of the circuit board, the cross-sectional area of the connecting portion is increased and the stress at the time of dividing the board is increased.
The present invention has been made in view of such circumstances, and a main object of the present invention is to be able to manufacture a circuit board manufactured using a collective substrate with high accuracy and efficiency.

According to one aspect of the present application, the circuit board includes a plurality of circuit boards on which electronic components can be mounted, and the circuit boards are connected to each other so as to be capable of being divided. The circuit board can mount the electronic parts. As a region, the first region and a second region where the electronic component having a smaller allowable amount of distortion than the electronic component mounted in the first region is mounted, and the adjacent circuit board The division part formed between the first regions and between the second regions is provided along a separation line when a separation groove divides the circuit board, and between the second regions, Form a through-hole that penetrates the divided part, and the allowable value of the warpage amount of the circuit board is γ, the load obtained from the total weight of the circuit board is β, the warpage amount of the circuit board and the warpage amount are returned. The slope of the straight line when the stress relationship required for When the value of the stress calculated when the amount of warpage is 0 in the straight line is α, the sectional area on the separation line of the first divided portion where the through hole is not formed in the divided portion, and An aggregate substrate is provided in which a total cross-sectional area S, which is the sum of the cross-sectional areas on the separation line of the second divided portion in which the through holes are formed, satisfies S = β / (δ × γ + α). The

According to another aspect of the present invention, in the collective substrate according to claim 1, the separation groove is provided on each of the front surface side and the back surface side, and a plurality of the through holes are formed at equal intervals. An aggregate substrate is provided.

  According to the present invention, since the cross-sectional area is reduced while maintaining the connection between the circuit boards by providing the through hole in the part corresponding to the second region of the divided part, the stress at the time of dividing the board can be suppressed. , It is possible to suppress the influence on parts that are vulnerable to distortion. Furthermore, the warp of the circuit board during the heat treatment can be reduced.

FIG. 1 is a plan view of a collective substrate according to an embodiment of the present invention. FIG. 2 is an enlarged view of a part of FIG. 1 and is a plan view showing a configuration of a dividing unit. FIG. 3 is a cross-sectional view taken along the line II of FIG. 4 is a cross-sectional view taken along line II-II in FIG. FIG. 5 is a graph showing the relationship between the amount of warpage and stress. FIG. 6 is a diagram in which the circuit board is separated after the electronic components are mounted.

Embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 1 shows a plan view of an example of a collective substrate in this embodiment.
In the collective substrate 1, a plurality of circuit boards 2 are connected to each other through a dividing portion 3 so as to be individually separable, and discard substrates 4 are provided at both ends thereof.

  In the example of FIG. 1, the circuit board 2 has a horizontally long rectangle, and three circuit boards 2 are connected to each other in the horizontal direction (first direction) via two divided portions 3, and the three connected The circuit boards 2 are arranged in three columns in the vertical direction (second direction) perpendicular to the horizontal direction, and a total of nine circuit boards 2 are arranged in a matrix. The circuit boards 2 adjacent in the vertical direction are separated by a slit 5 parallel to the long side of the circuit board 2 and are not directly connected. The discarded board 4 is connected to the circuit board 2 via the dividing part 3. Such a discarded substrate 4 is provided in order to improve the handling of the collective substrate 1.

  The circuit board 2 has a conductive pattern (not shown) formed on an insulating board body such as an epoxy board, and at least one hole into which an electronic component lead or the like can be inserted. The conductive pattern is formed so that two or more circuit boards 2 have the same pattern. However, the circuit board 2 having different conductive patterns may be included.

Here, as shown in FIGS. 1 and 2, the circuit board 2 includes a first region 21 and a second region 22.
The first region 21 is a region having a large allowable value with respect to the distortion of the circuit board 2, and electronic components such as ICs, transistors, resistors, etc. that are resistant to the distortion of the circuit board 2 are mainly mounted thereon. Note that electronic components that are resistant to strain include components in which the characteristics of the electronic component are not easily affected by the strain, and components that are less susceptible to the distortion due to the large contact area with the circuit board 2.
The second region 22 is a region where the allowable value for the distortion of the circuit board 2 is smaller than that of the first region 21, in other words, a region where the distortion needs to be suppressed smaller than that of the first region 21. This second
In the region 22, electronic components that are easily affected by distortion of the circuit board 2, such as ceramic capacitors, are mounted. The electronic components that are easily affected by the strain include components that are susceptible to the distortion of the characteristics of the electronic components and components that are easily affected by the distortion due to the small contact area with the circuit board 2.

  The dividing unit 3 is an area that is located at a boundary between two adjacent circuit boards 2 and serves as a base point of division when the circuit board 2 is separated. The dividing unit 3 is left on the side of each circuit board 2 after the circuit board 2 is divided, but may be removed from the circuit board 2 by performing mechanical processing after the division.

  In this embodiment, the dividing portion 3 includes a first dividing portion 31 in which the dividing groove 10 is formed and a second dividing portion 32 in which a plurality of through holes 11 are provided so as to overlap the dividing groove 10. The first division portion 31 is formed at a position corresponding to the first region 21 of the circuit board 2. Specifically, the length of the first region 21, in this case, the length parallel to the side of the circuit board 2 of the first region 21 (short side in the example of FIGS. 1 and 2) The lengths of the division parts 31 are substantially the same.

  The dividing groove 10 included in the first dividing portion 31 extends in parallel with the side of the circuit board 2 (short side in the example of FIGS. 1 and 2), and the cross section thereof is a plate of the plate body of the substrate body of the collective substrate 1. V-shaped to reduce the thickness. One dividing groove 10 is formed on each of the front surface side and the back surface side of the collective substrate 1, and the formation positions thereof are substantially matched on the front surface side and the back surface side. Therefore, the bottom of the dividing groove 10 is the portion with the smallest plate thickness, and this is a line from which the circuit board 2 is cut, that is, the dividing line Ld. In addition, the cross-sectional shape of the division | segmentation groove | channel 10 should just be the shape which can cut off the circuit board 2 easily by external force, such as a rectangle and a U shape. Moreover, you may form the division | segmentation groove | channel 10 only in any one of a surface or a back surface.

  As shown in FIGS. 2 and 3, the cross-sectional area SV of the first division portion 31 is reduced by the division grooves 10 in a plane passing through the division line Ld and perpendicular to the surface of the circuit board 2. This corresponds to a rectangular area defined by the plate thickness ts and the length of the first divided portion 31.

On the other hand, as shown in FIG. 2, the second dividing portion 32 is arranged corresponding to the second region 22 of the circuit board 2. Specifically, the length of the second division portion 32 substantially matches the length parallel to the division line Ld of the second region 22. In addition, it is preferable that the length of the 2nd division part 32 is more than the length parallel to the division line Ld of a 2nd area | region.
The second dividing portion 32 also has one dividing groove 10 formed on each of the front surface and the back surface, and the plate thickness is the thinnest at the position where the dividing groove 10 is formed. These dividing grooves 10 are preferably grooves common to the first dividing portion 31 and the second dividing portion 32. However, independent dividing grooves 10 may be provided in each of the first dividing portion 31 and the second dividing portion 32.

  Further, as shown in FIGS. 2 and 4, a plurality of through holes 11 penetrating the board body of the circuit board 2 are formed in the second divided portion 32 at a predetermined interval. The diameter d11 of the through hole 11 is larger than the width of the dividing groove 10 in a plan view. The second dividing portion 32 in a plane perpendicular to the surface of the circuit board 2 passes through the dividing line Ld by the through hole 11. Is smaller than the cross-sectional area SV of the first divided portion 31. The diameter d11 of the through hole 11 may be the same as the width of the dividing groove 10 or may be narrower than the width of the dividing groove 10.

  The cross-sectional area Sm of the second divided portion 32 is based on the cross-sectional area corresponding to the rectangular area defined by the plate thickness ts of the substrate body reduced by the dividing groove 10 and the length of the second divided portion 32. The value is obtained by subtracting the cross-sectional areas of all the through holes 11. As described above, the second divided portion 32 reduces the force required when individually separating the circuit boards 2 by making the sectional area Sm of the divided cross section smaller than that of the first divided portion SV. Furthermore, as will be described later, there is an effect of reducing the warpage of the second region 22 when heat is applied to the collective substrate 1.

  Here, the sum of the sectional area SV and the sectional area Sm is the total sectional area S of the dividing portion 3. The total cross-sectional area S can be calculated based on the following formula (1).

S = β / (δ × γ + α) (1)

S is the total cross-sectional area (mm ² ) of the division part 3 necessary for the amount of warpage of the circuit board 2 to satisfy a predetermined reference value. β is a load (N) obtained from the total weight of the circuit board 2. This is because if the substrates are made of the same material, the amount of warping of the circuit board 2 during the heat treatment changes depending on the weight of the circuit board 2. γ is an allowable value (mm) of the warp amount of the circuit board 2, δ is a cross-sectional stress change rate (N / mm ³ ) with respect to the warp amount of the circuit board 2, and α is a constant determined by the material of the circuit board 2.

The cross-sectional stress change rate δ and the constant α can be obtained by creating a graph as shown in FIG. The horizontal axis of FIG. 5 shows the result of measuring the warpage amount of the circuit board 2 after the reflow process. The vertical axis represents the stress value generated in the cross section of the divided portion 3. Here, the warpage amount corresponds to the maximum value of the result of measurement at the end or center of the circuit board 2. Moreover, a stress value is obtained by calculating the board weight of the circuit board 2 per unit cross-sectional area (mm < ² >) of the division part 3, for example. The constant α is obtained from the stress value when the warpage amount of the circuit board 2 is zero by examining the relationship between the warpage amount and the stress value as shown in FIG. The cross-sectional stress change rate δ is obtained from the slope of the straight line in FIG.

Here, a calculation example of the total cross-sectional area S of the division part 3 of the circuit board 2 is shown below.
When the stress value generated in the cross section of the divided portion 3 is, for example, 8.65 × 10 ⁻³ N / mm ² , the amount of substrate warpage after the reflow process is 1.49 mm . Similarly, when the stress value generated in the cross section of the divided portion 3 is 7.40 × 10 ⁻³ N / mm ² , the amount of warpage of the substrate after the reflow process is 1.16 mm . Furthermore, when the stress value generated in the cross section of the divided portion was 6.48 × 10 ⁻³ N / mm ² , the amount of warpage of the substrate after the reflow process was 0.96 mm. When linear approximation is performed based on these data, the cross-sectional stress change rate δ is 4.1 × 10 ⁻³ N / mm ³ and the constant α is 2.5 × 10 ⁻³ N / mm ² .

For example, when the load β of the circuit board 2 is 1.56 N and the allowable warpage value γ is 1 mm , these values are substituted into the equation (1), and calculation is performed using the above-described cross-sectional stress change rate δ and the constant α. Then, the total cross-sectional area S becomes 240 mm ² . That is, if the total cross-sectional area S of the divided portion 3 to 24 0 m ^{m 2,} it is possible to suppress the warpage of the circuit board 2 to 1 mm.
Incidentally, the load β and other conditions of the circuit board 2 are the same, when the warpage tolerance γ is 1.2 mm, it may be a total cross-sectional area S to 21 0 m ^{m 2.} When warpage tolerance γ is 1.5 mm, it may be a total cross-sectional area S to 18 0 m ^{m 2.}

Here, the process of determining the number of through holes 11 and the diameter d11 in the second divided portion 32 will be described. The two divided portions 31 and 32 have the same thickness ts on the dividing line Ld, and the sum of the length of the first divided portion 31 and the length of the second divided portion 32 is constant. For this reason, if the length of the 1st division part 31 is determined from the ratio of the 1st division part 31 and the 2nd division part 32, the cross-sectional area Sm of the 2nd division part 32 will be calculated from S = SV + Sm. further,
(Cross sectional area Sm) = (plate thickness ts) × (length of second divided portion 32) − (sum of cross sectional areas of through-holes 11)
Therefore, the value of the cross-sectional area to be reduced by the through hole 11 can be obtained from the total cross-sectional area S. When the diameter d11 of each through hole 11 is constant,
(Sum of cross-sectional area of through-hole 11) = (plate thickness ts) × (diameter d11 of through-hole 11) × (through-hole 1
Number of 1)
Therefore, the diameter d11 of the through hole 11 is obtained according to the number of the through holes 11.

  Further, at the same warp tolerance γ, the sum of the cross-sectional areas of the through holes 11 is increased so as to satisfy the total cross-sectional area S when the second divided portion 32 is relatively long. That is, at least one of the number of through holes 11 and the diameter d11 of the through holes 11 is increased. On the other hand, when the warp allowable value γ is the same and the second divided portion 32 is relatively short, the sum of the cross-sectional areas of the through holes 11 is reduced so as to satisfy the total cross-sectional area S. That is, at least one of the number of through holes 11 and the diameter d11 of the through holes 11 is reduced.

  The number of through holes 11 may be one or more. When the number of the through holes 11 is one, the diameter d11 of the through hole 11 is the largest and becomes an oval shape. In the case of the same cross-sectional area Sm, the diameter d11 of the through hole 11 decreases as the number of the through holes 11 increases. Here, when it has two or more through-holes 11, it is preferable that the diameter d11 of each through-hole 11 is the same, and it is preferable that each through-hole 11 is arrange | positioned at substantially equal intervals. In this way, the collective substrate 1 can be easily manufactured, and the stress applied to the second region 21 can be made substantially uniform. However, the diameter d11 may be changed for each through hole 11, or the arrangement interval of the through holes 11 may be changed depending on the location.

Next, a process until the electronic component is mounted on the collective substrate 1 and divided into the circuit substrates 2 will be described.
First, a conductive pattern is formed by printing or affixing a conductor on a predetermined position on the surface of a resin substrate body. Thereafter, a dividing groove 10 or a slit 5 is formed at the boundary between two adjacent circuit boards 2. Further, a plurality of through holes 11 are formed in the second divided portion 32 along the separation groove 10. Thereby, the collective substrate 1 in which a large number of circuit boards 2 are arranged is formed.

  Subsequently, an electronic component or the like is supplied to a predetermined position of the conductive pattern of the circuit board 2 using a robot or the like. At this time, for example, a ceramic capacitor or the like is disposed at a predetermined position in the second region 21. Next, a reflow process is performed on the collective substrate 1 on which electronic components and the like are arranged. By introducing the collective board 1 into the reflow furnace, electronic components and the like are soldered to the conductive pattern of the circuit board 2.

  At this time, the dividing portion 3 having the thinnest plate thickness ts easily deforms the collective substrate 1 due to the influence of heat of the reflow furnace. In particular, the periphery of the second divided portion 32 whose cross-sectional area is reduced by the through hole 11 is more easily deformed. However, as described above, since the cross-sectional area SV and the cross-sectional area Sm are formed so as to satisfy the total cross-sectional area S when the warpage amount of the circuit board 2 reaches the allowable value γ, the circuit board 2 in the reflow process is formed. Is suppressed to γ. As a result, the electronic components on the circuit board 2, particularly the electronic components arranged in the second region 22, are not easily affected by the distortion.

After the reflow process, the aggregate substrate 1 is divided by the dividing line Ld. Thereby, as shown in FIG. 6, it divides | segments into each circuit board 2. As shown in FIG. The circuit board 2 is a mounting board in which an electronic component 41 that is hardly affected by strain is mounted in the first region 21 and an electronic component 42 that is easily affected by strain is mounted in the second region 22. When dividing the substrate, the adjacent circuit boards 2 are easily divided by the dividing unit 3. In the vicinity of the second region 22, since the cross-sectional area of the connecting portion is smaller than that of the first divided portion 31 by the second divided portion 32, it is easy to divide. For this reason, the distortion of the 2nd field 22 becomes smaller than the 1st field 21, and the load concerning the connection location of an electronic component or an electronic component, and circuit board 2 is reduced.

  Here, with respect to each of the collective substrate 1 according to the present embodiment and a comparative substrate manufactured under the same conditions except that the through-hole 11 is not provided, the amount of warpage of the substrate during heat treatment and the distortion during substrate division are calculated. I measured it. As a result, the maximum value of the warpage amount of the aggregate substrate 1 was 0.84 mm, and the strain amount measured after the division was 638 μst. On the other hand, the maximum value of the warp amount of the comparative substrate was 1.49 mm, and the strain amount measured after the division was 688 μst. From this result, it can be seen that the amount of warpage of the aggregate substrate 1 is significantly improved as compared with the comparative substrate having no through hole 11. Note that the amount of strain measured after the division is smaller in the collective substrate 1. This is probably because the cross-sectional area of the collective substrate 1 is smaller than that of the comparative substrate due to the through holes 11.

As described above, in this embodiment, the first dividing unit 31 and the second dividing unit 32 are provided in the dividing unit 3 of the collective substrate 1 so that the second dividing unit 32 on the dividing line Ld is disconnected. Since the area Sm is made smaller than the cross-sectional area SV of the first divided portion 31 by forming the plurality of through-holes 11, the distortion of the circuit board 2 in the vicinity of the second divided portion 32 is reduced when the circuit board 2 is separated. Can be reduced. Thereby, in the 2nd area | region 22 of the circuit board 2, the contact failure etc. of the electronic component by the distortion of the circuit board 2 can be prevented.
Further, in the dividing unit 3 that can suppress the distortion of the circuit board 2, the warping amount of the aggregate substrate 1 after the heat treatment is set to a predetermined allowable value γ on the dividing line Ld of the second dividing unit 32. Since the total cross-sectional area S, that is, the cross-sectional area SV and the cross-sectional area Sm are determined, the substrate deformation accompanying the heat treatment can be controlled to a desired value. Thereby, in the 2nd area | region 22 of the circuit board 2, the contact failure of the electronic component by the curvature of a board | substrate can be prevented. In addition, since the warp of the circuit board 2 is controlled to a predetermined value, the inspection can be performed smoothly without shifting the inspection point.

Note that the present invention is not limited to the embodiments and can be widely applied.
For example, the allowable value γ is calculated as one value, but the allowable value γ may be defined as the range of the warp amount. For example, when the allowable value γ of the warp amount is in the range of 0.0 mm to 1.0 mm, the total cross-sectional area when γ = 0.0 mm is S1, and the total cross-sectional area when γ = 1.0 mm is S2. Then, S (= SV + Sm) can take a value not less than S1 and not more than S2.

  In this case, in the reflow process, the warp of the circuit board 2 due to heat falls within the allowable value γ. Defects caused by warpage can be suppressed. Further, since the positional deviation of the inspection point is within a range assumed in advance, the inspection can be performed efficiently. In addition, when the circuit board 2 is separated, the distortion of the second region 22 of the circuit board 2 is suppressed by the presence of the second division part 32.

DESCRIPTION OF SYMBOLS 1 Collective substrate 2 Circuit board 3 Dividing part 10 Dividing groove 11 Through-hole 21 1st area | region 22 2nd area | region 31 1st dividing part 32 2nd dividing part Lb Dividing line

Claims (2)

A plurality of circuit boards on which electronic components can be mounted, and the circuit boards are connected to each other so that they can be divided individually.
The circuit board has a first region as a region where the electronic component can be mounted, and a second region where the electronic component having a smaller tolerance for distortion than the electronic component mounted in the first region is mounted. And divided portions formed between the first regions and between the second regions of the adjacent circuit boards are provided along separation lines when the separation grooves divide the circuit board. , Between the second regions, forming a through-hole penetrating the divided portion ,
When the allowable value of the warp amount of the circuit board is γ, the load obtained from the total weight of the circuit board is β, and the relationship between the warp amount of the circuit board and the stress required to return the warp amount is linearly approximated Assuming that the slope of the straight line is δ and the stress value calculated when the amount of warpage in the straight line is 0 is α, on the separation line of the first divided portion where the through hole is not formed in the divided portion. And the total cross-sectional area S which is the sum of the cross-sectional area on the separation line of the second divided portion in which the through hole is formed,
S = β / (δ × γ + α)
A collective board characterized by satisfying The aggregate substrate according to claim 1, wherein the separation groove is provided on each of the front surface side and the back surface side, and a plurality of the through holes are formed at equal intervals.

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