JP5641870B2 - Auto tuning execution apparatus and method - Google Patents

Description

  The present invention relates to an auto-tuning execution apparatus that performs limit cycle type auto-tuning that generates a limit cycle with a constant manipulated variable amplitude and sets a control parameter of a controller of each control loop in a multi-loop control system. The present invention relates to a technique for efficiently executing tuning.

  In control equipment such as a temperature controller, a limit cycle type auto-tuning (hereinafter referred to as AT) function is widely adopted, and a PID parameter value for PID control calculation is automatically determined. The limit cycle type AT is characterized in that the control amount PV is moved up and down by changing the manipulated variable MV to a maximum and a minimum, for example. Therefore, since the AT is performed, the heating device to be controlled is brought into a non-operating state, so that it is necessary to efficiently execute or avoid wasting execution results.

Moreover, in a heating apparatus provided with a plurality of similar control target zones, a plurality of temperature controllers are used. That is, a plurality of PID control loops (multi-loops) for controlling the temperature of the control target zone corresponding to each temperature controller are formed. In such a multi-loop temperature control system, basically, it is preferable that a plurality of temperature controllers execute AT individually. Therefore, on the assumption that the characteristics of each control loop do not change greatly, a method has been proposed in which the PID parameter obtained by executing AT for a typical control loop is diverted to a control loop where AT is not executed. (See Patent Document 1).
Further, the AT is used not only for determining the PID parameter value but also for estimating the temperature control stop time as disclosed in, for example, Patent Document 2.

JP 2009-301392A JP 2010-170254 A

  The AT function can be effectively used in addition to the adjustment of the PID parameter as disclosed in Patent Document 2, and the AT function is finally performed due to a special situation (for example, erasing due to an operation error) that requires the adjustment of the PID parameter. There are not a few cases of re-execution at the site of control technology users (end users). In this case, even in a multi-loop control system, the necessity of executing AT for each individual control loop is unavoidable, and the efficiency improvement by the method disclosed in Patent Document 1 is not effective.

  Therefore, it is required that multi-loop AT can be efficiently performed for each individual control loop. To this end, the operator's judgment and operation regarding inter-loop interference are required. If AT is executed simultaneously between control loops having inter-loop interference, each AT waveform cannot be obtained properly, and therefore a correct AT result cannot be obtained. This can be said to be a situation where an error occurs in the execution of AT.

  The present invention has been made to solve the above-described problems. For example, when an end user performs a multi-loop AT in the field, an error in the AT is prevented from occurring due to inter-loop interference. An object of the present invention is to provide an auto-tuning execution apparatus and method that can make execution as efficient as possible.

The present invention is an auto-tuning execution device that executes limit-cycle type auto-tuning (AT) for generating a limit cycle with a constant operation amount amplitude and setting a control parameter of a controller of each control loop in a multi-loop control system. Simultaneously indicating AT execution means for executing limit cycle AT and simultaneous execution prohibition information indicating a control loop in which simultaneous execution of AT is prohibited due to the presence of an interference relationship or a control loop in which simultaneous execution of AT is permitted Interlock registration means for preliminarily storing execution permission information, AT activation registration means for storing a control loop to activate the AT, and deleting the registration of the control loop that has completed the execution of the AT, and registration of the AT activation registration means AT activation instruction means for referring to the contents and instructing the AT activation of the control loop in which the AT is not executed; With respect to the control loop instructed to start from the AT start instruction means, the control loop for permitting the AT execution is determined by referring to the simultaneous execution prohibition information or the simultaneous execution permission information in accordance with a predetermined rule. Interlock execution means for instructing the AT execution means to start the AT of the control loop, and the interlock execution means sequentially executes the simultaneous execution prohibition information or the simultaneous execution permission information from the control loop in which there are many opponents causing interference. The control loop that permits the execution of the AT is determined according to the rule for checking the AT .

In the configuration example of the auto-tuning execution device of the present invention, the simultaneous execution prohibition information indicates a correspondence relationship between the control loop on the interference side and the control loop on the interference side. The permission information indicates a correspondence relationship between a control loop that gives interference and a control loop that does not receive interference .

In addition, the auto-tuning execution method of the present invention refers to the registration contents of the AT activation registration means that stores the control loop that should activate the AT, and the AT activation instruction that instructs the activation of the AT of the control loop that is not yet AT. Refer to concurrent execution prohibition information indicating a control loop in which simultaneous execution of AT is prohibited due to the presence of a step and interference relationship or simultaneous execution permission information indicating a control loop in which simultaneous execution of AT is permitted according to a predetermined rule Then, an interlock execution step for determining a control loop permitting the execution of the AT from among the control loops instructed to start at the AT start instruction step, and an AT of the control loop determined at the interlock execution step are executed. The AT execution step to be performed and the registration of the control loop that has completed the execution of the AT are deleted from the registration contents of the AT activation registration means. And a removal step, a method of repeatedly performing the said deletion step and the AT execution step and the interlocking execution step with the AT activation instruction steps until AT unexecuted loop is eliminated, the interlocking execution step, interference The control loop that permits the execution of the AT is determined in accordance with the rule for examining the concurrent execution prohibition information or the concurrent execution permission information in order from the control loop in which there are many opponents .

  According to the present invention, referring to the registration contents of the AT activation registration means, the AT activation of the control loop in which the AT is not executed is instructed, and the activation of the control loop instructed to perform the activation is performed simultaneously according to a predetermined rule. By referring to the prohibition information or the concurrent execution permission information, the control loop that permits the execution of the AT is determined, and the AT execution means is instructed to start the AT of the determined control loop. When executing AT of a loop, it is possible to make AT execution as efficient as possible while preventing errors in the AT execution due to inter-loop interference.

  Further, according to the present invention, the AT is controlled with the optimum efficiency by determining the control loop that permits the execution of the AT in accordance with the rule for examining the simultaneous execution prohibition information or the simultaneous execution permission information in order from the control loop in which there are many opponents that cause interference. The probability that it can be executed can be increased.

It is a figure which shows the structure of the heating apparatus used as the application object of the auto-tuning execution apparatus which concerns on the reference example of this invention. It is a block diagram which shows the structure of the auto tuning execution apparatus which concerns on the reference example of this invention. It is a flowchart which shows operation | movement of the auto tuning execution apparatus which concerns on the reference example of this invention. It is a figure explaining the confirmation method of the interference relationship between control loops. It is a figure which shows the structure of the heating apparatus used as the application object of the auto tuning execution apparatus which concerns on the 1st Embodiment of this invention.

[Principle of the Invention]
For example, assume a business process in which a device manufacturer ships a heating device and an auto tuning execution device to an end user. If there is interference between the control loops, the device manufacturer may set the restrictions and supply the auto-tuning execution device so that an AT execution error does not occur on the end user side. Therefore, the equipment manufacturer sets AT simultaneous execution prohibition information between control loops with interference before shipping, or sets AT simultaneous execution permission information, and simultaneously executes AT between control loops with interference. Focused on what should be prohibited. Then, when activated simultaneously by the end user, only the AT of the control loop having no interference relationship is activated, and the other control loops are set in a standby state until this AT is completed. In addition, in order to realize such an interlock, the vertical movement width due to interference is measured and automatic execution prohibition information or simultaneous execution permission information is automatically set during automatic AT performed by the equipment manufacturer before shipment. I came up with it.

[ Reference example ]
Hereinafter, reference examples of the present invention will be described with reference to the drawings. As a simple example for facilitating understanding, a case where there are eight control loops independently for eight temperature control zones will be described. FIG. 1 is a diagram illustrating a configuration of a heating device to which an auto tuning execution device according to this reference example is applied.

  In the example shown in FIG. 1, the temperature PV inside the heating chamber 100 is controlled by a temperature controller (PID controller) 103-1 to 103-8. Temperature sensors 102-1 to 102-8 measure temperatures PV of temperature control zones Z1 to Z8 heated by heaters 101-1 to 101-8, respectively. The temperature controllers 103-1 to 103-8 calculate the manipulated variable MV so that the temperatures PV measured by the temperature sensors 102-1 to 102-8 respectively coincide with the temperature set value SP. The power regulators 104-1 to 104-8 supply power corresponding to the operation amount MV output from the temperature controllers 103-1 to 103-8 to the heaters 101-1 to 101-8, respectively. In the temperature control system shown in FIG. 1, eight control loops for controlling the temperature PV of the temperature control zones Z1 to Z8 corresponding to the temperature controllers 103-1 to 103-8 are formed. Become. Hereinafter, the eight control loops formed by the temperature controllers 103-1 to 103-8 will be referred to as R1 to R8.

FIG. 2 is a block diagram showing the configuration of the auto-tuning execution apparatus according to this reference example . The auto-tuning execution device of this reference example includes an AT execution unit 1 that executes limit cycle AT, and an inter-execution prohibition information that indicates in advance a control loop that prohibits simultaneous execution of AT due to the presence of interference. The lock registration unit 2, the control loop to start the AT, the AT activation registration unit 3 that deletes the registration of the control loop that has completed the execution of the AT, and the AT activation instruction unit 5 described later are instructed to start For the control loop, refer to the simultaneous execution prohibition information of the interlock registration unit 2 according to a predetermined rule, determine a control loop that permits execution of the AT, and start the AT of the determined control loop 1 that refers to the registration contents of the interlock execution unit 4 that instructs 1 and the AT activation registration unit 3, And a instructing unit 5.

FIG. 3 is a flowchart showing the operation of the auto-tuning execution apparatus of this reference example . In this reference example, it is assumed that the simultaneous execution prohibition information is checked in ascending order of the control loop number. As a simple registration example for facilitating understanding, it is assumed that simultaneous execution prohibition information as shown in Table 1 is registered in the interlock registration unit 2 in advance. As is apparent from Table 1, the simultaneous execution prohibition information indicates a correspondence relationship between the control loop on the interference side and the control loop on the interference side.

First, the operator of the auto-tuning execution apparatus inputs an AT activation instruction for all control loops to the AT execution unit 1 (step S100 in FIG. 3).
In response to the activation instruction from the operator, the AT execution unit 1 registers the control loop number of R1 to R8 to activate the AT in the AT activation registration unit 3 (step S101).

The AT activation instructing unit 5 refers to the registration contents of the AT activation registering unit 3 and instructs the AT activation of the control loops R1 to R8 that are not yet AT (step S102).
The interlock execution unit 4 determines the control loop R1 having a smaller number among the control loops R1 to R8 instructed to be activated by the AT activation instruction unit 5 (step S103), and this control loop R1. It is checked whether or not the control loop is prohibited from simultaneous execution with the control loop in which AT execution is permitted (step S104). Here, since there is still no control loop that is permitted to execute AT, the determination in step S104 is NO, and the interlock execution unit 4 determines the control loop R1 as a control loop that permits execution of AT (step). S105).

  Subsequently, the interlock execution unit 4 refers to the simultaneous execution prohibition information registered in the interlock registration unit 2 for the control loop R1 to be investigated, and determines whether there is a control loop in which simultaneous execution of AT is prohibited. (Step S107). According to Table 1, R2 and R3 are registered in the interlock registration unit 2 as control loops on the side that receives interference from the control loop R1. Therefore, the interlock execution unit 4 determines the control loops R2 and R3 as control loops that prohibit execution of AT (that is, enter a standby state) (step S108).

  Next, the interlock execution unit 4 prohibits the simultaneous execution of AT with the control loop R1 to which the AT execution permission has already been given among the control loops R1 to R8 instructed to start from the AT start instruction unit 5. It is determined whether there is a control loop that has not been investigated whether or not to perform (step S109).

  Since the investigation of the control loops R4 to R8 remains (YES in step S109), the interlock execution unit 4 determines the control loop R4 having a smaller number as the investigation target control loop among the control loops R4 to R8 ( Step S103), with reference to the simultaneous execution prohibition information registered in the interlock registration unit 2, the control loop R4 to be investigated is controlled to be prohibited from simultaneous execution with the control loop R1 that is permitted to execute AT. It is checked whether it is a loop (step S104). According to Table 1, R1 is not registered in the interlock registration unit 2 as a control loop on the side that receives interference from the control loop R4. Therefore, the interlock execution unit 4 determines the control loop R4 as a control loop that permits execution of AT (step S105).

In step S104, when R1 is registered as a control loop that receives interference from the control loop R4, the interlock execution unit 4 determines the control loop R4 as a control loop that prohibits execution of AT. (Step S106). In this case, the processing of steps S107 and S108 described later is omitted, but in this reference example , R1 is not registered as a control loop on the side receiving interference from the control loop R4, so the process proceeds to step S107.

  Subsequently, the interlock execution unit 4 refers to the simultaneous execution prohibition information registered in the interlock registration unit 2 for the control loop R4 to be investigated, and determines whether there is a control loop in which simultaneous execution of AT is prohibited. (Step S107). According to Table 1, R5 and R6 are registered in the interlock registration unit 2 in addition to R2 and R3 that have already been prohibited from performing AT as a control loop that receives interference from the control loop R4. Thereby, the interlock execution part 4 determines control loop R5, R6 as a control loop which prohibits execution of AT (step S108).

  Next, the interlock execution unit 4 performs simultaneous AT execution with the control loops R1 and R4 that are already permitted to execute AT among the control loops R1 to R8 instructed to start from the AT start instruction unit 5. It is determined whether or not there is a control loop that has not been investigated as to whether or not to prohibit it (step S109).

  Since the investigation of the control loops R7 and R8 remains (YES in step S109), the interlock execution unit 4 determines the control loop R7 having a smaller number as the investigation target control loop among the control loops R7 and R8 ( Step S103), referring to the simultaneous execution prohibition information registered in the interlock registration unit 2, the control loop R7 to be investigated is prohibited from executing simultaneously with the control loops R1 and R4 that are permitted to execute AT. It is checked whether or not it is a control loop (step S104). According to Table 1, R1 and R4 are not registered in the interlock registration unit 2 as control loops on the side that receives interference from the control loop R7. Therefore, the interlock execution unit 4 determines the control loop R7 as a control loop that permits execution of AT (step S105).

In step S104, when at least one of R1 and R4 is registered as a control loop that receives interference from the control loop R7, the interlock execution unit 4 prohibits the control loop R7 from executing AT. The control loop is determined (step S106). In this case, the processing of steps S107 and S108 is omitted, but in this reference example , R1 and R4 are not registered as control loops on the side receiving interference from the control loop R7, and thus the process proceeds to step S107.

  Subsequently, the interlock execution unit 4 refers to the simultaneous execution prohibition information registered in the interlock registration unit 2 for the control loop R7 to be investigated, and whether there is a control loop in which simultaneous execution of AT is prohibited. (Step S107). According to Table 1, in the interlock registration unit 2, R8 is registered in addition to R5 and R6 that have already been prohibited from performing AT as a control loop that receives interference from the control loop R7. Thereby, the interlock execution part 4 determines control loop R8 as a control loop which prohibits execution of AT (step S108).

  Next, the interlock execution unit 4 among the control loops R1 to R8 instructed to start by the AT start instructing unit 5 has already performed AT of the control loops R1, R4, and R7 to which the AT execution permission has been given. It is determined whether or not there is a control loop in which it is not investigated whether simultaneous execution is prohibited (step S109). Since the interlock execution unit 4 has investigated all the control loops R1 to R8 (NO in step S109), the interlock execution unit 4 instructs the AT execution unit 1 to start the ATs of the control loops R1, R4, and R7.

  When the control amount PV (temperature) measured by the temperature sensor 102-1 in the control loop R1 is larger than the set value SP, the AT execution unit 1 outputs a preset operation amount lower limit value OL_AT as the operation amount MV. When the control amount PV of the control loop R1 is equal to or smaller than the set value SP, the preset operation amount upper limit value OH_AT is repeatedly output as the operation amount MV every predetermined operation cycle. Thus, a limit cycle in which the amplitude of the manipulated variable MV is constant occurs. In the case of the example of FIG. 1, it goes without saying that the manipulated variable MV is output to the power regulator 104-1 in the control loop R1. Then, the AT execution unit 1 calculates a control parameter (for example, a PID parameter) based on the response of the control amount PV of the control loop R1 according to the output of the operation amount MV, and uses this control parameter as a temperature controller for the control loop R1. 103-1 is set (step S110). The AT execution unit 1 executes the AT as described above simultaneously for the control loops R1, R4, and R7. Since the limit cycle AT is disclosed in, for example, Japanese Patent No. 3881593, the details of the AT will not be described.

Next, when the AT of the control loops R1, R4, and R7 is completed, the AT activation registration unit 3 deletes the control loop numbers R1, R4, and R7 where the AT has been completed from its registered contents (step S111).
The AT activation instruction unit 5 refers to the registration contents of the AT activation registration unit 3 and determines whether there is a control loop in which AT is not executed (step S112). Since the AT start instruction unit 5 has R2, R3, R5, R6, and R8 remaining as control loops in which AT is not executed (YES in step S112), the AT start of the control loops R2, R3, R5, R6, and R8 is started. Is instructed (step S102).

  The interlock execution unit 4 determines the control loop R2 having a smaller number among the control loops R2, R3, R5, R6, and R8 instructed to start from the AT start instruction unit 5 as a control loop to be investigated (step S103). It is checked whether or not this control loop R2 is a control loop in which simultaneous execution with a control loop in which execution of AT is permitted is prohibited (step S104). Here, since there is no control loop that is permitted to execute AT, the determination in step S104 is NO, and the interlock execution unit 4 determines the control loop R2 as a control loop that permits execution of AT (step S105). ).

  Subsequently, the interlock execution unit 4 refers to the simultaneous execution prohibition information registered in the interlock registration unit 2 for the control loop R2 to be investigated, and determines whether there is a control loop in which simultaneous execution of AT is prohibited. (Step S107). According to Table 1, the interlock registration unit 2 registers R3 in addition to R1 and R4 that have already been subjected to AT as a control loop on the side that receives interference from the control loop R2. Therefore, the interlock execution unit 4 determines the control loop R3 as a control loop that prohibits execution of AT (that is, enters a standby state) (step S108).

  Next, the interlock execution unit 4 communicates with the control loop R2 that has already been granted the AT execution permission among the control loops R2, R3, R5, R6, and R8 instructed to start by the AT start instruction unit 5. It is determined whether or not there is a control loop in which it is not investigated whether or not simultaneous execution of AT is prohibited (step S109).

  Since the investigation of the control loops R5, R6, and R8 remains (YES in step S109), the interlock execution unit 4 selects the control loop R5 having a smaller number among the control loops R5, R6, and R8 as the investigation target control loop. (Step S103), referring to the simultaneous execution prohibition information registered in the interlock registration unit 2, the control loop R5 to be investigated is simultaneously executed with the control loop R2 that is permitted to execute AT. It is checked whether the control loop is prohibited (step S104). According to Table 1, R2 is not registered in the interlock registration unit 2 as a control loop on the side that receives interference from the control loop R5. Therefore, the interlock execution unit 4 determines the control loop R5 as a control loop that permits execution of AT (step S105).

In step S104, when R2 is registered as a control loop that receives interference from the control loop R5, the interlock execution unit 4 determines the control loop R5 as a control loop that prohibits execution of AT. (Step S106). In this case, the processing of steps S107 and S108 is omitted, but in this reference example , R2 is not registered as a control loop on the side receiving interference from the control loop R5, and thus the process proceeds to step S107.

  Subsequently, the interlock execution unit 4 refers to the simultaneous execution prohibition information registered in the interlock registration unit 2 for the control loop R5 to be investigated, and whether there is a control loop in which simultaneous execution of AT is prohibited. (Step S107). According to Table 1, the interlock registration unit 2 registers R6, which has already prohibited AT execution and R4 and R7 that have already executed AT, as R6 that receives interference from the control loop R5. Has been. Thereby, the interlock execution part 4 determines control loop R6 as a control loop which prohibits execution of AT (step S108).

  Next, the interlock execution unit 4 among the control loops R2, R3, R5, R6, and R8 instructed to start from the AT start instruction unit 5 has already been granted AT execution permission. It is determined whether or not there is a control loop that does not investigate whether or not simultaneous execution of ATs is prohibited (step S109).

  Since the investigation of the control loop R8 remains (YES in step S109), the interlock execution unit 4 determines this control loop R8 as the investigation target control loop (step S103) and is registered in the interlock registration unit 2 With reference to the simultaneous execution prohibition information, it is checked whether or not the control loop R8 to be investigated is a control loop in which simultaneous execution with the control loops R2 and R5 permitted to execute AT is prohibited (step S104). According to Table 1, R2 and R5 are not registered in the interlock registration unit 2 as control loops on the side that receives interference from the control loop R8. Therefore, the interlock execution unit 4 determines the control loop R8 as a control loop that permits execution of the AT (step S105).

In step S104, when at least one of R2 and R5 is registered as a control loop on the side that receives interference from the control loop R8, the interlock execution unit 4 prohibits the control loop R8 from executing AT. The control loop is determined (step S106). In this case, the processing of steps S107 and S108 is omitted, but in this reference example , R2 and R5 are not registered as control loops on the side that receives interference from the control loop R8, so the process proceeds to step S107.

  Subsequently, the interlock execution unit 4 refers to the simultaneous execution prohibition information registered in the interlock registration unit 2 for the control loop R8 to be investigated, and determines whether there is a control loop in which simultaneous execution of AT is prohibited. (Step S107). According to Table 1, in the interlock registration unit 2, only R6 for which execution of AT has already been prohibited and R7 for which AT has already been executed are registered as control loops that receive interference from the control loop R8. Thereby, interlock execution unit 4 determines that there is no control loop in which simultaneous execution of AT is prohibited (NO in step S107), and proceeds to step S109.

Next, the interlock execution unit 4 among the control loops R2, R3, R5, R6, and R8 instructed to start from the AT start instruction unit 5 has already been granted AT execution permission. , R8, it is determined whether or not there is a control loop that does not investigate whether to prohibit simultaneous execution of AT (step S109). Since the interlock execution unit 4 has investigated all the control loops R2, R3, R5, R6, and R8, the interlock execution unit 4 determines that there is no control loop that has not been investigated (NO in step S109). The control loops R2, R5, and R8 are instructed to start AT.
In response to this instruction, the AT execution unit 1 executes ATs of the control loops R2, R5, and R8 at the same time (step S110).

Next, when the ATs of the control loops R2, R5, and R8 are completed, the AT activation registration unit 3 deletes the control loop numbers R2, R5, and R8 at which the AT is completed from its registered contents (step S111).
The AT activation instruction unit 5 refers to the registration contents of the AT activation registration unit 3 and determines whether there is a control loop in which AT is not executed (step S112). The AT activation instructing unit 5 instructs the AT activation of the control loops R3 and R6 (step S102) because R3 and R6 remain as control loops in which AT is not executed (YES in step S112).

  The interlock execution unit 4 determines a control loop R3 having a smaller number among the control loops R3 and R6 instructed to be activated by the AT activation instructing unit 5 (step S103), and this control loop R3 It is checked whether or not the control loop is prohibited from simultaneous execution with the control loop in which AT execution is permitted (step S104). Here, since there is no control loop in which execution of AT is permitted, the determination in step S104 is NO, and the interlock execution unit 4 determines the control loop R3 as a control loop that permits execution of AT (step S105). ).

  Subsequently, the interlock execution unit 4 refers to the simultaneous execution prohibition information registered in the interlock registration unit 2 for the control loop R3 to be investigated, and determines whether there is a control loop in which simultaneous execution of AT is prohibited. (Step S107). According to Table 1, in the interlock registration unit 2, only R1, R2, R4, and R5 that have already been subjected to AT are registered as control loops that receive interference from the control loop R3. Thereby, interlock execution unit 4 determines that there is no control loop in which simultaneous execution of AT is prohibited (NO in step S107), and proceeds to step S109.

  Next, the interlock execution unit 4 prohibits simultaneous execution of AT with the control loop R3 that is already permitted to execute AT among the control loops R3 and R6 instructed to start by the AT start instruction unit 5. It is determined whether there is a control loop that has not been investigated whether or not to perform (step S109).

  Since the investigation of the control loop R6 remains (YES in step S109), the interlock execution unit 4 determines this control loop R6 as the investigation target control loop (step S103) and is registered in the interlock registration unit 2. Referring to the simultaneous execution prohibition information, it is checked whether or not the control loop R6 to be investigated is a control loop in which simultaneous execution with the control loop R3 that is permitted to execute AT is prohibited (step S104). According to Table 1, R3 is not registered in the interlock registration unit 2 as a control loop on the side that receives interference from the control loop R6. Therefore, the interlock execution unit 4 determines the control loop R6 as a control loop that permits execution of AT (step S105).

In step S104, when R3 is registered as a control loop that receives interference from the control loop R6, the interlock execution unit 4 determines the control loop R6 as a control loop that prohibits execution of AT. (Step S106). In this case, steps S107 and S108, which will be described later, are omitted, but in this reference example , R3 is not registered as a control loop that receives interference from the control loop R6, and thus the process proceeds to step S107.

  Subsequently, the interlock execution unit 4 refers to the simultaneous execution prohibition information registered in the interlock registration unit 2 for the control loop R6 to be investigated, and whether there is a control loop in which simultaneous execution of AT is prohibited. (Step S107). According to Table 1, in the interlock registration unit 2, only R4, R5, R7, and R8 that have already been subjected to AT are registered as control loops that receive interference from the control loop R6. Thereby, interlock execution unit 4 determines that there is no control loop in which simultaneous execution of AT is prohibited (NO in step S107), and proceeds to step S109.

Next, the interlock execution unit 4 determines whether or not there is a control loop that does not investigate whether or not simultaneous execution of AT is prohibited among the control loops R3 and R6 instructed to start from the AT start instruction unit 5. Determination is made (step S109). Since the interlock execution unit 4 has investigated all the control loops R3 and R6, the interlock execution unit 4 determines that there is no control loop that has not been investigated (NO in step S109). Instructs to start AT of R6.
In response to this instruction, the AT execution unit 1 executes AT of the control loops R3 and R6 simultaneously (step S110).

Next, when the AT of the control loops R3 and R6 is completed, the AT activation registration unit 3 deletes the control loop numbers R3 and R6 for which the AT has been completed from its registered contents (step S111).
The AT activation instruction unit 5 refers to the registration contents of the AT activation registration unit 3 and determines whether there is a control loop in which AT is not executed (step S112). The AT activation instructing unit 5 determines that the AT execution of all the control loops has been completed because no AT non-executed loop is registered in the AT activation registering unit 3 (NO in step S112). The process ends.

In this reference example , as a result, the ATs of the control loops R1, R4, and R7 are executed simultaneously, the ATs of the control loops R2, R5, and R8 are executed simultaneously, and finally the ATs of the control loops R3, R6 are executed simultaneously. It will be done.
Thus, in this reference example , for example, when an end user executes a multi-loop AT in the field, the AT execution is made as efficient as possible while preventing errors in the AT execution due to inter-loop interference. Can do.

  The simultaneous execution prohibition information may be registered in the interlock registration unit 2 by actually executing AT in advance, confirming the degree of interference between control loops based on the fluctuation range of the control amount PV. 4A to 4E are diagrams for explaining a method for confirming the interference relationship between the control loops. FIG. 4A, FIG. 4B, FIG. 4C, and FIG. D) and FIG. 4E are diagrams showing the control amounts PV of the control loops R2, R3, R4, R5, and R6, respectively. Here, a case will be described in which AT is executed for the control loop R4 and the interference relationship between the control loop R4 and another control loop is confirmed.

First, the vertical movement width X4 that is the difference between the maximum value and the minimum value of the control amount PV generated in the control loop R4 that is performing AT is detected and recorded.
Further, the difference between the maximum value and the minimum value of the vertical movement of the control amount PV generated in each of the control loops R1 to R3, R5 to R8 other than the control loop R4 due to inter-loop interference during execution of the AT of the control loop R4 is calculated. Detect and record as maximum variation.

  When the detection target of the maximum fluctuation amount is the control loop R2, the control amount PV (hereinafter referred to as PV2) of the control loop R2 at the time when the AT of the control loop R4 is started is used for detection of the maximum fluctuation amount. That is, the difference PV2-PV between the control amount PV2 and the current control amount PV of the control loop R2 is set as a deviation used for detecting the maximum fluctuation amount. The extreme value of the control amount PV detected until the deviation PV2-PV changes from positive to negative and then changes from negative to positive is a local maximum value, and after the deviation PV2-PV changes from negative to positive, the positive value becomes negative. The extreme value of the control amount PV detected until it changes to the minimum value. In this way, the maximum fluctuation amount Y2 that is the difference between the maximum value and the minimum value of the vertical movement of the control amount PV of the control loop R2 can be detected (FIG. 4A).

  Similarly, the maximum fluctuation amount can be detected for the other control loops. 4 (B), 4 (D), and 4 (E), the control amounts PV3, PV5, and PV6 of the control loops R3, R5, and R6 at the time when the AT of the control loop R4 is started are used. An example is shown in which the maximum fluctuation amounts Y3, Y5, Y6 of the control loops R3, R5, R6 are detected. Each time the ATs of the control loops R1 to R8 are sequentially executed one by one, the detection of the vertical movement width and the maximum fluctuation amount as described above are performed.

Then, whether or not the control loop R4 and the other control loops R1 to R3, R5 to R8 are in a relationship with interference may be determined by the following equation.
Y1 / X1> A / 100 (1)
Y2 / X2> A / 100 (2)
Y3 / X3> A / 100 (3)
Y5 / X5> A / 100 (4)
Y6 / X6> A / 100 (5)
Y7 / X7> A / 100 (6)
Y8 / X8> A / 100 (7)

  In the formulas (1) to (8), X1 to X3 and X5 to X8 are vertical movements generated in the control loops R1 to R3 and R5 to R8 when the ATs of the control loops R1 to R3, R5 to R8 are executed, respectively. The widths Y1 to Y3 and Y5 to Y8 are the maximum fluctuation amounts generated in the control loops R1 to R3 and R5 to R8 when the AT of the control loop R4 is executed. For example, when the formula (1) is established, the influence rate of the interference with respect to the vertical movement width of the control loop R1 of the control loop R4 is larger than A% (for example, 5%). Thus, the control loop on the side that gives interference. Similarly, when Expression (2) is established, the control loop R4 is a control loop on the side that interferes with the control loop R2.

  In this way, it is possible to determine whether or not the control loop R4 and the other control loops R1 to R3, R5 to R8 have a relationship with interference. As a result of the determination, it was found that the control loop R4 is a control loop on the side that interferes with the control loops R2, R3, R5, and R6. The device manufacturer determiner may register the determination result as the simultaneous execution prohibition information in the interlock registration unit 2 as shown in Table 1.

Note that the method for registering simultaneous execution prohibition information is not limited to the above method. For example, in the case of a heating device configured as shown in FIG. 1, since the interference relationship between control loops can be estimated based on the knowledge of the device manufacturer, for example, up to two adjacent loops are uniformly prohibited from simultaneous execution. Thus, the simultaneous execution prohibition information may be registered in the interlock registration unit 2.
Regardless of the registration method, the device manufacturer can determine the influence of interference, but the end user side of the device distribution destination cannot determine the influence of interference is the cause of the problem. The present invention solves an AT execution error based on such a cause.

[ First Embodiment ]
Next, a first embodiment of the present invention will be described. In the present embodiment, a heating apparatus having eight control loops independently for eight temperature control zones as in the reference example will be described as an application target. However, as shown in FIG. A case where the loop number assignment is different from the reference example will be described.
Also in the present embodiment, the configuration and processing flow of the auto-tuning execution apparatus are the same as those in the reference example , so that description will be made using the reference numerals in FIGS.

In the present embodiment, the rule for examining the simultaneous execution prohibition information is set in order from the control loop in which there are many opponents causing interference. Here, it is assumed that simultaneous execution prohibition information as shown in Table 2 is registered in the interlock registration unit 2 in advance as a registration example assuming the same physical characteristics as the reference example .

The processing in steps S100 and S101 in FIG. 3 is the same as that in the reference example . The AT activation instructing unit 5 refers to the registration contents of the AT activation registering unit 3, and instructs the AT activation of the control loops R1 to R8 that are not yet AT (step S102 in FIG. 3).

  The interlock execution unit 4 determines the control loop R5 having a large number of opponents causing interference among the control loops R1 to R8 instructed to start from the AT start instruction unit 5 as a control loop to be investigated (step S103). It is checked whether or not the control loop R5 is a control loop in which simultaneous execution with a control loop that is permitted to execute AT is prohibited (step S104). Here, since there is still no control loop in which AT execution is permitted, the determination in step S104 is NO, and the interlock execution unit 4 determines the control loop R5 as a control loop that permits AT execution (step S104). S105). According to Table 2, all of the control loops R5, R6, R7, and R8 have four opponents that cause interference, but when there are a plurality of control loops that have many opponents that cause interference in this way. Among these control loops, the control loop R5 having a smaller number is selected as the control loop to be investigated.

  Subsequently, the interlock execution unit 4 refers to the simultaneous execution prohibition information registered in the interlock registration unit 2 for the control loop R5 to be investigated, and whether there is a control loop in which simultaneous execution of AT is prohibited. (Step S107). According to Table 2, R1, R3, R7, and R8 are registered in the interlock registration unit 2 as control loops on the side that receives interference from the control loop R5. Therefore, the interlock execution unit 4 determines the control loops R1, R3, R7, and R8 as control loops that prohibit execution of AT (that is, enter a standby state) (step S108).

  Next, the interlock execution unit 4 prohibits simultaneous execution of AT with the control loop R5 that is already permitted to execute AT among the control loops R1 to R8 instructed to start from the AT start instruction unit 5. It is determined whether there is a control loop that has not been investigated whether or not to perform (step S109).

  Since the interlock execution unit 4 remains to investigate the control loops R2, R4, and R6 (YES in step S109), among the control loops R2, R4, and R6, the interlock execution unit 4 investigates the control loop R6 that has many opponents (Step S103), referring to the simultaneous execution prohibition information registered in the interlock registration unit 2, the control loop R6 to be investigated is connected to the control loop R5 that is permitted to execute AT. It is checked whether or not the control loop prohibits simultaneous execution (step S104). According to Table 2, R5 is not registered in the interlock registration unit 2 as a control loop on the side that receives interference from the control loop R6. Therefore, the interlock execution unit 4 determines the control loop R6 as a control loop that permits execution of AT (step S105).

  If R5 is registered as a control loop that receives interference from the control loop R6 in step S104, the interlock execution unit 4 determines the control loop R6 as a control loop that prohibits execution of AT. (Step S106). In this case, the processing in steps S107 and S108 is omitted, but in this embodiment, R5 is not registered as a control loop on the side receiving interference from the control loop R6, and thus the process proceeds to step S107.

  Subsequently, the interlock execution unit 4 refers to the simultaneous execution prohibition information registered in the interlock registration unit 2 for the control loop R6 to be investigated, and whether there is a control loop in which simultaneous execution of AT is prohibited. (Step S107). According to Table 2, R2 and R4 are registered in the interlock registration unit 2 in addition to R7 and R8 that have already been prohibited from performing AT as a control loop that receives interference from the control loop R6. Thereby, the interlock execution part 4 determines control loop R2, R4 as a control loop which prohibits execution of AT (step S108).

Next, the interlock execution unit 4 performs simultaneous AT execution with the control loops R5 and R6 that are already permitted to execute AT among the control loops R1 to R8 instructed to start from the AT start instruction unit 5. It is determined whether or not there is a control loop that has not been investigated as to whether or not to prohibit it (step S109). Since the interlock execution unit 4 has investigated all the control loops R1 to R8, the interlock execution unit 4 determines that there is no control loop that has not been investigated (NO in step S109), and controls the AT execution unit 1 to control loop R5. Instructs to start AT of R6.
In response to this instruction, the AT execution unit 1 executes AT of the control loops R5 and R6 simultaneously (step S110).

Next, when the AT of the control loops R5 and R6 is completed, the AT activation registration unit 3 deletes the control loop numbers R5 and R6 for which the AT has been completed from its registered contents (step S111).
The AT activation instruction unit 5 refers to the registration contents of the AT activation registration unit 3 and determines whether there is a control loop in which AT is not executed (step S112). Since the AT start instruction unit 5 has R1, R2, R3, R4, R7, and R8 remaining as control loops in which AT is not executed (YES in step S112), the control loops R1, R2, R3, R4, R7, and R8 Is activated (step S102).

  The interlock execution unit 4 uses the control loop R7, which has many opponents among the control loops R1, R2, R3, R4, R7, and R8 instructed to start by the AT start instruction unit 5, as a control loop to be investigated. It is determined (step S103), and it is checked whether or not the control loop R7 is a control loop in which simultaneous execution with a control loop in which execution of AT is permitted is prohibited (step S104). Here, since there is no control loop that is permitted to execute AT, the determination in step S104 is NO, and the interlock execution unit 4 determines the control loop R7 as a control loop that permits execution of AT (step S105). ). According to Table 2, the control loops R7 and R8 both have four interference partners, but when there are a plurality of control loops with many interference partners, these control loops are controlled. Among the loops, the control loop R7 having a smaller number is selected as the control loop to be investigated.

  Subsequently, the interlock execution unit 4 refers to the simultaneous execution prohibition information registered in the interlock registration unit 2 for the control loop R7 to be investigated, and whether there is a control loop in which simultaneous execution of AT is prohibited. (Step S107). According to Table 2, in the interlock registration unit 2, R3 and R8 are registered in addition to R5 and R6 that have already been subjected to AT as a control loop that receives interference from the control loop R7. Thereby, the interlock execution part 4 determines control loop R3, R8 as a control loop which prohibits execution of AT (step S108).

  Next, the interlock execution unit 4 among the control loops R1, R2, R3, R4, R7, and R8 instructed to start from the AT start instructing unit 5, has already been granted AT execution permission. It is determined whether or not there is a control loop that does not investigate whether or not simultaneous execution of ATs is prohibited (step S109).

  Interlock execution unit 4 investigates control loops R1, R2, and R4 (YES in step S109), and therefore, among control loops R1, R2, and R4, control loop R4 that has many opponents that cause interference is investigated. (Step S103), referring to the simultaneous execution prohibition information registered in the interlock registration unit 2, the investigation target control loop R4 is connected to the control loop R7 that is permitted to execute AT. It is checked whether or not the control loop prohibits simultaneous execution (step S104). According to Table 2, R7 is not registered in the interlock registration unit 2 as a control loop on the side that receives interference from the control loop R4. Therefore, the interlock execution unit 4 determines the control loop R4 as a control loop that permits execution of AT (step S105).

  In step S104, when R7 is registered as a control loop that receives interference from the control loop R4, the interlock execution unit 4 determines the control loop R4 as a control loop that prohibits execution of AT. (Step S106). In this case, although the processing of steps S107 and S108 is omitted, in the present embodiment, R7 is not registered as a control loop on the side that receives interference from the control loop R4, and thus the process proceeds to step S107.

  Subsequently, the interlock execution unit 4 refers to the simultaneous execution prohibition information registered in the interlock registration unit 2 for the control loop R4 to be investigated, and determines whether there is a control loop in which simultaneous execution of AT is prohibited. (Step S107). According to Table 2, R2 is registered in the interlock registration unit 2 in addition to R8 for which AT execution has already been prohibited and R6 for which AT has already been executed as a control loop that receives interference from the control loop R4. Yes. Thereby, the interlock execution part 4 determines control loop R2 as a control loop which prohibits execution of AT (step S108).

  Next, the interlock execution unit 4 is the control loop R4 that has already been granted the AT execution permission among the control loops R1, R2, R3, R4, R7, and R8 instructed to start by the AT start instruction unit 5. , R7, it is determined whether or not there is a control loop that does not investigate whether to prohibit simultaneous execution of AT (step S109).

  Since the investigation of the control loop R1 remains (YES in step S109), the interlock execution unit 4 determines this control loop R1 as the investigation target control loop (step S103) and is registered in the interlock registration unit 2 With reference to the simultaneous execution prohibition information, it is checked whether or not the control loop R1 to be investigated is a control loop in which simultaneous execution with the control loops R4 and R7 that are permitted to execute AT is prohibited (step S104). According to Table 2, R4 and R7 are not registered in the interlock registration unit 2 as control loops on the side that receives interference from the control loop R1. Therefore, the interlock execution unit 4 determines the control loop R1 as a control loop that permits execution of AT (step S105).

  In step S104, if at least one of R4 and R7 is registered as a control loop that receives interference from the control loop R1, the interlock execution unit 4 prohibits the control loop R1 from executing AT. The control loop is determined (step S106). In this case, the processing of steps S107 and S108 is omitted, but in this embodiment, R4 and R7 are not registered as control loops on the side receiving interference from the control loop R1, and therefore, the process proceeds to step S107.

  Subsequently, the interlock execution unit 4 refers to the simultaneous execution prohibition information registered in the interlock registration unit 2 for the control loop R1 to be investigated, and determines whether there is a control loop in which simultaneous execution of AT is prohibited. (Step S107). According to Table 2, in the interlock registration unit 2, only R3 for which execution of AT has already been prohibited and R5 for which AT has already been executed are registered as control loops that receive interference from the control loop R1. Thereby, interlock execution unit 4 determines that there is no control loop in which simultaneous execution of AT is prohibited (NO in step S107), and proceeds to step S109.

Next, the interlock execution unit 4 is the control loop R1 that has already been granted the AT execution permission among the control loops R1, R2, R3, R4, R7, and R8 instructed to start by the AT start instruction unit 5. , R4, R7, it is determined whether or not there is a control loop that has not been investigated whether or not to prohibit simultaneous execution of AT (step S109). Since the interlock execution unit 4 has finished investigating all the control loops R1, R2, R3, R4, R7, and R8 (NO in step S109), the interlock execution unit 4 performs the control loops R1, R4, and R7 on the AT execution unit 1. Instructs AT to start.
In response to this instruction, the AT execution unit 1 executes AT of the control loops R1, R4, and R7 simultaneously (step S110).

Next, when the AT of the control loops R1, R4, and R7 is completed, the AT activation registration unit 3 deletes the control loop numbers R1, R4, and R7 where the AT has been completed from its registered contents (step S111).
The AT activation instruction unit 5 refers to the registration contents of the AT activation registration unit 3 and determines whether there is a control loop in which AT is not executed (step S112). The AT activation instruction unit 5 instructs the activation of the AT of the control loops R2, R3, and R8 (step S102) because R2, R3, and R8 remain as control loops in which AT is not executed (YES in step S112).

  The interlock execution unit 4 determines the control loop R8 having a large number of opponents that cause interference among the control loops R2, R3, and R8 instructed to be activated by the AT activation instruction unit 5 as a control loop to be investigated (step S103). Then, it is checked whether or not this control loop R8 is a control loop in which simultaneous execution with a control loop in which execution of AT is permitted is prohibited (step S104). Here, since there is no control loop in which execution of AT is permitted, the determination in step S104 is NO, and interlock execution unit 4 determines control loop R8 as a control loop that permits execution of AT (step S105). ).

  Subsequently, the interlock execution unit 4 refers to the simultaneous execution prohibition information registered in the interlock registration unit 2 for the control loop R8 to be investigated, and determines whether there is a control loop in which simultaneous execution of AT is prohibited. (Step S107). According to Table 2, in the interlock registration unit 2, only R4, R5, R6, and R7 that have already been subjected to AT are registered as control loops that receive interference from the control loop R8. Thereby, interlock execution unit 4 determines that there is no control loop in which simultaneous execution of AT is prohibited (NO in step S107), and proceeds to step S109.

  Next, the interlock execution unit 4 performs simultaneous AT execution with the control loop R8 that has already been granted the AT execution permission among the control loops R2, R3, and R8 instructed to start from the AT start instruction unit 5. It is determined whether or not there is a control loop that has not been investigated as to whether or not to prohibit it (step S109).

  Since the investigation of the control loops R2 and R3 remains (YES in step S109), the interlock execution unit 4 sets the control loop R3 having a large number of opponents to interfere among the control loops R2 and R3 as the investigation target control loop. Determine (step S103) and refer to the simultaneous execution prohibition information registered in the interlock registration unit 2, and the control loop R3 to be investigated is prohibited from executing simultaneously with the control loop R8 that is permitted to execute AT. It is checked whether the control loop is to be executed (step S104). According to Table 2, R8 is not registered in the interlock registration unit 2 as a control loop on the side that receives interference from the control loop R3. Therefore, the interlock execution unit 4 determines the control loop R3 as a control loop that permits execution of AT (step S105).

  In step S104, when R8 is registered as a control loop that receives interference from the control loop R3, the interlock execution unit 4 determines the control loop R3 as a control loop that prohibits execution of AT. (Step S106). In this case, the processing of steps S107 and S108 is omitted, but in the present embodiment, R8 is not registered as a control loop on the side receiving interference from the control loop R3, and thus the process proceeds to step S107.

  Subsequently, the interlock execution unit 4 refers to the simultaneous execution prohibition information registered in the interlock registration unit 2 for the control loop R3 to be investigated, and determines whether there is a control loop in which simultaneous execution of AT is prohibited. (Step S107). According to Table 2, in the interlock registration unit 2, only R1, R5, and R7 that have already been subjected to AT are registered as control loops that receive interference from the control loop R3. Thereby, interlock execution unit 4 determines that there is no control loop in which simultaneous execution of AT is prohibited (NO in step S107), and proceeds to step S109.

  Next, the interlock execution unit 4 among the control loops R2, R3, and R8 instructed to start from the AT start instructing unit 5 has already performed AT with the control loops R3 and R8 that have already been granted the AT execution permission. It is determined whether or not there is a control loop in which it is not investigated whether simultaneous execution is prohibited (step S109).

  Since the investigation of the control loop R2 remains (YES in step S109), the interlock execution unit 4 determines this control loop R2 as the investigation target control loop (step S103) and is registered in the interlock registration unit 2 With reference to the simultaneous execution prohibition information, it is checked whether the control loop R2 to be investigated is a control loop in which simultaneous execution with the control loops R3 and R8 permitted to execute AT is prohibited (step S104). According to Table 2, R3 and R8 are not registered in the interlock registration unit 2 as control loops on the side that receives interference from the control loop R2. Therefore, the interlock execution unit 4 determines the control loop R2 as a control loop that permits execution of AT (step S105).

  In step S104, when at least one of R3 and R8 is registered as a control loop that receives interference from the control loop R2, the interlock execution unit 4 prohibits the control loop R2 from executing AT. The control loop is determined (step S106). In this case, the processing of steps S107 and S108 is omitted, but in the present embodiment, R3 and R8 are not registered as control loops on the side receiving interference from the control loop R2, and the process proceeds to step S107.

  Subsequently, the interlock execution unit 4 refers to the simultaneous execution prohibition information registered in the interlock registration unit 2 for the control loop R2 to be investigated, and determines whether there is a control loop in which simultaneous execution of AT is prohibited. (Step S107). According to Table 2, in the interlock registration unit 2, only R4 and R6 that have already been subjected to AT are registered as control loops on the side that receives interference from the control loop R2. Thereby, interlock execution unit 4 determines that there is no control loop in which simultaneous execution of AT is prohibited (NO in step S107), and proceeds to step S109.

Next, the interlock execution unit 4 communicates with the control loops R2, R3, and R8 that are already permitted to execute AT among the control loops R2, R3, and R8 instructed to start by the AT start instruction unit 5. It is determined whether or not there is a control loop in which it is not investigated whether or not simultaneous execution of AT is prohibited (step S109). Since the interlock execution unit 4 has investigated all the control loops R2, R3, and R8, the interlock execution unit 4 determines that there is no control loop that has not been investigated (NO in step S109). Instructs R2, R3, and R8 AT activation.
In response to this instruction, the AT execution unit 1 executes ATs of the control loops R2, R3, and R8 at the same time (step S110).

Next, when the AT of the control loops R2, R3, and R8 is completed, the AT activation registration unit 3 deletes the control loop numbers R2, R3, and R8 at which the AT is completed from its registered contents (step S111).
The AT activation instruction unit 5 refers to the registration contents of the AT activation registration unit 3 and determines whether there is a control loop in which AT is not executed (step S112). The AT activation instructing unit 5 determines that the AT execution of all the control loops has been completed because no AT non-executed loop is registered in the AT activation registering unit 3 (NO in step S112). The process ends.

  In this embodiment, first, the ATs of the control loops R5, R6 are executed simultaneously, the ATs of the control loops R1, R4, R7 are executed simultaneously, and finally the ATs of the control loops R2, R3, R8 are executed simultaneously. It will be done.

If the rule of the reference example in which the simultaneous execution prohibition information is examined in ascending order of the control loop number is applied to the registration contents of the interlock registration unit 2 of the present embodiment, the ATs of the control loops R1, R2, and R7 are first applied. Are executed at the same time, the ATs of the control loops R3 and R4 are executed simultaneously, the ATs of the control loops R5 and R6 are executed simultaneously, and finally the AT of the control loop R8 is executed. That is, AT is executed in four stages.

As described above, the rules of the reference example are simple and easy to implement, but the probability that AT can be executed with optimum efficiency is low. On the other hand, the rule according to the present embodiment in which the simultaneous execution prohibition information is checked in order from the control loop in which there are many opponents causing interference can increase the probability that AT can be executed with optimum efficiency compared to the reference example .

In the reference example and the first embodiment , the simultaneous execution prohibition information is registered in advance in the interlock registration unit 2, but the simultaneous execution permission information indicating the control loop in which the simultaneous execution of the AT is permitted is interlocked. You may make it register into the registration part 2. FIG. In this case, the simultaneous execution permission information indicates a correspondence relationship between the control loop that gives interference and the control loop that does not receive interference.

  When registering simultaneous execution permission information in the interlock registration unit 2, in the process of step S104 in FIG. 3, execution of AT is already permitted as a control loop that does not receive interference from the control loop to be investigated. If the control loop is registered in the interlock registration unit 2, the investigation target control loop may be determined as a control loop that permits execution of AT.

Further, when registering the simultaneous execution permission information in the interlock registration unit 2, in the process of step S107 in FIG. 3, among the control loops that are not registered as control loops on the side that does not receive interference from the control loop to be investigated If there is a control loop other than the control loop that has already prohibited the execution of AT or a control loop other than the control loop that has already executed AT, the corresponding control loop may be determined as a control loop that prohibits the execution of AT. . Other processing is as described in the reference example and the first embodiment .

The auto-tuning execution apparatus described in the reference example and the first embodiment can be realized by a computer including a CPU, a storage device, and an interface, and a program that controls these hardware resources. The CPU executes the processing described in the reference example and the first embodiment according to the program stored in the storage device.

  The present invention can be applied to a technique for executing limit cycle type auto-tuning in which a control cycle of a controller of each control loop is set by generating a limit cycle having a constant operation amount amplitude in a multi-loop control system.

  DESCRIPTION OF SYMBOLS 1 ... AT execution part, 2 ... Interlock registration part, 3 ... AT start registration part, 4 ... Interlock execution part, 5 ... AT start instruction part

Claims (4)

An auto-tuning execution device that performs limit cycle type auto-tuning (AT) that generates a limit cycle with a constant operation amount amplitude in a multi-loop control system and sets a control parameter of a controller of each control loop,
AT execution means for performing limit cycle AT;
Interlock registration means for storing in advance concurrent execution prohibition information indicating a control loop in which simultaneous execution of AT is prohibited due to the presence of an interference relationship or simultaneous execution permission information indicating a control loop in which simultaneous execution of AT is permitted;
An AT activation registration means for storing a control loop to activate the AT and deleting the registration of the control loop that has completed the execution of the AT;
An AT activation instruction means for referring to the registered content of the AT activation registration means and instructing the AT activation of an AT non-executed control loop;
With respect to the control loop instructed to start from the AT start instruction means, the control loop for permitting the AT execution is determined by referring to the simultaneous execution prohibition information or the simultaneous execution permission information in accordance with a predetermined rule. Interlock execution means for instructing the AT execution means to start the AT of the control loop ,
The interlock execution means determines a control loop that permits AT execution in accordance with a rule for examining the simultaneous execution prohibition information or the simultaneous execution permission information in order from a control loop having a large number of opponents that cause interference. Execution device. In the auto tuning execution device according to claim 1,
The simultaneous execution prohibition information indicates a correspondence relationship between the control loop on the interference side and the control loop on the interference side,
The auto-tuning execution apparatus, wherein the simultaneous execution permission information indicates a correspondence relationship between a control loop that gives interference and a control loop that does not receive interference. An auto tuning execution method for executing limit cycle type auto tuning (AT) for generating a limit cycle having a constant operation amount amplitude in a multi-loop control system and setting a control parameter of a controller of each control loop,
An AT activation instructing step for instructing the AT activation of the control loop in which the AT is not executed with reference to the registered contents of the AT activation registration means storing the control loop to activate the AT;
Refer to the concurrent execution prohibition information indicating the control loop in which the simultaneous execution of the AT is prohibited due to the presence of the interference relationship or the concurrent execution permission information indicating the control loop in which the simultaneous execution of the AT is permitted in accordance with a predetermined rule, An interlock execution step for determining a control loop that permits execution of the AT from among the control loops instructed to start in the AT start instruction step;
An AT execution step for performing AT of the control loop determined in the interlock execution step;
The registration control loop execution of AT has been completed and a deletion step of deleting from the registration contents of said AT start registration means,
The AT start instruction step, the interlock execution step, the AT execution step, and the deletion step are repeatedly executed until there is no AT non-execution loop .
In the interlock execution step, the control loop that permits the execution of the AT is determined in accordance with a rule for examining the simultaneous execution prohibition information or the simultaneous execution permission information in order from a control loop in which there are many opponents that cause interference. Execution method. In the auto-tuning execution method according to claim 3 ,
The simultaneous execution prohibition information indicates a correspondence relationship between the control loop on the interference side and the control loop on the interference side,
The auto-tuning execution method, wherein the simultaneous execution permission information indicates a correspondence relationship between a control loop that gives interference and a control loop that does not receive interference.

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