JP5648682B2 - 金属ベース基板 - Google Patents
金属ベース基板 Download PDFInfo
- Publication number
- JP5648682B2 JP5648682B2 JP2012508231A JP2012508231A JP5648682B2 JP 5648682 B2 JP5648682 B2 JP 5648682B2 JP 2012508231 A JP2012508231 A JP 2012508231A JP 2012508231 A JP2012508231 A JP 2012508231A JP 5648682 B2 JP5648682 B2 JP 5648682B2
- Authority
- JP
- Japan
- Prior art keywords
- low
- sintered ceramic
- temperature sintered
- layer
- metal plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B7/00—Layered products characterised by the relation between layers; Layered products characterised by the relative orientation of features between layers, or by the relative values of a measurable parameter between layers, i.e. products comprising layers having different physical, chemical or physicochemical properties; Layered products characterised by the interconnection of layers
- B32B7/02—Physical, chemical or physicochemical properties
- B32B7/027—Thermal properties
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
- H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/6875—Shapes or dispositions thereof being on a metallic substrate, e.g. insulated metal substrates [IMS]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/69—Insulating materials thereof
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/69—Insulating materials thereof
- H10W70/692—Ceramics or glasses
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/06—Thermal details
- H05K2201/068—Thermal details wherein the coefficient of thermal expansion is important
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/049—Wire bonding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/63—Vias, e.g. via plugs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/551—Materials of bond wires
- H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
- H10W72/5525—Materials of bond wires comprising metals or metalloids, e.g. silver comprising copper [Cu]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24942—Structurally defined web or sheet [e.g., overall dimension, etc.] including components having same physical characteristic in differing degree
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24942—Structurally defined web or sheet [e.g., overall dimension, etc.] including components having same physical characteristic in differing degree
- Y10T428/2495—Thickness [relative or absolute]
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Thermal Sciences (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Inorganic Chemistry (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Laminated Bodies (AREA)
- Structure Of Printed Boards (AREA)
Description
BaCO3、Al2O3(コランダム)、およびSiO2(クオーツ)の各粉末を用意し、これらを混合した混合粉末を840℃の温度で120分間仮焼することによって、BaO:37.0重量%、Al2O3:11.0重量%、およびSiO2:52.0重量%の含有比率となる原料粉末1を作製した。
上記複合グリーンシートを10枚積層し、温度80℃、圧力150MPaの条件でプレスし、平面寸法30mm□の未焼成の第1の評価用試料を作製した。
上記第1、第2および第3の評価用試料を、還元性雰囲気中、表2の「焼成温度」の欄に示す温度で180分間焼成した。
表2に示すように、「焼成収縮率」、「熱膨張係数」、「ヤング率」および「抗折強度」を、第1の評価用試料によって評価した。
12 金属ベース基板
14 金属板
15 低温焼結セラミック層
16 拘束層
Claims (4)
- 金属板と、
前記金属板の上に当該金属板と同時焼成されて形成された低温焼結セラミック層と
を備え、
前記金属板の熱膨張係数は前記低温焼結セラミック層の熱膨張係数より大きく、前記金属板と前記低温焼結セラミック層との25〜400℃での平均熱膨張係数差が9ppm/℃以下であり、かつ、
前記低温焼結セラミック層のヤング率が120GPa未満であり、かつ抗折強度が200MPa以上である、
金属ベース基板。 - 前記平均熱膨張係数差は4ppm/℃以上である、請求項1に記載の金属ベース基板。
- 前記低温焼結セラミック層に接するように形成され、かつ前記低温焼結セラミック層に含まれる低温焼結セラミック材料の焼結温度では焼結しない難焼結性セラミック材料を含む、拘束層をさらに備える、請求項1または2に記載の金属ベース基板。
- 複数の前記低温焼結セラミック層と複数の前記拘束層とが交互に積層されている、請求項3に記載の金属ベース基板。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012508231A JP5648682B2 (ja) | 2010-03-30 | 2011-03-23 | 金属ベース基板 |
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2010076686 | 2010-03-30 | ||
| JP2010076686 | 2010-03-30 | ||
| PCT/JP2011/056914 WO2011122407A1 (ja) | 2010-03-30 | 2011-03-23 | 金属ベース基板 |
| JP2012508231A JP5648682B2 (ja) | 2010-03-30 | 2011-03-23 | 金属ベース基板 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPWO2011122407A1 JPWO2011122407A1 (ja) | 2013-07-08 |
| JP5648682B2 true JP5648682B2 (ja) | 2015-01-07 |
Family
ID=44712117
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012508231A Expired - Fee Related JP5648682B2 (ja) | 2010-03-30 | 2011-03-23 | 金属ベース基板 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US20130266782A1 (ja) |
| JP (1) | JP5648682B2 (ja) |
| WO (1) | WO2011122407A1 (ja) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102013103028A1 (de) * | 2013-03-25 | 2014-09-25 | Endress + Hauser Gmbh + Co. Kg | Sinterkörper mit mehreren Werkstoffen und Druckmessgerät mit einem solchen Sinterkörper |
| US9847286B2 (en) * | 2014-04-18 | 2017-12-19 | Halliburton Energy Services, Inc. | High-temperature cycling BGA packaging |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10139560A (ja) * | 1996-11-14 | 1998-05-26 | Nippon Chemicon Corp | セラミック基板 |
| JP2000082774A (ja) * | 1998-06-30 | 2000-03-21 | Sumitomo Electric Ind Ltd | パワ―モジュ―ル用基板およびその基板を用いたパワ―モジュ―ル |
| JP2001015930A (ja) * | 1999-06-30 | 2001-01-19 | Kyocera Corp | 多層配線基板およびその製造方法 |
| JP2001244376A (ja) * | 2000-02-28 | 2001-09-07 | Hitachi Ltd | 半導体装置 |
| JP2004055728A (ja) * | 2002-07-18 | 2004-02-19 | Murata Mfg Co Ltd | 積層型セラミック電子部品およびその製造方法 |
| JP2004256347A (ja) * | 2003-02-25 | 2004-09-16 | Kyocera Corp | ガラスセラミック組成物、ガラスセラミック焼結体とその製造方法、並びにそれを用いた配線基板とその実装構造 |
| JP2006237268A (ja) * | 2005-01-28 | 2006-09-07 | Kyocera Corp | 配線基板 |
| JP2006284541A (ja) * | 2005-04-05 | 2006-10-19 | Kyocera Corp | 測定用配線基板、プローブカード及び評価装置 |
| JP2009203087A (ja) * | 2008-02-26 | 2009-09-10 | Kyocera Corp | ガラスセラミックスおよびその製造方法 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5256469A (en) * | 1991-12-18 | 1993-10-26 | General Electric Company | Multi-layered, co-fired, ceramic-on-metal circuit board for microelectronic packaging |
| US6709749B1 (en) * | 1995-06-06 | 2004-03-23 | Lamina Ceramics, Inc. | Method for the reduction of lateral shrinkage in multilayer circuit boards on a substrate |
| US6143432A (en) * | 1998-01-09 | 2000-11-07 | L. Pierre deRochemont | Ceramic composites with improved interfacial properties and methods to make such composites |
| JP3666321B2 (ja) * | 1999-10-21 | 2005-06-29 | 株式会社村田製作所 | 多層セラミック基板およびその製造方法 |
| JP2002368422A (ja) * | 2001-04-04 | 2002-12-20 | Murata Mfg Co Ltd | 多層セラミック基板及びその製造方法 |
| US7186461B2 (en) * | 2004-05-27 | 2007-03-06 | Delaware Capital Formation, Inc. | Glass-ceramic materials and electronic packages including same |
| US7547369B2 (en) * | 2006-08-31 | 2009-06-16 | Ferro Corporation | Method of making multilayer structures using tapes on non-densifying substrates |
| KR100825766B1 (ko) * | 2007-04-26 | 2008-04-29 | 한국전자통신연구원 | Ltcc 패키지 및 그 제조방법 |
| CN101784502B (zh) * | 2007-08-17 | 2013-03-27 | 株式会社村田制作所 | 陶瓷组合物及其制造方法、陶瓷基板、以及陶瓷生坯层的制造方法 |
-
2011
- 2011-03-23 JP JP2012508231A patent/JP5648682B2/ja not_active Expired - Fee Related
- 2011-03-23 WO PCT/JP2011/056914 patent/WO2011122407A1/ja not_active Ceased
-
2012
- 2012-09-28 US US13/630,044 patent/US20130266782A1/en not_active Abandoned
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10139560A (ja) * | 1996-11-14 | 1998-05-26 | Nippon Chemicon Corp | セラミック基板 |
| JP2000082774A (ja) * | 1998-06-30 | 2000-03-21 | Sumitomo Electric Ind Ltd | パワ―モジュ―ル用基板およびその基板を用いたパワ―モジュ―ル |
| JP2001015930A (ja) * | 1999-06-30 | 2001-01-19 | Kyocera Corp | 多層配線基板およびその製造方法 |
| JP2001244376A (ja) * | 2000-02-28 | 2001-09-07 | Hitachi Ltd | 半導体装置 |
| JP2004055728A (ja) * | 2002-07-18 | 2004-02-19 | Murata Mfg Co Ltd | 積層型セラミック電子部品およびその製造方法 |
| JP2004256347A (ja) * | 2003-02-25 | 2004-09-16 | Kyocera Corp | ガラスセラミック組成物、ガラスセラミック焼結体とその製造方法、並びにそれを用いた配線基板とその実装構造 |
| JP2006237268A (ja) * | 2005-01-28 | 2006-09-07 | Kyocera Corp | 配線基板 |
| JP2006284541A (ja) * | 2005-04-05 | 2006-10-19 | Kyocera Corp | 測定用配線基板、プローブカード及び評価装置 |
| JP2009203087A (ja) * | 2008-02-26 | 2009-09-10 | Kyocera Corp | ガラスセラミックスおよびその製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2011122407A1 (ja) | 2011-10-06 |
| JPWO2011122407A1 (ja) | 2013-07-08 |
| US20130266782A1 (en) | 2013-10-10 |
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