Deprecated: The each() function is deprecated. This message will be suppressed on further calls in /home/zhenxiangba/zhenxiangba.com/public_html/phproxy-improved-master/index.php on line 456
JP5669679B2 - Inspection method of semiconductor device - Google Patents
[go: Go Back, main page]

JP5669679B2 - Inspection method of semiconductor device - Google Patents

Inspection method of semiconductor device Download PDF

Info

Publication number
JP5669679B2
JP5669679B2 JP2011137189A JP2011137189A JP5669679B2 JP 5669679 B2 JP5669679 B2 JP 5669679B2 JP 2011137189 A JP2011137189 A JP 2011137189A JP 2011137189 A JP2011137189 A JP 2011137189A JP 5669679 B2 JP5669679 B2 JP 5669679B2
Authority
JP
Japan
Prior art keywords
electrode
circuit board
probe
semiconductor device
led element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2011137189A
Other languages
Japanese (ja)
Other versions
JP2012109525A (en
Inventor
篤 白石
篤 白石
健二 今津
健二 今津
一彦 寺嶋
寺嶋  一彦
清吾 富樫
清吾 富樫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Holdings Co Ltd
Citizen Electronics Co Ltd
Citizen Watch Co Ltd
Original Assignee
Citizen Holdings Co Ltd
Citizen Electronics Co Ltd
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Holdings Co Ltd, Citizen Electronics Co Ltd, Citizen Watch Co Ltd filed Critical Citizen Holdings Co Ltd
Priority to JP2011137189A priority Critical patent/JP5669679B2/en
Publication of JP2012109525A publication Critical patent/JP2012109525A/en
Application granted granted Critical
Publication of JP5669679B2 publication Critical patent/JP5669679B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Led Devices (AREA)

Description

本発明は回路基板に半導体素子をフリップチップ実装した半導体装置の検査方法に関する。   The present invention relates to a method for inspecting a semiconductor device in which a semiconductor element is flip-chip mounted on a circuit board.

半導体素子を回路基板にフリップチップ実装しパッケージ化した半導体装置が知られている。フリップチップ実装方式は、実装面積が小さくて済むことなどのメリットがある反面、半導体素子と回路基板の接合部が目視できないため直接的な接合の良否判断がつかないという課題がある。そこで端子間の電気的測定や熱伝導状況の観察、X線透視といった様々な手法が提案されている。なお接合品質の管理自体は、目視できるかどうかに関わらず一般的な課題である。電気的測定によるものとしては、半導体装置の温度を変化させ端子間の導通状態を示す電気量を測定することにより半導体装置の端子と基板電極との接合状態を判断する方法がある(例えば特許文献1)。   A semiconductor device in which a semiconductor element is flip-chip mounted on a circuit board and packaged is known. The flip chip mounting method has a merit that a mounting area is small, but there is a problem that it is difficult to determine whether the bonding is direct or not because the bonding portion between the semiconductor element and the circuit board is not visible. Therefore, various methods such as electrical measurement between terminals, observation of heat conduction status, and X-ray fluoroscopy have been proposed. In addition, management of joining quality itself is a general problem regardless of whether it can be visually observed. As a method based on electrical measurement, there is a method for determining the bonding state between the terminal of the semiconductor device and the substrate electrode by measuring the amount of electricity indicating the conduction state between the terminals by changing the temperature of the semiconductor device (for example, Patent Documents). 1).

特許文献1の図1を図9に示す。図9は半導体装置の温度と寄生ダイオードの電流特性から接合状態を判定する検査システムの配線関係を示す斜視図である。図に示したようにヒータープローブ36がSOP型パッケージICのパッケージ部30に接触し、パケージ部30を加熱する。加熱前後でピン32aとグランドピン32g間の寄生ダイオード(特許文献1の図2に58aとして示されている)に流れる電流を測定用プローブ38a,38gにより測定する。この検査システムは、加熱前後の電流値の差から部品実装基板上のパターン34a,34g(基板電極)と各ピン32a,32g(端子)との接合状態を判定している。   FIG. 1 of Patent Document 1 is shown in FIG. FIG. 9 is a perspective view showing the wiring relationship of the inspection system for determining the junction state from the temperature of the semiconductor device and the current characteristics of the parasitic diode. As shown in the figure, the heater probe 36 contacts the package part 30 of the SOP type package IC, and heats the package part 30. Current flowing through a parasitic diode (shown as 58a in FIG. 2 of Patent Document 1) between the pin 32a and the ground pin 32g before and after heating is measured by the measurement probes 38a and 38g. This inspection system determines the bonding state between the patterns 34a and 34g (board electrodes) on the component mounting board and the pins 32a and 32g (terminals) from the difference in current value before and after heating.

半導体装置のなかで発光ダイオード素子(以下とくに断らない限りLED素子と呼ぶ)を回路基板にフリップチップ実装してパッケージ化した半導体発光装置(以下とくに断らない限りLED装置と呼ぶ)は、発光にともなって発熱するという特徴がある。そこで順方向に大電流を流しPNジャンクションを加熱し、加熱前後の順方向電圧Vfの差ΔVfにもとづいてLED装置の良否判定を行うことがある。この検査からは様々なモードの不良が検出され、このなかに回路基板上の電極とLED素子の電極との接合不良も含まれることがある。   Among semiconductor devices, a semiconductor light emitting device (hereinafter referred to as an LED device unless otherwise specified) in which a light emitting diode element (hereinafter referred to as an LED element unless otherwise specified) is flip-chip mounted on a circuit board and packaged is accompanied by light emission. It generates heat. Thus, a large current may be passed in the forward direction to heat the PN junction, and the quality of the LED device may be determined based on the difference ΔVf in the forward voltage Vf before and after heating. From this inspection, defects in various modes are detected, and this may include defective bonding between the electrodes on the circuit board and the electrodes of the LED elements.

特開平10−19958号公報 (図1,図2)Japanese Patent Laid-Open No. 10-19958 (FIGS. 1 and 2)

特許文献1の方法は、ヒータープローブ36によりパッケージ部30を充分に加熱し、各ピン32a,32gの温度が上昇した状態で寄生ダイオード58aに流れる電流を測定している。この方法では半導体装置がパッケージ部30で使われる樹脂を介して加熱されるので、各部の温度制御が困難になり接合不良の検出精度が高いとは言えない。このためフリップチップ実装した半導体素子の微細な接合状態を判定するのには適さない。   In the method of Patent Document 1, the package part 30 is sufficiently heated by the heater probe 36, and the current flowing through the parasitic diode 58a is measured in a state where the temperature of each of the pins 32a and 32g is increased. In this method, since the semiconductor device is heated through the resin used in the package part 30, it is difficult to control the temperature of each part, and it cannot be said that the detection accuracy of the bonding failure is high. For this reason, it is not suitable for determining the fine bonding state of the semiconductor element mounted on the flip chip.

前述のLED装置に適用される検査方法のように半導体素子自体の発熱を利用する方法は、加熱装置が不要で手軽であるが、投入した電力と温度上昇がLED素子ごとに異なるので、やはりフリップチップ実装した半導体素子の微細な接合状態を判定するのには適さない。またLED素子の場合、アノード電極のサイズがカソード電極より大きいため、P
Nシャンクションで発生した熱が伝導する主な経路はアノード電極側となる。このため接合に係わる電気量の測定値はアノード電極の接合状態を大きく反映する。一方、接合不良は接続面積の小さいカソード電極側で発生しやすいので、LED素子を通電により加熱する手法は不具合を検出するに的確でない。
The method using the heat generated by the semiconductor element itself, such as the inspection method applied to the LED device described above, is simple because it does not require a heating device. It is not suitable for determining the fine bonding state of a semiconductor element mounted on a chip. In the case of an LED element, the size of the anode electrode is larger than that of the cathode electrode.
The main path through which the heat generated in the N junction is conducted is on the anode electrode side. For this reason, the measured value of the amount of electricity related to bonding largely reflects the bonding state of the anode electrode. On the other hand, since a bonding failure is likely to occur on the cathode electrode side having a small connection area, the method of heating the LED element by energization is not appropriate for detecting a defect.

そこで本発明は、上記の課題に鑑みてなされたものであり、半導体素子を回路基板にフリップチップ実装した半導体装置において、半導体素子の電極と回路基板の電極との接続不良を的確に判別できる検査方法を提供することを目的とする。   Accordingly, the present invention has been made in view of the above problems, and in a semiconductor device in which a semiconductor element is flip-chip mounted on a circuit board, an inspection that can accurately determine a connection failure between the electrode of the semiconductor element and the electrode of the circuit board. It aims to provide a method.

上記目的を達成するため本発明の半導体装置の検査方法は、半導体素子を回路基板にフリップチップ実装した半導体装置の検査方法において、
前記半導体素子はLED素子であり、
前記LED素子の一の電極が他の電極より接続面積が小さく、
前記一の電極と接続する前記回路基板の電極をヒータから得た熱でプローブを介して加熱し、前記一の電極の温度を上昇させ、
前記一の電極に接続する前記回路基板の電極と、前記他の電極に接続する前記回路基板の電極との間の導通状態を示す電気量について、加熱直後から前記プローブを介してその化を観察し、
予め準備しておいた良否判定基準と前記観察の結果とを比較し良否判定することを特徴とする。
In order to achieve the above object, a semiconductor device inspection method of the present invention is a semiconductor device inspection method in which a semiconductor element is flip-chip mounted on a circuit board.
The semiconductor element is an LED element,
One electrode of the LED element has a smaller connection area than the other electrode,
The electrodes of the circuit board to be connected to the one electrode is heated through the probe by the heat obtained from the heater to raise the temperature of the one electrode,
Said circuit board electrode connected to the one electrode, an electrical quantity indicative of the conductive state between the circuit board of the electrodes connected to the other electrode, the change immediately after the heating through the probe Observe
The pass / fail judgment criteria prepared in advance and the result of the observation are compared to judge pass / fail.

前記電気量が前記LED素子の順方向電圧であっても良い。
The amount of electricity may be a forward voltage of the LED element .

前記電気量とともに前記LED素子の温度上昇を観察しても良い。
You may observe the temperature rise of the said LED element with the said electric quantity .

多数の前記回路基板が接続して連結した集合基板に前記LED素子がフリップチップ実装され、前記一の電極と接続する前記回路基板の電極が互いに共通配線で連結しているとき、前記共通配線を一括して加熱しても良い。
When the LED element is flip-chip mounted on a collective substrate to which a large number of the circuit boards are connected and connected, and the electrodes of the circuit board connected to the one electrode are connected to each other by a common wiring, the common wiring is You may heat up collectively .

本発明の半導体素子の検査方法は、回路基板の一つの電極のみを加熱して電極間接続の
良否判定の精度や効率を向上させるものである。すなわち回路基板の一つの電極が含まれる熱伝導経路を加熱し、半導体素子の状態変化を観察すれば、この熱伝導経路内に含まれる接続不良が観察結果に強く反映される。以上、本発明の半導体装置の検査方法は、半導体素子を回路基板にフリップチップ実装した半導体装置において、半導体素子の電極と回路基板の電極との接続不良を的確に判別できる。
The semiconductor element inspection method of the present invention heats only one electrode of a circuit board to improve the accuracy and efficiency of the quality determination of interelectrode connection. That is, if the heat conduction path including one electrode of the circuit board is heated and the state change of the semiconductor element is observed, the connection failure included in the heat conduction path is strongly reflected in the observation result. As described above, the semiconductor device inspection method of the present invention can accurately determine a connection failure between the electrode of the semiconductor element and the electrode of the circuit board in the semiconductor device in which the semiconductor element is flip-chip mounted on the circuit board.

本発明の第1実施形態で検査するLED装置の断面図。Sectional drawing of the LED apparatus test | inspected by 1st Embodiment of this invention. 図1のLED素子における電極面の平面図。The top view of the electrode surface in the LED element of FIG. 図1のLED装置を検査するための説明図。Explanatory drawing for test | inspecting the LED apparatus of FIG. 図3の検査系で測定した順方向電圧の変化を示すグラフ。The graph which shows the change of the forward voltage measured with the test | inspection system of FIG. 本発明の第2実施形態における検査系の斜視図。The perspective view of the test | inspection system in 2nd Embodiment of this invention. 図5の検査系に含まれる集合基板の説明図。FIG. 6 is an explanatory diagram of a collective substrate included in the inspection system of FIG. 5. 本発明の第3実施形態における検査系の説明図。Explanatory drawing of the test | inspection system in 3rd Embodiment of this invention. 本発明の第4実施形態における検査系の説明図。Explanatory drawing of the test | inspection system in 4th Embodiment of this invention. 従来の半導体装置に対する検査システムの配線関係を示す斜視図。The perspective view which shows the wiring relationship of the test | inspection system with respect to the conventional semiconductor device.

以下、添付図1〜8を参照しながら本発明の好適な実施形態について詳細に説明する。なお図面において、同一または相当要素には同一の符号を付し、重複する説明は省略する。また説明のため部材の縮尺は適宜変更している。さらに、特許請求の範囲に記載された発明特定事項との関係をカッコ内に記載している。
(第1実施形態)
Hereinafter, preferred embodiments of the present invention will be described in detail with reference to FIGS. In the drawings, the same or corresponding elements are denoted by the same reference numerals, and redundant description is omitted. For the sake of explanation, the scale of the members is changed as appropriate. Furthermore, the relationship with the invention specific matter described in the claims is described in parentheses.
(First embodiment)

図1〜4により本発明の第1実施形態を説明する。図1は本実施形態の検査方法で検査するLED装置10(半導体装置)の断面図である。なお、以下の説明において検査対象となる半導体素子及び半導体装置はLED素子20及びLED装置10を使う。LED装置10は、回路基板19上にLED素子20をフリップチップ実装している。回路基板19において+電極16は板材18の上下面に金属パターンを有し、その金属パターンはスルーホール16aで接続している。同様に−電極17も上下の金属パターンがスルーホール17aで接続している。LED素子20はサファイア基板12(透明基板)の下面に半導体層13を備えている。半導体層13は、青色発光ダイオードであり、N側バンプ14(半導体素子の電極)とP側バンプ15(半導体素子の電極)が付着している。N側及びP側バンプ14,15はそれぞれカソードとアノードに相当し、−及び+電極17,16と金属共晶接合により接続している。回路基板19上面及びLED素子20は蛍光体を含有した蛍光樹脂11で封止されている。   A first embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a cross-sectional view of an LED device 10 (semiconductor device) inspected by the inspection method of this embodiment. In the following description, the LED element 20 and the LED device 10 are used as a semiconductor element and a semiconductor device to be inspected. In the LED device 10, an LED element 20 is flip-chip mounted on a circuit board 19. In the circuit board 19, the + electrode 16 has a metal pattern on the upper and lower surfaces of the plate member 18, and the metal pattern is connected through the through hole 16 a. Similarly, the upper and lower metal patterns of the negative electrode 17 are connected through a through hole 17a. The LED element 20 includes a semiconductor layer 13 on the lower surface of a sapphire substrate 12 (transparent substrate). The semiconductor layer 13 is a blue light emitting diode, and an N-side bump 14 (an electrode of a semiconductor element) and a P-side bump 15 (an electrode of a semiconductor element) are attached. The N-side and P-side bumps 14 and 15 correspond to the cathode and the anode, respectively, and are connected to the − and + electrodes 17 and 16 by metal eutectic bonding. The upper surface of the circuit board 19 and the LED element 20 are sealed with a fluorescent resin 11 containing a phosphor.

板材18は、厚さが数百μmで、熱伝導性を考慮して樹脂、セラミック、金属から選ぶ。+及び−電極16,17は、例えば20μm程度の銅箔上にニッケル層と金層を積層したものである。板材18が樹脂の場合、スルーホール16a,17aは熱伝導性をよくするため内部を金属ペーストで埋めておくと良い。サファイア基板12は厚さが80〜120μmである。半導体層13は厚さが7μm程度であり、N側及びP側バンプ14,15は電解金メッキ法で形成すれば厚さが10〜30μm程度になる。蛍光樹脂11はシリコーン樹脂を主成分とし厚さが数100μmである。   The plate member 18 has a thickness of several hundreds μm, and is selected from resin, ceramic, and metal in consideration of thermal conductivity. The + and − electrodes 16 and 17 are formed by laminating a nickel layer and a gold layer on a copper foil of about 20 μm, for example. When the plate member 18 is made of resin, the through holes 16a and 17a are preferably filled with a metal paste to improve thermal conductivity. The sapphire substrate 12 has a thickness of 80 to 120 μm. The semiconductor layer 13 has a thickness of about 7 μm, and the N-side and P-side bumps 14 and 15 have a thickness of about 10 to 30 μm if formed by electrolytic gold plating. The fluorescent resin 11 has a silicone resin as a main component and a thickness of several hundreds of micrometers.

図2によりLED素子20の電極面を説明する。図2はLED素子20を電極面側から眺めた平面図である。N型半導体層21は、上層にあるP型半導体層22から一部分が露出している。半導体層13はN型半導体層21とP型半導体層22を含んでいる。N側バンプ14はN型半導体層21に接続し、P側バンプ15はP型半導体層22に接続している。発光層(図示せず)は、N型半導体層21とP型半導体層22の境界部にあり、平面
的には概ねP型半導体層22に等しい。広い面積を占めている発光層は発熱源であるため、放熱を考慮しP側バンプ15はN側バンプ14よりも平面的なサイズが大きくなっている。なお図1に示した断面はA−A線を含むようにして描いたものである。
The electrode surface of the LED element 20 will be described with reference to FIG. FIG. 2 is a plan view of the LED element 20 as viewed from the electrode surface side. A part of the N-type semiconductor layer 21 is exposed from the P-type semiconductor layer 22 in the upper layer. The semiconductor layer 13 includes an N-type semiconductor layer 21 and a P-type semiconductor layer 22. The N-side bump 14 is connected to the N-type semiconductor layer 21, and the P-side bump 15 is connected to the P-type semiconductor layer 22. The light emitting layer (not shown) is at the boundary between the N-type semiconductor layer 21 and the P-type semiconductor layer 22 and is substantially equal to the P-type semiconductor layer 22 in plan view. Since the light emitting layer occupying a large area is a heat source, the planar size of the P-side bump 15 is larger than that of the N-side bump 14 in consideration of heat dissipation. The cross section shown in FIG. 1 is drawn so as to include the AA line.

図1と図2から、+電極16とP側バンプ15の接続面積に比べ、−電極17とN側バンプ14の接続面積は小さい。よって本実施形態の場合、接続面積が小さい方の電極はN側バンプ14である。そして加熱経路は、回路基板19及びLED素子20において−電極17(回路基板の一つの電極)及びN側バンプ14を含むものである。   1 and 2, the connection area between the negative electrode 17 and the N-side bump 14 is smaller than the connection area between the positive electrode 16 and the P-side bump 15. Therefore, in the present embodiment, the electrode having the smaller connection area is the N-side bump 14. The heating path includes the negative electrode 17 (one electrode of the circuit board) and the N-side bump 14 in the circuit board 19 and the LED element 20.

図3は図1のLED装置10を検査するためのシステムを示す説明図である。LED装置10の+電極16及び−電極17にはそれぞれ+側プローブ23及び−側プローブ24が接触している。さらに−側プローブ24には−電極17を加熱するヒーター25が接触している。印加手段31は電源29と定電流源27を備え、+側プローブ23から−側プローブ24に向かう電流を印加する。+側プローブ23と−側プローブ24の間には電圧計26が接続している。また定電流源27や電圧計26を制御したり、電圧計26からデータを取り込んだりする制御判定手段33を備えている。なお定電流源は、定電流回路と電源を含むものとして図示されることが多いが、図3では定電流回路に相当する定電流源27と電源29を分けて描いた。   FIG. 3 is an explanatory diagram showing a system for inspecting the LED device 10 of FIG. A + side probe 23 and a − side probe 24 are in contact with the + electrode 16 and the − electrode 17 of the LED device 10, respectively. Further, a heater 25 for heating the negative electrode 17 is in contact with the negative probe 24. The application unit 31 includes a power source 29 and a constant current source 27, and applies a current from the + side probe 23 to the − side probe 24. A voltmeter 26 is connected between the + side probe 23 and the − side probe 24. Control determining means 33 for controlling the constant current source 27 and the voltmeter 26 and for taking in data from the voltmeter 26 is also provided. The constant current source is often illustrated as including a constant current circuit and a power source, but in FIG. 3, the constant current source 27 and the power source 29 corresponding to the constant current circuit are illustrated separately.

この測定システムは、印加手段31が+電極16からLED素子20の半導体層13を経て−電極17に至る経路に一定電流を印加し、電圧計26で+電極16と−電極17の間の電圧を測定する。この測定電圧値は、LED素子20の順方向電圧Vfを示す。まず常温で初期値となる電圧を測定してから、−電極17をヒーター25で加熱し、再度電圧を測定する。この電圧データに基づき制御判定手段33が−電極17から半導体層13に至る経路の接合状況を判定する。   In this measurement system, the applying means 31 applies a constant current to the path from the + electrode 16 to the − electrode 17 through the semiconductor layer 13 of the LED element 20, and the voltage between the + electrode 16 and the − electrode 17 is measured by the voltmeter 26. Measure. This measured voltage value indicates the forward voltage Vf of the LED element 20. First, a voltage that is an initial value at room temperature is measured, and then the negative electrode 17 is heated by the heater 25 and the voltage is measured again. Based on this voltage data, the control determination means 33 determines the junction state of the path from the negative electrode 17 to the semiconductor layer 13.

図4によりさらに詳しく検査フローを説明する。図4は加熱により上昇するPNジャンクションの温度Tと、データの測定タイミングと、順方向電圧Vf(電気量)の変化とを示すグラフである。LED素子20の+電極16及び−電極17に+側プローブ23及び−側プローブ24を接触させる。同時に制御判定手段33は定電流源27に所定の電流を出力させる。続いて制御判定手段33は電圧計26に+側プローブ23と−側プローブ24の間の電圧を測定させる。この電圧が順方向電圧の初期値となり、制御判定手段33はこの値を記憶する。   The inspection flow will be described in more detail with reference to FIG. FIG. 4 is a graph showing the temperature T of the PN junction that rises due to heating, the data measurement timing, and the change in the forward voltage Vf (amount of electricity). The + side probe 23 and the − side probe 24 are brought into contact with the + electrode 16 and the − electrode 17 of the LED element 20. At the same time, the control determination unit 33 causes the constant current source 27 to output a predetermined current. Subsequently, the control determination unit 33 causes the voltmeter 26 to measure the voltage between the + side probe 23 and the − side probe 24. This voltage becomes the initial value of the forward voltage, and the control determination means 33 stores this value.

次にヒーター25を−側プローブ24に接触させ−側プローブ24の温度を上昇させる。なお比較的大きめの熱容量をもつ−側プローブ24を瞬時に温度上昇させられるわけではないので、いったん−側プローブ24を−電極17から離し、ヒーター25で温度を上昇させてから再び−電極17に接触させる。   Next, the heater 25 is brought into contact with the minus probe 24 to raise the temperature of the minus probe 24. Since the temperature of the − side probe 24 having a relatively large heat capacity cannot be instantaneously increased, the − side probe 24 is once separated from the − electrode 17, the temperature is increased by the heater 25, and then the − electrode 17 is again provided. Make contact.

再接触後も+側プローブ23から−側プローブ24の間には定電流が印加され続け、電圧計26は図中のパルスで示した測定タイミングで順方向電圧Vfを測定する。なお高速で複数回の電圧測定が行われるので測定値はいったん電圧計26のメモリに格納される。制御判定手段33は所定の時間が経過したら定電流源27の電流印加と電圧計26の電圧測定を停止し、電圧計26の測定値を取り込み記憶する。最後に制御判定手段33は記憶しておいた加熱前後の測定値(順方向電圧Vf)の傾向に基づいて接続の良否判定を行う。   Even after recontact, a constant current continues to be applied between the + side probe 23 and the − side probe 24, and the voltmeter 26 measures the forward voltage Vf at the measurement timing indicated by the pulse in the figure. Since voltage measurement is performed a plurality of times at high speed, the measured value is temporarily stored in the memory of the voltmeter 26. The control determination means 33 stops the current application of the constant current source 27 and the voltage measurement of the voltmeter 26 when a predetermined time elapses, and takes in and stores the measurement value of the voltmeter 26. Finally, the control determination unit 33 determines whether or not the connection is good based on the stored tendency of measured values (forward voltage Vf) before and after heating.

半導体層13のPNジャンクションの温度Tは加熱された−側プローブ24が−電極17に接触すると直ぐに上昇し始める。このとき−電極17からN側バンプ14を経て半導体層13に至る経路において接続が良好な良品であれば温度は急速に上昇する。これに対
し接続に不具合がある不良品の場合は温度上昇が遅くなることがある。しかしながら接続不良が軽微な場合は熱平衡に達すると良品と同じ温度になってしまうことがある。LED装置10の構造にもよるが概ね数ms以内には熱平衡になる。
The temperature T of the PN junction of the semiconductor layer 13 starts to rise as soon as the heated negative probe 24 contacts the negative electrode 17. At this time, if the connection is good in the path from the electrode 17 to the semiconductor layer 13 via the N-side bump 14, the temperature rises rapidly. On the other hand, in the case of a defective product having a defective connection, the temperature rise may be delayed. However, if the connection failure is minor, it may reach the same temperature as a good product when it reaches thermal equilibrium. Although it depends on the structure of the LED device 10, thermal equilibrium is achieved within a few ms.

PNジャンクションの温度Tが変化すると順方向電圧Vfも変化する。このとき温度Tが上昇すると順方向電圧Vfは低下する。順方向電圧Vfのサンプリングは100〜200μs程度の間隔で複数回行う。図中測定点を黒点で示した。温度Tと同様に良品の順方向電圧Vfに対し、不良品の順方向電圧Vfは下降速度が遅くなる。ここで複数のタイミングで順方向電圧Vfを測定したのは、精度向上とともに、−側プローブ24が−電極17に接触したタイミングを推定するためである。つまり−側プローブ24の接触が機械的に行われるため接触タイミングを高精度で知ることが困難になっているなかで、測定を数ms以内に完了させることが要請されているからである。   When the temperature T of the PN junction changes, the forward voltage Vf also changes. At this time, when the temperature T increases, the forward voltage Vf decreases. The forward voltage Vf is sampled a plurality of times at intervals of about 100 to 200 μs. In the figure, the measurement points are indicated by black dots. As with the temperature T, the rate of decrease in the forward voltage Vf of the defective product is slower than that of the good product. The reason why the forward voltage Vf is measured at a plurality of timings is to estimate the timing at which the negative probe 24 contacts the negative electrode 17 together with the improvement in accuracy. That is, since the contact of the negative probe 24 is mechanically performed, it is difficult to know the contact timing with high accuracy, and it is required to complete the measurement within several ms.

以上のように本実施形態では、軽微な接続不良も判別できるように、温度Tが上昇する期間(過渡状態)で測定の主要部が完了する。なお定電流源27からは電圧測定の前後、一定電流が流れ続けているがPNジャンクション温度Tに大きな影響を与えないよう小さな値(例えば数100μA)にしている。また良否判定は順方向電圧の絶対値よりも、測定値と初期値との差ΔVfを使った方が良い場合がある。−電極17から半導体層13に至る経路は熱抵抗が高いので過渡的な測定で接続状態を的確に判定しやすい。   As described above, in the present embodiment, the main part of the measurement is completed in the period (transient state) in which the temperature T rises so that a slight connection failure can be determined. A constant current continues to flow from the constant current source 27 before and after voltage measurement, but is set to a small value (for example, several hundred μA) so as not to have a large effect on the PN junction temperature T. In addition, it may be better to use the difference ΔVf between the measured value and the initial value than the absolute value of the forward voltage for the pass / fail judgment. -Since the path from the electrode 17 to the semiconductor layer 13 has high thermal resistance, it is easy to accurately determine the connection state by transient measurement.

本実施形態では接続状態と相関する電気量としてダイオードの順方向電圧Vfを選んだ。順方向電圧Vfは温度変化に対し顕著に変わるので都合が良い。しかしながら接続状態と相関する電気量は順方向電圧に限られず、例えば抵抗値であっても良い。また加熱後の電気量測定は一回であっても良いが、前述のように複数回測定することで測定精度及び良否判断に係わる精度を向上できる。また半導体素子を通過する熱流が大きい場合、熱平衡後の電気量測定でも接続状態の良否判断ができるが、微小な接続不良を発見するには前述のように過渡的な状況でデータ収集することが好ましい。   In this embodiment, the forward voltage Vf of the diode is selected as the amount of electricity correlated with the connection state. The forward voltage Vf is convenient because it changes significantly with temperature. However, the amount of electricity correlated with the connection state is not limited to the forward voltage, and may be, for example, a resistance value. In addition, the measurement of the amount of electricity after heating may be performed once, but the measurement accuracy and the accuracy related to the quality determination can be improved by measuring a plurality of times as described above. If the heat flow through the semiconductor element is large, it is possible to judge whether the connection state is good or not even by measuring the amount of electricity after thermal equilibrium. preferable.

本実施形態では順方向電圧Vfの初期値を測ってから、いったん測定プローブ24をLED装置10から離し、測定プローブ24を加熱してから再びLED装置10に接触させ順方向電圧Vfの変化状況を観察していた。この方法は精度の良い初期値が得られるという特徴があるが、測定プローブ24の温度制御に時間が掛かるという課題がある。そこで量産時には、常時測定プローブ24を加熱しておき、測定プローブ24が接触して最初に得られる順方向電圧を常温における初期値とみなし、その後の温度上昇にともなう順方向電圧Vfの変化を観察しても良い。この方法は測定プローブ24が常時高温であるためLED素子一個当たりにかける検査時間を短縮できる。
(第2実施形態)
In this embodiment, after measuring the initial value of the forward voltage Vf, the measurement probe 24 is once separated from the LED device 10, the measurement probe 24 is heated, and then brought into contact with the LED device 10 again to check the change state of the forward voltage Vf. I was observing. This method is characterized in that an accurate initial value can be obtained, but there is a problem that it takes time to control the temperature of the measurement probe 24. Therefore, during mass production, the measurement probe 24 is always heated, the forward voltage first obtained when the measurement probe 24 comes into contact is regarded as the initial value at room temperature, and the change in the forward voltage Vf accompanying the subsequent temperature rise is observed. You may do it. In this method, since the measurement probe 24 is constantly at a high temperature, the inspection time taken per LED element can be shortened.
(Second Embodiment)

第1実施形態の検査系では接続不良を順方向電圧Vfの異常に基づいて判定していた。前述したように接続不良があると温度上昇が遅くなる。なお、接続面積が小さいほどその傾向が大きくなり、さらに接続不良も起き易い。つまり接続不良を判断するのに、接続面積の小さい方の電極を加熱し、過渡的な温度上昇を直接的に計測することが好ましい。   In the inspection system of the first embodiment, the connection failure is determined based on the abnormality of the forward voltage Vf. As described above, if there is a connection failure, the temperature rise slows down. In addition, the tendency becomes large, so that a connection area is small, and also a connection defect is easy to occur. That is, in order to determine a connection failure, it is preferable to heat the electrode with the smaller connection area and directly measure the transient temperature rise.

また図3で示した第1実施形態の検査系では一個のLED装置10を検査対象としていた。このLED装置10は、回路基板19が連結して配列した集合基板にLED素子20を配置し、蛍光樹脂11を集合基板にモールドしてから、集合基板を切断し個片化して製造することが多い。製造途中で接続状態を確認するため、集合基板状態で個別のLED装置10(切断前)の−電極17を加熱し順方向電圧Vfの測定や温度上昇パターンの観察を行っても良い。このとき集合基板において、隣接する回路基板19に含まれる−電極17同士が共通配線を備える場合、LED素子20のN側バンプ14と接続する−電極17
への加熱を簡便化できる。
Further, in the inspection system of the first embodiment shown in FIG. 3, one LED device 10 is an inspection target. The LED device 10 can be manufactured by arranging the LED elements 20 on a collective substrate in which circuit boards 19 are connected and arranged, molding the fluorescent resin 11 on the collective substrate, and then cutting the collective substrate into pieces. Many. In order to check the connection state during the manufacturing, the negative electrode 17 of each LED device 10 (before cutting) may be heated in the aggregate substrate state to measure the forward voltage Vf and observe the temperature rise pattern. At this time, in the collective substrate, when the electrodes 17 included in the adjacent circuit boards 19 have common wiring, the electrodes 17 connected to the N-side bumps 14 of the LED elements 20
Heating to can be simplified.

そこで第2及び第3実施形態により、多数のLED素子20を実装した集合基板であって、LED素子20の一方の電極同士が集合基板上の共通配線で接続し、共通配線を通して各LED素子20の一方の電極を加熱し、LED素子20の温度上昇を観察して接続の良否判断を行う検査方法を説明する。   Therefore, according to the second and third embodiments, a plurality of LED elements 20 are mounted on a collective substrate, and one electrode of the LED elements 20 is connected by a common wiring on the collective substrate, and each LED element 20 is connected through the common wiring. An inspection method for heating one of the electrodes and observing the temperature rise of the LED element 20 to determine whether or not the connection is good will be described.

先ず図5及び図6で本発明の第2実施形態を説明する。図5は本発明の第2実施形態における検査系の斜視図である。図5において集合基板61上にはLED素子20がマトリクス状に配列している。ここでLED素子20に蛍光樹脂11をモールドしていない。集合基板61上には赤外線カメラ51が配置されている。集合基板61の左側ではヒータープローブ62の先端が接触している。   First, a second embodiment of the present invention will be described with reference to FIGS. FIG. 5 is a perspective view of an inspection system according to the second embodiment of the present invention. In FIG. 5, the LED elements 20 are arranged in a matrix on the collective substrate 61. Here, the fluorescent resin 11 is not molded on the LED element 20. An infrared camera 51 is disposed on the collective substrate 61. On the left side of the collective substrate 61, the tip of the heater probe 62 is in contact.

赤外線カメラ51は、LED素子20が発する赤外線強度からLED素子20の温度を測定する。この赤外線カメラ51は時間分解能が25μs程度ものを入手可能できる。ヒータープローブ62は図示していない共通配線を加熱し、共通配線を熱伝導経路としてLED素子20のN側バンプ14(図1等参照)を加熱する。この検査系では、ヒータープローブ62による共通配線の加熱直後から赤外線カメラ51で同時に複数のLED素子20の温度上昇を観察する。集合基板61の板材は、樹脂など共通配線に比べ熱抵抗の大きいものが検査しやすい。   The infrared camera 51 measures the temperature of the LED element 20 from the infrared intensity emitted by the LED element 20. This infrared camera 51 is available with a time resolution of about 25 μs. The heater probe 62 heats the common wiring (not shown), and heats the N-side bump 14 (see FIG. 1 and the like) of the LED element 20 using the common wiring as a heat conduction path. In this inspection system, the temperature increase of the plurality of LED elements 20 is observed simultaneously with the infrared camera 51 immediately after the heating of the common wiring by the heater probe 62. As the plate material of the collective substrate 61, a material having a larger thermal resistance than a common wiring such as resin is easy to inspect.

図6によりさらに具体的に検査系を説明する。図6は図5の検査系に含まれる集合基板61の説明図である。(a)は集合基板61の平面図とともにヒータープローブ62の加熱箇所を示している。集合基板61上にはLED素子20がマトリクス状に配列し、横一列に並んだLED素子20のN側バンプ14(図示せず)が−電極17(図示せず)を介して共通配線63により接続している。ヒータープローブ62は共通配線63の一端を加熱する。なお共通配線63は、−及び+電極17,16を電解メッキするためのメッキ用共通電極の左右両端部を検査前に切断したものである。図示していないが、共通配線63の左側にヒータープローブ62の接触領域、右側に温度測定用のモニター領域を設けておくと良い。このようにすると共通配線63の熱抵抗のバラツキを補正できるようになり、より良否判断が的確になる。   The inspection system will be described more specifically with reference to FIG. FIG. 6 is an explanatory diagram of the collective substrate 61 included in the inspection system of FIG. (A) has shown the heating location of the heater probe 62 with the top view of the aggregate substrate 61. FIG. The LED elements 20 are arranged in a matrix on the collective substrate 61, and the N-side bumps 14 (not shown) of the LED elements 20 arranged in a horizontal row are connected by the common wiring 63 via the negative electrode 17 (not shown). Connected. The heater probe 62 heats one end of the common wiring 63. The common wiring 63 is obtained by cutting the left and right ends of the common electrode for plating for electrolytic plating of the-and + electrodes 17 and 16 before inspection. Although not shown, it is preferable to provide a contact area of the heater probe 62 on the left side of the common wiring 63 and a monitor area for temperature measurement on the right side. In this way, it becomes possible to correct the variation in the thermal resistance of the common wiring 63, and the quality determination becomes more accurate.

図6(b)は集合基板61の正面図とともに、ヒータープローブ62及び赤外線カメラ51を示している。図6では共通配線63が上面にある場合を想定しているが、共通配線は集合基板61の下面にあっても良い。この場合、ヒータープローブ62は集合基板61の下面から接触する。
(第3実施形態)
FIG. 6B shows the heater probe 62 and the infrared camera 51 together with the front view of the collective substrate 61. In FIG. 6, it is assumed that the common wiring 63 is on the upper surface, but the common wiring may be on the lower surface of the collective substrate 61. In this case, the heater probe 62 contacts from the lower surface of the collective substrate 61.
(Third embodiment)

第2実施形態では共通配線63をヒータープローブ62で加熱していた。加熱方法はヒータープローブ62に限られず、例えば通電であっても良い。そこで通電を利用した加熱法を採用した第3実施形態を図7で説明する。図7は本発明の第3実施形態における検査系の説明図である。(a)は集合基板61の平面図とともに通電用の電流印加端子64と電源65を示している。図6で示した第2実施形態の検査系との主な違いは、共通配線63の両端に電流印加端子64が接触していることである。この電流印加端子64へは電源65から電流が供給される。(b)は集合基板61の正面図とともに、電流印加端子64、電源65及び赤外線カメラ51を示している。図7では共通配線63が上面にある場合を想定しているが、共通配線は集合基板61の下面にあっても良い。   In the second embodiment, the common wiring 63 is heated by the heater probe 62. The heating method is not limited to the heater probe 62 and may be energized, for example. Accordingly, a third embodiment that employs a heating method utilizing energization will be described with reference to FIG. FIG. 7 is an explanatory diagram of an inspection system according to the third embodiment of the present invention. (A) shows a current application terminal 64 and a power source 65 for energization together with a plan view of the collective substrate 61. The main difference from the inspection system of the second embodiment shown in FIG. 6 is that the current application terminals 64 are in contact with both ends of the common wiring 63. A current is supplied from the power supply 65 to the current application terminal 64. (B) shows the current application terminal 64, the power source 65, and the infrared camera 51 together with a front view of the collective substrate 61. In FIG. 7, it is assumed that the common wiring 63 is on the upper surface, but the common wiring may be on the lower surface of the collective substrate 61.

10cm角程度の集合基板61の場合、共通配線63は数mΩ程度にしておく。電流印加は急峻なパルス状にでき、共通配線63を短時間で一様に加熱できるため、セラミック
や金属等の熱抵抗の低い板材であっても検査できるようになる。また共通配線63の抵抗値を予め計測し、電流値を調整しても良い。
(第4実施形態)
In the case of the collective substrate 61 of about 10 cm square, the common wiring 63 is set to about several mΩ. Current can be applied in a steep pulse shape, and the common wiring 63 can be uniformly heated in a short time, so that even a plate material having a low thermal resistance such as ceramic or metal can be inspected. Further, the resistance value of the common wiring 63 may be measured in advance to adjust the current value.
(Fourth embodiment)

第1実施形態では一方の電極を加熱し順方向電圧Vfの過渡的な変化を観察することにより接続不良を判断していた。第2,3実施形態では一方の電極を加熱しLED素子20の温度の過渡的な変化を観察することにより接続不良を判断していた。一方の電極を加熱し順方向電圧Vfと温度の過渡的変化を同時に測定すれば、接続不良に係わる判断が的確になる。そこで図8により順方向電圧Vfと温度の過渡的変化を同時に測定する本発明の第4実施形態を説明する。   In the first embodiment, connection failure is determined by heating one electrode and observing a transient change in the forward voltage Vf. In the second and third embodiments, connection failure is determined by heating one electrode and observing a transient change in the temperature of the LED element 20. If one electrode is heated and a transient change in forward voltage Vf and temperature is measured at the same time, a judgment regarding connection failure can be made accurately. Therefore, a fourth embodiment of the present invention for simultaneously measuring the forward voltage Vf and the transient change in temperature will be described with reference to FIG.

図8は、図1に示したLED装置10の順方向電圧Vfの測定とともに温度上昇を観察し、LED装置10の接続状態を検査するシステムを示す説明図である。図8は図3で示した検査システムに赤外線カメラ51を追加したものである。赤外線カメラ51は、LED装置10の上方に配置され、LED装置10が発する赤外線強度からLED装置10の上面の温度分布を測定する。赤外線カメラ51の時間分解能として25μs程度のものが入手可能である。赤外線カメラ51は制御判定手段52との間で制御信号及びデータをやり取りする。制御判定手段52の他の機能は図3の制御判定手段33と等しい。すなわち制御判定手段52は、第1実施形態と同じ手順で測定した順方向電圧Vfとともに、赤外線カメラ51から送られて来るLED装置10の温度上昇パターンを記憶し、この記憶したパターンデータと、予め良品として記憶しておいた順方向電圧VFの変化パターン及び温度上昇パターンとを比較し良否判断する。   FIG. 8 is an explanatory diagram showing a system for observing a temperature rise as well as measuring the forward voltage Vf of the LED device 10 shown in FIG. 1 and inspecting the connection state of the LED device 10. FIG. 8 is obtained by adding an infrared camera 51 to the inspection system shown in FIG. The infrared camera 51 is disposed above the LED device 10 and measures the temperature distribution on the upper surface of the LED device 10 from the infrared intensity emitted by the LED device 10. An infrared camera 51 with a time resolution of about 25 μs is available. The infrared camera 51 exchanges control signals and data with the control determination means 52. Other functions of the control determination unit 52 are the same as those of the control determination unit 33 in FIG. That is, the control determination unit 52 stores the temperature rise pattern of the LED device 10 sent from the infrared camera 51 together with the forward voltage Vf measured by the same procedure as that of the first embodiment, and stores the stored pattern data in advance. The change pattern of the forward voltage VF stored as a non-defective product and the temperature rise pattern are compared to determine whether or not the product is good.

なお本実施形態ではLED素子20が発光しているため、発光による赤外線が存在していること、及び蛍光樹脂11でモールドしているため、赤外線測定においてノイズの増加や空間的分解能の低下が起きる。しかしながら単個のLED装置10を検査する場合は、赤外線カメラ51の空間的分解能を高くできるので、発熱パターン(温度分布)を詳細に確認することで接続不良の判定の的確性を維持できる。   In the present embodiment, since the LED element 20 emits light, the presence of infrared light due to light emission and the molding with the fluorescent resin 11 cause an increase in noise and a decrease in spatial resolution in infrared measurement. . However, when the single LED device 10 is inspected, the spatial resolution of the infrared camera 51 can be increased, so that the accuracy of determination of connection failure can be maintained by checking the heat generation pattern (temperature distribution) in detail.

第1〜4実施形態では突起電極を半導体素子側に設けていた。回路基板側に突起電極を設け、その突起電極に半導体素子をフリップチップ実装しても良い。しかしながら半導体素子側に突起電極を設けた方が、素子が密集したウェハー状態で突起電極を形成できるため生産効率が高くなり好ましい。   In the first to fourth embodiments, the protruding electrode is provided on the semiconductor element side. A protruding electrode may be provided on the circuit board side, and a semiconductor element may be flip-chip mounted on the protruding electrode. However, it is preferable to provide protruding electrodes on the semiconductor element side because the protruding electrodes can be formed in a wafer state where the elements are densely packed, so that the production efficiency is increased.

第1〜4実施形態において、加熱する経路に含まれる素子側電極と回路基板との接続部の面積は、加熱しない経路中の素子側電極と回路基板との接続部の面積より小さかった。加熱する経路中の接続部の面積が加熱しない経路中の接続部の面積と等しいか、大きくても、一方の経路だけ加熱し、加熱後の順方向電圧Vfを測定したり、温度上昇を観察したりして接続の良否判断を行うことは可能である。なお一方の経路の接続部の面積が他方の経路の接続部の面積が異なっていれば、それぞれの経路を別々に加熱することで違った結果が得られることから不良原因の解析も容易になる。また前述したように多くの場合、接続面積の小さい方の接続部に接続不良が集中するので、接続面積の小さい方の経路だけを加熱し検査すれば不良検出率が高い状態で検査工程を短くすることができる。なおバンプサイズ(素子側の電極)が異なるという特徴はLED素子が半導体素子のなかで代表的なものである。   In the first to fourth embodiments, the area of the connection portion between the element side electrode and the circuit board included in the heating path is smaller than the area of the connection portion between the element side electrode and the circuit board in the non-heating path. Even if the area of the connection part in the heating path is equal to or larger than the area of the connection part in the non-heating path, only one path is heated, and the forward voltage Vf after heating is measured, and the temperature rise is observed. It is possible to determine whether or not the connection is good. If the area of the connection part of one path is different from the area of the connection part of the other path, different results can be obtained by heating each path separately, making it easy to analyze the cause of failure. . In many cases, as described above, connection failures are concentrated on the connection portion with the smaller connection area. Therefore, if only the path with the smaller connection area is heated and inspected, the inspection process can be shortened with a high defect detection rate. can do. The characteristic that the bump size (electrode on the element side) is different is typical of LED elements among semiconductor elements.

第1〜4実施形態では半導体素子としてLED素子で説明してきたが、半導体素子は、電極間に多くの場合寄生ダイオード、寄生抵抗が存在するので、本発明の検査方法はLED素子以外の半導体素子を実装した半導体装置にも適用できる。特に端子間がダイオード特性を示す半導体素子の場合、順方向電圧Vfを測定対象とできるので好ましい。また第
1の電極を加熱する手法は、測定用のプローブを経由した加熱や接触式のヒータープローブに限らず、レーザー、光、赤外線等を放射する非接触式ヒータープローブを用いても良い。この場合、直接的に接続面積の小さい方の電極を加熱しても良い。
In the first to fourth embodiments, the LED element has been described as the semiconductor element. However, since the semiconductor element often includes a parasitic diode and a parasitic resistance between the electrodes, the inspection method of the present invention is a semiconductor element other than the LED element. The present invention can also be applied to a semiconductor device mounted with. In particular, a semiconductor element exhibiting diode characteristics between terminals is preferable because the forward voltage Vf can be measured. The method for heating the first electrode is not limited to heating via a probe for measurement or a contact heater probe, and a non-contact heater probe that emits laser, light, infrared light, or the like may be used. In this case, the electrode having the smaller connection area may be directly heated.

10…LED装置(半導体装置)、
11…蛍光樹脂、
12…サファイア基板、
13…半導体層、
14…N側バンプ、
15…P側バンプ、
16…+電極、
16a,17a…スルーホール、
17…−電極、
18…板材、
19…回路基板、
20…LED素子、
21…N型半導体層、
22…P側半導体層、
23…+側プローブ、
24…−側プローブ、
25…ヒーター、
26…電圧計
27…定電流源、
29,65…電源、
31…印加手段、
33,52…制御判定手段、
51…赤外線カメラ、
61…集合基板、
62…ヒータープローブ、
63…共通配線、
64…電流印加端子。
10 LED device (semiconductor device),
11 ... fluorescent resin,
12 ... sapphire substrate,
13 ... semiconductor layer,
14 ... N side bump,
15 ... P side bump,
16 ... + electrodes,
16a, 17a ... through hole,
17 ...- electrodes,
18 ... board material,
19 ... circuit board,
20 ... LED element,
21 ... N-type semiconductor layer,
22 ... P-side semiconductor layer,
23 ... + side probe,
24 ...- side probe,
25 ... Heater,
26 ... Voltmeter 27 ... Constant current source,
29, 65 ... power supply,
31 ... Application means,
33, 52 ... control determination means,
51 ... Infrared camera,
61 ... Collective board,
62 ... heater probe,
63 ... Common wiring,
64: Current application terminal.

Claims (4)

半導体素子を回路基板にフリップチップ実装した半導体装置の検査方法において、
前記半導体素子はLED素子であり、
前記LED素子の一の電極が他の電極より接続面積が小さく、
前記一の電極と接続する前記回路基板の電極をヒータから得た熱でプローブを介して加熱し、前記一の電極の温度を上昇させ、
前記一の電極に接続する前記回路基板の電極と、前記他の電極に接続する前記回路基板の電極との間の導通状態を示す電気量について、加熱直後から前記プローブを介してその化を観察し、
予め準備しておいた良否判定基準と前記観察の結果とを比較し良否判定することを特徴とする半導体装置の検査方法。
In a semiconductor device inspection method in which a semiconductor element is flip-chip mounted on a circuit board,
The semiconductor element is an LED element,
One electrode of the LED element has a smaller connection area than the other electrode,
The electrodes of the circuit board to be connected to the one electrode is heated through the probe by the heat obtained from the heater to raise the temperature of the one electrode,
Said circuit board electrode connected to the one electrode, an electrical quantity indicative of the conductive state between the circuit board of the electrodes connected to the other electrode, the change immediately after the heating through the probe Observe
A method for inspecting a semiconductor device, comprising: comparing a quality determination criterion prepared in advance with a result of the observation to determine quality.
前記電気量が前記LED素子の順方向電圧であることを特徴とする請求項に記載の半導体装置の検査方法。 The method for inspecting a semiconductor device according to claim 1 , wherein the quantity of electricity is a forward voltage of the LED element . 前記電気量とともに前記LED素子の温度上昇を観察することを特徴とする請求項1又は2に記載の半導体装置の検査方法。 Method of inspecting a semiconductor device according to claim 1 or 2, characterized in that for observing the temperature rise of the LED element with the quantity of electricity. 多数の前記回路基板が接続して連結した集合基板に前記LED素子がフリップチップ実装され、前記一の電極と接続する前記回路基板の電極が互いに共通配線で連結しているとき、前記共通配線を一括して加熱することを特徴とする請求項1から3のいずれか一項に記載の半導体装置の検査方法。
When the LED element is flip-chip mounted on a collective substrate to which a large number of the circuit boards are connected and connected, and the electrodes of the circuit board connected to the one electrode are connected to each other by a common wiring, the common wiring is method of inspecting a semiconductor device according to any one of claims 1 to 3, characterized in that heating collectively.
JP2011137189A 2010-10-18 2011-06-21 Inspection method of semiconductor device Expired - Fee Related JP5669679B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2011137189A JP5669679B2 (en) 2010-10-18 2011-06-21 Inspection method of semiconductor device

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2010233511 2010-10-18
JP2010233511 2010-10-18
JP2011137189A JP5669679B2 (en) 2010-10-18 2011-06-21 Inspection method of semiconductor device

Publications (2)

Publication Number Publication Date
JP2012109525A JP2012109525A (en) 2012-06-07
JP5669679B2 true JP5669679B2 (en) 2015-02-12

Family

ID=46494791

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011137189A Expired - Fee Related JP5669679B2 (en) 2010-10-18 2011-06-21 Inspection method of semiconductor device

Country Status (1)

Country Link
JP (1) JP5669679B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI678538B (en) * 2018-06-06 2019-12-01 新樺精機股份有限公司 Needle sensor of ic pattern device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000261137A (en) * 1999-03-12 2000-09-22 Nec Corp Connection inspection system of electronic component and its method
JP2002043736A (en) * 2000-07-21 2002-02-08 Wirutekku Kk Detection method of ic lead soldering defect using temperature change of ic chip
JP4955949B2 (en) * 2005-07-12 2012-06-20 パナソニック株式会社 Inspection method and inspection apparatus

Also Published As

Publication number Publication date
JP2012109525A (en) 2012-06-07

Similar Documents

Publication Publication Date Title
KR101182584B1 (en) Manufacturing appratus and manufacturing method of led package
US6428202B1 (en) Method for inspecting connection state of electronic part and a substrate, and apparatus for the same
Schmid et al. Investigations on high-power LEDs and solder interconnects in automotive application: Part I—Initial characterization
CN102760727A (en) Testing device and method of electromigration of interconnection line
CN113406484B (en) Device and method for failure analysis of chip
CN102288639B (en) Method for screening by applying power semiconductor light-emitting diode (LED) thermal resistance rapid batch screening device
JP2001153909A (en) Board inspecting device, board manufacturing method, and board with bump
WO2019163862A1 (en) Chip for evaluating board, and board evaluating device
US20140049283A1 (en) Method and apparatus for detecting semiconductor device property
Nogueira et al. Accelerated life test of high luminosity AlGaInP LEDs
JP5669679B2 (en) Inspection method of semiconductor device
CN202159116U (en) Heat resistance quick batch screening device of power semiconductor LED (Light-emitting Diode)
EP0415440B1 (en) Apparatus for measuring light output from semiconductor light emitting element
JP2013098411A (en) Inspection method and inspection apparatus for solar battery
US20250271297A1 (en) Apparatus and method for mass detecting electroluminescent devices array
Schmidt et al. Localization of electrical active defects caused by reliability-related failure mechanism by the application of Lock-in Thermography
WO2018079657A1 (en) Solar cell inspection method and inspection device, method for manufacturing solar cell, method for manufacturing solar cell module, inspection program, and storage medium
US10845405B2 (en) Integrated circuit intended for insulation defect detection and having a conductive armature
KR101183706B1 (en) Method of adjusting pitch of probe card for inspecting light emitting devices
KR20130123793A (en) Apparatus and method for measuring temperature of led package
Annaniah et al. An investigation on die crack detection using Temperature Sensitive Parameter for high speed LED mass production
TW201401549A (en) Light emitting diode structure, light emitting diode package and method of measuring temperature of light emitting diode structure
Dannerbauer et al. Inline Rth control: Fast thermal transient evaluation for high power LEDs
Fulmek et al. Direct junction temperature measurement in high-power leds
KR20120084952A (en) The apparatus and method for measurement of generated heat from led

Legal Events

Date Code Title Description
RD07 Notification of extinguishment of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7427

Effective date: 20130531

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20131203

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20140530

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20140701

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20140723

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20141202

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20141216

R150 Certificate of patent or registration of utility model

Ref document number: 5669679

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees