JP5682682B2 - Data reception processing method and data reception processing device - Google Patents

Description

  The present invention relates to a data reception processing method and a data reception processing device.

  In a wireless communication system, for example, WiMAX, a MAC (Medium Access Control) layer is a protocol common to the physical layer. When data is exchanged between a base station and a mobile station, The MAC layer is associated (mapped) with the mobile station and a connection is established.

  Data exchange is performed in a plurality of packets, and this packet has a form of a protocol data unit (hereinafter referred to as MAC-PDU or simply PDU (Protocol Data Unit)) defined by the MAC protocol. The MAC-PDU includes a MAC header portion having information such as a PDU configuration method, length, and connection ID (CID), and a payload portion including data. However, the payload part is optional. The MAC header includes a general MAC header (Generic MAC Header: GMAC) and a MAC control header (MAC Control Header).

  A burst is a bundle of one or more PDUs, and a frame is a bundle of one or more bursts. The receiving apparatus classifies the burst area from the frame, checks the connection ID in the MAC header of the PDU in the burst, and selects and processes only the PDU addressed to itself.

  On the other hand, in wireless communication or the like, an error occurs in received data according to the state on the communication medium between the transmission side and the reception side. Therefore, in the above wireless communication, the MAC header part and the payload part have error correction code bits such as a cyclic redundancy check bit (Cyclic Redundancy Check: CRC) so that an error can be detected on the receiving side. The CRC in the MAC header portion is called a header check sequence (HCS), and the CRC that detects an error in the payload portion and the entire PDU is called a frame check sequence (FCS).

  The reception processing device sequentially performs error checking and data processing of PDUs in the burst for each burst. For example, when the error check by the HCS bit in the MAC header of the PDU is OK, if the connection ID in the MAC header is addressed to itself, the data processing of the PDU is performed, otherwise the PDU is discarded. Then, error checking and data processing of the next PDU are performed. The MAC header includes a length field having information on the data length of the PDU, and the reception processing device extracts the next PDU based on the data length in the length field.

If the error check by the HCS bit is NG (No Good), the data of the PDU cannot be trusted, and therefore the head of the next PDU cannot be specified. Therefore, all subsequent PDUs in the burst are discarded. However, in this method, all the remaining PDUs in the burst are discarded, and the throughput rapidly decreases.

  Therefore, it is proposed that when the error check by the HCS bit is NG, the next MAC header is scanned to estimate the head of the next PDU. According to this, an error check based on the HCS bit in the MAC header is performed for each scan after shifting by 1 byte, and when the check result is OK, it is determined that the estimated PDU is correct, and data processing is performed. To remedy. For example, it is patent document 1. FIG.

  Further, PDU processing in a communication system is proposed in Patent Documents 2 and 3, for example.

JP 2007-195185 A JP 2008-17467 A JP 2001-358699 A

  First, when the error check by the HCS bit is NG, discarding all subsequent PDUs in the burst being processed is not preferable because the throughput is drastically reduced.

  Furthermore, in the PDU relief method according to Patent Document 1, even if the error check using the HCS bit in the MAC header is OK in a noisy communication environment, the error check result using the CRC bit of the PDU is NG. Probability is high. For this reason, even if the PDU relief process is performed, the PDU is discarded as an error in the error check using the CRC bits, resulting in a drop in the performance of the data reception process.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a data reception processing method and a data reception processing device for relieving PDUs without degrading the performance of data reception processing.

  One aspect of the data reception processing method is a data reception processing method for processing a data unit having a header. In the data reception processing method, the header is checked when an error is detected in the header error check. And determining whether or not to perform error correction processing on the header in which the error is detected, based on the number of error corrections in the error correction processing block including.

  According to the above aspect, a header having an error can be relieved without reducing the throughput.

It is a figure which shows the structure of the data unit in mobile WiMAX. It is a block diagram of the receiver in this Embodiment. 6 is a chart showing a relationship between a bit error rate BER and a bit error rate obtained by an experiment by a receiving device of the present inventor. It is a block diagram of the data reception processing apparatus in this Embodiment. It is a flowchart figure which shows the process sequence of the reception processing unit 50 in this Embodiment. It is a figure explaining the search method of the next GMH. It is a figure explaining the search method of GMH within a FEC block. It is a figure which shows the example of a burst for demonstrating the data unit relief method of this Embodiment.

  FIG. 1 is a diagram illustrating a configuration of a data unit in mobile WiMAX. The frame FR includes one or more burst BSTs, and the burst BST includes one or more data units 10. In mobile WiMAX, this data unit 10 is a MAC-PDU (Protocol Data Unit). In FIG. 1, the burst BST has three data units MAC-PDU # 0, # 1, and # 2.

  As shown in the data unit 10, the MAC-PDU is composed of a GMH (Generic MAC Header) 12, which is a header, a variable-length payload 14, and a 4-byte (32 bits) error correction code of the MAC-PDU. CRC (Cyclic Redundancy Check) bit 16. Payload 14 and CRC bit 16 are optional, but GMH 12 is always included.

  The header GMH 12 has a fixed length of 6 bytes (48 bits), a header type 121 indicating the header type (general MAC header, MAC control header), an encryption control 122 indicating whether the payload is encrypted, It has a header content 123 in which various information is stored, and a header check sequence (HCS) 124 for checking header errors. In this header content 123, as shown in FIG. 1, type, ESF (Extended Subheader Field), CI (CRC Indicator), EKS (Encryption Key Sequence), Length indicating MAC-PDU length, Connection ID ( CID).

  Based on the connection ID in the header, the data reception processing device determines whether the MAC-PDU is addressed to itself. Further, the data reception processing device can detect the head position of the next MAC-PDU based on the length information in the header.

A burst BST includes a plurality of MAC-PDUs each having a different data length. The transmission apparatus divides the burst BST into a plurality of fixed-length error correction processing blocks based on a predetermined rule, and performs forward error correction coding such as convolutional coding in each error correction processing block. Along with this, the receiving device receives the radio signal, performs forward error correction of the baseband received data, performs error bit error correction processing as much as possible, and corrects the error to the subsequent data receiving processing device. Supply received data.

  The error correction processing block that is the object of this forward error correction coding is called an FEC (Forward Error Correction) block, and the receiving apparatus performs forward error correction immediately after the high-frequency receiving circuit.

  Then, the subsequent data reception processing device temporarily stores the error-corrected reception data in the reception buffer, analyzes the header of each MAC-PDU in the burst BST, and based on the connection ID (CID) The addressed data unit is detected, and appropriate data processing is performed for the detected data unit. The data reception processing device reads the next MAC-PDU from the reception buffer based on the length information in the header, and sequentially processes whether the MAC-PDU has no error or is a data unit addressed to itself. I do.

  Further, the data reception processing device checks whether or not there is an error in the GMH based on the 8-bit fixed length HCS bit 124 in the GMH 12 that is the header. The HCS bit 124 is, for example, a CRC code, and it is possible to detect whether an error exists in the GMH by calculating the HCS bit 124 in the GMH and other data. Further, when the error bit is 1 bit, the position of the error bit can be specified, and error correction can be performed by inverting the 1-bit error bit. However, the number of error bits cannot usually be specified with the HCS bit.

  Further, the MAC-PDU 10 as a data unit also has a CRC bit 16 having a fixed length of 4 bytes when a payload 14 is provided. Therefore, the data reception processing device checks whether there is an error in the MAC-PDU based on the CRC bit 16.

  FIG. 2 is a configuration diagram of the receiving apparatus according to the present embodiment. The receiving device includes a high-frequency analog circuit RF that processes a high-frequency signal received by the antenna 20, a physical layer circuit PHY that performs frequency synchronization control SYNC and phase synchronization control DET on the received digital signal, and performs forward error correction for each FEC block. , And a low-level MAC layer circuit LMAC.

  The high frequency analog circuit RF includes a low noise amplifier LNA, a mixer MIX, a quadrature demodulator Q-DEM, a low pass filter LPF, a variable gain amplifier VGA, an analog digital converter ADC, and the like. The high-frequency analog circuit RF processes the received high-frequency signal, generates baseband received data, and supplies it to the physical layer circuit PHY. The physical layer circuit PHY includes a frequency synchronization control unit SYNC, a phase synchronization control unit DET, and a forward error correction unit FEC. This forward error correction unit FEC performs forward error correction for each FEC block. By this processing, the number of error corrections in the FEC block or the error correction rate (rate obtained by dividing the number of error corrections by the number of bits of the FEC block) can be obtained.

  The low-level MAC layer circuit LMAC stores bursts mixed in the received data temporarily while reconstructing them in the receive buffer and detects the MAC-PDU addressed to itself in each burst. A circuit 22; a CRC circuit 24 that performs error checking based on the CRC bits of the detected MAC-PDU addressed to itself; and a decoding circuit 26 that decrypts the encrypted MAC-PDU when there is no error in the CRC check. And have. The decrypted MAC-PDU is subjected to data processing by a subsequent processing circuit (not shown).

  In the present embodiment, the burst reconstruction circuit 22 corresponds to a data reception processing device. In this embodiment, when the error check result by the HCS bit in the MAC-PDU in the burst is NG (NO Good), the burst reconstruction circuit 22 determines the MAC-PDU in which the error is detected. Subsequent MAC-PDU relief is performed without significantly reducing the performance of reception processing.

  For example, in the burst BST having three MAC-PDUs shown in FIG. 1, when the error check result by the HCS bit 124 of the header 12 of the second MAC-PDU # 1 is NG (when an error is detected), The information in the header, especially the length information necessary to specify the header position of the next MAC-PDU, may contain error bits and is not certain. For this reason, the head position of the next MAC-PDU cannot be known. Therefore, in general data reception processing, all data units MAC-PDU # 1, # 2 after MAC-PDU # 1 in which an error in the burst BST is detected are discarded, and the same processing is performed from the next burst BST. Data reception processing is performed.

  However, with the above processing method, all remaining MAC-PDUs in the burst are discarded, and there is a possibility that MAC-PDUs addressed to themselves that may be included in the bursts cannot be received. , Incurs a significant decrease in throughput.

According to the above-mentioned Patent Document 1, when the GHS HCS check result, which is the header of the nth MAC-PDU, is NG, it is assumed that there is no error in the length information in the header. Based on the information, it jumps to the head of the next MAC-PDU in the reception buffer, reads 6-byte data corresponding to the GMH of the next n + 1-th MAC-PDU, and performs the HCS check of that GMH. If the HCS check result is OK, it can be considered that the length information is correct, and normal processing is resumed from the n + 1-th MAC-PDU. If the HCS check result is NG, it can be considered that the length information was not correct, and a 6-byte scan is performed while scanning the reception buffer one byte at a time from the top of the n-th MAC-PDU. The data is read, the read 6-byte data is regarded as GMH, an HCS check is performed, and the scan search is performed until the HCS check result becomes OK.

  According to the above method, even if the HCS check result of the header GMH of the nth MAC-PDU is NG, there is a possibility that at least the (n + 1) th MAC-PDU can be relieved, resulting in a significant reduction in throughput. Can be avoided.

  However, in a noisy communication environment, even if the n + 1-th MAC-PDU is relieved, there is a high possibility that an error will be detected in the error check of the entire MAC-PDU by the CRC bit 16 in the CRC circuit 24. Eventually, the rescued n + 1-th MAC-PDU is likely to be discarded. In this case, the relief process is wasted and the overall performance is reduced.

Also, in the scan search for the n + 1th MAC-PDU, the probability of no error in the error check using the HCS bit in GMH is 1/256 (0.39%), and it is possible to misrecognize a non-GMH location as GMH. There is sex. Therefore, determining that the GMH is correct only by checking the error using the HCS bit leads to misrecognition and may lead to performance degradation.

  Further, since the nth MAC-PDU that is NG in the HCS error check is not relieved, if the MAC-PDU is addressed to itself, the throughput is reduced.

  The data reception processing apparatus according to the present embodiment performs highly accurate repair processing including the nth MAC-PDU that is NG in the error check using the HCS bit. Therefore, when the number of error corrections obtained by forward error correction for the FEC block is less than or equal to the reference value, the repair process including the nth MAC-PDU is performed, and when the error correction number is larger than the reference value, the repair process is not performed. The MAC-PDU in the next FEC block is detected and reception processing is performed. Since the forward error correction is performed by the physical layer circuit PHY as shown in FIG. 2, the burst reconstruction circuit 22 must obtain in advance the number of error corrections of the FEC block including the MAC-PDU being processed. Can do.

  The receiving device cannot acquire the transmission data transmitted by the transmitting device. Therefore, the receiving device cannot know the BER (Bit Error Rate) indicating the signal transmission quality on the communication medium between the transmitting side and the receiving side from the received signal. However, the receiver can perform forward error correction immediately after the high-frequency analog circuit and know the number of bits corrected by the error correction. That is, the receiving apparatus can know the error correction number or error correction rate (the value obtained by dividing the error correction number by the number of bits of the FEC block).

  It is known that there is a certain correlation between the BER and the number of error corrections. For example, when the bit error rate BER is K bits for one FEC block, L bits of K bits or less can be corrected by forward error correction of the FEC block. That is, K ≧ L. As the BER increases, the number of error bits in the received data increases and the number of error corrections also increases. Conversely, if the BER is lowered, the number of error bits in the received data is reduced and the number of error corrections is also reduced. Therefore, the BER of the received data can be estimated based on the number of error corrections or the error correction rate.

  Error correction codes used for forward error correction, such as CC and CTC convolutional codes, depend on the modulation method such as DSK, QPSK, 16QAM, 64QAM, or the code rate of convolutional codes (m-bit information symbols are encoded) The error correction capability differs according to the code rate when converted to n (≧ m) bit symbols by conversion. Further, the error correction capability of the error correction code varies depending on the performance of the receiving device.

Therefore, the number of error corrections or error correction rate and the bit error rate (BER) by forward error correction according to different modulation schemes and code rates for each receiving device.
). Then, when the error correction number or error correction rate becomes NG in the error check by the HSC bit of the nth MAC-PDU, whether or not to perform the repair process including the nth MAC-PDU A reference value to be determined is set in advance. The data reception processing device performs a MAC-PDU relief process when the number of error corrections or error correction rate acquired by forward error correction of the FEC block is less than the reference value, and when it is higher than the reference value, After that, the subsequent MAC-PDU is discarded and processing is performed from the next FEC block. In other words, since the receiving device cannot know the bit error rate BER in the communication medium, the BER in the communication medium is estimated from the number and rate of error correction, and if the estimated BER is lower than the reference value, the repair process is performed. Do it. As a result, it is possible to suppress unnecessary execution of relief processing and increase throughput.

  In mobile WiMAX, 6 bytes (48 bits) of GMH's HCS bits are composed of 1 byte (8 bits), and are generated by computing the remaining 5 bytes of GMH. Then, the data reception processing device can detect whether or not an error exists by calculating based on the HCS bit in the received data and the remaining 5 bytes of data. Furthermore, when the error bit in the GMH is only one bit, the data reception processing device can specify which bit is wrong based on the calculation result by the HCS check. However, it is not possible to know whether it is a 1-bit error.

For example, the generator polynomial of HCS is X ⁸ + X ² + X ¹ +1
In this case, if only the MSB (the 47th bit) is inverted as in the following GMH1 and GMH0, the result of the HCS check operation is the same even if the LSBs are different from “5” and “3”. Be the same.
LSB = 5
GMH1 = 0x80AA AA0F 0FD5 HCS Check = 0x00 (OK)
GMH0 = 0x00AA AA0F 0FD5 HCS Check = 0x E0 (NG)
LSB = 3
GMH1 = 0x80AA AA0F 0FD3 HCS Check = 0x00 (OK)
GMH0 = 0x00AA AA0F 0FD3 HCS Check = 0x E0 (NG)
That is, if the HCS check result is 0xE0, it can be uniquely specified that the position of the 1-bit error is the MSB (47th bit). However, it is assumed that an error has occurred only for one bit.

  Therefore, it is necessary to know that GMH has an error (inverted) for only 1 bit. In the present embodiment, GMH has a bit string of 6 bytes (48 bits), so if the bit error rate BER is 1/48 or less, there is a high possibility that the error in GMH is 1 bit or less. Of course, the bit error rate BER may be concentrated in one place, and there is no guarantee that the error in GMH will be 1 bit or less, but at least the possibility is high.

Therefore, in the present embodiment, if the bit error rate BER is 1/10 ⁻³ or less, which is one digit lower than that, it is considered that the possibility that the error in GMH is 1 bit or less is very high, and BER = An error correction number or error correction rate corresponding to 1/10 ⁻³ is obtained by experiment, and the error correction number or error correction rate is a reference value for whether or not to repair a MAC-PDU in which an HSC error is detected And

  FIG. 3 is a chart showing the relationship between the bit error rate BER and the bit error rate obtained by an experiment by the present inventor with a certain receiving apparatus. In this chart, the error correction rate by forward error correction in the FEC block (60 bytes) corresponding to the modulation scheme and the coding rate is shown for each of the three types of BER. For three types of BER, which are communication environments, the modulation method and code rate were changed, and the error correction rates were obtained. In this experimental example, the FFT size is 1024.

  The error correction rate is obtained by dividing the number of error corrections in the FEC block by the number of bits in the FEC block. Therefore, if the number of bits in the FEC block is fixed, the error correction rate and the number of error corrections are 1: 1. Corresponding to Therefore, in FIG. 3, the number of error corrections may be obtained corresponding to two types of BER. In FIG. 3, an error correction rate corresponding to BER = 1.00-E03 (1/1000) is adopted as a reference value.

FIG. 4 is a configuration diagram of the data reception processing device according to the present embodiment. This data reception processing device is the burst reconstruction circuit 22 shown in FIG. The burst reconstruction circuit 22 performs an error check on the reception buffer 32 for temporarily storing a plurality of received data units MAC-PDU and the header GMH in the reception buffer 32, and when an error is detected by the header error check. , And a reception processing unit 50 for determining whether or not to perform error correction processing on the header in which an error is detected, based on the error correction number 42 in the error correction processing block including the header GMH.

Alternatively, the burst reconstruction circuit 22 performs an error check on the reception buffer 32 that temporarily stores a plurality of received data units MAC-PDU and the header GMH in the reception buffer, and an error is detected by the header error check. If the error correction count or error correction rate 42 in the error correction processing block including the header is equal to or less than the reference value, the data unit after the data unit including the header in which the error is detected is repaired, and the reference When the value is larger than the value, the reception processing unit 50 discards the data unit after the header in which the error in the error correction processing block is detected.

  In FIG. 4, the reception data supplied from the physical layer circuit PHY in the previous stage is temporarily stored in the reception buffer 32 by the write control unit 30. Since the received data includes a plurality of bursts, the write control unit 30 reconstructs the plurality of bursts by distinguishing the received data for each burst and writing the corresponding data in the reception buffer 32. .

  The reception processing unit 50 includes a GMH analyzer 34, an HCS check unit 36, an error correction processing unit 38 using HCS bits, and a GMH scan unit 40. The GMH analyzer 34 is supplied with the error correction number 42 detected by the forward error correction circuit FEC of the physical layer circuit PHY. The GMH analyzer 34 includes the reference value correspondence table shown in FIG. 3, and an error is detected based on whether the current FEC block error correction number 42 is less than or greater than the reference value. Judge whether to repair the MAC-PDU.

  FIG. 5 is a flowchart showing a processing procedure of the reception processing unit 50 in the present embodiment. The received data processing in the present embodiment will be described along this flowchart.

  First, the header analyzer 34 reads GMH in a burst temporarily stored in the reception buffer 32 (S10). For example, the first GMH address of the burst is the same as the first address of the burst, and the next GMH address is shifted from the first GMH address by the length information of the MAC-PDU.

  The header analyzer 34 reads the GMH in the FEC block from the reception buffer 32 (S10). Then, an HCS error check is performed on the read GMH (S12). The HCS error check is performed by the HCS error check unit 36. If this HCS error check result is OK, normal processing is performed on the MAC-PDU of the GMH (S14). In this normal processing, if the CRC error check in the MAC-PDU is OK, it is determined whether it is a data unit addressed to itself based on the connection ID, and if it is addressed to itself, the payload data is provided to the subsequent circuit. To do. Then, the header analyzer 34 jumps to the next GMH address based on the length information in the GMH, and reads the next GMH from the reception buffer (returns to A in the figure).

  When the HCS error check result is NG in the above HCS error check step S12, the header analyzer 34 has previously calculated the number of error corrections 42 in the forward error correction of the FEC block including the GMH. It is determined whether or not it is equal to or less than the value (S16). When the error correction number 42 is equal to or smaller than the reference value (YES in S16), the header analyzer 34 performs the following MAC-PDU relief processing (S18-S24).

  On the other hand, if the number of error corrections 42 exceeds the reference value (NO in S16), the GMH MAC-PDUs after the HCS error check in the current FEC block are NG are discarded, and the GMH in the next FEC block is discarded. Is searched (S28). The GMH search within the next FEC block will be described later.

  When the number of error corrections 42 is equal to or less than the reference value (YES in S16), the header analyzer 34 inverts and corrects the error bit specified by the error correction operation for GMH for which the HCS error check result is NG (S18). . This error correction processing is performed by the error correction processing unit 38. The header analyzer 34 cannot confirm that the error bit is 1 bit or less, but if the number of error corrections in the forward error correction is less than the reference value, the communication environment is BER 1/1000. The number of error bits in the 48-bit GMH can be estimated with a high possibility that it is at most one bit. Therefore, with this error bit correction S18, even if the HCS error check is NG, the GMH error can be corrected with a high possibility. As a result, the correct length information in GMH can be acquired with high possibility.

  Next, the header analyzer 34 jumps to the next GMH address in the reception buffer 32 based on the error-corrected length information in the GMH, and reads the next GMH data (S20). Further, the header analyzer 34 causes the HCS check unit 36 to perform the HCS check on the read GMH data (S20). If this HCS check result is OK (YES in S20), it means that the first error-corrected GMH length information is correct, so normal processing is performed from the first error-corrected GMH MAC-PDU. (S22). The normal processing is equivalent to step S14. As a result, the first error-corrected MAC-PDU can be relieved, and if this MAC-PDU is addressed to itself, the throughput can be greatly improved.

  On the other hand, if the HCS check result is NG (NO in S20), there is a possibility that the first error-corrected GMH length information may contain an error. The MAC-PDU next to the MAC-PDU including the GMH is searched (S24).

FIG. 6 is a diagram for explaining the next GMH scan search. The header analyzer 34 uses the scan unit 40 to start from the address of the first error bit corrected GMH 60.
As indicated by 64 in the figure, 6 bytes (48 bits) of data 62 are read from the reception buffer 32 while incrementing the address. The header analyzer 34 uses the HCS check unit 36 to perform the HCS error check assuming that the last 8 bits of the read 6-byte (48-bit) data 62 is an HCS bit string. If the error check result is NG, it is assumed that the read 6-byte data 62 is not GMH, and the scan unit 40 reads the 6-byte data 62 at the next address from the reception buffer 32. Then, the HCS check unit 36 performs the same HCS check as described above. By repeating these operations, the next GMH 66 in FIG. 6 can be extracted. That is, if the HCS check result of the 6-byte data 62 is OK, it can be estimated that the 6-byte data 62 is correct GMH.

  Then, the header analyzer 34 performs normal processing from the MAC-PDU detected by the search (S26). This normal process is also equivalent to step S14.

As described above, the GMH MAC-PDUs after the HCS error check in the current FEC block are NG are discarded, and the GMH is searched for in the next FEC block (S28). This search method is as follows.

FIG. 7 is a diagram for explaining a GMH search method in the FEC block. In FIG. 7, when the data of the FEC block # 2 is discarded, 6-byte (48-bit) data 72 is read from the reception buffer 32 from the head address of the next FEC block # 3. This reading is performed by the scan unit 40. Similarly to the above, the header analyzer 34 uses the HCS check unit 36 to perform the HCS error check assuming that the last 8 bits of the read 6-byte data 72 is an HCS bit string. If the error check result is NG, it is assumed that the read 6-byte data 72 is not GMH, and the scan unit 40 reads the 6-byte data 72 at the next address from the reception buffer 32. Then, the HCS check unit 36 performs the same HCS check as described above. By repeating these operations as indicated by 74 in the figure, the first GMH 76 in the FEC block # 3 in FIG. 7 can be extracted.

  Then, normal processing is resumed from the GMH MAC-PDU detected in step S28 (S26).

FIG. 8 is a diagram showing a burst example for explaining the data unit relief method of the present embodiment. FIG. 8 shows one burst BST, which includes five MAC-PDU # 0− # 4 and three FEC blocks FEC Block # 0− having the same bit length (60 bytes). # 2 and two FEC blocks FEC Blocks # 3 and # 4, which are shorter in bit length but equal to each other, are included. In the figure, the relationship between the number of error corrections in forward error correction of each FEC block and the reference value Nth is shown, and the GHS HCS check result OK or NG of each MAC-PDU is shown. Therefore, with reference to FIG. 9, the data unit relief process in the data reception processing device 50 shown in FIG. 5 will be described.

  The GMH of the first MAC-PDU # 0 of the burst BST is read from the reception buffer 32, and the HCS check result is NG, but the error correction count of the FEC block # 0 is less than the reference value Nth (S16 YES), the data reception processing device performs GMH error bit correction using the HCS bit of the MAC-PDU # 0 (S18). Then, the HCS error check result is OK for GMH of the next MAC-PDU # 1 (YES in S20), and normal processing is performed from MAC-PDU # 0 (S22).

  Next, the GMH of MAC-PDU # 2 is read from the reception buffer 32, and the result of the HCS error check is NG, but the error correction count of the FEC block # 1 is less than the reference value Nth (S16 YES), the data reception processing device performs GMH error bit correction using the HCS bit of the MAC-PDU # 2 (S18). Then, the HCS error check result is also NG for the GMH of the next MAC-PDU # 3 (NO in S20), and the data reception processing device scans from the GMH of the MAC-PDU # 2 and searches for the next GMH ( S24). When GMH of MAC-PDU # 3 is detected, normal processing is resumed from that MAC-PDU # 3 (S26).

  Next, the GMH of MAC-PDU # 4 is read from the reception buffer 32, and the result of the HCS error check is NG, but the error correction number of the FEC block # 2 is larger than the reference value Nth (S16 NO), the data after MAC-PDU # 4 in the FEC block # 2 is discarded (S28). Then, the next GMH is searched by scanning from the head address of the next FEC block # 3 (S28).

  In FEC block # 3, since the GMH HCS error check result of MAC-PDU # 5 is OK, normal processing is performed from MAC-PDU # 5 (S14).

  As described above, according to the present embodiment, it is possible to relieve a MAC-PDU in which an error is detected and subsequent MAC-PDUs without reducing throughput.

  The above embodiment is summarized as follows.

(Appendix 1)
In a data reception processing method for processing a data unit having a header,
Performing an error check of the header;
Determining whether or not to perform error correction processing of the header in which the error is detected, based on the number of error corrections in the error correction processing block including the header when an error is detected in the error check of the header A data reception processing method.

(Appendix 2)
In the data processing method of Appendix 1,
When the number of error corrections in the error correction processing block is larger than a reference value, the data units included in the error correction processing block including the header in which the error is detected and subsequent to the data unit of the header in which the error is detected A data reception processing method including a step of discarding and performing an error check of a header in the next error correction processing block.

(Appendix 3)
In the data reception processing method of Appendix 1,
A data reception processing method comprising a step of performing error correction processing of a header in which the error is detected when the number of error corrections in the error correction processing block is a reference value or less.

(Appendix 4)
In the data reception processing method of Appendix 3,
The header has header data and error correction bits calculated from the header data;
The step of performing error correction processing of the header in which the error has been detected specifies an error position based on the header data and error correction bits, and corrects the bit at the specified error position.

(Appendix 5)
In the data processing method of Appendix 3,
Based on the length information of the data unit in the header subjected to the error correction process, an error check of the next header is performed, and if no error of the next header is detected, the error correction process is performed. A data reception processing method comprising a step of processing data of a data unit having a header.

(Appendix 6)
In the data processing method of Appendix 5,
Based on the length information of the data unit in the header subjected to the error correction processing, an error check is performed on the next header in the reception buffer, and the error is detected when an error in the next header is detected. The data in the data unit having the estimated header is scanned when the next header is estimated by scanning the reception buffer from the corrected header and no error is detected by the error check of the estimated header. The data reception processing method which has the process of processing.

(Appendix 7)
In the data processing methods of Appendices 1 to 6,
Receiving a burst having one or more of said data units and storing it in a receive buffer;
Dividing the burst into error correction processing blocks and performing error correction processing for each error correction processing block to detect the number of error corrections.

(Appendix 8)
In the data processing method of Appendix 2 or 3,
Depending on the modulation method or coding rate of error correction coding and the communication environment, a plurality of types of the reference values are preset,
A data reception processing method in which a reference value corresponding to the modulation scheme or the coding rate of error correction coding among the plurality of types of reference values is used.

(Appendix 9)
In the data processing method according to any one of appendices 1 to 3,
The data reception processing method, wherein the error correction number has an error corrected number corresponding to a bit number of the error correction processing block.

(Appendix 10)
In a data reception processing method for processing a data unit having a header,
Performing an error check of the header;
When an error is detected in the error check of the header, if the error correction number or error correction rate in the error correction processing block including the header is equal to or less than a reference value, the data unit including the header in which the error is detected A data reception processing method comprising: a repair processing step of performing a repair processing of the data unit of and discarding a data unit subsequent to the header in which the error is detected in the error correction processing block when the data unit is larger than the reference value.

(Appendix 11)
In the data processing method of appendix 10,
In the relief process,
Perform error correction processing of the header in which the error is detected,
Based on the length information of the data unit in the header for which the error correction processing has been performed, an error check is performed on the header next to the header,
If no error is detected in the error check of the next header, the data unit of the header subjected to the error correction process is processed;
If an error is detected in the error check of the next header, the next buffer is estimated by scanning the reception buffer from the header subjected to the error correction process, and an error is detected in the error check of the estimated header. A data reception processing method for processing a data unit of the estimated header when it is not detected.

(Appendix 12)
In a data reception processing method for processing a data unit having a header,
Performing an error check of the header;
A step of performing error correction processing of the header in which the error is detected when an error is detected in the error check of the header;
A step of performing an error check of the header next to the header subjected to the error correction processing;
And a step of processing the data unit of the header subjected to the error correction processing when no error is detected in the error check of the next header.

(Appendix 13)
In the data processing method of appendix 12,
If an error is detected in the error check of the next header, the next buffer is estimated by scanning the reception buffer from the header subjected to the error correction process, and an error is detected in the error check of the estimated header. A data reception processing method including a step of processing the data unit of the estimated header when it is not detected.

(Appendix 14)
In a data reception processing device for processing a data unit having a header,
A receive buffer that temporarily stores multiple received data units;
An error is detected in the header in the reception buffer, and when an error is detected in the header error check, the error in the header in which the error is detected is determined based on the number of error corrections in the error correction processing block including the header. A data reception processing apparatus comprising: a reception processing unit that determines whether or not to perform correction processing.

(Appendix 15)
In Appendix 14,
The reception processing unit, when the number of error corrections in the error correction processing block is larger than a reference value, error check of a header in the error correction processing block next to the error correction processing block including the header in which the error is detected A data reception processing device.

(Appendix 16)
In Appendix 14,
The reception processing unit is a data reception processing device that performs error correction processing of a header in which the error is detected when the number of error corrections in the error correction processing block is equal to or less than a reference value.

(Appendix 17)
In Appendix 16,
The header has header data and error correction bits calculated from the header data;
In the error correction processing of the header in which the error is detected, the reception processing unit specifies an error position based on the header data and an error correction bit, and corrects the bit at the specified error position. apparatus.

(Appendix 18)
In a data reception processing device for processing a data unit having a header,
A receive buffer that temporarily stores multiple received data units;
When the error check of the header in the reception buffer is performed and an error is detected by the error check of the header, the number of error corrections or the error correction rate in the error correction processing block including the header is below a reference value Performs a remedy process for the data unit after the data unit including the header in which the error is detected, and if it is larger than the reference value, the data unit in the error correction processing block after the header in which the error is detected Receiving processing unit for discarding the data.

(Appendix 19)
In a data reception processing device for processing a data unit having a header,
A receive buffer that temporarily stores multiple received data units;
An error check of the header in the reception buffer is performed, and when an error is detected by the error check of the header, an error correction process is performed on the header in which the error is detected, and the header on which the error correction process is performed Based on the length information of the data unit in the header, the error check of the header next to the header is performed, and if no error is detected by the error check of the next header, the data of the header subjected to the error correction processing A data reception processing device having a reception processing unit for processing the unit.

22: burst reconstruction circuit, data reception processing device 50: reception processing unit 32: reception buffer 34: header analyzer

Claims (2)

In a data reception processing method for processing a data unit having a header,
Performing an error check of the header;
If an error is detected in the header error check and the error correction number or error correction rate in the error correction processing block including the header is equal to or less than a reference value , error correction processing of the header in which the error is detected is performed. row have, is greater than the reference value, and said error repair discard data units after the header detected process of the error correction processing block,
Performing an error check of a header next to the header based on length information of a data unit in the header subjected to the error correction processing;
A process of processing a data unit of the header subjected to the error correction process when no error is detected in the error check of the next header ;
When an error is detected in the error check of the next header, the next buffer is estimated by scanning the reception buffer from the header subjected to the error correction process, and an error is detected in the error check of the estimated header. A data reception processing method including a step of processing the data unit of the estimated header if not detected . In a data reception processing device for processing a data unit having a header,
A receive buffer that temporarily stores multiple received data units;
When the error check of the header in the reception buffer is performed, and an error is detected by the error check of the header, the error correction number or error correction rate in the error correction processing block including the header is below a reference value performs error correction processing of a header in which the error is detected, is greater than the reference value, the discarded data unit of the subsequent header error is detected in the error correction processing block, the error correction process Based on the length information of the data unit in the header, the error check of the header next to the header is performed, and if no error is detected by the error check of the next header, the error correction process is performed. the data were processed unit header, when an error is detected by the error check of the next header, before Scans the receive buffer from the header of the error correction processing has been performed to estimate the next header, when an error in the error check of the header that the estimated is not detected, the reception processing unit for processing the data unit headers and the estimated A data reception processing device.

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