JP5697926B2 - Semiconductor device - Google Patents
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- JP5697926B2 JP5697926B2 JP2010196075A JP2010196075A JP5697926B2 JP 5697926 B2 JP5697926 B2 JP 5697926B2 JP 2010196075 A JP2010196075 A JP 2010196075A JP 2010196075 A JP2010196075 A JP 2010196075A JP 5697926 B2 JP5697926 B2 JP 5697926B2
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- 239000004065 semiconductor Substances 0.000 title claims description 152
- 230000005855 radiation Effects 0.000 claims description 42
- 239000012535 impurity Substances 0.000 claims description 40
- 239000013078 crystal Substances 0.000 claims description 16
- 230000007547 defect Effects 0.000 claims description 16
- 238000001514 detection method Methods 0.000 claims description 11
- 230000001133 acceleration Effects 0.000 claims description 3
- 239000000758 substrate Substances 0.000 description 37
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 22
- 229910052710 silicon Inorganic materials 0.000 description 18
- 239000010703 silicon Substances 0.000 description 18
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 230000005684 electric field Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- 239000000969 carrier Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
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Description
本発明は、半導体装置に関し、特に、放射線センサに使用され、放射線を検出するための素子であるダイオードに関する。 The present invention relates to a semiconductor device, and more particularly to a diode that is used in a radiation sensor and is an element for detecting radiation.
放射線を検出するダイオードは、例えば、特許文献１に開示されている。 A diode for detecting radiation is disclosed in Patent Document 1, for example.
放射線を検出するダイオードとして、半導体シリコン基板を用いたものがある。図３に示すように、従来の放射線検出用のダイオード２は、Ｎ型半導体基板１０と、Ｎ型半導体基板１０の主面１２側に設けられたＰ型半導体領域２０とを備えている。Ｎ型半導体基板１０の主面１２にはコンタクト６４が接触して設けられ、Ｐ型半導体領域２０の主面１２側にはコンタクト６２が接触して設けられている。 As a diode for detecting radiation, there is a diode using a semiconductor silicon substrate. As shown in FIG. 3, the conventional radiation detection diode 2 includes an N-type semiconductor substrate 10 and a P-type semiconductor region 20 provided on the main surface 12 side of the N-type semiconductor substrate 10. A contact 64 is provided in contact with the main surface 12 of the N-type semiconductor substrate 10, and a contact 62 is provided in contact with the main surface 12 of the P-type semiconductor region 20.
まず、放射線に対するシリコン中の電子の性質について説明する。放射線がダイオードに照射されると、シリコン基板中のシリコン原子に束縛されている電子が、放射線のエネルギーを吸収して、束縛を逃れシリコン基板中を自由に動き回るようになる。しかしながら、自由に動き回っている電子は、僅かな時間（通常１×１０−６秒以下）で再びシリコン原子に束縛されるので、シリコン基板中の状態は放射線を当てる前の状態に戻るという性質がある。 First, the properties of electrons in silicon with respect to radiation will be described. When radiation is applied to the diode, electrons bound to silicon atoms in the silicon substrate absorb the energy of the radiation, escape the binding, and freely move around in the silicon substrate. However, the freely moving electrons are bound to silicon atoms again in a short time (usually 1 × 10 −6 seconds or less), so that the state in the silicon substrate returns to the state before irradiation. is there.
いま、Ｎ型半導体基板１０とＰ型半導体領域２０との間に逆バイアスを印加、すなわち、Ｐ型半導体領域２０よりＮ型半導体基板１０の方が高い電圧を印加すると、図４に示すようにＰ型半導体領域２０とＮ型半導体基板１０の界面（ＰＮジャンクション５２）を中心として、空乏層４０と呼ばれる電界の強い領域が形成される。逆バイアスを印加することで空乏層４０が形成されている状態では、放射線が照射された際、放射線によって束縛を解かれた電子は、強い空乏層領域の電界によって加速され、再びシリコン原子に束縛されるより先にシリコン基板１０の端まで到達することが出来る。シリコン基板１０の端には金属のコンタクト６４が形成されており、コンタクト６４の先には電子の量を測定するための回路６０が存在する。放射線が照射されていない時は、このシリコン基板１０中を自由に動き回る電子はほとんどないが、放射線が照射されると、多数の電子がシリコン基板１０の端に形成されているコンタクト６４に到達し、電子の量を測る回路６０によってカウントされる。このように放射線照射の有無を、シリコン基板１０からコンタクト６４を介して回路に流れる電流量によって判定することで、放射線を検知することができる。 Now, when a reverse bias is applied between the N-type semiconductor substrate 10 and the P-type semiconductor region 20, that is, when a higher voltage is applied to the N-type semiconductor substrate 10 than the P-type semiconductor region 20, as shown in FIG. A region having a strong electric field called a depletion layer 40 is formed around the interface (PN junction 52) between the P-type semiconductor region 20 and the N-type semiconductor substrate 10. In the state where the depletion layer 40 is formed by applying a reverse bias, when the radiation is irradiated, the electrons unbound by the radiation are accelerated by the electric field in the strong depletion layer region and are again bound to the silicon atoms. It is possible to reach the end of the silicon substrate 10 before being done. A metal contact 64 is formed at the end of the silicon substrate 10, and a circuit 60 for measuring the amount of electrons exists at the tip of the contact 64. When radiation is not irradiated, few electrons move freely in the silicon substrate 10, but when radiation is irradiated, a large number of electrons reach the contact 64 formed at the end of the silicon substrate 10. , And counted by a circuit 60 that measures the amount of electrons. Thus, the radiation can be detected by determining the presence or absence of radiation irradiation based on the amount of current flowing from the silicon substrate 10 through the contact 64 to the circuit.
ダイオード２はＮ型シリコン基板１０とＰ型半導体領域２０とから成るが、これは異なる２種類の不純物をシリコン基板に注入することで実現される。また一般に、電圧を印加するためのコンタクト６２、６４には金属（例えばタングステン）が用いられる。コンタクトの材料と半導体シリコンとを接合すると、２つの材料の電気的性質の違いから、金属半導体接合界面に高い抵抗が発生し、ダイオードとしての電気的特性を満足できなくなる。そこで、金属半導体接合界面の抵抗を極力低くするために、Ｐ型半導体領域２０及びＮ型半導体基板１０の不純物濃度を高濃度に設定している。 The diode 2 includes an N-type silicon substrate 10 and a P-type semiconductor region 20, which is realized by injecting two different types of impurities into the silicon substrate. In general, a metal (for example, tungsten) is used for the contacts 62 and 64 for applying a voltage. When the contact material and the semiconductor silicon are joined, a high resistance is generated at the metal semiconductor junction interface due to the difference in electrical properties between the two materials, and the electrical characteristics as a diode cannot be satisfied. Therefore, in order to reduce the resistance at the metal semiconductor junction interface as much as possible, the impurity concentrations of the P-type semiconductor region 20 and the N-type semiconductor substrate 10 are set high.
しかしながら、従来のダイオードの構造では、Ｐ型半導体領域２０及びＮ型半導体基板１０の不純物濃度が高いため、不純物注入時にシリコン基板１０中に、不純物とシリコン原子との衝突によって結晶欠陥３０が発生する。ダイオード２に逆バイアスを印加すると、Ｐ型半導体領域２０とＮ型半導体基板の界面（ＰＮジャンクション５２）付近に空乏層４０と呼ばれるほとんど伝導キャリアが存在しない領域が発生するが、この空乏層領域に結晶欠陥３０が存在すると、それが電子を発生させる元になってしまう。本センサはダイオード２に電流が流れていない状態を放射線が照射されていない状態と判断するため、本来、放射線が照射されていない状態ではシリコン基板１０中に流れる電流量はほぼゼロであることが要求される。しかし、放射線が照射されていない状態において、結晶欠陥３０によってシリコン基板１０中に電子が発生し、その電子が電流として流れてしまうと、放射線が照射されているものと判断するといった誤動作等の問題を引き起こす。 However, in the conventional diode structure, since the impurity concentration of the P-type semiconductor region 20 and the N-type semiconductor substrate 10 is high, a crystal defect 30 is generated in the silicon substrate 10 due to collision of impurities and silicon atoms during impurity implantation. . When a reverse bias is applied to the diode 2, a region called a depletion layer 40 in which almost no conductive carrier exists is generated near the interface (PN junction 52) between the P-type semiconductor region 20 and the N-type semiconductor substrate. If the crystal defect 30 exists, it becomes a source of generating electrons. Since this sensor determines that no current is flowing in the diode 2 as a state in which no radiation is irradiated, the amount of current flowing in the silicon substrate 10 is essentially zero in a state in which no radiation is irradiated. Required. However, in the state where radiation is not irradiated, if electrons are generated in the silicon substrate 10 due to the crystal defect 30 and the electrons flow as current, a problem such as malfunction that it is determined that the radiation is irradiated. cause.
本発明の主な目的は、放射線が照射されていないときに流れる電流の少ない半導体装置を提供することにある。 A main object of the present invention is to provide a semiconductor device with a small amount of current that flows when radiation is not irradiated.
本発明によれば、
一導電型の半導体層と、
前記半導体層に設けられた前記一導電型とは反対導電型の他の導電型の第１の半導体領域と、
前記第１の半導体領域内に設けられた前記他の導電型であって、前記の第１の半導体領域よりも高不純物濃度の第２の半導体領域と、を備え、
前記半導体層と前記第２の半導体領域との間に逆バイアスを印加して動作させる際に前記半導体層と前記第１の半導体領域との間に広がる空乏層内に、前記第２の半導体領域に生じる結晶欠陥が含まれないよう、前記第１の半導体領域内に前記第２の半導体領域を配置した放射線検出用半導体装置が提供される。
According to the present invention,
A semiconductor layer of one conductivity type;
A first semiconductor region of another conductivity type opposite to the one conductivity type provided in the semiconductor layer;
A second semiconductor region of the other conductivity type provided in the first semiconductor region and having a higher impurity concentration than the first semiconductor region,
In the depletion layer that extends between the semiconductor layer and the first semiconductor region when operating by applying a reverse bias between the semiconductor layer and the second semiconductor region, the second semiconductor region that does not contain crystal defects generated in the first semiconductor region radiation detecting semiconductor device placing the second semiconductor region in the are provided.
好ましくは、前記第２の半導体領域は、前記半導体層の一主面側から前記他の導電型の不純物を注入して設けられ、前記第１の半導体領域は、前記半導体層の一主面側から前記他の導電型の不純物を、前記第２の半導体領域を形成する場合よりも低いドーズ量かつ高い加速エネルギーで注入して設けられる。 Preferably, the second semiconductor region is provided by implanting impurities of the other conductivity type from one main surface side of the semiconductor layer, and the first semiconductor region is provided on one main surface side of the semiconductor layer. The other conductivity type impurities are implanted with a lower dose amount and higher acceleration energy than in the case of forming the second semiconductor region.
好ましくは、前記第１の半導体領域の不純物濃度は、結晶欠陥を発生させない不純物濃度である。 Preferably, the impurity concentration of the first semiconductor region is an impurity concentration that does not cause crystal defects.
好ましくは、前記第１の半導体領域は、前記半導体層の一主面に設けられ、前記第２の半導体領域は前記第１の半導体領域の前記一主面側に設けられている。 Preferably, the first semiconductor region is provided on one main surface of the semiconductor layer, and the second semiconductor region is provided on the one main surface side of the first semiconductor region.
好ましくは、前記第１の半導体領域の不純物濃度は１×１０１３〜１×１０１８／ｃｍ３、前記第２の半導体領域の不純物濃度は１×１０１９〜１×１０２１／ｃｍ３、前記半導体層の不純物濃度は１×１０１１〜１×１０１４／ｃｍ３である。 Preferably, the impurity concentration of the first semiconductor region is 1 × 10 13 to 1 × 10 18 / cm 3 , and the impurity concentration of the second semiconductor region is 1 × 10 19 to 1 × 10 21 / cm 3 , The impurity concentration of the semiconductor layer is 1 × 10 11 to 1 × 10 14 / cm 3 .
好ましくは、前記第２の半導体領域の深さは０．１〜１μｍ、前記第１の半導体領域の深さは０．５〜２μｍである。 Preferably, the depth of the second semiconductor region is 0.1 to 1 μm, and the depth of the first semiconductor region is 0.5 to 2 μm.
好ましくは、前記放射線検出用半導体装置はダイオードである。 Preferably, the radiation detecting semiconductor device is diode.
好ましくは、前記半導体層、前記第１の半導体領域、第２の半導体領域はＳｉから構成されている。 Preferably, the semiconductor layer, the first semiconductor region, and the second semiconductor region are made of Si.
本発明によれば、放射線が照射されていないときに流れる電流の少ない半導体装置が提供される。 ADVANTAGE OF THE INVENTION According to this invention, the semiconductor device with little electric current which flows when radiation is not irradiated is provided.
以下、本発明の好ましい実施の形態について図面を参照しながら説明する。 Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings.
図１を参照すれば、本発明の好ましい実施の形態の放射線（Ｘ線、粒子線）検出用のダイオード１は、Ｎ型半導体基板１０と、Ｎ型半導体基板１０の主面１２に設けられたＰ型半導体領域２２と、Ｐ型半導体領域２２の主面１２側に設けられたＰ型半導体領域２２よりも高不純物濃度のＰ型半導体領域２０とを備えている。Ｎ型半導体基板１０の主面１２にはコンタクト６４が接触して設けられ、Ｐ型半導体領域２０の主面１２側にはコンタクト６２が接触して設けられている。コンタクト６２、６４には金属、例えばタングステンが用いられる。コンタクト６４とコンタクト６２との間には、電子の量を測る回路６０が接続されている。 Referring to FIG. 1, a radiation (X-ray, particle beam) detection diode 1 according to a preferred embodiment of the present invention is provided on an N-type semiconductor substrate 10 and a main surface 12 of the N-type semiconductor substrate 10. A P-type semiconductor region 22 and a P-type semiconductor region 20 having a higher impurity concentration than the P-type semiconductor region 22 provided on the main surface 12 side of the P-type semiconductor region 22 are provided. A contact 64 is provided in contact with the main surface 12 of the N-type semiconductor substrate 10, and a contact 62 is provided in contact with the main surface 12 of the P-type semiconductor region 20. A metal such as tungsten is used for the contacts 62 and 64. A circuit 60 for measuring the amount of electrons is connected between the contact 64 and the contact 62.
Ｎ型半導体基板１０、Ｐ型半導体領域２０およびＰ型半導体領域２２は、単結晶シリコンからなっている。Ｎ型半導体基板１０の不純物濃度は１×１０１１〜１×１０１４／ｃｍ３であり、Ｐ型半導体領域２２の不純物濃度は１×１０１３〜１×１０１８／ｃｍ３であり、Ｐ型半導体領域２０の不純物濃度は１×１０１９〜１×１０２１／ｃｍ３である。Ｐ型半導体領域２０の深さは０．１〜１μｍであり、Ｐ型半導体領域２２の深さは０．５〜２μｍである。Ｐ型半導体領域２０は、Ｐ型半導体領域２２内に設けられており、Ｐ型半導体領域２０はＰ型半導体領域２２によって完全に覆われている。 N-type semiconductor substrate 10, P-type semiconductor region 20, and P-type semiconductor region 22 are made of single crystal silicon. The impurity concentration of the N-type semiconductor substrate 10 is 1 × 10 11 to 1 × 10 14 / cm 3 , and the impurity concentration of the P-type semiconductor region 22 is 1 × 10 13 to 1 × 10 18 / cm 3. The impurity concentration of the semiconductor region 20 is 1 × 10 19 to 1 × 10 21 / cm 3 . The depth of the P-type semiconductor region 20 is 0.1 to 1 μm, and the depth of the P-type semiconductor region 22 is 0.5 to 2 μm. The P-type semiconductor region 20 is provided in the P-type semiconductor region 22, and the P-type semiconductor region 20 is completely covered with the P-type semiconductor region 22.
Ｐ型半導体領域２０は、Ｎ型半導体基板１０の主面１２側からＰ型の不純物を注入することによって形成されている。Ｐ型半導体領域２２は、Ｎ型半導体基板１０の主面１２側からＰ型の不純物を、Ｐ型半導体領域２０を形成する場合よりも低いドーズ量かつ高い加速エネルギーで注入することによって形成されている。 The P-type semiconductor region 20 is formed by implanting P-type impurities from the main surface 12 side of the N-type semiconductor substrate 10. The P-type semiconductor region 22 is formed by implanting P-type impurities from the main surface 12 side of the N-type semiconductor substrate 10 with a lower dose and higher acceleration energy than when the P-type semiconductor region 20 is formed. Yes.
本実施の形態では、Ｐ型半導体領域２０の不純物濃度は１×１０１９〜１×１０２１／ｃｍ３の範囲の、例えば５×１０２０／ｃｍ３の高濃度であり、このような高濃度の不純物を注入することにより、図２に示すように、Ｐ型半導体領域２０内に結晶欠陥３０が発生する。高不純物濃度のＰ型半導体領域２０に存在する結晶欠陥３０を完全に覆って、結晶欠陥を発生させないような１×１０１３〜１×１０１８／ｃｍ３の範囲内の、例えば１×１０ｌ８／ｃｍ３といった低濃度のＰ型半導体領域２２を形成する。この構造は、結晶欠陥３０を発生させるような高濃度の不純物を注入してＰ型半導体領域２０を形成するのとは別に、結晶欠陥を発生させる不純物の注入時より高エネルギーで低濃度の不純物を注入することによってＰ型半導体領域２２を形成することによって実現できる。 In the present embodiment, the impurity concentration of the P-type semiconductor region 20 is a high concentration in the range of 1 × 10 19 to 1 × 10 21 / cm 3 , for example, 5 × 10 20 / cm 3. By implanting this impurity, a crystal defect 30 is generated in the P-type semiconductor region 20 as shown in FIG. Completely covers crystal defects 30 present in the P-type semiconductor region 20 of high impurity concentration, in the range of 1 × 10 13 ~1 × 10 18 / cm 3 so as not to generate crystal defects, for example, 1 × 10 l8 A low concentration P-type semiconductor region 22 of / cm 3 is formed. In this structure, apart from forming the P-type semiconductor region 20 by implanting a high-concentration impurity that generates the crystal defect 30, the impurity having a higher energy and lower concentration than when the impurity that generates the crystal defect is implanted. This can be realized by forming the P-type semiconductor region 22 by implanting.
上記のようにして形成したダイオード１に、逆バイアス（Ｎ型半導体基板１０よりＰ型半導体領域２０、２２の方が電圧が高い状態）を印加すると、Ｐ型半導体領域２２とＮ型半導体基板１０の界面（ＰＮジャンクション５０）付近に空乏層４０（伝導キャリアがほとんど存在しない領域）が発生する。 When a reverse bias (a state in which the voltage is higher in the P-type semiconductor regions 20 and 22 than in the N-type semiconductor substrate 10) is applied to the diode 1 formed as described above, the P-type semiconductor region 22 and the N-type semiconductor substrate 10. Near the interface (PN junction 50) is a depletion layer 40 (a region in which almost no conduction carriers are present).
低濃度（例えばシリコン中で１×１０１３〜１×１０１８／ｃｍ３）の不純物を注入した場合、結晶欠陥はほとんど発生しないことが期待できる。よって、本実施の形態では、高不純物濃度のＰ型半導体領域２０の周囲にある低不純物濃度のＰ型半導体領域２２には、結晶欠陥が存在しない。ダイオード１に逆バイアスを印加した時、低濃度のＰ型半導体領域２２とＮ型半導体基板１０の界面（ＰＮジャンクション５０）を中心として空乏層４０が形成されるが、本実施の形態では、この空乏層４０が高不純物濃度のＰ型半導体領域２０に到達しないような、Ｎ型半導体基板１０とＰ型半導体領域２２の不純物濃度およびＰ型半導体領域２２内のＰ型半導体領域２０の配置としている（Ｎ型半導体基板１０の不純物濃度は１×１０１１〜１×１０１４／ｃｍ３であり、Ｐ型半導体領域２２の不純物濃度は１×１０１３〜１×１０１８／ｃｍ３であり、Ｐ型半導体領域２０の深さは０．１〜１μｍであり、Ｐ型半導体領域２２の深さは０．５〜２μｍであり、Ｐ型半導体領域２０は、Ｐ型半導体領域２２内に設けられており、Ｐ型半導体領域２０はＰ型半導体領域２２によって完全に覆われている）。従って、結晶欠陥３０は空乏層４０に存在しないので、ダイオード１に放射線が照射されていない場合の電流の発生源にはならず、ダイオード１に放射線が照射されていない状態において、ダイオード１に流れる電流はほぼゼロであることが期待できる。 When impurities with a low concentration (for example, 1 × 10 13 to 1 × 10 18 / cm 3 in silicon) are implanted, it can be expected that almost no crystal defects are generated. Therefore, in the present embodiment, there is no crystal defect in the low impurity concentration P-type semiconductor region 22 around the high impurity concentration P-type semiconductor region 20. When a reverse bias is applied to the diode 1, the depletion layer 40 is formed around the interface (PN junction 50) between the low-concentration P-type semiconductor region 22 and the N-type semiconductor substrate 10. The impurity concentration of the N-type semiconductor substrate 10 and the P-type semiconductor region 22 and the arrangement of the P-type semiconductor region 20 in the P-type semiconductor region 22 are set such that the depletion layer 40 does not reach the P-type semiconductor region 20 having a high impurity concentration. (The impurity concentration of the N-type semiconductor substrate 10 is 1 × 10 11 to 1 × 10 14 / cm 3 , and the impurity concentration of the P-type semiconductor region 22 is 1 × 10 13 to 1 × 10 18 / cm 3. The depth of the type semiconductor region 20 is 0.1 to 1 μm, the depth of the P type semiconductor region 22 is 0.5 to 2 μm, and the P type semiconductor region 20 is provided in the P type semiconductor region 22. Yes, P type half The conductor region 20 is completely covered by the P-type semiconductor region 22). Accordingly, since the crystal defect 30 does not exist in the depletion layer 40, it does not become a current generation source when the diode 1 is not irradiated with radiation, and flows into the diode 1 in a state where the diode 1 is not irradiated with radiation. The current can be expected to be almost zero.
なお、放射線が照射されると、多数の電子と正孔が発生し、電子はシリコン基板１０に接触して形成されているコンタクト６４に到達し、正孔はＰ型半導体領域２０に接触して形成されているコンタクト６２に到達し、発生した電子の量は電子の量を測る回路６０によってカウントされる。このように放射線照射の有無を、回路６０に流れる電流量によって判定することで、放射線を検出することができる。 When irradiated with radiation, a large number of electrons and holes are generated, the electrons reach the contact 64 formed in contact with the silicon substrate 10, and the holes contact the P-type semiconductor region 20. The amount of generated electrons that reach the formed contact 62 is counted by a circuit 60 that measures the amount of electrons. Thus, the radiation can be detected by determining the presence or absence of radiation irradiation based on the amount of current flowing in the circuit 60 .
なお、上記の実施の形態において、Ｐ型とＮ型とし、Ｎ型をＰ型とした構造としてもよい。 In the above-described embodiment, a structure in which the P type and the N type are used and the N type is the P type may be used.
以上、本発明の種々の典型的な実施の形態を説明してきたが、本発明はそれらの実施の形態に限定されない。従って、本発明の範囲は、次の特許請求の範囲によってのみ限定されるものである。 While various typical embodiments of the present invention have been described above, the present invention is not limited to these embodiments. Accordingly, the scope of the invention is limited only by the following claims.
１ 放射線検出用のダイオード
１０ Ｎ型半導体基板
１２ 主面
２０、２２ Ｐ型半導体領域
３０ 結晶欠陥
４０ 空乏層
５０ ＰＮジャンクション
６２、６４ コンタクト
DESCRIPTION OF SYMBOLS 1 Diode 10 for radiation detection N-type semiconductor substrate 12 Main surface 20, 22 P-type semiconductor region 30 Crystal defect 40 Depletion layer 50 PN junction 62, 64 Contact
Claims (8)
前記半導体層に設けられた前記一導電型とは反対導電型の他の導電型の第１の半導体領域と、
前記第１の半導体領域内に設けられた前記他の導電型であって、前記の第１の半導体領域よりも高不純物濃度の第２の半導体領域と、を備え、
前記半導体層と前記第２の半導体領域との間に逆バイアスを印加して動作させる際に前記半導体層と前記第１の半導体領域との間に広がる空乏層内に、前記第２の半導体領域に生じる結晶欠陥が含まれないよう、前記第１の半導体領域内に前記第２の半導体領域を配置した放射線検出用半導体装置。 A semiconductor layer of one conductivity type;
A first semiconductor region of another conductivity type opposite to the one conductivity type provided in the semiconductor layer;
A second semiconductor region of the other conductivity type provided in the first semiconductor region and having a higher impurity concentration than the first semiconductor region,
In the depletion layer that extends between the semiconductor layer and the first semiconductor region when operating by applying a reverse bias between the semiconductor layer and the second semiconductor region, the second semiconductor region occurring as crystal defect is not included, the first semiconductor region radiation detecting semiconductor device placing the second semiconductor regions within.
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