JP5853375B2 - Image reading apparatus, image reading method, and program - Google Patents

Description

  The present invention relates to an image reading apparatus, an image reading method, and a program.

  In a general image scanner (image reading apparatus), the electric charge accumulated in the light receiving unit is shifted to a shift register by a shift pulse, and the electric charge in the shift register is transferred to the controller by the next shift pulse (for example, Patent Document 1). ).

  In recent image scanners, in order to read an image at high speed, the output interval of shift pulses may be set shorter than before (for example, “set value A”).

JP 2009-246636

  However, even when it is time to output the shift pulse, if other software processing is preferentially executed, the shift pulse may not be output at that timing. In such a case, the output of the shift pulse is postponed until the preferential software processing is completed.

  Thus, if the output of the shift pulse is delayed from the schedule, the interval until the next shift pulse is output may be shortened (becomes shorter than the set value A). At this time, the time required for transferring the image data cannot be secured sufficiently.

  It is an object of the present invention to provide a technique for ensuring as much time as possible for transferring image data even when the output of a shift pulse is delayed from the schedule.

One embodiment of the present invention for solving the above problem is an image reading device, in which charges accumulated in a photoelectric conversion element are transferred to a shift register by a shift pulse, and the charges stored in the shift register are The output clock is moved to the output unit at the end of the shift register by the readout clock, and the output unit converts the electric charge into an electric signal and sends it to the A / D conversion unit, and the output timing of the shift pulse is controlled. A shift pulse control unit that determines the output timing of the shift pulse based on the number of input periodic interrupt signals, and the output of the previous shift pulse is determined. If it is later than the previous output timing, the current shift pulse is output from the determined current output timing. Delaying in a cycle unit, characterized in that.
In the image reading apparatus, the shift pulse control unit enables the delay flag when the output of the previous shift pulse is delayed from the determined previous output timing, and the output of the current shift pulse is If the delay flag is valid at the determined current output timing, the delay flag is invalidated, and the output of the current shift pulse is delayed from the determined current output timing. Good.
Another aspect of the present invention for solving the above problem is an image reading method, wherein charges accumulated in a photoelectric conversion element are transferred to a shift register by a shift pulse, and the charges stored in the shift register are transferred. The read clock is used to move to the output section at the end of the shift register, where the output section converts the electric charge into an electrical signal and sends it to the A / D conversion section, and the output timing of the shift pulse. A shift pulse control step for controlling, and in the shift pulse control step, the output timing of the shift pulse is determined based on the number of input periodic interrupt signals, and the output of the previous shift pulse is determined. If it is later than the previous output timing, the output of the current shift pulse is compared with the determined current output timing. , Delayed in cycle unit of the periodic interrupt signal, characterized in that.
Still another embodiment of the present invention for solving the above-described problem is a program for causing a computer to function as an image reading device , transferring charges accumulated in a photoelectric conversion element to a shift register by a shift pulse, and An image reading step in which the charge stored in the shift register is moved to the output unit at the end of the shift register by the read clock, and the charge is converted into an electrical signal by the output unit and sent to the A / D conversion unit ; And a shift pulse control step for controlling the output timing of the shift pulse, wherein the shift pulse control step determines the output timing of the shift pulse based on the number of input periodic interrupt signals. The output of the previous shift pulse is later than the determined previous output timing. If the the output of this shift pulse, the output timing of this determined, delayed in cycle unit of the periodic interrupt signal, it is characterized.

2 is a block diagram illustrating an example of a schematic configuration of an image reading apparatus 50 according to the present embodiment. FIG. It is a timing chart for demonstrating the outline | summary of the image reading control of this application. It is a flowchart for demonstrating the output process of the shift pulse of this application. It is a timing chart for demonstrating the outline | summary of the conventional image reading control.

  Hereinafter, an example of an embodiment of the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram illustrating an example of a schematic configuration of an image reading apparatus 50 to which an embodiment of the present invention is applied.

  The image reading device 50 is a so-called flat bed type image reading device having a document table (not shown) on the upper surface of a housing. The image reading device 50 scans the image sensor 220 and reads an image of a document placed on a document platen of a transparent plate. The image reading apparatus 50 is not limited to a scanner, and may be a facsimile, a copier, a multifunction machine, or the like having a scanning function.

  The image reading device 50 has an upward document table (not shown) for placing a document as a read medium, and a cover (not shown) that covers the document placement surface (board surface) and the image reading window of the document table from above. And). The lid is coupled to the document table via a hinge mechanism and can be opened and closed.

  Also, an ADF (paper feeder) 300 is provided on the upper side of the image reading window integrally with the lid. The ADF 300 includes a DC motor 310, a paper feed tray (not shown), a transport roller (not shown), a paper discharge tray (not shown), and the like. Here, the rotation of the transport roller is controlled by the DC motor 310. The ADF 300 can pass the document placed on the paper feed tray by feeding it to the upper surface of the image reading window. Note that the DC motor 300 is provided with an encoder that outputs a pulse in accordance with the rotation amount of the transport roller (that is, the transport amount of the document).

  Further, as shown in the figure, the image reading apparatus 50 includes a carriage 200 on which an LED light source 210 and an image sensor (for example, a CCD color image sensor) 220 are mounted under a document table. Further, the image reading device 50 includes a carriage driving mechanism (not shown) that controls the reciprocation of the carriage 200, and a controller 100 that controls the entire image reading device 50 and performs various processes for reading an image. I have.

  The carriage 200 carries the image sensor 220 in the sub-scanning direction. The carriage 200 is slidably attached to a guide shaft or the like parallel to the platen surface of the document table and the image reading window, and is pulled and reciprocated by a belt rotated by a motor of a carriage driving mechanism. The amount of movement of the carriage 200 is controlled by the output value of an encoder that outputs pulses according to the amount of rotation of the motor of the carriage drive mechanism.

  That is, the carriage drive mechanism includes a motor for rotating a belt attached to the carriage and an encoder that outputs a pulse in accordance with the rotation amount of the motor.

  When reading is performed while the original is being conveyed by the ADF 300, the carriage 200 is fixed at a predetermined position below the image reading window.

  The LED light source 210 includes a red (R) LED, a green (G) LED, and a blue (B) LED, and generates light of three colors of RGB in a predetermined order. In the present embodiment, the LED light source 210 emits light in the order of a red LED, a green LED, and a blue LED when reading one line of a normal document. A similar light emitting operation is repeated in order to read the number of lines necessary for generating image data of the document. The light emission time of each color LED is predetermined for each color, and is extinguished when the predetermined time elapses after lighting. In addition, lighting of the LED light source 210 of each color is performed by supplying a predetermined current (current from a main control unit 110 described later).

  The image sensor 220 receives the light reflected from the document, accumulates electric charges corresponding to the amount of received light, and sends it to the controller 100 as image reading data (electrical signals).

  The image sensor 220 includes a plurality of sensor chips arranged in the main scanning direction. Each sensor chip has the same configuration as a normal CIS (Contact Image Sensor) or CCD (Charge Coupled Device) image sensor. That is, each sensor chip includes a photoelectric conversion element (photodiode), a shift gate, and a shift register. Then, the charge accumulated in the photoelectric conversion element is transferred to the shift register by opening the shift gate, and output while sequentially moving the charge by the shift register.

  The opening of the shift gate (charge transfer) is performed in response to application of a shift pulse (a signal from the main control unit 110 described later). Since the photoelectric conversion element always accumulates charges according to the amount of light received, the charge transfer timing to the shift register is the start timing for accumulating charges for the next light of the emission color. The charge transferred to the shift register is converted into an electric signal (analog data) from the output unit at the end of the shift register and sent to the A / D conversion unit 120.

  The output of the charge stored in the shift register is performed in response to a predetermined read clock (a signal from the main control unit 110 described later). For example, the charge of one pixel is output as analog data every clock.

  The controller 100 includes an A / D conversion unit 120 that converts analog data output from the image sensor 220 into digital data, and a data processing unit 130 that performs various corrections on the digital data output from the A / D conversion unit 120. And a storage unit 140 for storing correction data (white reference data and black reference data) used for various corrections by the data processing unit 130, read data (image data) to be corrected, and data from the data processing unit 130 Output unit 150 for sending the image data to a host such as a personal computer and each function unit in the controller 100 as well as controlling the LED light source 210 and the image sensor 220 in the carriage 200 and the carriage driving mechanism. A main control unit 110.

  The A / D conversion unit 120 is realized by, for example, AFE (Analog Front End), and converts analog data output from the image sensor 220 into digital data.

  The data processing unit 130 performs various corrections such as shading correction on the digital data output from the A / D conversion unit 110 and outputs the digital data to the output unit 150.

  The data processing unit 130 can be configured by a computer including a CPU that is a main control device, a ROM that stores programs and the like, and a RAM that temporarily stores data and the like as a main memory. Of course, the data processing unit 130 may be configured by an ASIC (Application Specific Integrated Circuit) designed to perform various correction processes exclusively.

  The storage unit 140 is realized by a buffer, for example. The storage unit 140 temporarily stores the digital data output from the A / D conversion unit 120 in a first-in first-out FIFO format, and sends the data to the output unit 150 in order from the previously stored data.

  The output unit 150 is realized by an interface for performing network connection or USB connection. The output unit 150 transmits the data in the storage unit 140 to the host computer (scanner control device) at a transfer rate according to the processing capability of the host.

  The main control unit 110 controls the ADF 300, the carriage 200, and a carriage driving mechanism (not shown) to read an image (perform “image reading control”). Specifically, the main control unit 110 includes an interrupt unit 111, a software processing unit 112, a motor control unit 113, and a reading control unit 114, as illustrated.

  FIG. 2 is a timing chart for explaining the outline of the image reading control.

  In the PID control of the DC motor (drive motor) 310 by the motor control unit 113 described later, the interrupt unit 111 performs an interrupt at a predetermined cycle T as shown in FIG. The numbers shown in FIG. 2 represent the number of interruptions N by the interruption unit 111. The interrupt count N is initialized when a shift pulse is output (N = 0).

  The software processing unit 112 activates (starts) predetermined software processing with an interrupt from the interrupt unit 111 as a trigger. Here, the predetermined software processing activated by the software processing unit 112 includes processing for outputting a shift pulse (hereinafter also referred to as “shift pulse output processing”) and the like.

  In the shift pulse output process, the software processing unit 112 outputs a shift pulse to the image sensor 220 based on the interrupt count N by the interrupt unit 111. Thereby, the transfer timing of the charge accumulated in the photoelectric conversion element to the shift register (next charge accumulation start timing) is controlled.

  The interval for outputting the shift pulse is set in advance. For example, a predetermined time determined according to the number of interrupts N by the interrupt unit 111 (for example, the time “6 × T ”) (set value A shown in FIG. 2).

  However, as shown in FIG. 2, the software processing unit 112 performs other processing (hereinafter referred to as “priority”) that is preferentially executed over the shift pulse output processing even at the timing α at which the shift pulse should be output. In the case of “processing”, the shift pulse output processing cannot be started (started). For this reason, the software processing unit 112 outputs a shift pulse at the timing β when the other priority processing ends. That is, the software processing unit 112 outputs the shift pulse later than scheduled (delayed from α to β).

  In addition, when a delay occurs in the output of the shift pulse due to another priority process, the software processing unit 112 enables the delay flag as illustrated in FIG. By referring to this delay flag, it can be determined whether or not a delay has occurred in the output of the previous shift pulse. The delay flag is held by a flag signal that can be switched between valid and invalid, for example.

  Further, when a delay occurs in the output of the shift pulse, the software processing unit 112 delays the output of the next shift pulse from the schedule (delays from γ to δ) as shown in FIG. Specifically, the software processing unit 112 counts the number of interruptions N by the interruption unit 111, and the delay flag is valid even at the timing γ when the number of interruptions N reaches a predetermined number (for example, “6 times”). If it is, no shift pulse is output. Instead, the software processing unit 112 invalidates the delay flag and outputs a shift pulse at the timing δ when the interrupt by the interrupt unit 111 occurs next.

  Whether or not a delay has occurred in the output of the shift pulse is determined by determining the elapsed time (the shift pulse output interval ΔT shown in FIG. 2) from the time Told at which the previous shift pulse was output to the current time Tnew. Done.

  The motor control unit 113 controls the DC motor (drive motor) 310 of the ADF 300 (PID control), conveys the document on the paper feed tray, and passes it through the image reading window. For example, the motor control unit 113 can drive the DC motor 310 at a constant speed.

  The reading control unit 114 controls image reading by the image sensor 220. Specifically, the reading control unit 114 supplies a reading clock to the image sensor 220 at the output timing of the shift pulse, and supplies the charge to the controller 100 (A / D conversion unit 120) stored in the shift register. Control the output of.

  At this time, data (analog data) output from the image sensor 220 is converted into digital data by the A / D conversion unit 120, and various corrections are performed by the data processing unit 130.

  Then, the reading control unit 114 notifies the data processing unit 130 of an instruction signal, and stores (buffers) the data subjected to various corrections in the storage unit 140.

  As described above, when a delay occurs in the output of the shift pulse, the time required to transfer the image for one line (also referred to as “the shortest transfer period”) is delayed in order to delay the output of the next shift pulse. ) Can be secured. And the electric charge accumulate | stored in the photoelectric conversion element can be reliably transferred to the controller 100. FIG.

  The reading control unit 114 keeps the carriage 200 stopped under the image reading window when reading an original using the ADF 300. Of course, when reading a document placed on the document table without using the ADF 300, the reading control unit 114 can also control the movement of the carriage 200 by controlling the rotation of the motor of the carriage drive mechanism. .

  The main control unit 110 includes a computer that includes a CPU that is a main control device, a ROM that stores programs and the like, and a RAM that temporarily stores data and the like as a main memory. However, each unit (111, 113, 114) other than the software processing unit 112 may be configured by hardware (for example, ASIC) designed to perform each processing exclusively.

  The image reading apparatus 50 to which this embodiment is applied has the above-described configuration. However, this configuration is not limited to the above configuration because the main configuration has been described in describing the features of the present invention. Further, other configurations included in a general image reading apparatus are not excluded. Further, the A / D conversion unit 120 may be mounted on a substrate in the carriage 200.

  Each of the above-described constituent elements is classified according to the main processing contents in order to facilitate understanding of the configuration of the image reading apparatus 50. The present invention is not limited by the way of classification and names of the constituent elements. The configuration of the image reading device 50 can be classified into more components depending on the processing content. Moreover, it can also classify | categorize so that one component may perform more processes. Further, the processing of each component may be executed by one hardware or may be executed by a plurality of hardware.

  Next, a characteristic operation of the image reading apparatus 50 configured as described above will be described.

<Shift pulse output processing>
The image reading device 50 starts the flow shown in FIG. 3 at a predetermined timing. For example, the image reading device 50 starts this flow at the timing when the interruption by the interruption unit 111 occurs during image reading using the ADF 300 (PID control of the DC motor 310 by the motor control unit 113).

  When this flow is started, the software processing unit 112 starts (starts) predetermined software processing (for example, shift pulse output processing).

  Then, the software processing unit 112 increments the interrupt count N (step S101). Note that the interrupt count N is counted using, for example, a predetermined counter. In step S101, the software processing unit 112 increments a predetermined counter count value (a value corresponding to the interrupt count N) each time an interrupt is generated by the interrupt unit 111.

  Then, the software processing unit 112 determines whether or not the number of interrupts N by the interrupt unit 111 is equal to or greater than a predetermined number (“6 times” in the example illustrated in FIG. 2) (step S102).

  Specifically, the software processing unit 112 acquires the count value of the counter used for counting the interrupt count N, and when the acquired count value is equal to or greater than the predetermined count, the interrupt count N is equal to or greater than the predetermined count. Judge that there is. On the other hand, when the count value acquired from the counter is less than the predetermined number, the software processing unit 112 determines that the interrupt count N is not greater than or equal to the predetermined number.

  Here, when it is determined that the interrupt count N is not equal to or greater than the predetermined count (step S102; No), the software processing unit 112 ends the processing of this flow, and the interrupt unit 111 generates the next interrupt. Wait until

  In addition, when it is determined that the interrupt count N is equal to or greater than the predetermined count (step S102; Yes), the software processing unit 112 regards it as a timing at which a shift pulse should be output, and shifts the processing to step S103.

  When the process proceeds to step S103, the software processing unit 112 determines whether or not the delay flag is valid prior to the output of the shift pulse (step S103).

  Then, when the delay flag is valid (step S103; Yes), the software processing unit 112 does not output a shift pulse and secures a delay flag in order to secure a time necessary for transferring an image for one line. Is disabled (step S111). In addition, the process of step S111 is performed at timing (gamma) in the example shown in FIG.

  Thereafter, the software processing unit 112 ends this flow.

  On the other hand, when the delay flag is invalid (step S103; No), the software processing unit 112 outputs a shift pulse (step S104). In addition, the process of step S104 is performed at timing (delta) in the example shown in FIG.

  After outputting the shift pulse, the software processing unit 112 initializes the interrupt count N (step S105).

  Then, the software processing unit 112 acquires the current time Tnew and the time Told at which the previous shift pulse was output (step S106). Specifically, the software processing unit 112 acquires the current time Tnew from a predetermined timer, and reads and acquires the time Told when the shift pulse was output last time from a predetermined storage device.

  Then, the software processing unit 112 calculates the time (shift pulse output interval ΔT) that has elapsed since the last output of the shift pulse until the current time (step S107). Specifically, the software processing unit 112 calculates the shift pulse output interval ΔT by subtracting the Told acquired in step S106 from the Tnew acquired in step S106 (ΔT = Tnew−Told).

  Then, the software processing unit 112 determines whether or not the time (shift pulse output interval ΔT) elapsed from the previous output of the shift pulse to the current time is equal to or greater than the reference value R (step S108). Specifically, the software processing unit 112 reads the reference value R from a predetermined storage device, and determines whether or not the shift pulse output interval ΔT calculated in step S107 is greater than or equal to the reference value R. Note that the reference value R is assumed to be stored in advance in a predetermined storage device as data, for example, and can be regarded as a delay in the output of the shift pulse (for example, interrupt cycle T × 6.5). And

  Here, when the output interval ΔT of the shift pulse is greater than or equal to the reference value R (step S108; Yes), the software processing unit 112 considers that a delay has occurred in the output of the shift pulse and validates the delay flag. (Step S109). Then, the software processing unit 112 moves the process to step S110. Note that the process of step S109 is performed at timing β in the example illustrated in FIG.

  On the other hand, when the output interval ΔT of the shift pulse is less than the reference value R in step S108 (step S108; No), the software processing unit 112 regards that the delay is not generated in the output of the shift pulse, The processing moves to step S110 without enabling the delay flag.

  When the process proceeds to step S110, the software processing unit 112 stores the current time Tnew as the time Told when the shift pulse was output last time (step S110).

  Thereafter, the software processing unit 112 ends this flow.

  By performing the shift pulse output process as described above, in the image reading apparatus 50 of the present embodiment, when a delay occurs in the output of the shift pulse, the output of the next shift pulse can be delayed from the schedule. . For this reason, it is possible to reliably secure the time required for transferring the image for one line (“transfer shortest cycle”).

  Note that each processing unit of the flow in the above embodiment is divided according to main processing contents in order to make the image reading device 50 easy to understand. The invention of the present application is not limited by the method of classification of the processing steps and the names thereof. The processing performed by the image reading device 50 can be divided into more processing steps. One processing step may execute more processes. Further, the order of the processing steps is not limited to this, and can be changed as much as possible.

  Moreover, said embodiment intends to illustrate the summary of this invention, and does not limit this invention. Many alternatives, modifications, and variations will be apparent to those skilled in the art.

  For example, in the above embodiment, when the elapsed time from the last output of the shift pulse to the current time exceeds the reference value R, it is considered that a delay has occurred in the output of the shift pulse. However, the present invention is not limited to this. For example, for each interrupt by the interrupt unit 111, the elapsed time from the interrupt is measured, and the elapsed time exceeds a predetermined reference value at the output timing of the shift pulse. If there is a delay, it may be considered that a delay has occurred in the output of the shift pulse.

  In the following, conventional image reading control will be described for reference. FIG. 4 is a timing chart for explaining an outline of conventional image reading control.

  As shown in the figure, in the conventional image reading control, as in the image reading control of the above-described embodiment of the present application, there are cases where the shift pulse cannot be output at the scheduled timing α by other priority processing. In this case, a shift pulse is output at the timing β when the priority processing is completed.

  Thus, even when a delay (a delay from α to β) occurs in the output of the shift pulse, in the conventional image reading control, the next shift pulse is output at the scheduled timing γ.

  For this reason, in the conventional image reading control, the next shift pulse may be output during the transfer of the charge accumulated in the photoelectric conversion element. This makes it impossible to secure the time required for transferring an image for one line (“transfer shortest cycle”).

  On the other hand, in the image reading control according to the above-described embodiment of the present application, if a delay occurs in the output of the shift pulse, the output of the next shift pulse is delayed from the schedule. Sufficient time can be secured.

DESCRIPTION OF SYMBOLS 50 ... Image reading apparatus, 100 ... Controller, 110 ... Main control part, 111 ... Interrupting part, 112 ... Software processing part, 113 ... Motor control part, 114 ... Reading Control unit, 120 ... A / D conversion unit, 130 ... data processing unit, 140 ... storage unit, 150 ... output unit, 200 ... carriage, 210 ... LED light source, 220. ..Image sensor, 300 ... ADF, 310 ... DC motor

Claims (4)

An image reading device,
The charge accumulated in the photoelectric conversion element is transferred to the shift register by a shift pulse, and the charge stored in the shift register is moved to the output part at the end of the shift register by the read clock, An image reading unit that converts the signal into an electrical signal and sends the signal to an A / D conversion unit ;
A shift pulse control unit for controlling the output timing of the shift pulse,
The shift pulse controller is
The output timing of the shift pulse is determined based on the number of input periodic interrupt signals,
When the output of the previous shift pulse is delayed from the determined previous output timing, the output of the current shift pulse is delayed by the period unit of the periodic interrupt signal from the determined current output timing.
An image reading apparatus. The image reading apparatus according to claim 1,
The shift pulse controller is
The delay flag is enabled when the output of the previous shift pulse is later than the determined previous output timing, and the delay flag is effective at the determined current output timing of the current shift pulse. In this case, the delay flag is invalidated, and the output of the current shift pulse is delayed from the determined current output timing.
An image reading apparatus. An image reading method comprising:
The charge accumulated in the photoelectric conversion element is transferred to the shift register by a shift pulse, and the charge stored in the shift register is moved to the output part at the end of the shift register by the read clock, An image reading step of converting the signal into an electrical signal and sending it to an A / D converter ;
A shift pulse control step for controlling the output timing of the shift pulse, and
In the shift pulse control step,
The output timing of the shift pulse is determined based on the number of input periodic interrupt signals,
When the output of the previous shift pulse is delayed from the determined previous output timing, the output of the current shift pulse is delayed by the period unit of the periodic interrupt signal from the determined current output timing.
An image reading method. A program for causing a computer to function as an image reading device,
The charge accumulated in the photoelectric conversion element is transferred to the shift register by a shift pulse, and the charge stored in the shift register is moved to the output part at the end of the shift register by the read clock, An image reading step of converting the signal into an electrical signal and sending it to an A / D converter ;
A shift pulse control step for controlling the output timing of the shift pulse;
In the shift pulse control step,
The output timing of the shift pulse is determined based on the number of input periodic interrupt signals,
When the output of the previous shift pulse is delayed from the determined previous output timing, the output of the current shift pulse is delayed by the period unit of the periodic interrupt signal from the determined current output timing.
A program characterized by that.

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