JP5904582B2 - Load detection circuit - Google Patents

Description

  The present invention relates to a load detection circuit that detects whether or not a detachable load is mounted, and an electric device including the load detection circuit.

  An example of a conventional load detection circuit for detecting the presence or absence of a detachable load is shown in FIG. The conventional load detection circuit shown in FIG. 7 includes a microcomputer 101, an inverter 102, and a switch SW1.

The logic signal output from the output port P _OUT of the microcomputer 101 is inverted by the inverter 102 and then supplied to the detachable load 104 via the pair of connectors 103A and 103B. Further, a DC voltage of 12 [V] is also supplied to the detachable load 104 via the pair of connectors 103A and 103B.

The detachable load 104 uses a DC voltage of 12 [V] as a power supply voltage, and switches between an ON state and an OFF state according to a logic signal output from the output port P _OUT of the microcomputer 101. . Further, by releasing the connection between the connector 103A and the connector 103B, the detachable load 104 can be removed from the electric device including the conventional load detection circuit shown in FIG.

A DC voltage of 5 [V] is supplied to one end of the switch SW1 via a pair of connectors 105A and 105B. The other end of the switch SW1 is connected to the input port _PIN of the microcomputer 101 via a pair of connectors 105A and 105B.

When the detachable load 104 is attached to an electric device including the conventional load detection circuit shown in FIG. 7, and the detachable load 104 exists at a predetermined position, the switch SW1 is opened, and the microcomputer A DC voltage of 5 [V] is not supplied to the input port _{PIN of} 101. On the other hand, when the detachable load 104 is removed from the electric device including the conventional load detection circuit shown in FIG. 7 and the detachable load 104 does not exist at a predetermined position, the switch SW1 is closed. A DC voltage of 5 [V] is supplied to the input port P _IN of the microcomputer 101. Therefore, the conventional load detection circuit shown in FIG. 7 detects the presence or absence of the detachable load 104 depending on whether or not a DC voltage of 5 [V] is supplied to the input port _PIN of the microcomputer 101.

Japanese Patent Laid-Open No. 9-27393

  However, the conventional load detection circuit shown in FIG. 7 has a problem that the cost of the switch SW1 is high, a problem that it is necessary to secure a space for providing the switch SW1, and a member for the switch SW1 (connectors 105A and 105B, connector 105). And a harness for connecting the switch SW1 to the switch SW1).

  As another example of a conventional load detection circuit, there is a circuit for determining whether or not a discharge lamp (one of loads) disclosed in Patent Document 1 is not mounted, but the circuit configuration is complicated and low. There is a problem that the cost cannot be increased.

  An object of this invention is to provide the load detection circuit which can achieve cost reduction and space saving in view of said situation, and an electric equipment provided with the same.

  In order to achieve the above object, a load detection circuit according to the present invention comprises either a buffer or inverter logic circuit for sending a logic signal to a detachable load, and a microcomputer, the microcomputer comprising: Based on the output terminal voltage of the logic circuit supplied to the input port of the microcomputer or the divided voltage of the output terminal voltage of the logic circuit, the presence or absence of the removable load is detected.

  According to such a configuration, it is possible to detect whether or not the detachable load is mounted without providing a switch or a complicated circuit configuration, so that cost and space can be reduced. Can do.

  Further, the microcomputer determines whether the output terminal voltage of the logic circuit or the divided voltage of the output terminal voltage of the logic circuit is High level or Low level, and the output terminal voltage of the logic circuit or the logic circuit When it is determined that the divided voltage of the output terminal voltage is at a high level, it may be determined that the removable load is mounted.

  In addition, the microcomputer outputs a logic signal (a logic signal at a high level for a buffer, a logic signal at a low level for an inverter) that should output a logic signal at a high level from the output terminal of the logic circuit. The detachable load when it is determined that the voltage is supplied to the input terminal of the logic circuit and the output voltage of the logic circuit or the divided voltage of the output voltage of the logic circuit is at a low level. You may make it determine with no mounting | wearing.

  The logic signal output from the output port of the microcomputer may be supplied to the input terminal of the logic circuit.

  According to such a configuration, since the microcomputer can easily recognize the logic signal supplied to the input terminal of the logic circuit, for example, a high level logic signal is output from the output terminal of the logic circuit. The microcomputer easily determines whether or not a logic signal (a high-level logic signal in the case of a buffer or a low-level logic signal in the case of an inverter) is supplied to the input terminal of the logic circuit. be able to.

  Further, when the microcomputer determines that the output terminal voltage of the logic circuit or the divided voltage of the output terminal voltage of the logic circuit is at a high level, the output terminal voltage of the logic circuit or the output terminal of the logic circuit The life of the detachable load may be estimated based on the voltage division value.

  Further, the microcomputer determines that a logic signal that should output a low level logic signal from the output terminal of the logic circuit is supplied to the input terminal of the logic circuit, and outputs the logic circuit. When it is determined that the end voltage or the divided voltage of the output terminal voltage of the logic circuit is at the Hihg level, it may be determined that the removable load is mounted and that the removable load is abnormal. Good.

  In order to achieve the above object, an electrical apparatus according to the present invention includes a load detection circuit having any one of the above configurations.

  According to the load detection circuit and the electric device including the load detection circuit according to the present invention, it is possible to detect whether or not a detachable load is mounted without providing a switch and without using a complicated circuit configuration. Cost reduction and space saving can be achieved.

It is a figure which shows the load detection circuit which concerns on 1st Embodiment of this invention. It is a figure which shows the load detection circuit which concerns on 2nd Embodiment of this invention. It is a figure which shows the load detection circuit which concerns on 3rd Embodiment of this invention. It is a figure which shows the load detection circuit which concerns on 4th Embodiment of this invention. It is a figure which shows the load detection circuit which concerns on 5th Embodiment of this invention. It is a figure which shows schematic structure of an air conditioner. It is a figure which shows an example of the conventional load detection circuit.

  Embodiments of the present invention will be described below with reference to the drawings.

<First Embodiment>
FIG. 1 is a diagram showing a load detection circuit according to the first embodiment of the present invention. The load detection circuit according to the first embodiment of the present invention includes a microcomputer 1, an open drain inverter 2, and resistors R1 and R2.

The logic signal output from the output port P _OUT of the microcomputer 1 is inverted by the inverter 2 and then supplied to the detachable load 4 via the pair of connectors 3A and 3B. Further, a DC voltage of 12 [V] is also supplied to the detachable load 4 via the pair of connectors 3A and 3B.

The detachable load 4 uses a DC voltage of 12 [V] as a power supply voltage, and switches between an ON state and an OFF state in accordance with a logic signal output from the output port P _OUT of the microcomputer 1. . When a low level logic signal is output from the output port P _OUT of the microcomputer 1 and inverted to a high level by the inverter 2, the detachable load 4 is turned off, and the output port P _OUT of the microcomputer 1 is turned off. When a logic signal of a high level is output and inverted to a low level by the inverter 2, the detachable load 4 may be turned on. On the contrary, the output port P of the microcomputer 1 may be turned on. _{When a} low level logic signal is output from _OUT and inverted to high level by the inverter 2, the detachable load 4 is turned on, and a high level logic signal is output from the output port P _OUT of the microcomputer 1. Can be attached and detached when inverted by inverter 2 to low level. The load 4 may be turned off.

  Further, by releasing the connection between the connector 3A and the connector 3B, the detachable load 4 can be removed from the electric device including the load detection circuit according to the first embodiment of the present invention.

The output terminal voltage of the inverter 2 is divided by a voltage dividing circuit including resistors R1 and R2 having high resistance values. The connection point N1 between the resistor R1 and the resistor R2 is connected to the input port P _IN of the microcomputer 1, and the voltage at the connection point N1, that is, the divided voltage of the output terminal voltage of the inverter 2, is supplied to the input port P _IN of the microcomputer 1. Is done.

In the microcomputer 1, the divided voltage of the output terminal voltage of the inverter 2 when the output terminal voltage of the inverter 2 is at the high level is determined as the high level, and the inverter 2 when the output terminal voltage of the inverter 2 is at the low level is determined. A threshold for determining the level of the voltage supplied to the input port _PIN of the microcomputer 1 is set and stored so that the divided voltage of the output terminal voltage is determined as the Low level. Note that the setting change of the threshold value for determining the level of the voltage supplied to the input port _PIN of the microcomputer 1 can be executed by software. Therefore, the circuit constants can be changed by physically changing the components in order to change the determination criterion of the comparator. It is easier than changing it.

The detachable load 4 is attached to the electric device including the load detection circuit according to the first embodiment of the present invention, and the detachable load 4 is connected to the output end of the inverter 2 via the pair of connectors 3A and 3B. If a low level logic signal is supplied from the output port P _OUT of the microcomputer 1 to the input terminal of the inverter 2, the divided voltage of the output terminal voltage of the inverter 2 becomes High level, and the output of the microcomputer 1 If a high-level logic signal is supplied from the port P _OUT to the input terminal of the inverter 2, the voltage division of the output terminal voltage of the inverter 2 becomes low level.

On the other hand, when the detachable load 4 is removed from the electric device including the load detection circuit according to the first embodiment of the present invention and the detachable load 4 is not connected to the output end of the inverter 2, the 12V power supply is connected to the connector. Since it is not supplied to the output terminal of the inverter 2 via the pull-up resistor R3 in the load 4 that can be attached and detached through 3A and 3B, the logic signal supplied from the output port _POUT of the microcomputer 1 to the input terminal of the inverter 2 is Regardless of the low level or the high level, the divided voltage of the output terminal voltage of the inverter 2 becomes the low level.

Therefore, when the microcomputer 1 determines that the divided voltage of the output terminal voltage of the inverter 2 is at the high level, the microcomputer 1 determines that the detachable load 4 is mounted, and sends a logic signal at the low level from the output port P _OUT. When it is determined that the voltage supplied to the input terminal of the inverter 2 and the divided output terminal voltage of the inverter 2 is at the low level, it is determined that the detachable load 4 is not mounted.

  As described above, the load detection circuit according to the first embodiment of the present invention can detect whether or not the detachable load 4 is mounted without providing a switch and without having a complicated circuit configuration. Thus, cost reduction and space saving can be achieved.

  Further, since the impedance of the detachable load 4 changes with the deterioration of the detachable load 4 and affects the voltage division of the output terminal voltage of the inverter 2, the detachable load 4 can be utilized using this influence. You may estimate the lifetime. For example, when the microcomputer 1 determines that the divided voltage of the output terminal voltage of the inverter 2 is at a high level, the microcomputer 1 stores the divided voltage value of the output terminal voltage of the inverter 2 and the divided output terminal voltage of the inverter 2. You may make it estimate the lifetime of the load 4 which can be attached or detached from the temporal change of the value of pressure.

In addition, even if the logic signal supplied from the output port P _OUT of the microcomputer 1 to the input terminal of the inverter 2 is at a high level, the divided voltage at the output terminal voltage of the inverter 2 may be at a high level. . Using this phenomenon, the microcomputer 1 determines that the high-level logic signal is supplied from the output port P _OUT to the input terminal of the inverter 2 and the divided voltage of the output terminal voltage of the inverter 2 is at the high level. In this case, it may be determined that the detachable load 4 is attached and that the inverter 2 is malfunctioning (not ON).

Second Embodiment
FIG. 2 is a diagram showing a load detection circuit according to the second embodiment of the present invention. The load detection circuit according to the second embodiment of the present invention does not include the resistors R1 and R2, and the present embodiment except that the output terminal voltage of the inverter 2 is directly supplied to the input port _PIN of the microcomputer 1. This is the same as the load detection circuit according to the first embodiment of the invention.

As the proper use of the load detection circuit according to the first embodiment of the present invention and the load detection circuit according to the second embodiment of the present invention, the High level output terminal voltage of the inverter 2 is applied to the input port _PIN of the microcomputer 1. When the allowable voltage (for example, 5 [V] or less) is exceeded, the load detection circuit according to the first embodiment of the present invention is adopted, and the high-level output terminal voltage of the inverter 2 is the input port P _{IN of the} microcomputer 1. If the allowable voltage is not exceeded, the load detection circuit according to the second embodiment of the present invention may be employed.

In the present embodiment, in the microcomputer 1, the high-level output terminal voltage of the inverter 2 is determined as the high level, and the low-level output terminal voltage of the inverter 2 is determined as the low level. A threshold for determining the level of the voltage supplied to _PIN is set and stored. When the microcomputer 1 determines that the output terminal voltage of the inverter 2 is at the high level, the microcomputer 1 determines that the detachable load 4 is mounted, and sends a low level logic signal from the output port P _OUT to the inverter 2. When it is determined that the output terminal voltage is supplied to the input terminal and the output terminal voltage of the inverter 2 is at the low level, it is determined that the detachable load 4 is not mounted.

  In the present embodiment, for example, when the microcomputer 1 determines that the output terminal voltage of the inverter 2 is at a high level, the microcomputer 1 stores the value of the output terminal voltage of the inverter 2 and determines the output terminal voltage of the inverter 2. You may make it estimate the lifetime of the load 4 which can be attached or detached from the change with time of a value.

In this embodiment, when the microcomputer 1 supplies a high level logic signal from the output port P _OUT to the input terminal of the inverter 2 and determines that the output terminal voltage of the inverter 2 is at the high level. Alternatively, it may be determined that the removable load 4 is attached and that the removable load 4 is abnormal.

<Third Embodiment>
FIG. 3 is a diagram showing a load detection circuit according to the third embodiment of the present invention. The load detection circuit according to the third embodiment of the present invention is the load according to the first embodiment of the present invention, except that the microcomputer 1 ′ and the logic signal generation unit 1 ″ are provided instead of the microcomputer 1. This is the same as the detection circuit.

In the present embodiment, the logic signal output from the logic signal generation unit 1 ″ is inverted by the inverter 2 and then supplied to the detachable load 4 via the pair of connectors 3A and 3B. The ON state and the OFF state are switched according to the logic signal output from the logic signal generation unit 1 ″. The microcomputer 1 ′ receives information on the level of the logic signal output from the logic signal generator 1 ″ from the logic signal generator 1 ″ and supplies the information from the logic signal generator 1 ″ to the input terminal of the inverter 2. In the microcomputer 1 ′, the divided voltage of the output terminal voltage of the inverter 2 when the output terminal voltage of the inverter 2 is at the high level is determined as the high level. For determining the level of the voltage supplied to the input port _PIN of the microcomputer 1 ′ so that the divided voltage of the output terminal voltage of the inverter 2 when the output terminal voltage of the inverter 2 is at the Low level is determined as the Low level. A threshold is set and stored.

  In the present embodiment, when the microcomputer 1 ′ determines that the divided output terminal voltage of the inverter 2 is at a high level, the microcomputer 1 ′ determines that the detachable load 4 is mounted, and the logic signal generator 1 ″ When it is determined that a logic signal of Low level is supplied to the input terminal of the inverter 2 and the partial pressure of the output terminal voltage of the inverter 2 is determined to be Low level, the removable load 4 is not mounted. Is determined.

  In the present embodiment, for example, when the microcomputer 1 ′ determines that the divided voltage of the output terminal voltage of the inverter 2 is at the high level, the divided value of the output terminal voltage of the inverter 2 is stored. You may make it estimate the lifetime of the load 4 which can be attached or detached from the time-dependent change of the partial pressure value of the output terminal voltage of the inverter 2.

  Further, in the present embodiment, the microcomputer 1 ′ determines that a high-level logic signal is supplied from the logic signal generation unit 1 ″ to the input terminal of the inverter 2, and the output terminal voltage of the inverter 2 is divided. When it is determined that the pressure is at a high level, it may be determined that the removable load 4 is attached and that the removable load 4 is abnormal.

<Fourth embodiment>
FIG. 4 is a diagram showing a load detection circuit according to the fourth embodiment of the present invention. The load detection circuit according to the fourth embodiment of the present invention does not include the resistors R1 and R2, except that the output terminal voltage of the inverter 2 is directly supplied to the input port _PIN of the microcomputer 1 ′. This is the same as the load detection circuit according to the third embodiment of the present invention.

The load detection circuit according to the third embodiment of the present invention and the load detection circuit according to the fourth embodiment of the present invention are selectively used in such a manner that the high-level output terminal voltage of the inverter 2 is the input port _{PIN of the} microcomputer 1 ′. When the voltage exceeds the allowable voltage (for example, 5 [V] or less), the load detection circuit according to the third embodiment of the present invention is employed, and the high-level output terminal voltage of the inverter 2 is the input port of the microcomputer 1 ′. When the allowable voltage of _PIN is not exceeded, the load detection circuit according to the fourth embodiment of the present invention may be employed.

In the present embodiment, in the microcomputer 1 ′, the output level voltage of the inverter 2 at the high level is determined as the high level, and the output level voltage at the low level of the inverter 2 is determined as the low level. A threshold for determining the level of the voltage supplied to the input port _PIN is set and stored. When the microcomputer 1 ′ determines that the output terminal voltage of the inverter 2 is at the high level, the microcomputer 1 ′ determines that the detachable load 4 is mounted, and the logic signal generation unit 1 ″ outputs a logic signal at the low level. When it is determined that the voltage is supplied to the input terminal of the inverter 2 and it is determined that the output terminal voltage of the inverter 2 is at a low level, it is determined that the detachable load 4 is not mounted.

  In the present embodiment, for example, when the microcomputer 1 ′ determines that the output terminal voltage of the inverter 2 is at a high level, the value of the output terminal voltage of the inverter 2 is stored, and the output terminal voltage of the inverter 2 is stored. You may make it estimate the lifetime of the load 4 which can be attached or detached from the time-dependent change of the value of.

  In the present embodiment, the microcomputer 1 ′ determines that the logic signal of the high level is supplied from the logic signal generation unit 1 ″ to the input terminal of the inverter 2, and the output terminal voltage of the inverter 2 is high. When it is determined that it is the level, it may be determined that the removable load 4 is attached and that the removable load 4 is abnormal.

<Fifth Embodiment>
FIG. 5 is a diagram showing a load detection circuit according to the fifth embodiment of the present invention. The load detection circuit according to the fifth embodiment of the present invention is the same as the load detection circuit according to the first embodiment of the present invention, except that an open drain buffer 2 ′ is provided instead of the inverter 2. .

In the present embodiment, the microcomputer 1 determines that the high-level output terminal voltage of the buffer 2 ′ is the high level, and the low-level output terminal voltage of the buffer 2 ′ is determined to be the low level. A threshold for determining the level of the voltage supplied to the input port _PIN is set and stored. When the microcomputer 1 determines that the output terminal voltage of the buffer 2 ′ is at the high level, the microcomputer 1 determines that the detachable load 4 is mounted, and outputs a logic signal at the high level from the output port P _OUT to the buffer 2. It is determined that the removable load 4 is not attached when it is determined that the output terminal voltage of the buffer 2 ′ is at the low level.

  In the present embodiment, for example, when the microcomputer 1 determines that the output terminal voltage of the buffer 2 ′ is at a high level, the value of the output terminal voltage of the buffer 2 ′ is stored and the output of the buffer 2 ′ is output. You may make it estimate the lifetime of the load 4 which can be attached or detached from the change with time of the value of an end voltage.

In this embodiment, the microcomputer 1 determines that the low-level logic signal is supplied from the output port P _OUT to the input terminal of the buffer 2 ′, and that the output terminal voltage of the buffer 2 ′ is at the high level. Sometimes, it may be determined that the removable load 4 is attached and that the removable load 4 is abnormal.

  In addition, the deformation | transformation similar to the deformation | transformation from 1st Embodiment to 5th Embodiment can be performed with respect to each of 2nd-4th embodiment.

<Electrical equipment>
The electric device including the load detection circuit according to the present invention may be any type of electric device as long as it is equipped with a detachable load.

  For example, in the case of the air conditioner having the configuration shown in FIG. 6, the louver motor 12, the fan motor 13, the heat exchange cycle 14, the filter cleaning device 15, and the ion generator 16 controlled by the control unit 11 are detachable. In addition, at least one of the louver motor 12, the filter cleaning device 15, and the ion generation device 16 that is a load driven at a low voltage (voltage of several tens of volts or less) is set as a detection target of the load detection circuit according to the present invention. be able to. And the control part 11 should just contain the microcomputer 1 or microcomputer 1 'mentioned above, for example.

<Others>
Although the embodiments of the present invention have been described above, the scope of the present invention is not limited to these embodiments, and various modifications can be made without departing from the spirit of the invention. For example, an open collector inverter can be used instead of the open drain inverter 2, and an open collector buffer can be used instead of the open drain buffer 2 ′. In the above-described embodiment, when the detachable load 4 is connected to the output terminal of the inverter 2 or the buffer 2 ′, the pull-up resistor R3 in the load 4 is detachable through the connectors 3A and 3B. However, the scope of the present invention is not limited to this, and can be detachably attached to a buffer for sending a logic signal to a detachable load or to the output end of the inverter. When a load is connected, DC power is supplied to the output terminal of the buffer or inverter, and a removable load is connected to the buffer or inverter output terminal for sending a logic signal to the removable load. If not, it is sufficient if the DC power is not supplied to the output terminal of the buffer or inverter. For example, a coil or the like may be used instead of the pull-up resistor R3 used in the above-described embodiment.

1, 1 ', 101 Microcomputer 1 "Logic signal generator 2, 102 Inverter 2' Buffer 3A, 3B, 103A, 103B, 105A, 105B Connector 4, 104 Detachable load 11 Controller 12 Louver motor 13 Fan motor 14 Heat Exchange cycle 15 Filter cleaning device 16 Ion generator N1 Connection point P _IN input port P _OUT output port R1, R2 resistance R3 pull-up resistance SW1 switch

Claims (7)

Either a buffer or inverter logic circuit for sending a logic signal to a detachable load;
With a microcomputer,
The microcomputer detects whether or not the removable load is mounted based on the output terminal voltage of the logic circuit or the divided voltage of the output terminal voltage of the logic circuit supplied to the input port of the microcomputer. A feature load detection circuit. The microcomputer is
Determining whether the output terminal voltage of the logic circuit or the divided voltage of the output terminal voltage of the logic circuit is High level or Low level;
The load detection circuit according to claim 1, wherein when the output terminal voltage of the logic circuit or the divided voltage of the output terminal voltage of the logic circuit is determined to be at a high level, it is determined that the removable load is mounted. The microcomputer is
It is determined that a logic signal that should output a high level logic signal from the output terminal of the logic circuit is supplied to the input terminal of the logic circuit, and the output terminal voltage of the logic circuit or the logic circuit 3. The load detection circuit according to claim 1, wherein when the divided voltage of the output terminal voltage is determined to be a low level, it is determined that the detachable load is not mounted.   The load detection circuit according to claim 1, wherein a logic signal output from an output port of the microcomputer is supplied to an input terminal of the logic circuit. The microcomputer is
When it is determined that the output terminal voltage of the logic circuit or the divided voltage of the output terminal voltage of the logic circuit is at a high level, the output voltage of the logic circuit or the divided voltage of the output terminal voltage of the logic circuit is set to a value. The load detection circuit according to claim 1, wherein a life of the detachable load is estimated based on the load detection circuit. The microcomputer is
It is determined that a logic signal that should output a low level logic signal from the output terminal of the logic circuit is supplied to the input terminal of the logic circuit, and the output terminal voltage of the logic circuit or the logic circuit The determination according to any one of claims 1 to 5, wherein when the divided voltage of the output terminal voltage is determined to be at the Hihg level, it is determined that the removable load is mounted and the removable load is abnormal. The load detection circuit described.   An electric apparatus comprising the load detection circuit according to claim 1.

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