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JP5939899B2 - Load drive circuit - Google Patents
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JP5939899B2 - Load drive circuit - Google Patents

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JP5939899B2
JP5939899B2 JP2012133760A JP2012133760A JP5939899B2 JP 5939899 B2 JP5939899 B2 JP 5939899B2 JP 2012133760 A JP2012133760 A JP 2012133760A JP 2012133760 A JP2012133760 A JP 2012133760A JP 5939899 B2 JP5939899 B2 JP 5939899B2
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control circuit
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JP2013258070A (en
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一之 宮島
一之 宮島
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New Japan Radio Co Ltd
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Description

本発明は、LED等の負荷に流れる電流が一定値になるように制御する第1の制御回路を備えた負荷駆動回路に関するものである。   The present invention relates to a load driving circuit including a first control circuit that controls a current flowing in a load such as an LED to have a constant value.

LEDは近年、照明やLCDのバックライトとしてその利用分野が広がっている。LEDはその性質上、流れる電流の値によりその輝度が変化するので、その輝度を一定に保持するために、常に一定の電流が流れるような制御を行なう必要がある。   In recent years, LEDs have been used in various fields as illumination and LCD backlights. Since the luminance of the LED changes depending on the value of the flowing current, it is necessary to perform control so that a constant current always flows in order to keep the luminance constant.

図6にLEDを駆動するための従来技術による負荷駆動回路の一例を示す(特許文献1参照)。図6において、10はLEDを複数個直列接続した負荷、11は電圧V1の電圧源、20Cはこの負荷10に定電流を流すための第1の制御回路である。この第1の制御回路20Cは、ドレインが負荷10のノードN1に接続されソースが抵抗R1を介してGNDに接続されたNMOSトランジスタM1と、非反転入力端子に電圧源23の参照電圧Vref1が入力し、反転入力端子がトランジスタM1のソースに接続され、出力端子がトランジスタM1のゲートに接続されたオペアンプ22とで構成されている。   FIG. 6 shows an example of a conventional load driving circuit for driving an LED (see Patent Document 1). In FIG. 6, 10 is a load in which a plurality of LEDs are connected in series, 11 is a voltage source of voltage V1, and 20C is a first control circuit for allowing a constant current to flow through the load 10. The first control circuit 20C has an NMOS transistor M1 whose drain is connected to the node N1 of the load 10 and whose source is connected to GND via the resistor R1, and the reference voltage Vref1 of the voltage source 23 is input to the non-inverting input terminal. The operational amplifier 22 has an inverting input terminal connected to the source of the transistor M1, and an output terminal connected to the gate of the transistor M1.

この負荷駆動回路では、負荷10のLEDに流れる電流が抵抗R1で検出され、この抵抗R1の両端に発生する電圧が参照電圧Vref1に等しくなるように、オペアンプ22を介してトランジスタM1が制御されることにより、そのトランジスタM1のドレイン電流が参照電圧Vref1に応じた値となるように制御される。   In this load driving circuit, the current flowing through the LED of the load 10 is detected by the resistor R1, and the transistor M1 is controlled via the operational amplifier 22 so that the voltage generated across the resistor R1 is equal to the reference voltage Vref1. Thus, the drain current of the transistor M1 is controlled to have a value corresponding to the reference voltage Vref1.

このような回路において想定される故障として、以下のような状態が考えられる。(1)LEDの破壊短絡により負荷10が短絡状態になった(負荷短絡)、(2)LEDの破壊開放又はLEDの配線の断線により負荷10のLEDが点灯しない(負荷断線)、(3)負荷10のLEDのカソード側(ノードN1)がGNDに短絡し過大な電流がLEDに流れる(GND短絡)、等である。このような場合、負荷駆動回路では、これらの故障状態を検知して、その動作を停止させ又は異常を知らせる信号を発する機能を有することが求められている。   The following states are conceivable as possible failures in such a circuit. (1) The load 10 is short-circuited due to a destructive short circuit of the LED (load short circuit), (2) the LED of the load 10 is not lit due to the destructive opening of the LED or the disconnection of the LED wiring (load disconnection), (3) The cathode side (node N1) of the LED of the load 10 is short-circuited to GND, and an excessive current flows to the LED (GND short-circuit). In such a case, the load driving circuit is required to have a function of detecting these failure states and stopping the operation or issuing a signal notifying abnormality.

特開2011−249145号公報JP2011-249145A

上記の(1)〜(3)の状態を検知しようとした場合、(1)に関しては、ノードN1の電圧Vaが所定値以上になったことを検出することにより、検知することができる。しかしながら、(2)、(3)の負荷断線やGND短絡の場合、いずれもノードN1の電圧Vaがほぼ0Vになるだけであり、ノードN1の電圧Vaを監視するだけでは、負荷断線かGND短絡かを判別することができない。また、電圧源11により供給される電圧V1が何らかの問題により低下し、その電圧V1がLEDを点灯するのに十分な電圧でなくなった場合に、LEDにほとんど電流が流れなくなる。このときもノードN1の電圧Vaは低下し、上記の(2)、(3)の負荷断線やGND短絡と区別することが困難である。   When trying to detect the states (1) to (3) above, it is possible to detect (1) by detecting that the voltage Va at the node N1 has become a predetermined value or more. However, in the case of load disconnection or GND short-circuit in (2) and (3), the voltage Va at the node N1 is almost 0V, and simply by monitoring the voltage Va at the node N1, load disconnection or GND short-circuit Cannot be determined. Further, when the voltage V1 supplied from the voltage source 11 decreases due to some problem and the voltage V1 is not sufficient to light the LED, almost no current flows through the LED. Also at this time, the voltage Va at the node N1 is lowered, and it is difficult to distinguish from the load disconnection and the GND short-circuit of the above (2) and (3).

本発明は、上記のような問題点を解決し、負荷断線、GND短絡、電圧源電圧低下等の故障を検出できるようにした負荷駆動回路を提供することを目的としている。 An object of the present invention is to provide a load drive circuit that solves the above-described problems and that can detect failures such as load disconnection, GND short-circuit, and voltage source voltage drop.

上記目的を達成するために、請求項1にかかる発明は、第1の電圧源に接続された負荷とGNDとの間に接続され、前記負荷に流れる電流が所定値になるように制御する第1の制御回路を持つ負荷駆動回路において、前記負荷と前記第1の制御回路との共通接続点の第1のノードと前記GNDとの間の電位差を検知して該電位差を所定値に制御する第2の制御回路と、前記第1の電圧源の電圧を検出する第1の電圧検出回路および/又は前記第1のノードと前記GNDとの間の電位差を検出する第2の電圧検出回路と、前記第2の制御回路の制御動作の内容と前記第1の電圧検出回路および/又は前記第2の電圧検出回路の検出結果との組み合わせによって異常判定を行う異常判定回路とを備えたことを特徴とする。
請求項2にかかる発明は、GNDに接続された負荷と第1の電圧源との間に接続され、前記負荷に流れる電流が所定値になるように制御する第1の制御回路を持つ負荷駆動回路において、前記負荷と前記第1の制御回路との共通接続点の第1のノードと前記第1の電圧源との間の電位差を検知して該電位差を所定値に制御する第2の制御回路と、前記第1の電圧源の電圧を検出する第1の電圧検出回路および/又は前記第1のノードと前記第1の電源との間の電位差を検出する第3の電圧検出回路と、前記第2の制御回路の制御動作の内容と前記第1の電圧検出回路および/又は前記第3の電圧検出回路の検出結果との組み合わせによって異常判定を行う異常判定回路とを備えたことを特徴とする。
In order to achieve the above object, the invention according to claim 1 is connected between a load connected to the first voltage source and GND, and controls so that the current flowing through the load becomes a predetermined value. In a load driving circuit having one control circuit, a potential difference between a first node at a common connection point between the load and the first control circuit and the GND is detected, and the potential difference is controlled to a predetermined value. A second control circuit; a first voltage detection circuit for detecting a voltage of the first voltage source; and / or a second voltage detection circuit for detecting a potential difference between the first node and the GND. And an abnormality determination circuit that performs an abnormality determination based on a combination of the content of the control operation of the second control circuit and the detection result of the first voltage detection circuit and / or the second voltage detection circuit. Features.
According to a second aspect of the present invention, there is provided a load drive having a first control circuit which is connected between a load connected to the GND and the first voltage source and controls the current flowing through the load to a predetermined value. In the circuit, a second control for detecting a potential difference between a first node at a common connection point between the load and the first control circuit and the first voltage source and controlling the potential difference to a predetermined value. A circuit, a first voltage detection circuit that detects a voltage of the first voltage source, and / or a third voltage detection circuit that detects a potential difference between the first node and the first power supply; An abnormality determination circuit that performs abnormality determination based on a combination of the content of the control operation of the second control circuit and the detection result of the first voltage detection circuit and / or the third voltage detection circuit. And

第1の発明によれば、第1の電圧源に接続された負荷とGNDとの間に接続され、前記負荷に流れる電流が所定値になるように制御する第1の制御回路を持つ負荷駆動回路において、電圧源の電圧低下を負荷断線とGND短絡から区別して判定でき、又はGND短絡を電圧源の電圧低下と負荷断線から区別して判定でき、又は電圧源の電圧低下と負荷断線とGND短絡とを互いに区別して判定できる。
第2の発明によれば、GNDに接続された負荷と第1の電圧源との間に接続され、前記負荷に流れる電流が所定値になるように制御する第1の制御回路を持つ負荷駆動回路において、電圧源の電圧低下を負荷断線と電圧源短絡から区別して判定でき、又は電圧源短絡を電圧源の電圧低下と負荷断線から区別して判定でき、又は電圧源の電圧低下と負荷断線と電圧源短絡とを互いに区別して判定できる。
According to the first aspect of the present invention, a load drive having a first control circuit that is connected between a load connected to the first voltage source and GND and controls the current flowing through the load to a predetermined value. In the circuit, the voltage drop of the voltage source can be determined separately from the load disconnection and the GND short circuit, or the GND short circuit can be determined separately from the voltage drop of the voltage source and the load disconnection, or the voltage drop of the voltage source and the load disconnection and the GND short circuit can be determined. Can be distinguished from each other.
According to the second invention, the load drive having the first control circuit that is connected between the load connected to the GND and the first voltage source and controls the current flowing through the load to have a predetermined value. In the circuit, the voltage drop of the voltage source can be determined separately from the load disconnection and the voltage source short circuit, or the voltage source short circuit can be determined separately from the voltage drop of the voltage source and the load disconnection, or The voltage source short circuit can be distinguished from each other.

第1の実施例の負荷駆動回路の回路図である。It is a circuit diagram of the load drive circuit of the first embodiment. 第2の実施例の負荷駆動回路の回路図である。It is a circuit diagram of the load drive circuit of the 2nd example. 第3の実施例の負荷駆動回路の回路図である。It is a circuit diagram of the load drive circuit of the 3rd example. 第4の実施例の負荷駆動回路の回路図である。It is a circuit diagram of the load drive circuit of the 4th example. 第5の実施例の負荷駆動回路の回路図である。It is a circuit diagram of the load drive circuit of a 5th Example. 従来の負荷駆動回路の回路図である。It is a circuit diagram of the conventional load drive circuit.

本発明では、ノードN1の電圧Vaを検出し、この電圧Vaの値について第2の制御回路で制御を行なう。この制御では、電圧Vaが所定値に近づくと、第1の制御回路の電流を絞ると共に、一定の電流を第2の制御回路から供給して、たとえば負荷断線であればその電圧Vaが所定値以下にならないように制御し、GND短絡であれば低い値に制御する。加えて、この制御動作が行われていることを検知し、例えば所定時間以上この制御動作が行われていれば、負荷に何らかの異常があったと判断して、負荷に電圧を供給する電圧源11の動作を停止する等の処理を行なう。   In the present invention, the voltage Va at the node N1 is detected, and the value of the voltage Va is controlled by the second control circuit. In this control, when the voltage Va approaches a predetermined value, the current of the first control circuit is reduced and a constant current is supplied from the second control circuit. For example, if the load is disconnected, the voltage Va is a predetermined value. Control is performed so as not to be below, and if the GND is short-circuited, the value is controlled to a low value. In addition, it is detected that this control operation is being performed. For example, if this control operation has been performed for a predetermined time or more, it is determined that there is some abnormality in the load, and the voltage source 11 supplies the voltage to the load. Processing such as stopping the operation is performed.

<第1の実施例>
図1に第1の実施例の負荷駆動回路の構成を示す。10は負荷、11は電圧源であり、図6で説明したものと同じである。20Aは第1の制御回路であり、その電流源21の電流が外部制御可能となっている。30Aは第2の制御回路であり、オペアンプ31、電流源32、電圧源33を備える。この第2の制御回路30Aは、負荷10と第1の制御回路20Aの間のノードN1の電圧Vaと電圧源33の参照電圧Vref2とを比較して、Va<Vref2のとき、第1の制御回路20Aの電流源21の電流を制御してノードN1の電圧Vaが参照電圧Vref2以下に低下しないようにするとともに、ノードN1に供給する電流源32の電流を制御する。40Aは異常判定回路であり、第2の制御回路30Aが動作しオペアンプ31の出力電圧が大きく変化したとき、その変化を検出して異常判定を行う。
<First embodiment>
FIG. 1 shows the configuration of the load driving circuit of the first embodiment. Reference numeral 10 denotes a load, and 11 denotes a voltage source, which is the same as that described with reference to FIG. Reference numeral 20A denotes a first control circuit, and the current of the current source 21 can be controlled externally. Reference numeral 30A denotes a second control circuit, which includes an operational amplifier 31, a current source 32, and a voltage source 33. The second control circuit 30A compares the voltage Va at the node N1 between the load 10 and the first control circuit 20A with the reference voltage Vref2 of the voltage source 33. When Va <Vref2, the first control circuit 30A The current of the current source 21 of the circuit 20A is controlled so that the voltage Va at the node N1 does not drop below the reference voltage Vref2, and the current of the current source 32 supplied to the node N1 is controlled. Reference numeral 40A denotes an abnormality determination circuit. When the second control circuit 30A operates and the output voltage of the operational amplifier 31 changes greatly, the change is detected and abnormality determination is performed.

本実施例では、ノードN1の電圧Vaが参照電圧Vref2より高いときは、オペアンプ31の出力電圧が低電圧となり、第1の制御回路20Aの電流源21は外部制御されず、第2の制御回路30Aの電流源32は電流を出力しない。つまり、第2の制御回路30Aは故障を検出しないので、異常判定回路40Aでは異常判定は行われない。   In this embodiment, when the voltage Va at the node N1 is higher than the reference voltage Vref2, the output voltage of the operational amplifier 31 is low, and the current source 21 of the first control circuit 20A is not externally controlled, and the second control circuit. The current source 32 of 30A does not output current. That is, since the second control circuit 30A does not detect a failure, the abnormality determination circuit 40A does not perform abnormality determination.

しかし、負荷10のLEDが断線した負荷断線のとき、ノードN1がGNDに短絡したGND短絡のとき、電圧源11の電圧V1が大幅に低下したときは、ノードN1の電圧Vaが大幅に低下し、参照電圧Vref2よりも低くなるので、第2の制御回路30Aのオペアンプ31の出力電圧が高電圧となり、電流源32から電流がノードN1に出力し、また第1の制御回路20Aの電流源21が制御されるので、そのノードN1の電圧Vaが参照電圧Vref2になるように、あるいはより低い電圧になるように、制御が行われる。このときは、オペアンプ31の出力電圧が大きく変化するので、異常判定回路40Aで異常判定が行われる。   However, when the LED of the load 10 is disconnected, when the node N1 is short-circuited to GND, or when the voltage V1 of the voltage source 11 is significantly decreased, the voltage Va of the node N1 is significantly decreased. Therefore, the output voltage of the operational amplifier 31 of the second control circuit 30A becomes a high voltage, the current is output from the current source 32 to the node N1, and the current source 21 of the first control circuit 20A is lower than the reference voltage Vref2. Therefore, the control is performed so that the voltage Va of the node N1 becomes the reference voltage Vref2 or a lower voltage. At this time, since the output voltage of the operational amplifier 31 varies greatly, abnormality determination is performed by the abnormality determination circuit 40A.

なお、負荷短絡に対しては、従来例と同様に、ノードN1の電圧Vaが所定値を超えたか否かを比較器で検出することで判定できる(図示せず)。   Note that a load short circuit can be determined by detecting with a comparator whether or not the voltage Va at the node N1 exceeds a predetermined value, as in the conventional example (not shown).

<第2の実施例>
図2に第2の実施例の負荷駆動回路の構成を示す。本実施例は、電圧源11に第1の制御回路20Bを接続しその第1の制御回路20BとGNDとの間にLEDの負荷10を接続したものである。そして、第2の制御回路30Bは、オペアンプ31と、そのオペアンプ31の反転入力端子とGNDとの間に電流源32を接続し、非反転入力端子と電圧源11との間に電圧源33を接続して構成している。40Bは異常判定回路である。
<Second embodiment>
FIG. 2 shows the configuration of the load driving circuit of the second embodiment. In the present embodiment, a first control circuit 20B is connected to the voltage source 11, and an LED load 10 is connected between the first control circuit 20B and GND. The second control circuit 30 </ b> B connects the current source 32 between the operational amplifier 31, the inverting input terminal of the operational amplifier 31, and GND, and the voltage source 33 between the non-inverting input terminal and the voltage source 11. Connected and configured. Reference numeral 40B denotes an abnormality determination circuit.

本実施例では、電圧源11の電圧V1とノードN1の電圧Vaとの電位差が参照電圧Vref2より高いときは、オペアンプ31の出力電圧が低電圧となり、第1の制御回路20Bの電流源21は外部制御されず、第2の制御回路30Bの電流源32は電流を出力しない。つまり、第2の制御回路30Bは故障を検出しないので、異常判定回路40Bでは異常判定が行われない。   In the present embodiment, when the potential difference between the voltage V1 of the voltage source 11 and the voltage Va of the node N1 is higher than the reference voltage Vref2, the output voltage of the operational amplifier 31 is low, and the current source 21 of the first control circuit 20B is External control is not performed, and the current source 32 of the second control circuit 30B does not output current. That is, since the second control circuit 30B does not detect a failure, the abnormality determination circuit 40B does not perform abnormality determination.

しかし、負荷10のLEDが断線した負荷断線のとき、ノードN1が電圧源11に短絡した電圧源短絡のとき、電圧源11の電圧V1が大幅に低下したときは、電圧源11の電圧V1とノードN1の電圧Vaとの電位差が参照電圧Vref2より小さくなるので、第2の制御回路30Bのオペアンプ31の出力電圧が高電圧となり、電流源32の電流がノードN1から吸い込まれ、また第1の制御回路20Bの電流源21が制御されるので、そのノードN1が参照電圧Vref2になるように、あるいはより低い電圧になるように、制御が行われる。このときは、オペアンプ31の出力電圧が大きく変化するので、異常判定回路40Bで異常判定が行われる。

However, when the load disconnection LED load 10 is disconnected, when the node N1 is a voltage source shorted shorted to a voltage source 11, when the voltage V1 of the voltage source 11 was significantly reduced, the voltage V1 of the voltage source 11 Since the potential difference with the voltage Va at the node N1 becomes smaller than the reference voltage Vref2, the output voltage of the operational amplifier 31 of the second control circuit 30B becomes a high voltage, the current of the current source 32 is sucked from the node N1, and the first Since the current source 21 of the control circuit 20B is controlled, control is performed so that the node N1 becomes the reference voltage Vref2 or a lower voltage. At this time, since the output voltage of the operational amplifier 31 changes greatly, abnormality determination is performed by the abnormality determination circuit 40B.

なお、負荷短絡に対しては、ノードN1の電圧Vaが所定値を下回ったか否かを比較器で検出することで判定できる(図示せず)。   Note that a load short circuit can be determined by detecting with a comparator whether or not the voltage Va at the node N1 has fallen below a predetermined value (not shown).

<第3の実施例>
図3に第3の実施例の負荷駆動回路の構成を示す。50は電圧源11の電圧V1を分圧した電圧Vbを生成する分圧回路、60は比較器61と参照電圧Vref3の電圧源62からなる第1の電圧検出回路である。この第1の電圧検出回路60は分圧電圧Vbが電圧Vref3以下に低下したときに、比較器61の出力を高電圧にする。異常判定回路40Cは第2の制御回路30Aの制御内容と第1の電圧検出回路60の検出結果によって、異常判定を行う。他は図1におけるものと同じである。
<Third embodiment>
FIG. 3 shows the configuration of the load driving circuit of the third embodiment. Reference numeral 50 denotes a voltage dividing circuit that generates a voltage Vb obtained by dividing the voltage V1 of the voltage source 11. Reference numeral 60 denotes a first voltage detection circuit including a comparator 61 and a voltage source 62 of the reference voltage Vref3. The first voltage detection circuit 60 sets the output of the comparator 61 to a high voltage when the divided voltage Vb drops below the voltage Vref3. The abnormality determination circuit 40C makes an abnormality determination based on the control content of the second control circuit 30A and the detection result of the first voltage detection circuit 60. Others are the same as in FIG.

本実施例では、図1の実施例と同様に、負荷10のLEDが断線した負荷断線のとき、ノードN1がGNDに短絡したGND短絡のとき、電圧源11の電圧V1が大幅に低下したときに、第2の制御回路30Aのオペアンプ31の出力電圧が大きく変化し、故障検出信号が出力する。このとき、特に電圧源11の電圧V1が大幅に低下しているときは、分圧回路50で得られる電圧Vbが参照電圧Vref3よりも低下するので、比較器61の出力が高電圧になる。よって、本実施例では、電圧源11の電圧V1が大幅に低下したときを、負荷断線及びGND短絡のときと区別して、異常判定回路40Cにより判定することができる。   In this embodiment, as in the embodiment of FIG. 1, when the load of the LED of the load 10 is broken, when the node N1 is short-circuited to GND, and when the voltage V1 of the voltage source 11 is significantly reduced. In addition, the output voltage of the operational amplifier 31 of the second control circuit 30A changes greatly, and a failure detection signal is output. At this time, particularly when the voltage V1 of the voltage source 11 is greatly reduced, the voltage Vb obtained by the voltage dividing circuit 50 is lower than the reference voltage Vref3, so that the output of the comparator 61 becomes a high voltage. Therefore, in this embodiment, when the voltage V1 of the voltage source 11 is significantly reduced, it can be determined by the abnormality determination circuit 40C in distinction from the load disconnection and the GND short circuit.

なお、図2で説明した負荷駆動回路に対しても、本実施例の分圧回路50と第1の電圧検出回路60は、同様に適用して、電圧源11の電圧V1が大幅に低下している場合を検出できる(図示せず)。   Note that the voltage dividing circuit 50 and the first voltage detecting circuit 60 of the present embodiment are similarly applied to the load driving circuit described in FIG. 2, and the voltage V1 of the voltage source 11 is greatly reduced. Can be detected (not shown).

<第4の実施例>
図4に第4の実施例の負荷駆動回路の構成を示す。70は第2の電圧検出回路であり、比較器71と参照電圧Vref4をもつ電圧源72を備える。Vref4<Vref2である。異常判定回路40Dは第2の制御回路30Aの制御内容と第2の電圧検出回路70の検出結果によって、異常判定を行う。他は図1におけるものと同じである。
<Fourth embodiment>
FIG. 4 shows the configuration of the load driving circuit of the fourth embodiment. Reference numeral 70 denotes a second voltage detection circuit, which includes a comparator 71 and a voltage source 72 having a reference voltage Vref4. Vref4 <Vref2. The abnormality determination circuit 40D performs abnormality determination based on the control content of the second control circuit 30A and the detection result of the second voltage detection circuit 70. Others are the same as in FIG.

本実施例では、図1の実施例と同様に、負荷10のLEDが断線した負荷断線のとき、ノードN1がGNDに短絡したGND短絡のとき、電圧源11の電圧V1が大幅に低下したときに、第2の制御回路30Aのオペアンプ31の出力電圧が大きく変化し、故障検出信号が出力する。このとき、特にノードN1がGNDに短絡したGND短絡のときは、Va<Vref4となり、第2の電圧検出回路70の比較器71の出力が高電圧になる。よって、本実施例では、GND短絡を、負荷断線および電圧V1大幅低下と区別して、異常判定回路40Dにより判定することができる。   In this embodiment, as in the embodiment of FIG. 1, when the load of the LED of the load 10 is broken, when the node N1 is short-circuited to GND, and when the voltage V1 of the voltage source 11 is significantly reduced. In addition, the output voltage of the operational amplifier 31 of the second control circuit 30A changes greatly, and a failure detection signal is output. At this time, particularly when the node N1 is short-circuited to GND, Va <Vref4, and the output of the comparator 71 of the second voltage detection circuit 70 becomes a high voltage. Therefore, in the present embodiment, the GND short-circuit can be determined by the abnormality determination circuit 40D in distinction from the load disconnection and the voltage V1 significant decrease.

なお、図2で説明した負荷駆動回路に対しては、ノードN1の電圧が所値より高いことを検出する第3の電圧検出回路を設けることにより、ノードN1が電圧源11に短絡したか否かを検出することができる(図示せず)。   2, whether or not the node N1 is short-circuited to the voltage source 11 by providing a third voltage detection circuit that detects that the voltage of the node N1 is higher than the predetermined value. Can be detected (not shown).

<第5の実施例>
図5に図3の負荷駆動回路と図4の負荷駆動回路を組み合わせた具体的構成を示す。第1の制御回路20Aは、ドレインがノードN1に接続されソースが抵抗R1を介してGNDに接続されたNMOSトランジスタM1と、非反転入力端子に電圧源23の参照電圧Vref1が入力し、反転入力端子が抵抗R2を介してトランジスタM1のソースに接続され、出力端子がトランジスタM1のゲートに接続されたオペアンプ22とで構成されている。第2の制御回路30Aは、オペアンプ31と、そのオペアンプ31の非反転入力端子に参照電圧Vref2を印加する電圧源33と、電圧がV2の電圧源34と、電流源32としてのNMOSトランジスタM2と、第1の制御回路20Aに電流制御信号を出力するNMOSトランジスタM3と、抵抗R3と、第2の制御回路30Aが動作したことを示す動作信号を出力するPMOSトランジスタM4とを備える。そして、トランジスタN2,M3のゲートはオペアンプ31の出力端子に接続されている。負荷10、分圧回路50、第1の電圧検出回路60は図3と同じ、第2の電圧検出回路70は図4と同じである。
<Fifth embodiment>
FIG. 5 shows a specific configuration in which the load drive circuit of FIG. 3 and the load drive circuit of FIG. 4 are combined. The first control circuit 20A has an NMOS transistor M1 whose drain is connected to the node N1 and whose source is connected to GND via the resistor R1, and the reference voltage Vref1 of the voltage source 23 is input to the non-inverting input terminal, and the inverting input The operational amplifier 22 has a terminal connected to the source of the transistor M1 via the resistor R2, and an output terminal connected to the gate of the transistor M1. The second control circuit 30A includes an operational amplifier 31, a voltage source 33 that applies a reference voltage Vref2 to the non-inverting input terminal of the operational amplifier 31, a voltage source 34 having a voltage V2, and an NMOS transistor M2 as a current source 32. And an NMOS transistor M3 that outputs a current control signal to the first control circuit 20A, a resistor R3, and a PMOS transistor M4 that outputs an operation signal indicating that the second control circuit 30A has been operated. The gates of the transistors N2 and M3 are connected to the output terminal of the operational amplifier 31. The load 10, the voltage dividing circuit 50, and the first voltage detection circuit 60 are the same as those in FIG. 3, and the second voltage detection circuit 70 is the same as that in FIG.

さて、負荷10のLEDが断線した負荷断線の場合は、ノードN1からトランジスタM1のドレインに流れる電流が停止する。このためノードN1の電圧Vaは低下する。この電圧Vaが第2の制御回路30Aの参照電圧Vref2以下まで低下すると、第2の制御回路30Aのオペアンプ31の出力電圧が上昇し、トランジスタM2とM3のゲート電圧を引き上げる。この結果、トランジスタM2はノードN1に電流を供給すると共に、トランジスタM3は第1の制御回路20Aの抵抗R2に電流を流し、第1の制御回路20Aのオペアンプ22の反転入力端子電圧を引き上げる。これにより、トランジスタM1はゲート電圧が低下してドレイン電流が低下し、やがて所定値に収束する。以上の様な動作により、ノードN1の電圧Vaは、第2の制御回路30Aの電圧源33の参照電圧Vref2に等しい電圧に制御される。   Now, in the case of a load disconnection in which the LED of the load 10 is disconnected, the current flowing from the node N1 to the drain of the transistor M1 stops. For this reason, the voltage Va at the node N1 decreases. When this voltage Va drops below the reference voltage Vref2 of the second control circuit 30A, the output voltage of the operational amplifier 31 of the second control circuit 30A rises, raising the gate voltages of the transistors M2 and M3. As a result, the transistor M2 supplies a current to the node N1, and the transistor M3 supplies a current to the resistor R2 of the first control circuit 20A to raise the inverting input terminal voltage of the operational amplifier 22 of the first control circuit 20A. As a result, the gate voltage of the transistor M1 decreases, the drain current decreases, and eventually converges to a predetermined value. With the above operation, the voltage Va at the node N1 is controlled to be equal to the reference voltage Vref2 of the voltage source 33 of the second control circuit 30A.

このとき、電圧源11の電圧V1の分圧電圧Vbが、第1の電圧検出回路60の参照電圧Vref3に対して、Vb>Vref3であれば、第1の検出回路60の出力端子63に検出信号は出力しない。また、ノードN1の電圧Vaは参照電圧Vref2に等しいので、第2の電圧検出回路70の参照電圧Vref4に対して、Va>Vref4であり、第2の電圧検出回路70の出力端子73に検出信号は出力しない。よって、第2の制御回路30Aの出力端子35から検出信号が出力し、第1の電圧検出回路60の出力端子63と第2の電圧検出回路70の出力端子73のいずれからも検出信号が出力しないことを異常判定回路(図示せず)で判定することで、負荷断線を判定することができる。   At this time, if the divided voltage Vb of the voltage V1 of the voltage source 11 is Vb> Vref3 with respect to the reference voltage Vref3 of the first voltage detection circuit 60, it is detected at the output terminal 63 of the first detection circuit 60. No signal is output. Since the voltage Va at the node N1 is equal to the reference voltage Vref2, Va> Vref4 with respect to the reference voltage Vref4 of the second voltage detection circuit 70, and the detection signal is output to the output terminal 73 of the second voltage detection circuit 70. Is not output. Therefore, a detection signal is output from the output terminal 35 of the second control circuit 30A, and a detection signal is output from either the output terminal 63 of the first voltage detection circuit 60 or the output terminal 73 of the second voltage detection circuit 70. It is possible to determine a load disconnection by determining that it is not performed by an abnormality determination circuit (not shown).

また、電圧源11の電圧V1が低下していたときも、第2の制御回路30Aの出力端子35には異常を示す信号が出力する。このときは、分圧電圧Vbが第1の電圧検出回路60の参照電圧Vref3に対して、Vb<Vref3になるので、第1の電圧検出回路60の出力端子63に検出信号が出力する。なお、ノードN1の電圧Vaは参照電圧Vref2に等しく制御されるので、第2の電圧検出回路70の参照電圧Vref4に対して、Va>Vref4であり、第2の電圧検出回路70の出力端子73に検出信号は出力しない。よって、第2の制御回路30Aの出力端子35から検出信号が出力し、第1の電圧検出回路60の出力端子63から検出信号が出力し、第2の電圧検出回路70の出力端子73から検出信号が出力しないことを異常判定回路(図示せず)で判定することで、電源源11の電圧V1の大幅低下を判定することができる。   Further, even when the voltage V1 of the voltage source 11 is lowered, a signal indicating abnormality is output to the output terminal 35 of the second control circuit 30A. At this time, since the divided voltage Vb is Vb <Vref3 with respect to the reference voltage Vref3 of the first voltage detection circuit 60, a detection signal is output to the output terminal 63 of the first voltage detection circuit 60. Since the voltage Va of the node N1 is controlled to be equal to the reference voltage Vref2, Va> Vref4 with respect to the reference voltage Vref4 of the second voltage detection circuit 70, and the output terminal 73 of the second voltage detection circuit 70. No detection signal is output. Therefore, the detection signal is output from the output terminal 35 of the second control circuit 30A, the detection signal is output from the output terminal 63 of the first voltage detection circuit 60, and is detected from the output terminal 73 of the second voltage detection circuit 70. By determining that a signal is not output by an abnormality determination circuit (not shown), it is possible to determine a significant decrease in the voltage V1 of the power source 11.

また、ノードN1がGNDに短絡するGND短絡のときは、トランジスタM2のドレイン電流には電圧源34の電圧で規制される限度があるため、そのトランジスタM2のドレイン電流の制限値以上の電流がGNDに流れた状態で、ノードN1の電圧VaはGND電位付近まで低下する。このときは、第2の電圧検出回路70の電圧源72の参照電圧Vref4に対してノードN1の電圧Vaが、Va<Vref4となり、第2の電圧検出回路70の出力端子73から検出信号が出力する。なお、電圧源11の電圧V1が正常であれば、第1の電圧検出回路60の出力端子63から検出信号は出力しない。よって、第2の制御回路30Aの出力端子35から検出信号が出力し、第1の電圧検出回路60の出力端子63から検出信号が出力せず、第2の電圧検出回路70の出力端子73から検出信号が出力することを異常判定回路(図示せず)で判定することで、GND短絡が発生していることを判定することができる。この場合、電圧源30の電圧V1を停止させるなどの処置を行なうことにより、負荷10のLEDに過大な電流が流れLEDが破壊に至ることを未然に回避することができる。   When the node N1 is short-circuited to GND, the drain current of the transistor M2 has a limit regulated by the voltage of the voltage source 34. Therefore, a current exceeding the limit value of the drain current of the transistor M2 is equal to the GND. In this state, the voltage Va at the node N1 drops to near the GND potential. At this time, the voltage Va at the node N1 is Va <Vref4 with respect to the reference voltage Vref4 of the voltage source 72 of the second voltage detection circuit 70, and a detection signal is output from the output terminal 73 of the second voltage detection circuit 70. To do. If the voltage V1 of the voltage source 11 is normal, no detection signal is output from the output terminal 63 of the first voltage detection circuit 60. Therefore, the detection signal is output from the output terminal 35 of the second control circuit 30A, the detection signal is not output from the output terminal 63 of the first voltage detection circuit 60, and from the output terminal 73 of the second voltage detection circuit 70. By determining that a detection signal is output by an abnormality determination circuit (not shown), it is possible to determine that a GND short circuit has occurred. In this case, by taking measures such as stopping the voltage V1 of the voltage source 30, it is possible to prevent an excessive current from flowing through the LED of the load 10 and causing the LED to break down.

なお、前記したように、負荷10が短絡したときは、ノードN1の電圧Vaが正常時よりも高くなるので、これを検出することにより、負荷短絡を検出することができる。   As described above, when the load 10 is short-circuited, the voltage Va at the node N1 becomes higher than that at the normal time. Therefore, by detecting this, the load short-circuit can be detected.

以上のように、本実施例では、負荷10のLEDが断線した負荷断線のとき、電圧源11の電圧V1が大幅に低下したとき、ノードN1がGNDに短絡したGND短絡のとき、負荷が短絡したとき、の4種類の異常事態発生を、それぞれ区別して判定することができるようになる。   As described above, in this embodiment, when the LED of the load 10 is disconnected, the load is short-circuited when the voltage V1 of the voltage source 11 is significantly reduced, or when the node N1 is short-circuited to GND. Thus, it becomes possible to distinguish and determine the occurrence of the four types of abnormal situations.

なお、図2の負荷駆動回路に電圧源11の電圧V1低下を検出する第1の電圧検出回路60と第2の電圧検出回路70を組み合わせるときは、第1の検出回路60についてはそのまま組み合わせることができるが、第2の電圧検出回路70については、ノードN1の電圧源11への短絡を検出することになるので、ノードN1の電圧Vaが所定値(電圧V1に近い電圧)より高いか否かを検出する第3の電圧検出回路を使用する必要がある。また、図2の負荷駆動回路において負荷短絡の検出には、第2の電圧検出回路70と同様な電圧検出回路を使用すればよい。   When the first voltage detection circuit 60 and the second voltage detection circuit 70 for detecting the voltage V1 drop of the voltage source 11 are combined with the load driving circuit of FIG. 2, the first detection circuit 60 is combined as it is. However, since the second voltage detection circuit 70 detects a short circuit of the node N1 to the voltage source 11, whether or not the voltage Va at the node N1 is higher than a predetermined value (voltage close to the voltage V1). It is necessary to use a third voltage detection circuit for detecting the above. Further, a voltage detection circuit similar to the second voltage detection circuit 70 may be used to detect a load short circuit in the load drive circuit of FIG.

10:LED等の負荷、11:電圧源、20A〜20C:第1の制御回路、30A,30B:第2の制御回路、40A〜40D:異常判定回路、50:分圧回路、60:第1の電圧検出回路、70:第2の電圧検出回路   10: Load such as LED, 11: Voltage source, 20A to 20C: First control circuit, 30A, 30B: Second control circuit, 40A to 40D: Abnormality determination circuit, 50: Voltage dividing circuit, 60: First Voltage detection circuit 70: second voltage detection circuit

Claims (2)

第1の電圧源に接続された負荷とGNDとの間に接続され、前記負荷に流れる電流が所定値になるように制御する第1の制御回路を持つ負荷駆動回路において、
前記負荷と前記第1の制御回路との共通接続点の第1のノードと前記GNDとの間の電位差を検知して該電位差を所定値に制御する第2の制御回路と、前記第1の電圧源の電圧を検出する第1の電圧検出回路および/又は前記第1のノードと前記GNDとの間の電位差を検出する第2の電圧検出回路と、前記第2の制御回路の制御動作の内容と前記第1の電圧検出回路および/又は前記第2の電圧検出回路の検出結果との組み合わせによって異常判定を行う異常判定回路とを備えたことを特徴とする負荷駆動回路。
In a load driving circuit having a first control circuit that is connected between a load connected to a first voltage source and GND and that controls a current flowing in the load to a predetermined value,
A second control circuit that detects a potential difference between a first node at a common connection point between the load and the first control circuit and the GND and controls the potential difference to a predetermined value; and A first voltage detection circuit for detecting a voltage of a voltage source and / or a second voltage detection circuit for detecting a potential difference between the first node and the GND, and a control operation of the second control circuit. A load driving circuit comprising: an abnormality determination circuit that performs abnormality determination based on a combination of contents and a detection result of the first voltage detection circuit and / or the second voltage detection circuit.
GNDに接続された負荷と第1の電圧源との間に接続され、前記負荷に流れる電流が所定値になるように制御する第1の制御回路を持つ負荷駆動回路において、
前記負荷と前記第1の制御回路との共通接続点の第1のノードと前記第1の電圧源との間の電位差を検知して該電位差を所定値に制御する第2の制御回路と、前記第1の電圧源の電圧を検出する第1の電圧検出回路および/又は前記第1のノードと前記第1の電源との間の電位差を検出する第3の電圧検出回路と、前記第2の制御回路の制御動作の内容と前記第1の電圧検出回路および/又は前記第3の電圧検出回路の検出結果との組み合わせによって異常判定を行う異常判定回路とを備えたことを特徴とする負荷駆動回路。
In a load driving circuit having a first control circuit that is connected between a load connected to GND and a first voltage source and controls the current flowing through the load to have a predetermined value.
A second control circuit that detects a potential difference between a first node at a common connection point between the load and the first control circuit and the first voltage source, and controls the potential difference to a predetermined value; A first voltage detection circuit for detecting a voltage of the first voltage source and / or a third voltage detection circuit for detecting a potential difference between the first node and the first power supply; A load comprising: an abnormality determination circuit that performs abnormality determination based on a combination of the content of the control operation of the control circuit and the detection result of the first voltage detection circuit and / or the third voltage detection circuit Driving circuit.
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JP4655988B2 (en) * 2006-04-20 2011-03-23 パナソニック電工株式会社 Power conversion device and lighting device, lamp, vehicle
JP5203320B2 (en) * 2009-06-10 2013-06-05 シャープ株式会社 LIGHT EMITTING ELEMENT DRIVE DEVICE AND SHEET LIGHTING DEVICE OR DISPLAY DEVICE EQUIPPED WITH THE SAME

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