JP5955543B2 - Manufacturing method of semiconductor device - Google Patents

Description

  The present invention relates to a method for manufacturing a semiconductor element including a protruding electrode having a conductive resin as a core.

  In some cases, a bare-chip semiconductor element including a protruding electrode is directly flip-chip mounted on a mother substrate. In particular, a semiconductor light emitting element (hereinafter referred to as an LED die unless otherwise specified) is a diode, and since the connection terminals are often combined into two, it is easy to perform flip chip mounting even on a mother board having a large wiring pitch. it is conceivable that. However, the LED dies so far have a small die size and further inhibit light emission, so the n electrode is extremely small compared to the p electrode, so the difference in pitch between electrodes between the LED die and the mother substrate can be reduced. For the purpose of correction, it was often mounted and packaged on a circuit board (also referred to as an interposer) once formed with electrodes on a plate made of ceramic, metal, resin or the like.

  In recent years, LED dies have become larger in size with increasing brightness, and those having a size of about 1 mm × (0.5 to 1) mm have become available. When this size is reached, the size and position of the protruding electrodes can be adjusted to some extent on the bottom surface of the LED die, so that connection electrodes having the same pitch as the mother substrate can be formed. As a result, an interposer circuit board can be eliminated. However, in addition to the interposer function, the circuit board also has secondary functions such as contamination prevention and stress relaxation. For example, when there is no circuit board, contaminants such as moisture and sulfide may enter through pinholes existing in the insulating film of the LED die and deteriorate the semiconductor layer. In order to cope with this, it is considered to reinforce the insulating film by making it into two layers.

  Various proposals have also been made for stress countermeasures, and among them, there is one that disperses the stress that enters from the outside due to the flexibility of the protruding electrodes provided on the LED die. For example, FIG. 1 of Patent Document 1 shows a bump (projection electrode) for a semiconductor chip having a highly flexible conductive resin as a core (hereinafter referred to as a resin core unless otherwise specified) and having a plating layer on the surface. ing.

  FIG. 1 of Patent Document 1 is shown in FIG. FIG. 5 is a cross-sectional view of a protruding electrode (semiconductor chip electrode bump) shown as a conventional example. In FIG. 5, an aluminum pad 2 is provided on the lower surface of the semiconductor chip 1, and a barrier metal layer 3 is provided on the lower surface of the aluminum pad 2. A conductive resin 5 (resin core) formed by a screen printing method is attached to the barrier metal layer 3, and a Ni plating layer 6 and an Au plating layer 7 are provided on the surface of the conductive resin 5. The conductive resin 5 is obtained by kneading a metal powder such as Ag into a phenol resin, an epoxy resin or the like. In general, since a conductive resin is difficult to solder, a plating layer is formed on the surface.

JP-A-11-168116 (FIG. 1)

  Patent Document 1 does not describe in detail how to form the Ni plating layer 6 and the Au plating layer 7. The plating method can be selected from electrolytic plating, vapor deposition, sputtering, and the like. Therefore, the inventors of the present application presumed that Patent Document 1 formed the Ni and Au plating layers 6 and 7 by the electrolytic plating method, and performed electrolytic plating on bumps (resin core) made of conductive resin. However, a high quality plating layer could not be formed by the electrolytic plating method.

  Therefore, the present invention has been made in view of the above problems, and a high-quality plating layer is formed on the surface of a conductive resin even when an electrolytic plating method is applied to a semiconductor element including a protruding electrode having a conductive resin as a core. An object of the present invention is to provide a method for manufacturing a semiconductor device that can be formed.

In order to solve the above problems, a semiconductor element manufacturing method of the present invention includes a common electrode film forming step of forming a common electrode film on a wafer in a semiconductor element manufacturing method having a protruding electrode having a conductive resin as a core, On the common electrode film, a resin core forming step of forming a resin core serving as a core of the protruding electrode with the conductive resin which is an epoxy resin containing Ag particles, and applying oxygen plasma to the resin core, the resin core An ashing process for exposing the surface of the Ag particles contained in the core, and Ni plating by an electroplating method so that a Ni film grows from the surface of the Ag particles and then the Ni film spreads on the side and upper surfaces of the resin core. An area other than the area where the bump electrode is formed, and an electroplating step in which an Au plating layer is formed on the Ni plating layer by electrolytic plating. Characterized in that it comprises a common electrode film removing step of removing the common electrode film occupying, the singulation step of obtaining the semiconductor device by cutting the wafer.

  The semiconductor element may be a semiconductor light emitting element.

Said region forming the projection electrode on the common electrode film in the resin core forming step prints the resin for the opened mask openings of the resin for the mask, the prior conductive resin is heat treated metal paste And the metal paste is heat-treated to form the resin core to be the core of the protruding electrode having the conductive resin as a core, and a gap may be formed between the mask resin and the resin core. .

A low resistance metal layer made of Cu, Al, Ta or Sn may be formed on the surface of the common electrode film, and the Ni plating layer and the Au plating layer may be formed on the side surface and the upper surface of the resin core.

  In the method for manufacturing a semiconductor element of the present invention, the resin core that becomes the core of the protruding electrode is ashed with plasma. By this step, the thin resin layer covering the metal particles existing on the surface portion of the conductive resin is removed, and the surface of the metal particles is exposed. When electrolytic plating is performed in this state, the plating layer grows with the exposed surface of the metal particles as a nucleus, and finally a high-quality plating layer is obtained.

The figure which shows the external appearance of the LED die manufactured with the manufacturing method of embodiment of this invention. Sectional drawing of the LED die | dye shown in FIG. Explanatory drawing of the manufacturing process of the LED die shown in FIG. Explanatory drawing of the manufacturing process of the LED die shown in FIG. Sectional drawing of the protruding electrode shown as a prior art example.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to FIGS. In the description of the drawings, the same or equivalent elements will be denoted by the same reference numerals, and redundant description will be omitted. For the sake of explanation, the scale of the members is changed as appropriate. Furthermore, the relationship with the invention specific matter described in the claims is described in parentheses. The semiconductor device manufacturing method of the present invention can be applied to a flip-chip semiconductor device. As an embodiment, a semiconductor light emitting device (LED die) will be described.

  Embodiments of the present invention will be described in detail with reference to FIGS. First, the structure of the LED die 10 manufactured by the manufacturing method of the present invention will be described with reference to FIGS. 1A and 1B are views showing the appearance of the LED die 10, wherein FIG. 1A is a top view, FIG. 1B is a front view, and FIG. 1C is a bottom view. When the LED die 10 is viewed from above, a rectangular sapphire substrate 11 can be seen (a). When the LED die 10 is viewed from the front, the n-type semiconductor layer 12, the insulating film 14, and the protruding electrodes 15 and 16 can be seen under the sapphire substrate 11 (b). When the LED die 10 is viewed from below, the protruding electrodes 15 and 16 are visible in a region surrounded by the insulating film 14 (c). For reference, the extension of the p-type semiconductor layer 13 (see FIG. 2) is indicated by a dotted line. The sapphire substrate 11, the n-type semiconductor layer 12, and the insulating film 14 have the same outer extension (planar outer shape). At this time, the region occupied by the p-type semiconductor layer 13 is inside the region occupied by the n-type semiconductor layer 12 and the like, and there is a cutout portion on the right side of the drawing.

  Next, the internal structure of the LED die 10 will be described with reference to FIG. FIG. 2 is a sectional view of the LED die 10 drawn along the line AA in FIG. In the LED die 10, an n-type semiconductor layer 12 is formed on the lower surface of the sapphire substrate 11, and a p-type semiconductor layer 13 is further provided on the lower surface of the n-type semiconductor layer 12. The insulating film 14 covers the lower surface of the n-type semiconductor layer 12 and the p-type semiconductor layer 13 and has two openings. In the opening on the left side of the figure, the p-type semiconductor layer 13 and the protruding electrode 15 are connected, and in the opening on the right side, the n-type semiconductor layer 12 and the protruding electrode 16 are connected. The protruding electrodes 15 and 16 have common electrode films 15c and 16c at the top, resin cores 15b and 16b below the common electrode films 15c and 16c, and plated layers 15a and 16a on the surfaces of the resin cores 15b and 16b. . The protruding electrode 16 has a large planar size so that it can be easily soldered to the mother board. As a result, the protruding electrode 16 is laminated with a part of the p-type semiconductor layer 13 via the insulating film 14.

  The sapphire substrate 11 is a transparent insulating substrate and has a thickness of 80 to 120 μm. The n-type semiconductor layer 12 includes a GaN buffer layer and an n-type GaN layer and has a thickness of about 5 μm. The p-type semiconductor layer 13 includes a metal multilayer film including a reflective layer, an atomic diffusion preventing layer, and the like and a p-type GaN layer, and has a thickness of about 1 μm. Although not shown, the light emitting layer is at the boundary between the p-type semiconductor layer 13 and the n-type semiconductor layer 12, and the planar shape is substantially the same as that of the p-type semiconductor layer 13. The insulating film 14 is made of SiO2 or polyimide and has a thickness of about several hundred nm to 1 [mu] m. In the protruding electrodes 15 and 16, the common electrode films 15c and 16c are made of TiW and Cu, and each has a thickness of about 100 nm. The resin cores 15b and 16b are epoxy resins containing Ag particles and have a height of about several tens of μm. The plating layers 15a and 16a have a Ni layer as a base and an Au layer on the surface side, and have a thickness of 1 μm to 5 μm and several hundreds of μm, respectively.

  Next, a method for manufacturing the LED die 10 will be described with reference to FIGS. 3 and 4 are explanatory views showing a method of manufacturing the LED die 10 and showing typical states of the respective steps as sectional views. (A) is a step of preparing the wafer 31 to which the LED die 10 in a state before forming the protruding electrodes 15 and 16 is connected. The wafer 31 is obtained by continuously forming an n-type semiconductor layer 12, a p-type semiconductor layer 13, and an insulating film 14 on a sapphire substrate 11 (see FIG. 2). The wafer 31 has many portions that become the LED die 10 when the bump electrodes 15 and 16 are formed and then cut, but in FIG. Further, the detailed structure of the n-type semiconductor layer 12, the insulating film 14, etc. (see FIG. 2) is not shown.

FIG. 5B shows a common electrode film forming process for forming the common electrode film 32 on the wafer 31. First, a TiW layer is formed by sputtering on the entire electrode surface of the wafer 31 prepared in (a). The TiW layer has a thickness of about 100 nm. Next, a Cu layer is formed on the TiW layer. The Cu layer is a low resistance metal layer for reducing the resistance of the common electrode film 32, and the thickness may be about 100 nm. The low resistance metal is selected from those that can be etched without damaging the Au plating layer, and there are Al, Ta, Sn and the like other than Cu. Although only the TiW layer functions as a common electrode film for electrolytic plating, it is preferable to provide a low-resistance metal layer in order to obtain an even higher quality plating layer by making the current distribution uniform. Since Cu is easily oxidized, it is preferable to proceed to the next process in a short time after the common electrode film 32 is formed.

  (C), (d), and (e) show the resin core formation process in which the cores (resin cores 15b and 16b) of the protruding electrodes 15 and 16 are formed on the common electrode film 32 with a conductive resin. First, as shown in (c), the mask resin 33 is printed. The mask resin 33 has an opening in the region where the protruding electrodes 15 and 16 are formed, and has a thickness of several tens of μm. The mask resin 33 may be formed by a photolithography method for a photosensitive resist. Next, as shown in (d), the opening of the mask resin 33 is filled with a metal paste 34 by a squeegee method. The metal paste 34 is obtained by kneading metal particles such as Ag in an epoxy resin, a silicone resin, or a polyimide resin. Finally, as shown in (e), the wafer 31 is heat-treated at 120 to 150 ° C. for about 2 hours. At this time, the resin cores 15b and 16b are formed, and the mask resin 33 and the metal paste 34 contract to form a gap between the mask resin 33 and the resin cores 15b and 16b.

  (F) shows an ashing process in which the oxygen plasma 35 is applied to the resin cores 15b and 16b. In the oxygen plasma treatment, atomic state oxygen generated by high frequency is applied to an object. When the object is an organic material, the object is gently decomposed into water and carbon dioxide by the oxygen in the atomic state. is there. In this step, the organic film that thinly covers the surfaces of the resin cores 15b and 16b is removed with oxygen in an atomic state.

  (G) shows an electrolytic plating process in which plated layers 15a and 16a are formed on the surfaces of the resin cores 15b and 16b by an electrolytic plating method. First, the wafer 31 is immersed in a Ni plating solution to form a Ni layer by electrolytic plating. Next, the wafer 31 is immersed in an Au plating solution, and an Au layer is formed by electrolytic plating. In the first stage of forming the Ni film, the Ni film starts to grow from the surface of the metal particles exposed in (f), and then the Ni film spreads over the entire resin cores 15b and 16b.

  (H) and (i) show a common electrode film removal step of removing the common electrode film 32 occupying a region other than the region where the protruding electrodes 15 and 16 are formed. First, as shown in (h), the mask resin 33 is removed. As a result, the common electrode film 32 is exposed in a region other than the region where the protruding electrodes 15 and 16 are formed. Next, as shown in (i), the common electrode film 32 is etched using the protruding electrodes 15 and 16 as a mask. First, the Cu layer on the common electrode film 32 is etched with a Cu etchant such as a ferric chloride solution. At this time, the Au plating layer (surface layer side of the plating layers 15a and 16a) on the protruding electrodes 15 and 16 is not damaged. Subsequently, only the TiW layer is etched with hydrogen peroxide. At this time, the Au plating layer is not damaged. As a result, the common electrode films 15c and 16c are finally left only below the protruding electrodes 15 and 16.

  (J) shows the singulation process for cutting the wafer 31 to obtain the LED die 10. First, the wafer 31 is attached to a dicing sheet, and then the wafer 31 is cut by a dicer.

  As described above, by ashing the resin cores 15b and 16b formed on the wafer 31 with the oxygen plasma 35, the plating layers 15a and 16a can be formed by an electrolytic plating method. The resin cores 15b and 16b may be formed by a printing method as in Patent Document 1. However, the method of providing the mask resin 33 first and filling the opening with the metal paste 34 as in the present embodiment is characterized in that the shapes of the resin cores 15b and 16b can be easily kept constant.

10 ... LED die (semiconductor light emitting element),
11 ... sapphire substrate,
12 ... n-type semiconductor layer,
13 ... p-type semiconductor layer,
14: Insulating film,
15, 16 ... protruding electrode,
15a, 16a ... plating layer,
15b, 16b ... resin core,
15c, 16c, 32 ... common electrode film,
31 ... wafer,
33. Resin for mask,
34 ... Metal paste,
35 ... Oxygen plasma.

Claims (4)

In a method for manufacturing a semiconductor element having a protruding electrode having a conductive resin as a core,
A common electrode film forming step of forming a common electrode film on the wafer;
On the common electrode film, a resin core forming step of forming a resin core to be a core of the protruding electrode with the conductive resin that is an epoxy resin containing Ag particles ;
An ashing step in which oxygen plasma is applied to the resin core to expose the surface of the Ag particles contained in the resin core;
A Ni film grows from the surface of the Ag particles, and then a Ni plating layer is formed by electrolytic plating so that the Ni film spreads on the side and top surfaces of the resin core. Thereafter, the Ni plating layer is formed on the Ni plating layer by electrolytic plating. An electrolytic plating process for forming an Au plating layer;
A common electrode film removing step for removing the common electrode film occupying a region other than a region for forming the protruding electrode;
A method for manufacturing a semiconductor element, comprising: a step of dividing the wafer to obtain the semiconductor element.   The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is a semiconductor light emitting device. Said region forming the projection electrode on the common electrode film in the resin core forming step prints the resin for the opened mask openings of the resin for the mask, the prior conductive resin is heat treated metal paste And the metal paste is heat-treated to form the resin core to be the core of the protruding electrode having the conductive resin as a core, and a gap is formed between the mask resin and the resin core. The manufacturing method of the semiconductor element of Claim 1 or 2. A low resistance metal layer made of Cu, Al, Ta, or Sn is formed on the surface of the common electrode film, and the Ni plating layer and the Au plating layer are formed on the side surface and the upper surface of the resin core. The manufacturing method of the semiconductor element as described in any one of Claim 1 to 3.

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