JP5961976B2 - Game machine - Google Patents

Description

  The present invention relates to a gaming machine.

  For example, in a gaming machine such as a pachinko machine, a lottery is performed to determine whether or not to shift to an advantageous state that is advantageous to the player, for example, when a game ball has entered the start ball entering section provided in the game area. At the same time, the variable display of the pattern is started on the display device provided in the game area. When the lottery is won, for example, the combination of specific patterns is finally stopped and displayed, and the gaming state shifts to the advantageous state. In the advantageous state, for example, opening and closing of the variable pitching device provided in the game area is executed, and the payout of the gaming ball according to the number of balls entering the variable pitching device is executed (see, for example, Patent Document 1).

  A gaming machine such as the pachinko machine may be provided with charging / discharging means such as a backup capacitor in order to hold information relating to the game stored in the control means such as the main control device. Thereby, it is possible to store and hold information related to the game even in a power interruption state. By returning to the gaming state before the interruption state using the information related to the game after returning from the interruption state, it is possible to prevent the player from being given unexpected disadvantages.

JP 2008-35977 A

  Here, in the gaming machine such as the pachinko machine, it is required to appropriately store and hold information related to the game in a power interruption state.

  The present invention has been made in view of the above-described circumstances and the like, and an object thereof is to provide a gaming machine capable of suitably storing and holding information related to a game in a power interruption state.

In order to solve the above-mentioned problem, the invention described in claim 1
A first board on which control means for storing and holding the information is stored while power is supplied to the player, while performing predetermined control using information relating to the game;
A second substrate on which power supply means capable of switching between a supply state capable of supplying power to the control means and a power interruption state where power cannot be supplied to the control means;
Transmission means used for transmission of power between the first substrate and the second substrate, wherein the transmission means can be attached to and detached from at least one of the substrates;
In a gaming machine equipped with
The second substrate is equipped with charging / discharging means that is in a charged state in which electric charges are accumulated when electric power is supplied, and in a discharged state in which electric charges are discharged when electric power is not supplied,
As a route for transmitting power,
A first path electrically connecting the charge / discharge means and the power supply means;
A path formed by attaching the transmission means, the second path electrically connecting the charge / discharge means and the control means;
With
The charge / discharge means includes
While the power supply means is in the supply state, power is supplied from the power supply means via the first path, and the charge state is obtained.
When the power supply means is in the power-off state, the power supply means supplies power to the control means via the second path by entering the discharge state.
At least a part of the first route and the second route is configured as a common route;
A limiting resistor for limiting a current flowing through the first path or the second path is provided in the common path,
It said first path and said common route is formed in the second substrate,
The limiting resistor is provided in a portion formed on the second substrate in the common path.

  According to the present invention, it is possible to suitably store and hold information related to games in a power interruption state.

The front view which shows a pachinko machine. The perspective view which expand | deploys and shows the main structures of a pachinko machine. The perspective view which expand | deploys and shows the main structures of a pachinko machine. The front view of a game board. The block diagram which shows the electrical constitution of a pachinko machine. The perspective view which shows a power supply and a launch control board typically. The circuit diagram which shows the structure for performing the electric power supply in a power supply and a launch control board, and a main control board. The time chart for demonstrating the aspect of electric power supply. Explanatory drawing which shows the structure of various counters. The flowchart which shows a main process. The flowchart which shows a timer interruption process. The circuit diagram which shows the structure for performing the electric power supply in between 2nd Embodiment in a power supply and the launch control board, and the main control board. The circuit diagram at the time of applying the 1st modification of the structure for performing electric power supply to 1st Embodiment. The circuit diagram at the time of applying the 1st modification of the structure for performing electric power supply to 2nd Embodiment. The circuit diagram at the time of applying the 2nd modification of the structure for performing electric power supply to 1st Embodiment. The circuit diagram at the time of applying the 2nd modification of the structure for performing electric power supply to 2nd Embodiment.

<First Embodiment>
Hereinafter, a first embodiment of a pachinko gaming machine (hereinafter referred to as “pachinko machine”), which is a type of gaming machine, will be described in detail with reference to the drawings. FIG. 1 is a front view of the pachinko machine 10, and FIGS. 2 and 3 are perspective views showing an unfolded main configuration of the pachinko machine 10. In FIG. 2, the configuration in the game area of the pachinko machine 10 is omitted for convenience.

  The pachinko machine 10 includes an outer frame 11 that forms an outer shell of the pachinko machine 10, and a gaming machine main body 12 that is attached to the outer frame 11 so as to be rotatable forward. The outer frame 11 is configured by connecting wooden plates to four sides and has a rectangular frame shape. The pachinko machine 10 is installed in the game hall by attaching and fixing the outer frame 11 to the island facility.

  2 and 3, the gaming machine main body 12 includes an inner frame 13, a front door frame 14 disposed in front of the inner frame 13, and a back pack unit 15 disposed in the rear of the inner frame 13. And. The inner frame 13 of the gaming machine main body 12 is supported so as to be rotatable with respect to the outer frame 11. Specifically, the inner frame 13 can be rotated forward with the left side as a rotation base end side and the right side as a rotation front end side in front view.

  As shown in FIG. 2, the front door frame 14 is rotatably supported on the inner frame 13, and can be rotated forward with the left side as a rotation base end side and the right side as a rotation front end side in a front view. It is said that. Further, as shown in FIG. 3, a backpack unit 15 is rotatably supported on the inner frame 13, and when viewed from the front, the left side is the rotation base end side and the right side is the rotation front end side. It is possible to move.

  As shown in FIG. 3, the gaming machine main body 12 is provided with a locking device 16 at its rotating tip, and the gaming machine main body 12 is locked to the outer frame 11 so that it cannot be opened. And has a function of locking the front door frame 14 to the inner frame 13 so that the front door frame 14 cannot be opened. As shown in FIG. 1, each of these locked states is released by performing an unlocking operation using the unlocking key on the cylinder lock 17 that is provided exposed on the front surface of the pachinko machine 10, respectively. .

  Next, the configuration of the front side of the gaming machine body 12 will be described.

  As shown in FIG. 2, the inner frame 13 is mainly composed of a resin base 21 whose outer shape is substantially the same as that of the outer frame 11. A substantially elliptical window hole 23 is formed at the center of the resin base 21. A game board 24 is detachably attached to the resin base 21. The game board 24 is made of plywood, and a game area formed on the front surface of the game board 24 is exposed to the front side of the inner frame 13 through the window hole 23 of the resin base 21.

  Here, the structure of the game board 24 is demonstrated based on FIG. FIG. 4 is a front view of the game board 24.

  The game board 24 is formed with a plurality of large and small openings penetrating in the front-rear direction by being subjected to router processing. Each opening has a general winning port 31, a variable winning device 32, an upper working port (first starting ball entering portion) 33, a lower working port (second starting ball entering portion) 34, a through gate 35, a variable display unit 36, A main display unit 43, an accessory display unit 44, and the like are provided.

  The variable display unit 36 is arranged so as to include the center position of the game area, and the variable display unit 36, the upper operation port 33, the lower operation port 34, and the variable prize winning device 32 are arranged on the horizontal center line of the game area. It arrange | positions so that it may line up downward in order. One through gate 35 is provided on the left side of the variable display unit 36 and one is provided on the right side. Further, two general winning ports 31 are provided on the left side of the upper operating port 33 and the lower operating port 34 at the height positions of the upper operating port 33 and the lower operating port 34, and two on the right side. Is provided.

  When a ball entering the general winning port 31, the variable winning device 32, the upper operating port 33 and the lower operating port 34 is generated, it is detected by a winning detection sensor disposed on the back side of the game board 24, and the detection result A predetermined number of award balls are paid out based on. In this case, when a ball enters the upper working port 33 and when a ball enters the lower working port 34, the payout of three prize balls is executed. When it occurs, 10 prize balls are paid out, and when a prize is entered into the variable winning device 32, 15 prize balls are paid out. However, the number of these prize balls is arbitrary. For example, the number of prize balls in both the operation holes 33, 34 is larger than the number of prize balls in the lower action opening 34 than the number of prize balls in the upper action opening 33. It may be different. Further, the number of winning balls related to the variable winning device 32 is not limited to a configuration that is larger than the number of other winning balls, and for example, the configuration may be smaller than the number of winning balls related to the general winning slot 31. A configuration may be adopted in which the number of prize balls related to the mouth 31 is the largest.

  In addition, an out port 37 is provided at the lowermost part of the game board 24, and game balls that have not entered various winning ports etc. are discharged from the game area through the out port 37. The game board 24 is provided with a large number of nails 38 in order to disperse and adjust the falling direction of the game ball as appropriate, and various members (functions) such as a windmill.

  Here, the entry means that the game ball passes through a predetermined opening, and not only a mode in which the game ball is discharged as it is when passing through the opening, but also a game area after passing through the opening. A mode of flowing down again is also included. However, in the following description, in order to clearly distinguish the game ball from entering the out port 37, the general winning port 31, the variable winning device 32, the upper operating port 33, the lower operating port 34, or the through gate 35 are entered. The entry of a game ball is also expressed as a prize.

  The upper operating port 33 and the lower operating port 34 are unitized as an operating port device and are installed in the game board 24. Both the upper working port 33 and the lower working port 34 are opened upward. Further, both the operation ports 33 and 34 are arranged in the vertical direction so that the upper operation port 33 is on the upper side. The lower working port 34 is provided with an electric accessory 34a as a guide piece (support piece) composed of a pair of left and right movable pieces.

  The electric combination 34a is connected to an electric combination drive unit (not shown) mounted on the back side of the game board 24, and is driven by the electric combination drive unit to be in a closed state (non-support state or non-guide state) and open. It is arranged in one of the states (support state or guide state). In the closed state of the electric accessory 34a, the game ball cannot be won in the lower operation port 34, and when the electric accessory 34a is in the open state, it is possible to win the lower operation port 34. Specifically, when the electric accessory 34a is in a closed state, the distance between the tip of the electric accessory 34a and the wall portion forming the upper working port 33 is smaller than the diameter of the game ball, and the electric accessory 34a is In the open state, the distance between the front end portion of the electric accessory 34a and the wall portion forming the upper working port 33 is larger than the diameter of the game ball.

  However, the present invention is not limited to this, and there is an electric motor in a state where a winning of a game ball is likely to occur in the lower working port 34 and a state where winning is possible and a winning is less likely than a state where the winning is likely to occur. It is good also as a structure by which the accessory 34a is switched. Alternatively, the electric accessory 34a may be omitted, and the switching between the state in which a winning is likely to occur and the state in which a winning is less likely to occur than that may be performed by the displacement of the lower working port 34 itself.

  The variable winning device 32 is normally in a closed state in which a game ball cannot be won or difficult to win, and when the game ball wins a transition to an opening / closing execution mode (special game state) such as a big win, It is possible to switch to a predetermined open state that is easy to do. Specifically, the variable winning device 32 is opened as a variable winning device with a predetermined time (for example, 30 seconds) or a predetermined number (for example, 10) of winnings as one round and a plurality of rounds (for example, 15 rounds) as an upper limit. 32 is repeatedly opened.

  In the main display unit 43, a variation display of a picture (special figure) is performed using a winning at the upper operation port 33 or the lower operation port 34 as a trigger, and the upper operation port 33 or the lower operation port 34 is displayed as a result of stopping the variation display. The result of the internal lottery performed based on the winning is clearly indicated by the display. In other words, in this pachinko machine 10, the winning to the upper working port 33 and the winning to the lower working port 34 are not distinguished in the internal lottery, and are performed based on the winning to the upper working port 33 or the lower working port 34. The result of the internal lottery is displayed on the main display unit 43 which is a common display area. When the result of the internal lottery based on the winning to the upper operating port 33 or the lower operating port 34 is a winning result corresponding to the shift to the opening / closing execution mode, a predetermined stop result is displayed on the main display unit 43. After the display and the change display are stopped, the mode shifts to the opening / closing execution mode.

  The main display unit 43 is configured by a segment display in which a plurality of segment light emitting units are arranged in a predetermined manner, but is not limited to this, and is not limited to a liquid crystal display device, an organic EL display device, You may be comprised by other types of display apparatuses, such as CRT or a dot matrix display. In addition, as a pattern variably displayed on the main display unit 43, a configuration in which a plurality of types of characters are variably displayed, a configuration in which a plurality of types of symbols are variably displayed, a configuration in which a plurality of types of characters are variably displayed, or a plurality A configuration in which the color of the seed is switched and displayed can be considered.

  In the accessory display unit 44, the display of the variation of the pattern (ordinary figure) is performed with the winning of the through gate 35 as a trigger, and the internal display performed based on the winning of the through gate 35 as a result of stopping the variation display. The result of the lottery is clearly indicated by the display. If the result of the internal lottery based on the winning to the through gate 35 is a winning result corresponding to the transition to the state where the electric role is opened, a predetermined stop result is displayed on the accessory display unit 44 and displayed in a variable manner. After is stopped, it shifts to the electric utility open state. In the electric combination open state, the electric combination 34a provided in the lower working port 34 is opened in a predetermined manner.

  The variable display unit 36 is provided with a symbol display device 41 for variably displaying a symbol which is a kind of a symbol (or variable display or switching display), and a center frame 42 is provided so as to surround the symbol display device 41. Has been. The symbol display device 41 is configured as a liquid crystal display device including a liquid crystal display, and display contents are controlled by a display control device described later. The symbol display device 41 is not limited to a liquid crystal display device, and may be another display device having a display screen such as a plasma display device, an organic EL display device, or a CRT, and a dot matrix display. It may be a vessel.

  In the symbol display device 41, the variation display of the symbol is started based on winning in the upper working port 33 or the lower working port 34. That is, when variable display is performed on the main display unit 43, variable display is performed on the symbol display device 41 accordingly. For example, symbols are displayed side by side at the top, middle and bottom, and these symbols are displayed in a variable manner as they are scrolled in the horizontal direction. When a predetermined combination of symbols is stopped and displayed on a preset active line, an opening / closing execution mode is generated.

  In addition, based on the winning in one of the operation ports 33 and 34, the main display unit 43 and the symbol display device 41 start the variable display, until a predetermined stop result is displayed and the variable display is stopped. It corresponds to one game time.

  A first holding lamp portion 45 corresponding to the main display portion 43 and the symbol display device 41 is provided in the upper left portion on the front side of the center frame 42. A maximum of four game balls won in the upper operation port 33 or the lower operation port 34 are reserved, and the number of reservations is displayed when the first reservation lamp unit 45 is turned on.

  In the upper right portion of the center frame 42, a second holding lamp portion 46 corresponding to the accessory display portion 44 is provided. The number of times that the game ball has passed through the through gate 35 is held up to a maximum of 4 times, and the number of held balls is displayed when the second holding lamp unit 46 is turned on. In addition, it is good also as a structure by which the function of each holding | maintenance lamp | ramp part 45 and 46 is fulfill | performed by the display in a partial area | region of the symbol display apparatus 41. FIG.

  An inner rail portion 48 and an outer rail portion 49 are attached to the game board 24, and a guide rail is constituted by the inner rail portion 48 and the outer rail portion 49, and a game launched from the game ball launching mechanism 51. A ball is guided to the upper part of the game area. The inner rail portion 48 and the outer rail portion 49 also have a function of partitioning a game area.

  As shown in FIG. 2, the game ball launching mechanism 51 is attached below the window hole 23 in the resin base 21, and is stored in a launch rail 52 extending toward the guide rail and an upper plate 61a described later. A ball feeding device 53 that supplies game balls onto the launch rail 52 and a solenoid 54 that is an electric actuator that launches the game balls supplied onto the launch rail 52 toward the guide rail are provided. By operating the firing operation device 55 provided on the front door frame 14, the ball feeding device 53 is driven and controlled so that one game ball is placed at the ball standby position on the firing rail 52 and the solenoid 54. Is controlled and a game ball placed on the firing rail 52 is launched.

  A front door frame 14 is provided so as to cover the entire front side of the inner frame 13. As shown in FIG. 1, the front door frame 14 is formed with a window portion 56 so that almost the entire gaming area can be viewed from the front. The window part 56 has a substantially elliptical shape, and a window panel 57 is fitted therein. The window panel 57 is colorless and transparent formed of glass, but is not limited thereto, and may be formed colorless and transparent of synthetic resin, and the game area is visually recognized through the window panel 57 from the front of the pachinko machine 10. If possible, it may be colored and transparent.

  Around the window portion 56, light emitting means such as various lamp portions are provided. A display lamp part 58 a is provided above the window part 56 as a part of the various lamp parts. In addition, a pair of left and right error lamp portions 58b are provided on the left and right sides of the display lamp portion 58a and on the upper corner portion of the front door frame 14. In addition, a pair of left and right speaker portions 59 for outputting sound effects according to the gaming state are provided adjacent to the error lamp portion 58b.

  Below the window portion 56 in the front door frame 14, an upper bulging portion 61 and a lower bulging portion 62 bulging toward the front side are arranged in parallel. An upper plate 61 a that opens upward is provided inside the upper bulging portion 61, and a lower plate 62 a that also opens upward is provided inside the lower bulging portion 62.

  The upper plate 61a has a function of temporarily storing game balls paid out from a payout device 77 (see FIG. 3), which will be described later, and guiding them to the game ball launching mechanism 51 side while aligning them in a line. In this case, the front door frame 14 is formed with a firing guide passage (not shown) that extends from the outlet of the upper plate 61a and extends to the ball feeding device 53 of the inner frame 13. As shown in FIG. 2, a shutter 63 is provided. When the front door frame 14 is in a closed state, the shutter 63 is pressed by a pressing portion (not shown) formed on the inner frame 13 and is disposed at an open position, so that the game ball can flow into the ball feeding device 53. And On the other hand, when the front door frame 14 is in the open state, the pressing by the pressing portion is released, so that the shutter 63 is disposed at the closed position, and the outflow of game balls from the upper plate 61a is prevented. The lower tray 62a has a function of storing game balls that become surplus in the upper tray 61a.

  Next, the configuration on the back side of the gaming machine main body 12 will be described.

  As shown in FIG. 3, on the back of the inner frame 13 (specifically, the game board 24), a main control device 71 for controlling the main game, and voice and lamp display and a display control device (not shown) are controlled. A voice light emission control device 72 is mounted.

  The substrate box 71a of the main controller 71 is provided with trace means for leaving a trace of the opening. Specifically, the substrate box 71a is provided with a coupling portion (caulking portion) that couples the plurality of case bodies constituting the substrate box 71a inseparably as a trace means and requires destruction of a predetermined part during the separation. ing. As a result, unauthorized opening of the board box 71a can be suppressed, and if it is illegally opened, the trace remains, so that it can be easily grasped that the board box 71a has been illegally opened.

  Note that the trace means is not limited to the above-described configuration, and for example, a seal seal that leaves a trace that the adhesive layer has been peeled off when the adhesive layer remains on the object to be peeled so as to straddle the boundary between the plurality of case bodies It is good also as a structure to affix and it is good also as a structure which apply | coats an adhesive agent with respect to the boundary between the some case bodies which comprise the board | substrate box 71a.

  The back pack unit 15 is installed so as to cover the back side of the inner frame 13 including the main controller 71 and the sound emission controller 72. As shown in FIG. 3, the back pack unit 15 includes a back pack 73 formed of a synthetic resin having transparency, and with respect to the back pack 73, a payout mechanism portion 74 and a control device assembly unit 75 are provided. It is attached.

  The payout mechanism unit 74 includes a tank 76 in which game balls supplied from island facilities of the game hall are sequentially replenished, and a payout device 77 for paying out game balls stored in the tank 76. The game balls paid out from the payout device 77 are discharged to the upper plate 61a or the lower plate 62a through a payout passage provided on the downstream side of the payout device 77.

  The control device collective unit 75 generates and outputs a predetermined power required by the payout control device 78 having a function of controlling the payout device 77 and various control devices, and is accompanied by an operation of the launch operation device 55 by the player. A power supply and launch control device 79 for controlling the launch of the game ball. The payout control device 78 and the power supply / launch control device 79 are arranged so as to overlap each other so that the payout control device 78 is located behind the pachinko machine 10.

  A discharge passage board 75b is formed in the mounting portion 75a where the power supply and launch control device 79 is mounted in the control device assembly unit 75. The game balls collected in the collection passage of the collective board provided on the back surface of the game board 24 are led out to the discharge passage board 75b and led to the discharge passage board 75b, so that the ball of the game hall is finally obtained. It is discharged to the feed mechanism.

<Electric configuration of pachinko machine 10>
The electrical configuration of the pachinko machine 10 will be described with reference to FIG. FIG. 5 is a block diagram showing an electrical configuration of the pachinko machine 10.

  The main control device 71 includes a main control board 101 that controls the main control of the game. An MPU 102 is mounted on the main control board 101. The MPU 102 is equipped with a ROM 103 and a RAM 104.

  The ROM 103 is composed of a memory that does not require external power supply for storing and holding, such as a NOR-type or NAND-type flash memory, that is, a non-volatile memory, and is used as a read-only memory. The ROM 103 stores various control programs executed by the MPU 102 and fixed value data.

  The RAM 104 is composed of a memory that requires external power supply for storing and holding, such as SRAM and DRAM, that is, a volatile memory, and is used for both reading and writing. The RAM 104 is configured to allow random access for both reading and writing. The reading speed of the RAM 104 is set higher than that of the ROM 103. The RAM 104 temporarily stores various data and the like when executing the control program stored in the ROM 103.

  The MPU 102 is provided with an input / output port (not shown), and the MPU 102 and various control devices, various sensors, etc. are connected via the input / output port. The MPU 102 grasps detection results of various sensors in a situation where operating power is supplied, and controls various control devices based on the detection results.

  Specifically, the MPU 102 is electrically connected to various winning detection sensors 105a to 105d that detect winnings to the general winning port 31, the variable winning device 32, the upper operating port 33, the lower operating port 34, and the through gate 35, respectively. ing. The MPU 102 receives signals from the various winning detection sensors 105a to 105d, and makes a winning determination (ball determining) to each winning portion based on the reception result. In this case, when a winning to the general winning port 31, the variable winning device 32, the upper operating port 33 or the lower operating port 34 is specified, a game ball corresponding to each winning target is paid out. Execute the process. In addition, when a winning to the upper operating port 33 or the lower operating port 34 is specified, numerical information of various counters is acquired and stored as holding information, and when the holding information is stored, a variable winning is obtained. A determination of whether or not to shift to the opening / closing execution mode in which the device 32 is opened and closed a plurality of times and a distribution determination for determining the gaming state after the opening / closing execution mode are performed. Then, the game is advanced based on the results of the determination of the success / failure and the determination of distribution.

  The MPU 102 is electrically connected to a variable winning drive unit 32 a that opens and closes the variable winning device 32 and an electric combination drive unit 34 b that opens and closes the electric combination 34 a of the lower working port 34. The MPU 102 is electrically connected to a main display unit 43 and an accessory display unit 44. The MPU 102 performs drive control of the various drive units 32a and 34b and performs display control of the various display units 43 and 44.

  Specifically, in the opening / closing execution mode, the MPU 102 performs drive control of the variable winning drive unit 32a so that the variable winning device 32 is opened and closed. Further, when the electrification of the electric accessory 34a is won, drive control of the electric accessory driving unit 34b is executed in the MPU 102 so that the electric accessory 34a is opened and closed. In each game round, the display control of the main display unit 43 is executed in the MPU 102. In addition, when the lottery result indicating whether or not the electric accessory 34a is to be opened is clearly indicated, display control of the accessory display unit 44 is executed in the MPU 102.

  An audio light emission control device 72 and a payout control device 78 are connected to the MPU 102. The MPU 102 outputs a prize ball command to the payout control device 78 based on the winning determination result. Specifically, every time the MPU 102 detects winning in the general winning opening 31, the variable winning device 32, the upper operating port 33, and the lower operating port 34, the MPU 102 gives a prize ball command corresponding to each winning to the payout control device 78. Send. The payout control device 78 includes a RAM 78a composed of a volatile memory, and when a prize ball command is received, the prize ball number set by the prize ball command is added to the prize ball number counter of the RAM 78a. Then, the payout device 77 is driven and controlled until the prize ball number counter reaches “0”.

  The MPU 102 outputs various commands such as a variation pattern command, a type command, a variation end command, an opening command, and an ending command to the sound emission control device 72. When the sound emission control device 72 receives the various commands, the sound light emission control device 72 controls the driving of the various lamp units 45, 46, 58a, 58b and the speaker unit 59 by executing processing corresponding to the received commands, and displays A command is transmitted to the control device 110. The display control device 110 analyzes various commands received from the sound emission control device 72 or performs predetermined arithmetic processing based on the received various commands to control the display of images on the symbol display device 41.

  The power supply and launch control device 79 includes a power supply and launch control board 121 for power supply and game ball launch control. The power and launch control board 121 is housed in a board box. The power supply and launch control board 121 is connected to the main control board 101 and the payout control device 78 and is connected to a commercial power supply (external power supply) in a game arcade or the like. The power source and launch control board 121 generates operating power necessary for the MPU 102 and various control devices based on external power supplied from a commercial power source. The operating power is transmitted to the MPU 102 of the main control board 101 and to other control devices via a power transmission circuit 122 provided on the main control board 101. The power supply and launch control board 121 is responsible for launch control of the game ball launch mechanism 51, and the game ball launch mechanism 51 is driven when predetermined launch conditions are met.

  The detailed configuration of the power supply and launch control device 79 will be described in detail with reference to FIG. 6 in addition to FIG. FIG. 6 is a perspective view schematically showing the power supply and launch control board 121. In FIG. 6, only some of the various elements mounted on the power supply and launch control board 121 are shown, and other elements and wiring patterns are omitted.

  As a configuration for supplying power to the power source and launch control board 121, when the power supply module 131 that converts external power into power used in various control devices and the supply of external power are stopped (when power is interrupted) A backup capacitor 132 is mounted as backup power for supplying power to various control devices.

  As shown in FIG. 6, the power supply module 131 includes a rectangular parallelepiped housing 131a, and a converter and a transformer for converting an AC voltage into a predetermined DC voltage are accommodated in the housing 131a. The converter is connected to a commercial power supply, and is supplied with + 24V AC voltage as external power. The converter generates + 12V DC voltage based on the AC voltage. The transformer converts the + 12V DC voltage into a + 5V DC voltage. Thereby, + 12V and + 5V DC voltage can be obtained from + 24V AC voltage.

  The power supply module 131 is electrically connected to a connector CN1 provided on the power supply and launch control board 121, and outputs the DC voltage to the outside via the connector CN1. As a result, a DC voltage can be transmitted to the MPU 102 via the connector CN1.

  Here, the power supply module 131 cannot supply power to various control devices when the power supply of the commercial power supply is stopped in the island facility where the pachinko machine 10 is installed (when power is interrupted), for example. That is, the power supply module 131 can supply power to various control devices when commercial power is supplied (at power-on), and cannot supply power to various control devices when power is interrupted. Is.

  As shown in FIG. 6, the backup capacitor 132 is a block type electrolytic capacitor having a relatively large amount of charge that can be stored, and has a cylindrical shape. Specifically, the backup capacitor 132 includes a main body 132 a that accumulates electric charges, and two connection terminals 132 b that electrically connect the main body 132 a and the power supply and launch control board 121. The backup capacitor 132 (main body 132a) is mounted upright in a direction orthogonal to the power source and the board surface of the launch control board 121 via the connection terminal 132b. One of the connection terminals 132b is connected to the ground.

  The backup capacitor 132 is configured such that a predetermined voltage is applied from the power supply module 131 and is connected to the MPU 102 via the connector CN1. The backup capacitor 132 is in a charged state when power is supplied from the power supply module 131, while it is changed from a charged state to a discharged state when power is not supplied from the power supply module 131, and the MPU 102 is connected via the connector CN1. To supply power.

  The backup capacitor 132 is disposed near the connector CN1. Thereby, the distance of the wiring which connects backup capacitor 132 and connector CN1 can be shortened. Therefore, the generation of electromagnetic noise due to charging / discharging of the backup capacitor 132 can be reduced, and power loss due to wiring resistance can be reduced.

  Here, by adopting a backup capacitor 132 having a large amount of charge that can be stored, the power supply time to the MPU 102 at the time of power interruption is extended. On the other hand, generally, a capacitor becomes larger as the amount of charge that can be accumulated increases. For this reason, the backup capacitor 132 having a large amount of charge that can be stored is a larger element than the other elements.

  In particular, the backup capacitor 132 protrudes in a direction orthogonal to the surface of the power source and the launch control board 121 due to the relationship between the shape of the backup capacitor 132 and the power source and the manner of attachment to the launch control board 121. For this reason, when the backup capacitor 132 is viewed from an oblique direction (a direction different from a direction orthogonal to the board surface), a blind spot that cannot be visually recognized by the backup capacitor 132 is formed.

  Further, the main body 132 a of the backup capacitor 132 is connected to the power source and launch control board 121 via the connection terminal 132 b, so that a predetermined gap is formed between the main body 132 a and the power source and launch control board 121. . For this reason, when the backup capacitor 132 is viewed from a direction orthogonal to the power supply and the board surface of the launch control board 121, the gap cannot be visually recognized, resulting in a blind spot.

  From the above, the provision of the backup capacitor 132 forms a blind spot that is difficult to visually recognize.

  If the backup capacitor 132 is mounted on the main control board 101, the blind spot makes it difficult to find illegal acts on the MPU 102. That is, when the MPU 102 is mounted in the blind spot, it is difficult for the MPU 102 to confirm, and it is easy to overlook an illegal act on the MPU 102. In addition, it is possible to perform a fraudulent act that is not conspicuous to the MPU 102 by using a blind spot such as mounting an illegal board that outputs a fraud signal to the MPU 102 within the blind spot.

  In particular, in order to save space, suppress electromagnetic noise associated with charging / discharging of the backup capacitor 132, and reduce power loss, the connectors CN1, MPU 102 and the backup capacitor 132 are preferably arranged close to each other. However, in this case, the connector CN1 and the MPU 102 are easily disposed in the blind spot formed by the backup capacitor 132, and illegal acts on these are easily performed.

  On the other hand, in the pachinko machine 10, since the backup capacitor 132 is mounted on the power supply and launch control board 121, no blind spot due to the backup capacitor 132 is formed on the main control board 101. Thereby, the visibility of the main control board 101 can be improved, an illegal act can be easily found, and the illegal act using the blind spot as described above can be suppressed.

  The power supply and launch control board 121 is provided with a launch control module 133 as a configuration for performing launch control of the game ball. The launch control module 133 is connected to the power supply module 131, and operating power is supplied from the power supply module 131. The launch control module 133 is connected to the game ball launching mechanism 51 via the transmission connector CN11, and is connected to the launch operation device 55 via the reception connector CN12. The launch control module 133 controls the game ball launch mechanism 51 on the basis of various detection signals input from the launch operation device 55 and launch commands output from the main control device 71 in a situation where operating power is supplied. The signal is output.

  A power switch 134 is provided on the power and launch control board 121. The power switch 134 is provided so as to be exposed from the board box that houses the power supply and launch control board 121 and is formed to be operable from the outside. By operating the power switch 134, it is possible to turn the power on / off (power on / off) for each pachinko machine 10. Specifically, when the power switch 134 is turned on in a state where external power is being supplied, the power supply module 131 is in a state of supplying operating power, and the power switch 134 is turned on in a state where external power is being supplied. When turned off, the power supply module 131 stops operating power supply.

  However, in amusement halls, the power switch 134 of the pachinko machine 10 is normally set to ON at all times, and the power supply to the island facilities to which the plurality of pachinko machines 10 are attached is controlled. Simultaneous control of power ON / OFF in the machine 10 is performed.

  In the relationship with the power switch 134, the power-on state is a state in which external power is supplied from a commercial power source and the power switch 134 is ON, and the power-off state is a state in which the power switch 134 is ON. There is a state in which external power is not supplied from the commercial power source, or a state in which the power switch 134 is OFF regardless of whether external power is supplied from the commercial power source. And the power supply module 131 will be in the state which supplies operating power in a power-on state, and stops supply of operating power in a power-off state.

  Further, the power and launch control board 121 is provided with a RAM erase switch 135. The RAM erase switch 135 protrudes from a board box that houses the power supply and launch control board 121 and is configured to be pressed from the outside. Then, when the power is turned on while pressing the RAM erase switch 135 (from the power-off state to the power-on state), the RAM data is initialized.

  The RAM erasure switch 135 is not limited to the configuration provided on the power supply and launch control board 121, and may be provided on the main control board 101, for example. In this case, the main control board 101 has a configuration for grasping the operation status of the RAM erase switch 135, specifically, for transmitting a detection signal of the RAM erase switch 135. And the wiring etc. which electrically connect with launch control board 121 can be omitted, and simplification of composition can be attained.

<Configuration for Power Supply from Power Supply and Launch Control Board 121 to MPU 102>
Next, a configuration related to power supply from the power supply and launch control board 121 to the MPU 102 will be described with reference to FIG. FIG. 7 is a circuit diagram showing a configuration for supplying power between the power source and launch control board 121 and the main control board 101. In FIG. 7, components other than the configuration for supplying power are omitted.

  As shown in FIG. 7, a harness H is provided as a transmission means for connecting the power supply and launch control board 121 and the main control board 101. By connecting the harness H to the connector CN1 of the power supply and launch control board 121 and the connector CN2 provided on the main control board 101, the power supply and launch control board 121 and the main control board 101 are electrically connected. As a result, power can be supplied to the MPU 102 by the power supply module 131 and the backup capacitor 132.

  In the following description, the connector CN1 of the power supply and launch control board 121 is referred to as a power supply side connector CN1, and the connector CN2 of the main control board 101 is referred to as a main side connector CN2.

  In detail, regarding the power supply between the power supply module 131 and the MPU 102, the power supply and launch control board 121 includes a power supply side connector for connecting the power supply module 131 (specifically, the + 5V output terminal of the power supply module 131) and the power supply side connector CN1. 1 bus 141 is provided, and the power transmission circuit 122 of the main control board 101 is provided with a main first bus 142 for connecting the MPU 102 and the main connector CN2. Furthermore, the harness H includes a first connection line 143 that connects the power source side first bus 141 and the main side first bus 142.

  According to this configuration, when the harness H is connected to each of the connectors CN1 and CN2, the power supply module 131 → the power source side first bus 141 → the first connection line 143 → the main side first bus 142 → the MPU 102 is turned on. Power supply path EL1 is formed. As a result, power can be supplied from the power supply module 131 toward the MPU 102.

  Here, in the pachinko machine 10, the harness H is connected to form the charging path EL <b> 2 that connects the power supply module 131 and the backup capacitor 132, and the power interruption that connects the backup capacitor 132 and the MPU 102. An electric power supply path EL3 for time is formed.

  First, the charging path EL2 will be described. The power supply and launch control board 121 is provided with a power supply side second bus 144 for connecting the backup capacitor 132 and the power supply side connector CN1. The power transmission circuit 122 is provided with a main second bus 145 that is connected to the main connector CN <b> 2 and connected to an intermediate position of the main first bus 142. Furthermore, the harness H includes a second connection line 146 that connects the power-source-side second bus 144 and the main-side second bus 145.

  According to this configuration, the harness H is connected to each of the connectors CN1 and CN2, so that the power supply module 131 → the power supply side first bus 141 → the first connection line 143 → the part of the main side first bus 142 → the main side. A charging path EL2 of the second bus 145 → the second connection line 146 → the power source side second bus 144 → the backup capacitor 132 is formed. As a result, power can be supplied from the power supply module 131 to the backup capacitor 132.

  That is, the charging path EL2 and the power supply path EL1 for turning on the power up to a midway position of the main first bus 142, specifically, to the connection point between the main first bus 142 and the main second bus 145, The path to the MPU 102 (part after the connection point of the main first bus 142) and the charging path (main second bus 145 → second connection line 146) are shared in parallel from the middle position. → The power source side second bus 144) is formed separately. Thereby, compared with the structure which forms each path | route separately, the simplification of a structure can be achieved.

  In the following description, the portion from the main connector CN2 to the connection point of the main second bus 145 in the main first bus 142 is referred to as the upstream bus 142a, and the connection bus to the MPU 102 is connected to the downstream bus. 142b.

  Next, the power supply path EL3 for power interruption will be described. The backup capacitor 132 is connected to the MPU 102 via the power source side second bus 144, the second connection line 146, the main side second bus 145, and the downstream side bus 142b. It is connected to the. That is, the path of the backup capacitor 132 → the power source side second bus 144 → the second connection line 146 → the main side second bus 145 → the downstream side bus 142b → the MPU 102 becomes the power supply path EL3 for power interruption. Thereby, when the power supply from the power supply module 131 is stopped, the electric power based on the electric charge accumulated in the backup capacitor 132 is given to the MPU 102 through the power supply path EL3 for power interruption.

  Here, the path from the main second bus 145 to the backup capacitor 132 via the second connection line 146 is common to the power supply path EL3 and the charging path EL2 for power interruption, although the direction of the current is different. ing. In the following description, the above-described path that is common to the charging path EL2 and the power supply path EL3 for power interruption is referred to as a common path EL4.

  A diode 151 is provided in the upstream bus 142a in order to prevent a current based on the electric charge accumulated in the backup capacitor 132 from flowing back to the power supply module 131. The diode 151 is provided with the current direction of the power supply path EL1 for power-on, specifically, the direction from the power supply module 131 to the MPU 102 as the forward direction. Thereby, the backflow of the electric current based on the electric charge of the backup capacitor 132 can be suppressed without obstructing the power supply from the power supply module 131 side.

  In the configuration in which the various paths EL1 to EL3 are formed as described above, when the harness H is connected and the electric charge is not accumulated in the backup capacitor 132, when switching from the power-off state to the power-on state, There is a possibility that a large current flows through the charging path EL2 and the diode 151 is damaged.

  In addition, when the harness H is connected in a state in which electric charge is accumulated in the backup capacitor 132, a large current is generated based on the electric charge accumulated in the backup capacitor 132, and the MPU 102 malfunctions. There is a risk of damage. In particular, the backup capacitor 132 is a capacitor having a relatively large capacity due to the characteristic of storing and holding the state relating to various games in the RAM 104, so that residual charges are likely to remain.

  In contrast, according to the pachinko machine 10, the limiting resistor 152 is provided in the common path EL4. As a result, the current generated when the above event occurs is limited, and instantaneous current exceeding the allowable current value of the electronic device such as the diode 151 or the MPU 102 is suppressed. Therefore, damage to electronic devices such as the diode 151 and the MPU 102 can be suppressed.

  In particular, since the limiting resistor 152 is provided in the common path EL4, the resistance can be reduced as compared with the structure in which the resistance is provided in each of the charging path EL2 and the power supply path EL3 for power interruption. Simplification can be achieved.

  In addition, the resistance value of the limiting resistor 152 is an allowable current value of each electronic device (diode 151, MPU102) when a current as described above flows through the charging path EL2 or the power supply path EL3 for power interruption. It is set so as to be smaller within a smaller range, specifically 100Ω. As a result, it is possible to suppress power loss due to the limiting resistor 152 while suppressing damage to the electronic devices.

  For example, if a resistor for protecting the diode 151 is provided on the cathode side of the diode 151 in the upstream bus 142a and a resistor for suppressing a large current due to the backup capacitor 132 is provided on the downstream bus 142b, power loss due to these resistors is provided. Becomes larger.

  On the other hand, by providing the limiting resistor 152 in the common path EL4 as described above, it is possible to suppress a large current that can be generated by the above-described events with one resistor, and to reduce power loss. As a result, the configuration can be simplified and the power loss can be reduced.

  In the configuration in which +5 V is output from the power supply module 131 and the diode 151 is provided between the power supply module 131 and the MPU 102, the voltage applied to the MPU 102 via the power supply path EL1 for power-on is , + 4.3V obtained by subtracting the voltage drop (for example, + 0.7V) of the diode 151 from + 5V.

  In such a configuration, the MPU 102 is configured to perform a normal operation (corresponding operation at the time of power-on) when a voltage of +3.3 V or more which is smaller than the applied voltage (+4.3 V) is applied. As a result, the MPU 102 operates normally even in a configuration in which the diode 151 as an element that causes a voltage drop is provided between the power supply module 131 and the MPU 102.

  In this case, the voltage applied to the backup capacitor 132 during charging is also + 4.3V. Corresponding to the applied voltage, a backup capacitor 132 having a withstand voltage performance of +4.3 V or more (for example, for +5 V) is used.

  Note that the applied voltage to the MPU 102 is not limited to this, and the output voltage from the power supply module 131 may be adjusted so that, for example, +3.3 V which is a lower limit value is applied. In this case, power consumption related to the operation of the MPU 102 can be reduced. However, when paying attention to the stable operation of the MPU 102, it is preferable to provide a predetermined margin (about +1 V) between the lower limit voltage at which the MPU 102 can operate and the voltage actually applied to the MPU 102.

  As a matter of course, the upper limit value of the voltage applied to the MPU 102 and the backup capacitor 132 is set to be equal to or lower than the voltage that guarantees the operation of the MPU 102 and the backup capacitor 132.

  Here, the power supply path EL1 for power entry and the power supply path EL3 for power interruption are common to the downstream bus 142b. For this reason, since the MPU 102 does not need to provide a plurality of terminals, the configuration can be simplified. On the other hand, the MPU 102 cannot determine whether the pachinko machine 10 is in the power-on state or the power-off state.

  On the other hand, the main control board 101 is provided with a reset circuit 153 for specifying the power supply status of the pachinko machine 10. The reset circuit 153 is connected to the upstream bus 142a used only for the power supply path EL1 for power-on, and is also connected to the MPU 102.

  The reset circuit 153 outputs, to the MPU 102, a reset signal that has a different signal form depending on the signal state of the upstream bus 142a. Specifically, the reset circuit 153 determines that the current value (or voltage value) flowing through the upstream bus 142a is greater than a specific value, specifically, a current value (or voltage value) corresponding to the operating power of the MPU 102. When the reset signal falls from the HI signal to the LOW signal (when the power-on state is entered), while the current value flowing through the upstream bus 142a becomes smaller than the specific value (when the power-off state occurs) ), The reset signal is raised from the LOW signal to the HI signal.

  According to such a configuration, by monitoring the reset signal output from the reset circuit 153, it can be specified whether the power supply state or the power interruption state. Specifically, by detecting the falling edge of the reset signal, it is possible to identify the transition from the power-off state to the power-on state. Then, by detecting the rising edge of the reset signal, it is possible to specify that the power-on state has shifted to the power-off state. As a result, the MPU 102 can grasp the power supply status while partially sharing the power supply path EL1 for power-on and the power supply path EL3 for power-off. Therefore, MPU102 can grasp | ascertain the timing which should perform the process (main process) based on power-on, and can grasp the timing which should perform the process (process at the time of a power failure) based on electric power generation | occurrence | production.

  Further, in the configuration in which the charging path is provided in parallel from the middle position of the power supply path EL1 at the time of power-on as described above, the backup is performed via the charging path EL2 when the power-on state is reached. The capacitor 132 is charged, and power is supplied to the MPU 102 via the power supply path EL1 for power-on. For this reason, the electric power supplied from the power supply module 131 is divided into the backup capacitor 132 and the MPU 102.

  In this case, the division ratio depends on the amount of charge accumulated in the backup capacitor 132, and in a situation where the amount of charge accumulated in the backup capacitor 132 is small, the power supplied to the MPU 102 is small. Therefore, sufficient power is not supplied to the MPU 102 at the initial stage of charging the backup capacitor 132.

  On the other hand, the reset circuit 153 resets the current when the current flowing through the upstream bus 142a becomes a specific value, when a predetermined period, specifically, a period required for charging the backup capacitor 132 has elapsed. The signal is configured to fall. As a result, the reset signal falls after stable power supply to the MPU 102 is performed, so that the startup process (main process) can be stably executed by the MPU 102. .

  Note that a bypass capacitor 154 is provided in parallel to the downstream bus 142b of the main first bus 142 in order to realize stable power (voltage) supply. As a result, the power supplied to the MPU 102 can be stabilized both at the time of power-on and at the time of power-off.

<About power supply>
Next, an aspect of power supply will be described with reference to FIG. FIG. 8 is a time chart for explaining an aspect of power supply. In FIG. 8, (a) shows how the harness H is attached and detached, (b) shows the state of the power supply module 131, (c) shows changes in the current flowing through the limiting resistor 152, (d) shows the amount of charge in the backup capacitor 132, and (e) Represents a change in power supplied to the MPU 102, and (f) represents a reset signal. Note that the current amount (charge amount) in FIGS. 8C to 8E is displayed slightly different from the actual value due to the relationship of the drawings.

  First, at the timing of t1, the harness H is connected to each of the connectors CN1 and CN2 in the power-off state, and the pachinko machine 10 is switched from the power-off state to the power-on state by starting the power supply of the island facility. Thereby, as shown in FIG.8 (b), electric power supply is started from the power supply module 131 (ON state). In this case, power is supplied to the backup capacitor 132 via the charging path EL2, and charging of the backup capacitor 132 is started.

  In this case, as shown in FIG. 8C, a large current instantaneously flows through the charging path EL2 including the limiting resistor 152. The current is a current limited by the limiting resistor 152 and is smaller than the allowable value of the diode 151. For this reason, the diode 151 is prevented from being broken.

  That is, since the limiting resistor 152 is provided in the common path EL4 which is a part of the charging path EL2, the pachinko machine 10 is switched from the power-off state to the power-on state in a state where no charge is accumulated in the backup capacitor 132. Even in this case, the charging path EL2 is not short-circuited. For this reason, a large current exceeding the allowable value of the diode 151 does not occur due to the short circuit.

  In the state where the backup capacitor 132 is being charged, as shown in FIG. 8F, the reset signal maintains the HI signal.

  Thereafter, as the amount of charge accumulated in the backup capacitor 132 increases, the current flowing through the charging path EL2 decreases and the power supplied to the MPU 102 increases. At time t2, when charging of the backup capacitor 132 is almost completed (charge is accumulated in the backup capacitor 132 by a predetermined threshold charge amount), no current flows through the charging path EL2. In this case, stable power supply to the MPU 102 is performed via the power supply path EL1 for power-on. Thereafter, the reset signal falls at timing t3 (see FIG. 8F).

  Thereafter, the power supply of the island facility is stopped at the timing of t4, and the pachinko machine 10 is changed from the power-on state to the power-off state. In this case, as shown in FIGS. 8B and 8F, the power supply from the power supply module 131 is stopped (OFF state), and the reset signal rises. Then, as shown in FIGS. 8C and 8D, the backup capacitor 132 starts to be discharged, and power based on the discharge is supplied to the MPU 102 through the power supply path EL3 for power interruption. As a result, as shown in FIG. 8 (e), power is supplied to the MPU 102 regardless of the power interruption state. The electric power is supplied to the RAM 104 of the MPU 102, and various game information temporarily stored in the RAM 104 is stored and held.

  Thereafter, at the timing of t5, the harness H is temporarily removed in order to inspect the main control board 101 and the power supply and launch control board 121 (see FIG. 8A). Thereby, since the power supply path EL3 for power interruption is cut off, the power supply from the backup capacitor 132 to the MPU 102 is stopped as shown in FIG. 8 (e).

  When the harness H is removed, the backup capacitor 132 is in a spontaneous discharge state. In the natural discharge state, as shown in FIG. 8D, the discharge amount (charge per unit time) is larger than the state in which power is supplied to the MPU 102 (the state between the timing t4 and the timing t5). The amount that is lost is small.

  Note that when the harness H is removed, the power supply to the MPU 102 is stopped, so that the information regarding the game stored in the RAM 104 is not retained.

  After completion of the inspection, as shown in FIG. 8A, the harness H is connected again at the timing t6. In this case, since the residual charge exists in the backup capacitor 132, a current based on the residual charge flows as shown in FIG. 8C.

  Here, when the harness H is connected, a large current instantaneously flows due to a change in contact resistance accompanying the connection of the harness H or an influence of electric charge remaining on the main control board 101 or the second connection line 146. There is a fear.

  In this regard, since the limiting resistor 152 is provided in the common path EL4, the instantaneously generated current is limited by connecting the harness H in a state where residual charges remain in each element. As a result, malfunction or damage of the MPU 102 due to the residual charge can be avoided.

  In particular, since the limiting resistor 152 is provided on the main control board 101, the current based on the charge remaining on the second connection line 146 is limited by the limiting resistor 152. Thereby, malfunction etc. of MPU102 by the electric current based on the remaining electric charge can be suppressed more suitably.

<Electrical configuration for performing various lotteries in the MPU 102>
Next, an electrical configuration for performing various lotteries in the MPU 102 will be described with reference to FIG.

  In the game, the MPU 102 uses lots of counter information to perform a jackpot occurrence lottery, a display setting of the main display unit 43, a symbol display setting of the symbol display device 41, a display setting of the accessory display unit 44, and the like. Specifically, as shown in FIG. 9, when the jackpot random number counter C1 used for the lottery in which the jackpot is generated, the jackpot type counter C2 used when determining the jackpot type, and the symbol display device 41 are fluctuated and changed. Reach random number counter C3 used for reach generation lottery, random number initial value counter CINI used for initial value setting of jackpot random number counter C1, and variation type counter CS for determining the display duration in the main display unit 43 and the symbol display device 41 And are used. Furthermore, the electric random number counter C4 used for the lottery to determine whether or not the electric combination 34a of the lower working port 34 is in the electric combination open state is used. The counters C <b> 1 to C <b> 3, CINI, CS, and C <b> 4 are provided in the lottery counter buffer 104 a of the RAM 104.

  Each of the counters C1 to C3, CINI, CS, and C4 is a loop counter that adds 1 to the previous value every time it is updated and returns to 0 after reaching the maximum value. Each counter is updated at short intervals. The information corresponding to the jackpot random number counter C1, the jackpot type counter C2 and the reach random number counter C3 is stored in the reserved ball storage area 104b as an acquisition information storage means when a winning to the upper working port 33 or the lower working port 34 occurs. Stored.

  The holding ball storage area 104b includes a holding area RE and an execution area AE. The holding area RE includes a first holding area RE1, a second holding area RE2, a third holding area RE3, and a fourth holding area RE4, and matches the winning history to the upper operating port 33 or the lower operating port 34. The numerical information of the jackpot random number counter C1, the jackpot type counter C2 and the reach random number counter C3 stored in the lottery counter buffer 104a is stored in one of the holding areas RE1 to RE4 as holding information.

  In this case, in the first reservation area RE1 to the fourth reservation area RE4, when the winning to the upper operation port 33 or the lower operation port 34 is continuously generated a plurality of times, the first reservation area RE1 → the second reservation area. Each numerical information is stored in time series in the order of RE2 → third reserved area RE3 → fourth reserved area RE4. By providing the four holding areas RE1 to RE4 as described above, up to four game balls winning histories to the upper operating port 33 or the lower operating port 34 are stored on hold. The holding area RE includes a holding number storage area NA, and the holding number storage area NA is used to specify the number of winning records stored in the upper operating port 33 or the lower operating port 34 that are stored on hold. Information is stored.

  Note that the number that can be reserved and stored is not limited to four, but may be any other number such as two, three, or five or more.

  The execution area AE is an area for moving each value stored in the first holding area RE1 of the holding area RE when starting the variable display of the picture on the main display unit 43. Start of one game round At this time, determination of success or failure is performed based on various numerical information stored in the execution area AE.

  Each of the counters will be described in detail.

  The jackpot random number counter C1 is configured such that one by one is added in order within a range of 0 to 599, for example, and after reaching the maximum value, returns to 0. Particularly when the jackpot random number counter C1 makes one round, the value of the random number initial value counter CINI at that time is read as the initial value of the jackpot random number counter C1. The random number initial value counter CINI is a loop counter similar to the jackpot random number counter C1 (value = 0 to 599). The big hit random number counter C1 is periodically updated and stored in the reserved ball storage area 104b at the timing when the game ball wins the upper operation port 33 or the lower operation port 34.

  The value of the random number for winning the jackpot is stored as a success / failure table (availability information group) in a success / failure table storage area 103a as a success / failure information group storage means in the ROM 103. As the success / failure table, a success / failure table for the low probability mode (low probability success / failure information group) and a high probability mode's success / failure table (high probability success / failure information group) are set. That is, in the present pachinko machine 10, a low probability mode (low probability state) and a high probability mode (high probability state) are set as the lottery mode in the winning lottery means.

  In the gaming state in which the winning / failing table for the low probability mode is referred to at the time of the lottery, the number of random numbers that win the jackpot is two. On the other hand, in the gaming state in which the winning / failing table for the high probability mode is referred to at the time of the lottery, the number of random numbers that will win the jackpot is 20. If the winning probability in the high probability mode is higher than that in the low probability mode, the number of random numbers to be won is arbitrary.

  The jackpot type counter C2 is configured so that 1 is added in order within a range of 0 to 29, and after reaching the maximum value, it returns to 0. The big hit type counter C2 is periodically updated and stored in the holding ball storage area 104b at the timing when the game ball wins the upper operation port 33 or the lower operation port 34.

  In the pachinko machine 10, a plurality of jackpot results are set, and the jackpot type counter C2 is used to distribute to any of the plurality of jackpot results.

  The plurality of jackpot results are: (1) the mode of opening / closing control of the variable winning device 32 in the opening / closing execution mode, (2) the lottery mode in the winning lottery means after the opening / closing execution mode ends, and (3) the lower operation after the opening / closing execution mode ends. A distinction is made by providing a difference in the three conditions of the support mode of the electric accessory 34a of the mouth 34.

  As an aspect of the opening / closing control of the variable winning device 32 in the opening / closing execution mode, the frequency of occurrence of winning in the variable winning device 32 between the start and end of the opening / closing execution mode is relatively high and low. A high frequency winning mode and a low frequency winning mode are set. Specifically, in any of the high-frequency winning mode and the low-frequency winning mode, the game is executed with a predetermined number of round games as an upper limit.

  Here, the round game is one of the conditions that a predetermined upper limit duration (upper limit duration) elapses and that a predetermined upper limit number of game balls win the variable winning device 32. A game that continues until is satisfied. In addition, the number of round games in the opening / closing execution mode triggered by the jackpot result is the same for a fixed number of rounds regardless of the type of jackpot result triggered by the transition. Specifically, the upper limit number of round games is set to 15 rounds (15R) regardless of which jackpot result is obtained.

  Further, in this pachinko machine 10, one opening mode of the variable winning device 32 is set in a plurality of types with different opening durations (opening durations) from when the variable winning device 32 is opened until it is closed. Has been. Specifically, a long-time mode (long-term mode) set to 29 seconds, which is a long open duration, and a short time set to 0.06 sec, which is a short time shorter than the above-mentioned long time, A mode (short-term mode) is set.

  In the present pachinko machine 10, when the launch operation device 55 is operated by the player, the game ball launching mechanism 51 is driven and controlled so that one game ball is launched toward the game area in 0.6 sec. The In the round game, the upper limit number of end conditions is set to nine. Then, in the long time mode among the above open modes, the open duration time is set longer than the product of the game ball firing period and one round game. On the other hand, in the short-time mode, an opening continuation time is set that is shorter than the product of the game ball launch cycle and one round game, more specifically, shorter than the game ball launch cycle. Therefore, when the variable winning device 32 is released once in a long-time manner, it is expected that the upper limit number of winnings in one round game will be generated for the variable winning device 32. . On the other hand, when the variable prize winning device 32 is opened once in a short time mode, it is expected that no prize will be given to the variable prize winning device 32 or even if a prize is generated. The

  In the high-frequency winning mode, the variable winning device 32 is opened once in each round game in a long-time manner. On the other hand, in the low-frequency winning mode, the variable winning device 32 is opened once in a short time mode in each round game.

  The number of opening / closing of the variable winning device 32 in the high-frequency winning mode and the low-frequency winning mode, the number of round games, the opening duration for one opening, and the upper limit number in one round game are those in the high-frequency winning mode. However, the value is not limited to the above value as long as the frequency of occurrence of winning in the variable winning device 32 is higher than that in the low-frequency winning mode until the opening / closing execution mode starts and ends. It is.

  As a support mode for the electric combination 34a of the lower working port 34, the electric combination 34a of the lower working port 34 is compared when the game ball is continuously being fired in the same manner with respect to the game area. High frequency support mode (high frequency support state or high frequency guide state) and low frequency support mode (low frequency support state or low frequency guide state) so that the frequency of the open state per unit time is relatively high or low. And are set.

  Specifically, in the low-frequency support mode and the high-frequency support mode, the probability of winning the winning combination in the electric combination opening lottery using the electric role random number counter C4 is the same (for example, both are 4/5). ing. On the other hand, in the high frequency support mode, the number of times that the electric accessory 34a is in the open state when the electrification release is elected is set more than in the low frequency support mode, and the opening time for one time is set longer. ing. In this case, in the high frequency support mode, when the electrification opening is elected and the opening state of the electric accessory 34a occurs a plurality of times, the closing time from the end of one opening state to the start of the next opening state Is set shorter than one opening time. Furthermore, in the high-frequency support mode, the minimum secured time is secured when the next electric-power-member release lottery is performed after one electric-power-member open lottery is performed, compared to the low-frequency support mode. The time is set to be selected.

  As described above, in the high frequency support mode, there is a higher probability of winning a prize for the lower working port 34 than in the low frequency support mode. In other words, in the low frequency support mode, there is a higher probability that a prize will be given to the upper working port 33 than to the lower working port 34, but in the high frequency support mode, the lower working port 34 is connected to the lower working port 34. The probability of winning a prize increases. When a winning is made to the lower working port 34, a predetermined number of game balls are paid out. Therefore, in the high frequency support mode, the player plays a game while not reducing the number of possessed balls so much. be able to.

  The configuration for increasing the frequency at which the high frequency support mode is set to the power release state per unit time as compared with the low frequency support mode is not limited to the above-described configuration, for example, the electric component release lottery It is good also as a structure which raises the probability that it will be elected electrification opening. In addition, a secured time (e.g., on the display part 44 for an accessory based on a winning to the through gate 35) that is secured after the next electric character opening lottery is performed after the electric character releasing lottery is performed once. In the configuration in which multiple types of variable display time) are prepared, the short support time is more easily selected in the high frequency support mode or the average secure time is shorter than in the low frequency support mode. May be. Further, the number of times of opening is increased, the opening time is lengthened, and the secured time that is secured when the next electric winning combination opening lottery is performed after the first electric winning combination releasing lottery is shortened (that is, , Shorten the one time variable display time in the display 44 for an accessory), shorten the average time of the reserved time and increase the winning probability, apply any one condition or any combination of conditions Thus, the advantage of the high frequency support mode over the low frequency support mode may be increased.

  The game result distribution destination for the big hit type counter C2 is stored as a distribution table (distribution information group) in the distribution table storage area 103b as the distribution information group storage means in the ROM 103. Then, as such distribution destinations, the most advantageous jackpot result (high probability corresponding special game result), high winning low probability big winning result (low probability corresponding special gaming result), low winning low probability big hit result (explicit low probability corresponding game) Result) and a low winning high probability big hit result (a game result corresponding to an explicit high probability or a result that suddenly changes into a probability state) are set.

  The most advantageous jackpot result is a jackpot result in which the opening / closing execution mode becomes the high-frequency winning mode, and after the opening / closing execution mode ends, the winning / raising lottery mode becomes the high probability mode and the support mode becomes the high-frequency support mode. These high-probability mode and high-frequency support mode are continued until the lottery result in the success / failure lottery wins a big win and the game shifts to a big win state.

  The high winning low probability big hit result is a big hit result in which the open / close execution mode becomes the high frequency win mode, and after the open / close execution mode ends, the winning lottery mode becomes the low probability mode and the support mode becomes the high frequency support mode. is there. However, the high-frequency support mode shifts to the low-frequency support mode when the number of games reaches the first end reference number (specifically, 100 times) after the shift.

  The low winning low probability big hit result is a big hit result in which the open / close execution mode becomes the low frequency winning mode, and after the open / close execution mode ends, the winning lottery mode becomes the low probability mode and the support mode becomes the high frequency support mode. is there. However, the high-frequency support mode shifts to the low-frequency support mode when the number of games reaches the second end reference number (specifically, 50 times) different from the first end reference number after the shift.

  The low winning high probability big hit result is a big hit result in which the opening / closing execution mode becomes the low frequency winning mode, and the winning lottery mode becomes the high probability mode after the opening / closing execution mode ends. The high-probability mode is continued until the lottery result in the success / failure lottery becomes a big win and the game shifts to the big win state.

  Note that the normal game state in relation to each of the above-described game states refers to a state in which the success / failure lottery mode is the low probability mode and the support mode is the low frequency support mode, not the open / close execution mode.

  In the distribution table, among the values of the big win type counter C2 of “0 to 29”, “0 to 9” corresponds to the high winning low probability winning result, and “10 to 11” is the low winning low likelihood winning result. "12-14" corresponds to the low winning high-precision jackpot result, and "15-29" corresponds to the most advantageous jackpot result.

  As a kind of high-accuracy big hit result, the open / close execution mode becomes the low-frequency winning mode, and after the open / close execution mode ends, the winning lottery mode becomes the high probability mode, and the support mode is maintained in the previous mode. An implicit low winning high probability jackpot result (a game result corresponding to an implicit high probability or a result of a latent probability changing state) may be included. In this case, the jackpot result can be further diversified.

  Furthermore, as a kind of losing result in the winning / losing lottery, there may be included a special losing result that shifts to the opening / closing execution mode of the low-frequency winning mode and that does not shift to the winning / losing lottery mode and the support mode after the completion. . In the configuration where both the above-mentioned non-explicit low winning high-probability results and special out-of-game results are set, the switching execution mode shifts to the low-frequency winning mode, and the support mode is the previous mode. It is common to be maintained. On the other hand, due to the difference in the transition mode of the winning / failing lottery mode, for example, when one of an unspecified low winning high probability winning result or a special losing result occurs in the normal gaming state, it actually corresponds to any result It is possible to make the player predict whether the player is doing.

  The MPU 102 identifies the jackpot result corresponding to the jackpot type counter C <b> 2 by referring to the distribution table, and sets a jackpot flag corresponding to the identified jackpot result in the RAM 104. In this way, it is possible to specify whether or not the jackpot flag is determined by checking the presence or absence of the jackpot flag. If there is a jackpot flag, the type of the jackpot result can be specified by checking the type. it can.

  For example, the reach random number counter C3 is incremented one by one within a range of 0 to 238, for example, and reaches a maximum value and then returns to 0. The reach random number counter C3 is periodically updated and stored in the reserved ball storage area 104b at the timing when the game ball wins the upper operation port 33 or the lower operation port 34.

  Here, in the pachinko machine 10, reach display is set as a kind of display effect in the symbol display device 41. The reach display includes a symbol display device 41 capable of performing variable display (or variable display) of symbols (patterns), and variable display in game times in which the opening / closing execution mode of the variable winning device 32 is the high-frequency winning mode. In the gaming machine in which the subsequent stop display result is a special display result, the stage before the stop display result is derived and displayed after the variable display (or variable display) of the symbol (picture) in the symbol display device 41 is started, This means a display state for making the player think that a variable display state is likely to result in a special display result.

  In the reach display, a combination of jackpot symbols corresponding to the occurrence of the high-frequency winning mode is obtained by stopping and displaying symbols for some of the symbol rows displayed on the display screen of the symbol display device 41. A display state is displayed in which combinations of reach symbols that may be established are displayed, and in that state, symbols in the remaining symbol rows are displayed in a variable manner. In addition, in the state where the combination of reach symbols is displayed as described above, the variation display of symbols is performed in the remaining symbol columns, and a reach effect is performed by displaying a predetermined character or the like as a moving image in the background image. In addition, there are those that perform a reach effect by displaying a predetermined character or the like as a moving image on substantially the entire display screen after reducing or not displaying a combination of reach symbols.

  The reach display is executed regardless of the value of the reach random number counter C3 in the game times that shift to the opening / closing execution mode that becomes the high-frequency winning mode. In game times that do not shift to the open / close execution mode, the reach random number counter C3 acquired at a predetermined timing with reference to the reach table stored in the reach table storage area 103c of the ROM 103 corresponds to the occurrence of reach display. Will be executed if.

  The variation type counter CS is, for example, incremented by 1 within a range of 0 to 198, and returns to 0 after reaching the maximum value. The variation type counter CS is updated in each of a main process and a timer interrupt process, which will be described later, and at the time of determining a variation pattern at the time of starting the variation display of the pattern on the main display unit 43 and at the time of starting the variation of the symbol by the symbol display device 41. The value of the variation type counter CS is acquired.

  The variation pattern includes a variation display time (display duration) of the pattern on the main display unit 43 and a variation display time (display duration) of the symbol on the symbol display device 41. That is, it can be said that the variation type counter CS is a counter used for determining each variation display time.

  For example, the electronic random number counter C4 is incremented by 1 in the range of 0 to 250, and returns to 0 after reaching the maximum value. The electronic combination random number counter C4 is periodically updated and stored in an electronic combination holding area 104c provided in the RAM 104 at a timing when a game ball wins the through gate 35. Then, at a predetermined timing, a lottery is performed as to whether or not to control the electric accessory 34a to the open state based on the value of the stored electric random number counter C4.

  Here, the RAM 104 is provided with a game information storage area 104d. In the game information storage area 104d, information for specifying the current game state, specifically, information for specifying whether or not it is the open / close execution mode, information for specifying the winning / losing lottery mode, support Information for specifying a mode, a jackpot flag, information on a prize ball command, and the like are stored. Thereby, MPU102 can grasp | ascertain the present game state based on the information stored in the game information storage area 104d.

<About various processes executed by the MPU 102>
Next, each process performed in order to advance a game in MPU102 is demonstrated. The processing of the MPU 102 is broadly classified into main processing that is started when the power is turned on and timer interrupt processing that is started periodically (in this embodiment, at a cycle of 4 msec).

  Here, the MPU 102 constantly monitors the reset signal from the reset circuit 153 in the power interruption state. Then, the MPU 102 determines that the power is turned on based on the fall of the reset signal, and executes the main process.

<Main processing>
First, the main process will be described with reference to the flowchart of FIG.

  First, in step S101, power-on wait processing is executed. In the power-on wait process, for example, the process waits without progressing to the next process until 1 sec elapses after the main process is activated. In the subsequent step S102, access to the RAM 104 is permitted, and in step S103, the internal function register of the MPU 102 is set.

  Thereafter, in step S104, it is determined whether or not the RAM erase switch 135 provided on the power supply and launch control board 121 is manually operated. In subsequent step S105, the power failure flag is set in the power failure flag storage area 104e of the RAM 104. It is determined whether or not. The power failure flag is a flag that is set when a power failure occurs in a situation where the MPU 102 is executing a game-related process (timer interrupt process).

  In step S106, a checksum calculation process for calculating a checksum is executed. In subsequent step S107, whether or not the checksum matches the checksum stored when the power is turned off, that is, the validity of the stored data is checked. judge.

  In the pachinko machine 10, for example, when RAM data is initialized when the power is turned on, such as when a game hall starts business, the power is turned on while the RAM erase switch 135 is pressed. Therefore, if the RAM erase switch 135 is pressed, the process proceeds to step S108. Similarly, when the information on occurrence of power shutdown is not set, or when an abnormality of data stored and held is confirmed by the checksum, the process proceeds to step S108. In step S108, various information stored in the RAM 104 is cleared as initialization of the RAM 104. Thereafter, the process proceeds to step S109.

  On the other hand, if the RAM erase switch 135 has not been pressed, the process proceeds to step S109 without executing the process of step S108 on condition that the power failure flag is set and the checksum is normal. In step S109, a power-on setting process is executed. In the power-on setting process, a predetermined area of the RAM 104 such as initialization of a power failure flag is set to an initial value, and a command corresponding to the current gaming state is transmitted to the sound emission control device 72 in order to recognize the current gaming state. To do. In addition, an interrupt permission is set to permit the generation of timer interrupt processing.

  Then, it progresses to the residual process of step S110-step S112. That is, the MPU 102 is configured to periodically execute the timer interrupt process, but a remaining time is generated between one timer interrupt process and the next timer interrupt process. The remaining time varies depending on the processing completion time of each timer interruption process, but the remaining processes in steps S110 to S112 are repeatedly executed using such irregular time. In this regard, it can be said that the remaining processes in steps S110 to S112 are non-periodic processes that are performed irregularly.

  In the remaining process, first, in step S110, an interrupt prohibition setting is performed to prohibit the generation of the timer interrupt process. In subsequent step S111, update processing of the variation type counter CS and the random number initial value counter CINI is executed. In these update processes, the current numerical information is read from the corresponding counter in the RAM 104, and the process of adding 1 to the read numerical information is executed, and then the process of overwriting the read-out counter is executed. In this case, each counter value is cleared to “0” when it reaches the maximum value. Thereafter, in step S112, an interrupt permission setting for switching from a state in which the generation of the timer interrupt process is prohibited to a state in which it is permitted is performed. If the process of step S112 is performed, it will return to step S110 and will repeat the process of step S110-step S112.

  Here, as described above, in the remaining process, only the update process of the variation type counter CS and the random number initial value counter CINI is set so as to be sandwiched between the interrupt disable process and the interrupt enable process. The timing at which the interrupt process is started is always immediately before step S110. Then, after the timer interrupt process is completed, it is only necessary to start from step S110, and the return address after the timer interrupt process is unambiguous. Therefore, it is not necessary to store the current return address at the start of the timer interrupt process, and the processing load at the start of the timer interrupt process is reduced.

  In addition, since the timer interrupt process does not occur during the calculation of predetermined data in the MPU 102, the save process to the RAM 104 of the data stored at that time in the register of the MPU 102 at the start of the timer interrupt process Similarly, there is no need to execute the process of restoring data to the register of the MPU 102 when the timer interrupt process ends. Therefore, the processing load at the start of the timer interrupt process is reduced, and the processing load at the end of the timer interrupt process is also reduced.

  In addition, since timer interrupt processing is not started during the update of the random number initial value counter CINI or during the update of the variation type counter CS, these counters are not updated during the timer interrupt processing. It is possible to prevent numerical information from being acquired and further update processing from being executed.

<Timer interrupt processing>
Next, timer interrupt processing will be described with reference to the flowchart of FIG.

  First, in step S201, a power failure information storage process is executed. In the power failure information storage process, the reset signal output from the reset circuit 153 is monitored, and when the rising edge of the reset signal is specified, the power failure process is executed.

  The power failure process will be specifically described. First, a power failure flag is set in the power failure flag storage area 104e of the RAM 104. Then, a process for calculating and saving the RAM determination value at that time is executed, and thereafter access to the RAM 104 is prohibited. Then, the infinite loop is continued until the power supply is completely cut off.

  Here, the RAM 104 to be stored in the power failure process includes a holding ball storage area 104b, a power combination holding area 104c, and a game information storage area 104d. As a result, even if a power outage occurs during the period in which the game is being performed, it is possible to return to the gaming state before the power outage after returning from the power outage, giving the player an unexpected disadvantage. It can be avoided.

  As a specific configuration for detecting the rising edge of the reset signal, for example, the state of the current reset signal is stored every time the timer interrupt process is performed, and the signal form of the reset signal in the previous timer interrupt process and the current time The signal form of the reset signal is compared. In this case, the rising edge of the reset signal is specified based on the fact that the previous reset signal is the LOW signal and the current reset signal is the HI signal.

  Further, the present invention is not limited to the above configuration, and for example, a dedicated circuit for setting a power failure flag in the power failure flag storage area 104e of the RAM 104 may be separately provided in synchronization with the rising edge of the reset signal.

  In subsequent step S202, a lottery random number update process is executed. In the lottery random number updating process, the big hit random number counter C1, the big hit type counter C2, the reach random number counter C3, and the electric random number counter C4 are updated. Specifically, after executing the process of sequentially reading the current numerical information from the jackpot random number counter C1, the jackpot type counter C2, the reach random number counter C3, and the electric random number counter C4, and adding 1 to each of the read numerical information, A process of overwriting the reading source counter is executed. In this case, various counters other than the jackpot random number counter C1 are each cleared to “0” when the counter value reaches the maximum value. The jackpot random number counter C1 is set to the counter value of the random number initial value counter CINI at that time when the counter value reaches the maximum value.

  Thereafter, in step S203, update processing of the variation type counter CS and the random number initial value counter CINI is executed in the same manner as in step S111.

  In subsequent step S204, port output processing is executed. In the port output process, when the output information is set in the previous timer interrupt process, a process for performing output corresponding to the output information to the various drive units 32a and 34b is executed. For example, when the information for switching the variable winning device 32 to the open state is set, the output of the drive signal to the variable winning drive unit 32a is started, and when the information for switching to the closed state is set. The output of the drive signal is stopped. When the information for switching the electric accessory 34a of the lower working port 34 to the open state is set, the output of the drive signal to the electric accessory driving unit 34b is started, and the information to be switched to the closed state is set. If so, the output of the drive signal is stopped.

  In a succeeding step S205, a reading process is executed. In the reading process, signals other than the reset signal and the winning signal are read, and the read information is stored for use in future processing.

  In the subsequent step S206, a signal received from each of the winning detection sensors 105a to 105d is read, and a winning detection process for performing a process corresponding to the read information is executed. Specifically, based on the detection signals of the winning detection sensors 105a to 105d, it is determined whether or not winning has been made to each winning opening corresponding to the winning detection sensors 105a to 105d. When it is specified that a winning has occurred, a flag for specifying the winning is set in the RAM 104.

  Thereafter, in step S207, timer update processing for updating the numerical information of predetermined timer counters provided in the RAM 104 collectively is executed.

  In step S208, a launch control process for executing launch control of the game ball is executed. Specifically, it is determined whether or not the firing operation device 55 is operated. If it is determined that the firing operation device 55 is operated, a firing command is output to the power supply and firing control device 79. The launch control module 133 of the power source and launch control device 79 executes a process for controlling the game ball launch mechanism 51 when the launch command is received.

  In the subsequent step S209, special figure special electric control processing for performing execution control of game times and execution control of the opening / closing execution mode is executed. In the special figure special power control process, when a winning to the upper working port 33 or the lower working port 34 occurs in a situation where the number of pieces of holding information stored in the holding ball storage area 104b is less than the upper limit number, Is executed to store the numerical information of the jackpot random number counter C1, the jackpot type counter C2 and the reach random number counter C3 as hold information in the hold ball storage area 104b in time series.

  Also, in the special figure special electric control process, whether or not the hold information corresponds to the big win is determined on the condition that the hold information is not stored during the game rotation and the opening / closing execution mode and is stored. If it corresponds to the process and the jackpot winning, a distribution determination process for determining which jackpot result the hold information corresponds to is executed.

  Furthermore, in the special figure special power control process, not only the success / failure determination process and the distribution determination process, but also if the hold information does not correspond to the big win, whether or not the hold information corresponds to the occurrence of reach. A reach determination process is performed, and a duration selection process for selecting the duration of the game times using the numerical information of the variation type counter CS at that time is executed.

  Then, the variation pattern command including the duration information corresponding to the result of each processing and the type command including the game result information are transmitted to the sound emission control device 72 and the pattern variation in the main display unit 43 is also transmitted. Start display. As a result, one game is started, and an effect for the game is started on the main display unit 43 and the symbol display device 41.

  If the jackpot is won, or if the jackpot is not won and the result of the reach determination process is a result corresponding to the occurrence of reach, the game information is continued using the numerical information of the variation type counter CS. By determining the duration corresponding to the occurrence of reach display as the time, it is possible to specify the type of reach display from the variation pattern command on the voice light emission control device 72 side.

  Also, in the special figure special electric control process, during the execution of one game round, it is determined whether or not it is the end timing of the game round. If it is the end timing, the display corresponding to the game result is performed. Then, the process of ending the game round is executed. In this case, a final stop command indicating that the game round should be ended is transmitted to the sound emission control device 72.

  Further, in the special figure special electric control process, when the result of the game times is a result corresponding to the transition to the opening / closing execution mode, a process for starting the opening / closing execution mode is executed. At the start, an opening command indicating that the opening / closing execution mode is started is transmitted to the sound emission control device 72.

  In the special figure special electric control process, a process for starting each round game and a process for ending each round game are executed. In each of these processes, an open command indicating that the round game is started is transmitted to the sound emission control device 72, and a close command indicating that the round game is ended is transmitted to the sound light emission control device 72.

  Further, in the special figure special electric control process, when the opening / closing execution mode is ended, an ending command indicating the fact is transmitted to the sound emission control device 72, and the success / failure lottery mode and the support mode after the opening / closing execution mode are set. Execute the process.

  After executing the special figure special electric control process of step S209 in the timer interruption process, the normal figure normal electric control process is executed in step S210. In the general-purpose power control process, when winning through the through gate 35 occurs, a process for obtaining numerical information of the electric random number counter C4 is executed and the numerical information is stored. The numerical value information is determined to be opened, and further, the opening determination is used as a trigger to execute a process for performing a general-purpose effect. Moreover, the process which opens and closes the electrically-driven accessory 34a of the lower working port 34 based on the result of opening determination is performed.

  In the subsequent step S211, the output information for updating the display content of the main display unit 43 is set based on the processing results of the immediately preceding steps S209 and S210, and the display content of the accessory display unit 44 is updated. Set the output information for

  In the subsequent step S212, a demonstration display process is executed for setting the display content of the symbol display device 41 for standby display in a situation where both the game times and the opening / closing execution mode are not executed.

  In step S213, the contents of the command and signal received from the payout control device 78 are confirmed, and a payout state receiving process for performing processing corresponding to the confirmation result is executed. In a succeeding step S214, a payout output process for setting a prize ball command as an output target is executed.

  In subsequent step S215, external information setting processing is executed so as to control the start and end of output of an external signal in accordance with the processing results of various processing executed in the current timer interrupt processing.

  In step S216, an interrupt end declaration is set. The MPU 102 stipulates that once the timer interrupt process is started, an interrupt end declaration is set as one of the conditions for starting the next timer interrupt process. In step S216, the next timer interrupt process is set. Set interrupt termination declaration to enable execution of interrupt processing. In step S217, an interrupt permission is set to enable execution of the next timer interrupt process. Thereafter, the timer interrupt process is terminated.

  According to the embodiment described in detail above, the following excellent effects are obtained.

  A backup capacitor 132 is mounted on the power supply and launch control board 121. As a result, information relating to the game cannot be held by the main control board 101 alone. Therefore, it is possible to suppress an illegal act of modifying information related to a game, such as removing the main control board 101 at the time of power interruption and rewriting the information related to the game stored and held in the RAM 104 to restore the original information. Furthermore, it is possible to avoid missing a trace of the illegal act on the MPU 102 due to the blind spot caused by the backup capacitor 132 and to suppress the illegal act on the MPU 102 using the blind spot.

  In particular, the main control board 101 preferably has a one-layer structure on the mounting surface in order to easily inspect whether fraudulent acts are being performed. On the other hand, in the power supply and launch control board 121, the mounting surface may have a multilayer structure. For this reason, if it becomes impossible to mount other elements by providing the backup capacitor 132 on the power supply and launch control board 121, it is possible to cope with this by making the mounting surface a multilayer structure. Thereby, each said fraudulent act can be suppressed, ensuring a scalability.

  In the configuration in which the backup capacitor 132 is provided on the power supply and launch control board 121, the limiting resistor 152 is provided on the common path EL4 that is a common path between the charging path EL2 and the power supply path EL3 for power interruption. As a result, the current generated in the charging path EL2 based on the transition from the power-off state to the power-on state, and the backup generated in the power supply path EL3 for power interruption by connecting the harness H in the power-off state. The current based on the residual charge of the capacitor 132 can be limited. As a result, it is possible to avoid the generation of a large current based on the two events with one resistor, and to simplify the configuration.

  In particular, the limiting resistor 152 is provided in the charging path EL2, and is not provided in the power supply path EL1 for turning on electricity. Thereby, after the charging of the backup capacitor 132 is completed, power can be supplied to the MPU 102 without passing through the limiting resistor 152. As a result, power loss due to current flowing through the limiting resistor 152 can be reduced.

  Further, since charges remain in the second connection line 146 of the harness H, when the harness H is connected at the time of power interruption, a current based on the charge remaining in the second connection line 146 flows toward the MPU 102. The MPU 102 may malfunction or be destroyed. On the other hand, according to the present embodiment, the limiting resistor 152 is mounted on the main control board 101, specifically, the main second bus 145 between the harness H (second connection line 146) and the MPU 102. . Thereby, even when the current based on the electric charge remaining in the second connection line 146 flows into the MPU 102 when the harness H is attached, the current is limited by the limiting resistor 152. Thereby, the large current accompanying attachment of the harness H can be suppressed more suitably.

  Further, the charging path EL2 is formed by connecting the harness H. In other words, charging of the backup capacitor 132 by the power supply module 131 without connecting the harness H is regulated. As a result, the backup capacitor 132 is not charged when the harness H is not connected even in the power-on state. Therefore, by avoiding unintentional charging of the backup capacitor 132, it is possible to avoid electric shock and useless power loss.

  That is, if the backup capacitor 132 can be charged with the harness H not connected, the power switch 134 is erroneously turned on from OFF in a situation where the inspection is performed with the harness H removed. The backup capacitor 132 starts to be charged and there is a risk of electric shock. Furthermore, the electric power based on the charging is easily consumed naturally without being supplied to the MPU 102. For this reason, useless power loss occurs and there is a concern that the life of the backup capacitor 132 may be reduced.

  In this regard, according to the above configuration, the charging of the backup capacitor 132 can be regulated by removing the harness H. As a result, unintended charging can be avoided, and inconveniences as described above can be avoided.

  In particular, when the power supply and launch control board 121 and the main control board 101 are inspected, the harness H is likely to get in the way, so the harness H is generally removed before the inspection. That is, the removal of the harness H can be said to be an essential operation in the inspection. In addition, by making the essential operation in the case of performing the inspection a configuration for regulating the charging of the backup capacitor 132, the unintended charging can be regulated easily and reliably.

  Further, when the backup capacitor 132 can be charged with the harness H not connected, if the inspection is performed while the power is supplied from the power supply module 131, the backup capacitor 132 is in a state where the charging is completed. maintain. Then, when the harness H is connected in this state (in a power-on state and the charging of the backup capacitor 132 has been completed), an instantaneous large current accompanying the connection does not escape to the charging path EL2, and the MPU 102 It will flow. For this reason, the MPU 102 malfunctions or is damaged.

  On the other hand, by restricting charging of the backup capacitor 132 by removing the harness H, the backup capacitor 132 can be set in a discharged state (natural discharge state). Thereby, it is possible to avoid connection of the harness H to each of the boards 101 and 121 in a state where charging is completed. Therefore, the current accompanying the connection of the harness H in the power-on state can be released to the backup capacitor 132 side, and the above inconvenience can be avoided.

  A diode 151 is provided on the upstream bus 142a. Thereby, it is possible to suppress a reverse flow of a current based on the charge accumulated in the backup capacitor 132.

  In particular, by providing the diode 151 on the main control board 101, it is possible to restrict the charge accumulated in the backup capacitor 132 from moving to the power supply and launch control board 121 via the first connection line 143. . Thereby, generation | occurrence | production of the electromagnetic wave noise resulting from a charge moving the 1st connection line 143 can be suppressed.

  Here, in general, when changing the model of the pachinko machine 10, the game board 24 and the main control board 101 are exchanged, while the power supply and the launch control board 121 are used without exchange.

  Under such a premise, by providing the limiting resistor 152 and the diode 151 on the main control board 101, it is possible to suitably cope with a model change of the pachinko machine 10. That is, when the design of the MPU 102 or other circuit is changed in accordance with the model change, the specifications of the limiting resistor 152 and the diode 151 (resistance value for the limiting resistor 152, withstand voltage and upper limit current value for the diode 151) May need to be changed. In this case, since the limiting resistance 152 and the diode 151 are provided on the main control board 101, when changing the model, only the circuit configuration of the main control board 101 is changed including the specification change of the limiting resistance 152 and the diode 151. It is only necessary to change the circuit configuration of the power supply and launch control board 121. For this reason, it is possible to cope with the change in the specifications by exchanging only the main control board 101, and the model of the pachinko machine 10 can be easily changed.

  Further, the board box 71a that accommodates the main control board 101 is configured to be unopenable. As a result, by replacing the limiting resistor 152 with a resistance smaller than the resistance value of the limiting resistor 152, a non-standard current is passed through the RAM 104 to try to alter the information about the game stored and held in the RAM 104. Fraudulent acts can be suppressed.

<Second Embodiment>
In the present embodiment, the configuration of the main control board 101 and the configuration relating to the supply of power to the MPU 102 are different from those in the first embodiment. Therefore, the configuration will be described in detail below. In the following description, differences from the first embodiment will be mainly described, and the same configurations as those in the first embodiment will use the same numbers as those in the first embodiment. Basically, the description is omitted. FIG. 12 is a circuit diagram showing a configuration for supplying power to the power and launch control board 121 and the main control board 101 in the present embodiment.

  First, the configuration of the main control board 101 will be described in detail.

  In addition to the ROM 103 and the RAM 104, the MPU 102 provided on the main control board 101 includes a VCC terminal (first terminal), a VBB terminal (second terminal), and a reset terminal.

  The main control board 101 is provided with a main first bus 201 (a single pattern is also referred to as a bus) for connecting the connection point of the main connector CN2 with the first connection line 143 and the MPU 102. The main first bus 201 is connected to the VCC terminal in the MPU 102. The VCC terminal is electrically connected to the power supply module 131 via the main first bus 201, the first connection line 143, and the power supply first bus 141. The + 5V power generated by the power supply module 131 is supplied to the VCC terminal, and the MPU 102 is operated by the power supplied to the VCC terminal, whereby the various processes described in the first embodiment are executed. The The power supplied to the VCC terminal is supplied to the RAM 104, and information is stored and held in the RAM 104.

  Also, the main control board 101 is provided with a main second bus 202 that connects the midway position in the main first bus 201 and the MPU 102, and the main second bus 202 is connected to the VBB terminal in the MPU 102. It is connected. The VBB terminal is electrically connected to the power supply module 131 via the main second bus 202, a part of the main first bus 201, the first connection line 143, and the power supply first bus 141. The + 5V power generated by the power supply module 131 is shunted at the connection point between the main first bus 201 and the main second bus 202 and supplied to the VBB terminal. The power supplied to the VBB terminal is supplied to the RAM 104, and information is stored in the RAM 104.

  That is, in the present embodiment, when the harness H is connected, the power supply module 131 → the power source side first bus 141 → the first connection line 143 → the main side first bus 201 is used as the power supply path EL11 for power-on. → A first power input path EL11a called a VCC terminal (MPU102) is formed, and the power supply module 131 → the power source side first bus 141 → the first connection line 143 → the part of the main side first bus 201 → the main side second A second charging path EL11b called bus 202 → VBB terminal (MPU102) is formed.

  A main third bus 203 is connected to a midpoint between the connection point of the main second bus 202 with the main first bus 201 and the VBB terminal. The other end of the main third bus 203 is connected to a connection point of the second connection line 146 in the main connector CN2. That is, the VBB terminal is electrically connected to the backup capacitor 132 via a part of the main side second bus 202, the main side third bus 203, the second connection line 146, and the power source side second bus 144.

  Therefore, when the harness H is connected, the backup capacitor 132 → the power source side second bus 144 → the second connection line 146 → the main side third bus 203 → the main side second as the power supply path EL13 for power interruption. A path of a part of the bus 202 → VBB terminal (MPU102) is formed, and as a charging path EL12 to the backup capacitor 132, the power supply module 131 → the power supply side first bus 141 → the first connection line 143 → the main side first. A path of part of the bus 201 → part of the main second bus 202 → main third bus 203 → second connection line 146 → power source second bus 144 → backup capacitor 132 is formed. In the power interruption state, information stored in the RAM 104 is stored by supplying power discharged from the backup capacitor 132 to the VBB terminal.

  In the following description, the portion from the connection point with the main first bus 201 to the connection point with the main third bus 203 in the main second bus 202 is also referred to as the upstream bus 202a. A portion from the connection point with the third bus 203 to the VBB terminal is also referred to as a downstream bus 202b.

  Also in the present embodiment, a diode 151 is provided in the upstream bus 202a in order to suppress the backflow of current from the backup capacitor 132 to the power supply module 131. The path from the main third bus 203 to the backup capacitor 132 via the second connection line 146 is common to the power supply path EL13 and the charging path EL12 for power interruption, and is common. A limiting resistor 152 is provided in the common path EL14 that is the path. Thereby, also in the present embodiment, it is possible to suppress the generation of a large current when the harness H is connected in a state where the backup capacitor 132 is charged and the residual charge exists in the backup capacitor 132.

  With the above circuit configuration, in the present embodiment, when charging of the backup capacitor 132 is completed in the power-on state, the power from the power supply module 131 is supplied to the MPU 102 via the VCC terminal and the VBB terminal. In the disconnected state, power is supplied from the backup capacitor 132 to the MPU 102 via the VBB terminal. The power supplied to the VBB terminal is supplied only to the RAM 104 in the MPU 102. As a result, the power supply destination is limited to the RAM 104 as compared with the configuration in which power is supplied to the entire MPU 102 in the power-off state, so that the period for storing the storage target in the RAM 104 can be lengthened, and at the time of power-off The capacity of the backup capacitor 132 serving as a power supply source can be reduced.

  A reset circuit 210 provided on the main control board 101 is connected to the reset terminal of the MPU 102. The reset circuit 210 monitors the power supplied from the power supply module 131 to the MPU 102. When the reset circuit 210 is equal to or higher than a predetermined voltage value (or current value) or less than a predetermined voltage value (or current value), This is a circuit for transmitting a reset signal to the MPU 102. The upstream side of the reset circuit 210 is connected to the main first bus 201. More specifically, the upstream side of the reset circuit 210 is connected to the power supply module 131 side rather than the connection point between the main side first bus 201 and the main side second bus 202. Then, the reset circuit 210 causes the reset signal to fall from the HI level signal to the LOW level signal when the voltage value of the power supplied from the power module 131 to the MPU 102 becomes +4.5 V or more as the predetermined voltage value. This causes the MPU 102 to recognize the reset signal. Further, when the predetermined voltage value is less than +4.5 V, the MPU 102 is made to recognize the reset signal by raising the reset signal from the LOW level signal to the HI level signal. The MPU 102 in this embodiment is configured to operate only when the reset signal is output as a LOW level signal. However, the output mode (switching mode) of the reset signal is not limited to this, and the relationship between the HI level signal and the LOW level signal may be reversed. In this case, the MPU 102 detects that the reset signal is the HI level signal. It is possible to operate only when it is output with.

  Further, the main control board 101 is provided with a power failure monitoring circuit 211. The power failure monitoring circuit 211 monitors the power supplied from the power supply module 131 to the MPU 102, and transmits a power failure signal to the MPU 102 so as to have a different signal form when it becomes less than a predetermined voltage value (or current value). Circuit. The power failure monitoring circuit 211 and the MPU 102 are connected via an input port 212 as a memory holding means provided in the main control board 101, and the upstream side of the power failure monitoring circuit 211 is connected to the main first bus 201. ing. More specifically, the upstream side of the power failure monitoring circuit 211 is connected to the main first bus 201 on the power supply module 131 side from the connection point between the main first bus 201 and the reset circuit 210. When the voltage value of the power supplied from the power supply module 131 to the MPU 102 is less than +4.7 V as the predetermined voltage value, the power failure monitoring circuit 211 outputs a power failure signal to the input port 212 as a power interruption state. The level signal rises to the HI level signal. Therefore, the MPU 102 can determine whether or not it is in a power failure state by monitoring the output mode of the power failure signal input to the input port 212. However, the output mode (switching mode) of the power failure signal is not limited to this, and the relationship between the HI level signal and the LOW level signal may be reversed. The main control board 101 may not have the input port 212, and the power failure monitoring circuit 211 may be connected to a port as a terminal of the MPU 102.

  Therefore, in the present embodiment, at the time of power-on, when the voltage value from the power supply module 131 becomes +4.5 V or more, the reset signal from the reset circuit 210 falls from the HI level signal to the LOW level signal. As a result, the main process (FIG. 10) as the startup process of the MPU 102 is started. Similar to the first embodiment, the lower limit value of the voltage necessary for the MPU 102 to perform normal operation is + 3.3V. That is, the reset circuit 210 is configured to allow the MPU 102 to start operation with a margin of + 1.2V from the lower limit value of the voltage value at which the MPU 102 can operate. Thereby, the MPU 102 can stably execute each process.

  At the time of power interruption, when the voltage value from the power supply module 131 becomes less than +4.7 V, the power failure signal from the power failure monitoring circuit 211 is switched to the HI level signal, and the MPU 102 is monitored by monitoring the input port 212. Performs a power failure information storage process. In the power failure information storage process (step S201 in FIG. 11) in the present embodiment, it is determined whether or not it is in a power failure state by checking the input port 212. When the power failure signal to the input port 212 is a HI level signal, that is, when the power supplied from the power source and the launch control board 121 is less than +4.7 V and is in a power interruption state, the power failure flag is stored in the RAM 104 as a power failure process. Is set, and the RAM determination value at that time is calculated and stored, and then the access to the RAM 104 is prohibited and the infinite loop is continued.

  When the voltage value is less than +4.5 V, the reset signal from the reset circuit 210 rises from the LOW level signal to the HI level signal, and the MPU 102 stops its operation.

  Here, a plurality of capacitors (not shown) are provided in the path from the commercial power supply to the power supply module 131 in the power supply and launch control board 121, and power of +4.5 V or more is supplied for a predetermined period even when the power is cut off. Supplied. That is, a specific period is specified between the time when the voltage value from the power supply module 131 is less than + 4.7V and the power failure monitoring circuit 211 inputs the power failure signal and the voltage value becomes less than + 4.5V. Specifically, it takes 10 seconds or more. As a result, the MPU 102 can execute the power failure process within the predetermined period.

  The bypass capacitor 154 in the present embodiment is provided in parallel to the MPU 102 side from the connection point of the main side first bus 201 with the main side second bus 202. However, in order to suppress noise in power supply to the RAM 104, it may be provided in parallel to the downstream bus 202b in the main second bus 202, or provided in both the main first bus 201 and the downstream bus 202b. Also good.

  According to the embodiment described in detail above, the following excellent effects are obtained.

  The MPU 102 is configured to supply power to the RAM 104 via the VCC terminal and the VBB terminal, and the power supply path EL13 for power interruption is connected to the VBB terminal. In addition, power is supplied to the entire MPU 102 from the VCC terminal, and power is supplied only to the RAM 104 from the VBB terminal. Thereby, in the power interruption state, the power supplied to the MPU 102 can be limited to the RAM 104, and the power consumption due to the discharge of the backup capacitor 132 can be reduced.

<Other embodiments>
In addition, it is not limited to the description content of each embodiment mentioned above, A various deformation | transformation improvement is possible within the range which does not deviate from the meaning of this invention. For example, you may change as follows. Incidentally, the configurations of the following different forms may be applied individually or in combination to the configurations of the above embodiments.

  (1) In each of the above embodiments, the present invention is applied to the power supply between the power source and the launch control board 121 and the main control board 101. However, the present invention is not limited to this, for example, between the power source and the launch control board 121 and the payout control device 78. The present invention may be applied to the power supply. That is, in the case of a power interruption state, electric power stored in the backup capacitor 132 is used to supply power to the RAM 78a that stores and holds information on the number of game balls to be paid out (prize ball number counter). Thereby, the information is erased at the time of power interruption, and it is possible to suppress giving an unexpected disadvantage to the player.

  (2) In addition, when information specifying a player is input to a predetermined input unit using a mobile phone or the like, for example, a predetermined game result (predetermined effect such as a specific performance being performed) In the configuration that sequentially stores (effect results) and outputs or displays a signal corresponding to the predetermined game result so that information regarding the predetermined game result can be obtained when a specific operation is performed. In addition, the predetermined game result may be backed up during a power failure.

  In addition, in the structure which employ | adopts the sound emission control apparatus 72 as what memorize | stores the said predetermined | prescribed game result, it is good to add the said sound emission control apparatus 72 to backup object.

  (3) In each of the above embodiments, the number of backup capacitors 132 is one. However, the number is not limited to this, and a plurality of capacitors may be combined. In this case, each capacitor is connected in parallel. Further, a backup of a plurality of control devices such as the main control device 71 and the payout control device 78 may be performed with one capacitor, or a corresponding backup capacitor may be provided separately for each of the control devices 71 and 78. Good.

  (4) In each of the above embodiments, the backup capacitor 132 is used as the charging / discharging means. However, any configuration can be used as long as charging / discharging can be performed. For example, various batteries such as a Li ion battery may be used.

  (5) In each of the embodiments described above, the limiting resistor 152 is set to be small within a range in which the generated large current is smaller than the allowable value, but is not limited thereto. For example, the resistance value of the limiting resistor 152 is set (high) so that the operating power is supplied to the MPU 102 regardless of the amount of charge accumulated in the backup capacitor 132 when the power is turned on. May be. As a result, the execution timing of the main process in the MPU 102 can be advanced.

  However, in view of power loss during charging and discharging, the resistance value of the limiting resistor 152 is preferably set to be small.

  (6) In each of the above embodiments, the diode 151 is provided in the upstream buses 142a and 202a. However, the present invention is not limited to this, and the diode 151 may not be provided. In this case, it is preferable to separately provide a circuit that absorbs a backflow current in the power supply module 131. However, from the viewpoint of simplification of the configuration and cost, the configuration in which the diode 151 is provided is preferable.

  (7) In each of the above embodiments, the power supply paths EL1 and EL11 for power-on and the charging paths EL2 and EL12 are partially shared. However, the present invention is not limited to this. Also good. Specifically, the power supply module 131 and the backup capacitor 132 are connected via the diode 151 and the limiting resistor 152 separately from the first path connecting the power supply module 131 and the MPU 102 via the harness H, and the first path. A second path to be connected. In addition, a third path is provided to connect the MPU 102 and a midway position between the diode 151 and the limiting resistor 152 in the second path, and a switching element is provided in the third path. When the power interruption state occurs, more specifically, when the current value (or voltage value) flowing through the first path becomes smaller than a predetermined lower limit value, the switching element is turned on. Configure. Even in this case, generation of a large current accompanying charging of the backup capacitor 132 or the like can be suppressed. In addition, when applying this structure to 2nd Embodiment, the 4th path | route which connects the midway position of the said 1st path | route and the midway position of the 3rd path | route is provided, and a 1st path | route is connected to the VCC terminal of MPU102. Connect the third path to the VBB terminal. And it is good to set it as the structure which supplies a power supply from the 3rd path | route to the VBB terminal side via a 4th path | route while supplying a power supply from the 1st path | route in a power-on state.

  Furthermore, according to the present configuration, in the first embodiment, the power supply path EL1 for turning on the power is the first path, and the power supply path EL3 for power interruption is the third path. In this case, power is supplied to the MPU 102 in two systems as in the second embodiment. For this reason, it is possible to identify whether the MPU 102 is in the power-on state or the power-off state based on the difference in the route through which power is supplied. Accordingly, since it is not necessary to provide the reset circuit 153, the configuration can be simplified.

  In this configuration, the harness H may be included in the second path, and the harness H may be included in the third path. When the harness H is included in the second path, two connection lines are provided so that the power of the power supply module 131 is once transmitted to the main control board 101 and can be returned to the power supply and launch control board 121 again. In this case, the diode 151 and the limiting resistor 152 may be mounted on either the power supply / launch control board 121 or the main control board 101.

  (8) In each of the above embodiments, the diode 151 may be provided on the power supply and launch control board 121, specifically, the power supply side first bus 141. According to this configuration, the number of elements mounted on the main control board 101 can be reduced by the amount that the diode 151 is not provided on the main control board 101. Thereby, the visibility to the MPU 102 and the reset circuit 153 can be improved, and illegal acts on these can be suppressed.

  (9) In each of the above embodiments, the limiting resistor 152 may be provided on the power source and launch control board 121, specifically, the power source side second bus 144. As a result, the visibility of the main control board 101 can be further improved. However, from the viewpoint of suppressing the current based on the charge remaining in the second connection line 146, a configuration in which the limiting resistor 152 is provided on the main control board 101 is preferable.

  (10) A first modification of the configuration for supplying power will be described with reference to FIGS. 13 and 14. FIG. 13 is a circuit diagram illustrating a configuration for supplying power when the first modification is applied to the first embodiment, and FIG. 14 is a circuit diagram illustrating the first modification according to the second embodiment. It is a circuit diagram which shows the structure for performing the electric power supply at the time of applying to a form.

  When applied to the first embodiment, as shown in FIG. 13, in the power supply and launch control board 121, the power supply side first bus 301 connecting the power supply module 131 and the power supply side connector CN1 is provided with a diode 151. ing. In addition, a series connection body including a limiting resistor 152 and a backup capacitor 132 is connected to a predetermined portion of the power source side first bus 301 on the downstream side of the diode 151. One end of the series connection body, specifically, one end of the backup capacitor 132 is grounded. In this case, the charging path EL22 is formed without using the harness H.

  The main control board 101 is formed with a main first bus 302 for connecting the main connector CN2 and the MPU 102. The harness H includes a first connection line 303 that connects the power-source side first bus 301 and the main-side first bus 302.

  According to such a configuration, by providing a series connection body of the limiting resistor 152 and the backup capacitor 132, a large amount is obtained when the harness H is connected in a state where the backup capacitor 132 is charged and a residual charge exists in the backup capacitor 132. Generation of current can be suppressed.

  Further, the charging path EL22 can be shortened by the amount that the charging path EL22 does not pass through the harness H. As a result, power loss due to wiring resistance or contact resistance of the connector can be reduced, and the period required for the startup of the MPU 102 can be shortened by improving the charging speed.

  In the above configuration, a part of the power source side first bus 301, the first connection line 303, and the main side first bus 302 constitute the power supply path EL23 for power interruption.

  Further, as a path for connecting the power supply module 131 and the reset circuit 153, the power supply and launch control board 121 is provided with a power supply side second bus 304, and the main control board 101 is provided with a main side second bus 305. It has been. And the harness H is provided with the 2nd connection line 306 which connects these. As a result, the reset circuit 153 can recognize whether the power is on or off.

  However, in this modification, since the limiting resistor 152 is not provided in the main control board 101, it is not possible to suppress the malfunction of the MPU 102 due to the current based on the charge remaining in the second connection line 306.

  When this modification is applied to the second embodiment, the configuration for supplying power is as follows.

  As shown in FIG. 14, on the power supply and launch control board 121 side, a diode 151 is provided in the power supply side first bus 301 connected to the power supply module 131, as in the case of applying to the first embodiment. A series connection comprising a limiting resistor 152 and a backup capacitor 132 is connected to a predetermined portion on the downstream side. One end of the series connection body is grounded. Therefore, as in the case of application to the first embodiment, the charging path EL22 is formed without using the harness H.

  On the main control board 101 side, the main first bus 201 is connected to the VCC terminal of the MPU 102, whereas the main first bus 302 is connected to the VBB terminal of the MPU 102. The main first bus 201 is connected to the second connection line 306 at the main connector CN2. The second connection line 306 is connected to the power supply side second bus 304 at the power supply side connector CN1.

  That is, by connecting the harness H to each of the connectors CN1 and CN2, the power supply module 131 → the power supply side second bus 304 → the second connection line 306 → the main side first bus 201 is used as the power supply path EL31 for power-on. The first power input path EL31a called the VCC terminal (MPU102) and the power module 131 → the first power supply side bus 301 → the first connection line 303 → the main first bus 302 → the second power supply path called the VBB terminal (MPU102). EL31b is formed. That is, the power supply path EL31 for turning on in this modification is formed as a different path from the power supply module 131 to the MPU 102 without being shunted in the middle of the path from the power supply module 131.

  The power supply path EL23 for power interruption is from the backup capacitor 132 → the limiting resistor 152 → a part of the power source side first bus 301 → the first connection line 303 → the main side first bus 302 → the VBB terminal (MPU102). It is formed.

  Similar to the second embodiment, the reset circuit 210 and the power failure monitoring circuit 211 are connected to the main first bus 201. The downstream side of the reset circuit 210 is connected to the reset terminal of the MPU 102, and the downstream side of the power failure monitoring circuit 211 is connected to the MPU 102 via the input port 212. Further, the bypass capacitor 154 is provided at a predetermined position of the main first bus 201.

  (11) A second modification of the configuration for supplying power will be described with reference to FIGS. 15 and 16. FIG. 15 is a circuit diagram showing a configuration for supplying power when the second modification is applied to the first embodiment, and FIG. 16 is a circuit diagram showing the second modification. It is a circuit diagram which shows the structure for performing the electric power supply at the time of applying to a form.

  When applied to the first embodiment, as shown in FIG. 15, a limiting resistor 152 is provided on the MPU 102 side of the diode 151 in the upstream bus 142a. The main second bus 145 is provided with a first diode 411 whose forward direction is the charging direction. A second diode 412 is provided in parallel to the series connection body including the limiting resistor 152 and the first diode 411. The second diode 412 is provided with the discharge direction as the forward direction.

  According to this configuration, the backup capacitor 132 is charged via the diode 151, the limiting resistor 152, and the first diode 411. On the other hand, the discharge current of the backup capacitor 132 is transmitted to the MPU 102 via the second diode 412 and the limiting resistor 152. Thereby, the limiting resistor 152 can be shared.

  In addition, according to the present modification, since the limiting resistor 152 is provided in the power supply path EL1 for power-on, it is in a power-on state (a state where power is supplied from the power supply module 131) and is backed up. In a situation where the charging of the capacitor 132 is completed, the malfunction of the MPU 102 caused by an instantaneous large current that may occur when the harness H is connected can be suppressed.

  When this modification is applied to the second embodiment, the configuration for supplying power is as follows.

  As in the case of application to the first embodiment, as shown in FIG. 16, the limiting resistor 152 is provided closer to the MPU 102 than the diode 151 in the upstream bus 202a. The first diode 411 is provided on the main third bus 203 with the charging direction as the forward direction. The second diode 412 is provided with the discharge direction as a forward direction so as to be parallel to the series connection body including the limiting resistor 152 and the first diode 411.

  Even in such a configuration, a moment that may occur when the harness H is connected in a state where the power is supplied (from the power supply module 131) and the backup capacitor 132 is fully charged. It is possible to prevent a large current from flowing into the RAM 104 of the MPU 102.

  (12) In the second embodiment, power is supplied to the entire MPU 102 via the VCC terminal and power is supplied to the RAM 104 in the MPU 102 via the VBB terminal. The supply may not be supplied to the RAM 104. Even in this case, in the power-on state, power is supplied from the power supply module 131 via the VCC terminal and the VBB terminal, so that power is supplied to the entire MPU 102 and the MPU 102 can operate. In the power interruption state, power is supplied to the RAM 104 from the backup capacitor 132 via the VBB terminal, so that stored information can be held in the RAM 104.

  (13) In the second embodiment, it is sufficient that the power failure monitoring circuit 211 can identify at least the power interruption state and the MPU 102 can recognize that the power interruption state has been identified. The connection point on the opposite side of the connection point to the power supply module 131 may be connected to any of the main side first bus 201, the first connection line 143, and the power source side first bus 141. May be connected to a route provided separately.

  Further, the power failure monitoring circuit 211 may be connected to a + 24V AC voltage line before the power supply module 131 converts, may be connected to a + 12V DC voltage line after conversion, and the converter is + 24V. The AC voltage may be converted into a + 24V DC voltage and connected to the + 24V DC voltage line. Furthermore, the power failure monitoring circuit 211 may be provided on the power supply and launch control board 121 side. In these cases, the power failure monitoring circuit 211 has a predetermined voltage value (or current) at which the voltage value (or current value) in the connected line is at least a voltage value (or current value) larger than the MPU 102 becomes inoperable. The power failure signal for the MPU 102 (input port 212) is raised to the HI level signal. A configuration in which the reset circuit 210 raises the reset signal to the HI level signal after a sufficient period (voltage value or current value drop period) during which the MPU 102 can execute power failure processing based on the rise of the power failure signal. It is good to do. From the viewpoint of reducing the influence of noise on the MPU 102, when the power failure monitoring circuit 211 is configured to monitor the AC voltage, the power failure monitoring circuit 211 may be provided on the power supply and launch control board 121 side.

  Furthermore, although the power failure monitoring circuit 211 is configured to be connected to the MPU 102 via the input port 212, it may be configured to be directly connected to the MPU 102. In this case, an NMI terminal (non-maskable interrupt terminal) is provided in the MPU 102 so that the process at the time of a power failure can be immediately executed even when other processing is being performed based on the fact that the power failure signal is raised to the HI level signal. It is preferable to connect to the NMI terminal. However, from the viewpoint of reducing the storage capacity during power failure processing, it is desirable that the connection be made via the input port 212.

  (14) In the second embodiment, the reset circuit 210 and the power failure monitoring circuit 211 are connected closer to the power supply module 131 than the connection point between the main first bus 201 and the main second bus 202. The connection point between the first bus 201 and the main second bus 202 may be connected to the MPU 102 side.

  (15) In the second embodiment, at the time of power interruption, the reset circuit 210 raises the reset signal when the voltage value applied to the MPU 102 is less than +4.5 V, and the power failure monitoring circuit 211 The power failure signal is activated when the voltage value is less than +4.7 V, which is the voltage value before the voltage becomes less than 4.5 V, but the voltage value that triggers the output (switching) of these signals. Is not limited to the above. Specifically, the voltage value for outputting (switching) each of these signals is less than the voltage value (+5.0 V) applied to the MPU 102 in the power-on state, and the voltage at which the MPU 102 can operate. A predetermined value larger than the value (+ 3.3V) may be used, and at least the MPU 102 is configured by a combination of a voltage value at which the reset circuit 210 raises the reset signal and a voltage value at which the power failure monitoring circuit 211 raises the power failure signal. It suffices if a period from the determination of the power interruption state to the execution of the power failure process is ensured. Moreover, if the period from when the MPU 102 identifies the power interruption state to the execution of the power failure process is ensured by the combination of these voltage values, a capacitor (not shown) on the power supply module 131 side at the time of the power interruption The supply power may not be maintained for a predetermined period.

  In addition, the reset circuit 210 is provided with a clock circuit capable of measuring a predetermined period longer than the period from when the MPU 102 identifies a power interruption state to the time of power failure processing, and the reset circuit 210 becomes less than a predetermined voltage value. A configuration may be adopted in which the reset signal is raised after a predetermined period of time has elapsed since the fact is specified. In this case, the voltage value monitored by the power failure monitoring circuit 211 and the voltage value monitored by the reset circuit 210 can be set to the same voltage value, and the reset circuit 210 monitors the voltage value monitored by the power failure monitoring circuit 211. It is also possible to make the voltage value smaller than the voltage value.

  (16) In the second embodiment, the reset circuit 210 is connected to the reset terminal of the MPU 102. However, the reset circuit 210 may be connected via the input port 212 in the same manner as the power failure monitoring circuit 211. It may be configured to be connected via an input port different from the port 212.

  (17) In each of the above embodiments, the ROM 103 and the RAM 104 are configured as one chip in the MPU 102. However, the present invention is not limited to this, and each may be configured as a separate chip. In this case, in each of the paths 142, 145, 201, 202, and 203 for supplying power to the main control board 101, power may be supplied to the CPU, and the CPU may supply power to the RAM 104. It is good also as a structure which supplies electric power separately to both RAM104.

  (18) In each of the above embodiments, each information in the RAM 104 is stored and held at the time of power interruption. However, some information such as hold information and information for specifying the current gaming state is stored and held. A configuration in which information is not stored and held may be employed. In this case, a storage area for power interruption is provided in the RAM 104, and in the power failure process, the part of the information is stored in the storage area for power interruption, and the power from the backup capacitor 132 is changed to the power interruption time. Supply to the storage area. As a result, the power loss can be reduced by reducing the target information to be stored and held in the power interruption state, and the period during which the backup capacitor 132 can be stored and held can be extended. In this case, in the main process, the return process is executed based on the information stored in the storage area for power interruption.

  (19) In the above embodiments, the power supply and launch control board 121 is provided with the power supply side connector CN1, the main control board 101 is provided with the main side connector CN2, and is detachably attached to the connectors CN1 and CN2. Although it was set as the structure which provides the harness H, it is not restricted to this, By providing a connector only in one board | substrate among each board | substrate 101,121, while making the harness H detachable, in the other board | substrate by soldering etc. It is good also as composition which fixes harness H. In short, the harness H should just be comprised so that attachment or detachment is possible in at least one of each board | substrate 101,121.

  Moreover, it is good also as a structure which connects both by fixing wiring to each board | substrate 101,121 by soldering etc. FIG. In this case, when the inspection is performed, the wiring is cut or the soldering is broken to remove the wiring. When the inspection is completed, the cut wiring is reconnected or a new wiring is soldered to each of the substrates 101 and 121. However, if attention is paid to the ease of inspection, a configuration in which a detachable harness H is provided is better.

  (20) In each of the above-described embodiments, the power supply and launch control board 121 is equipped with the power supply module 131 and the backup capacitor 132 to supply power, and the launch control module 133 that controls the launch of the game ball is provided. However, the present invention is not limited to this, and a substrate on which the power supply module 131 and the backup capacitor 132 are mounted and a substrate on which the launch control module 133 is mounted may be provided separately. However, in view of simplification of the configuration, a configuration in which both are mounted on one substrate is preferable.

  (21) Other types of pachinko machines different from the above-described embodiments, such as pachinko machines that release a predetermined number of times when a game ball enters a specific area of a special device, or game balls in a specific area of a special device The present invention can also be applied to a pachinko machine that generates a right if a player enters, a pachinko machine equipped with other objects, an arrangement ball machine, a sparrow ball, and other gaming machines.

  Also, a non-ball-type gaming machine, for example, a plurality of reels with a plurality of types of symbols attached in the circumferential direction, starts rotation of the reel by inserting a medal and operating a start lever, and a stop switch is operated. The slot machine that gives the player a privilege such as paying out medals when the rotation of the reel is stopped and a specific symbol or a combination of specific symbols is established on the effective line visible from the display unit. The invention can be applied. In this case, in the configuration in which information regarding the number of medals to be paid out is stored, the information may be a backup target.

  In addition, based on a predetermined trigger, for example, the operation of the start lever, a lottery is performed as to whether or not to stop display of a specific symbol or a combination of specific symbols, and the specific symbol or the specific symbol is selected only when the lottery is won. It is good also as a structure which becomes possible to carry out the stop display of the combination of a symbol. In this configuration, information for specifying the lottery result may be a backup target.

  In addition, in a configuration in which a regular bonus or a big bonus with a large number of medals to be paid out to the player is set as an advantageous state advantageous to the player, information for specifying that each bonus is being used is backed up. It may be a target.

  Furthermore, as a bonus game, a replay time game (hereinafter referred to as an RT game) in which the replay probability is increased over a predetermined game (for example, 30 games) from the next time may be newly provided. In this case, information for specifying the MPU 102 to be an RT game may be a backup target.

  In addition, the gaming machine main body that is supported by the outer frame so as to be openable and closable is provided with a storage unit and a capture device, and the start lever is operated after a predetermined number of game balls stored in the storage unit are captured by the capture device. Thus, the present invention can also be applied to a gaming machine in which a pachinko machine and a slot machine are fused, which starts rotating the reel.

<Invention Group Extracted from Each Embodiment>
Hereinafter, the characteristics of the invention group extracted from each of the above-described embodiments will be described while showing effects and the like as necessary. In the following, for easy understanding, the corresponding configuration in each of the above embodiments is appropriately shown in parentheses, but is not limited to the specific configuration shown in parentheses.

<Feature A group>
Feature A1. A first board (main control board 101) on which control means (MPU102) for storing and holding the information is stored while power is supplied to the game board. When,
A second board (power supply and launch control board 121) on which power supply means (power supply module 131) that can be switched between a supply state in which power can be supplied to the control means and an interruption state in which power cannot be supplied to the control means is mounted. )When,
Transmission means (harness H) that is used for power transmission between the first board and the second board and is attachable to and detachable from at least one of the boards.
In a gaming machine equipped with
The second substrate has charging / discharging means (backup capacitor 132) that is in a charged state in which charges are accumulated when power is supplied, and in a discharged state in which charges are discharged when power is not supplied. Installed,
As a route for transmitting power,
A first path (charging paths EL2, EL12) for electrically connecting the charging / discharging means and the power supply means;
A path formed by attaching the transmission means, and a second path (electric power supply path EL3, EL13 for power interruption) electrically connecting the charge / discharge means and the control means;
With
The charge / discharge means includes
While the power supply means is in the supply state, power is supplied from the power supply means via the first path, and the charge state is obtained.
When the power supply means is in the power-off state, the power supply means supplies power to the control means via the second path by entering the discharge state.
At least a part of the first route and the second route is configured as a common route;
A gaming machine, wherein a limiting resistor for limiting a current flowing through each of the paths is provided in the common path.

  According to the feature A1, in the situation where the first path and the second path are formed, when the power supply unit is in the supply state, power is supplied to the charging / discharging unit via the first path, and the charging / discharging unit It becomes the charge state to accumulate. On the other hand, when the power supply means is cut off, power supply from the power supply means is stopped, and the charge / discharge means is in a discharge state in which charges are discharged. Thereby, electric power is supplied to the control means via the second path. Therefore, information relating to the game is stored and held even in a power interruption state.

  Here, if the charging / discharging means is provided on the first substrate, it is possible to supply power to the control means by the first substrate alone. For this reason, fraudulent acts such as rewriting information on games stored and held in the control means are likely to be performed.

  Further, the charge / discharge means tends to be large due to the property of accumulating charges. For this reason, when the charging / discharging means is provided on the first substrate on which the control means that is likely to be the target of fraudulent activity is provided, there may be a problem that the charging / discharging means obstructs the trace of the fraudulent act. However, due to the mounting area of the first substrate, it is difficult to place the charging / discharging means away from the control means so that the control means can be easily seen.

  On the other hand, according to this feature, since the charging / discharging means is provided on the second substrate on which the power supply means is mounted, the power supply by the charging / discharging means can be realized while avoiding the above-described disadvantages. Can do.

  In such a configuration, in a situation where the transmission means is attached and no charge is accumulated in the charging / discharging means, when the power supply means is in the supply state, the current related to the charging / discharging means charging ( Inrush current) flows. In addition, when the transmission unit is attached in a state where the power source unit is in a power-off state and electric charges are accumulated in the charging / discharging unit, the current caused by the electric charges accumulated in the charging / discharging unit is supplied to the first path and the second path. It flows in both directions.

  On the other hand, according to this feature, since the limiting resistance is provided in the common path, each current based on each event as described above is limited by the limiting resistance. Thereby, when each of the above events occurs, it is possible to suppress a large current from flowing instantaneously in each path, thereby preventing the power supply means or the control means from malfunctioning or being damaged.

  In particular, since the limiting resistance is provided in the common path of each path, the resistance can be reduced as compared with a configuration in which a resistance is provided in each path. Thereby, the said effect can be show | played with a comparatively simple structure.

Feature A2. A diode connected in series with the limiting resistor and having a forward direction from the power supply means to the charge / discharge means,
The diode is a predetermined path closer to the power supply means than the common path in the first path (in the first embodiment, the upstream side bus 142a or the power source side first bus 141, in the second embodiment, the main side first The gaming machine according to Feature A1, wherein the gaming machine is provided on the upstream side, the upstream side bus 202a, or the power source side first bus 141) of the bus 201 with respect to the connection point with the main side second bus 202.

  According to the feature A2, it is possible to suppress the current due to the electric charge accumulated in the charge / discharge means from flowing to the power supply means by the diode. In this case, since the diode is provided in a predetermined path on the power supply means side with respect to the common path in the first path, power supply to the control means by discharging of the charging / discharging means is not hindered.

  In such a configuration, if the power supply means is in a supply state in a situation where the transmission means is attached and no charge is accumulated in the charge / discharge means, a large current (inrush current) flows instantaneously, and the diode There is a risk of damage. In this case, a configuration in which a diode that allows the large current is also conceivable. However, since such a diode is very expensive as compared with a normal one, there is a concern about a significant cost increase.

  On the other hand, since the inrush current flowing through the first path can be limited to a current corresponding to the limiting resistance by adopting the configuration of the feature A1, without using an expensive diode as described above, The damage of the diode due to the inrush current can be suppressed.

Feature A3. At least a portion of the predetermined path is formed on the first substrate;
The diode is a portion formed on the first substrate in the predetermined path (the upstream bus 142a in the first embodiment, and the main second bus 202 in the main first bus 201 in the second embodiment). The gaming machine according to Feature A2, wherein the gaming machine is provided on the upstream side or upstream bus 202a) from the connection point.

  If the diode is provided on the second substrate, a part of the charge accumulated in the charge / discharge unit may move to the second substrate through the transmission unit. In this case, noise based on the movement of the charges is generated from the transmission means, which may adversely affect other electronic devices.

  On the other hand, according to this feature, since the diode is provided in the portion formed on the first substrate in the predetermined path, it is possible to regulate the movement of the charge through the transmission means, and to reduce the noise. Occurrence can be suppressed. Thereby, the malfunction of the electronic device in the case of a power interruption state can be suppressed.

Feature A4. At least a portion of the predetermined path is formed on the second substrate;
The gaming machine according to Feature A2, wherein the diode is provided in a portion (power supply side first bus 141) formed on the two boards in the predetermined path.

  According to the feature A4, the number of components mounted on the first substrate can be reduced by providing the diode in the portion formed on the second substrate in the predetermined path. Thereby, since the visibility of the control means of the first substrate can be further improved, it is easy to find the trace when an illegal act is performed on the control means. Therefore, it is possible to suitably suppress fraudulent acts on the control means.

Feature A5. At least a portion of the common path is formed in the first substrate;
The limiting resistor is provided in a portion of the common path formed on the first substrate (the main side second bus 145 in the first embodiment and the main side third bus 203 in the second embodiment). A gaming machine according to any one of features A1 to A4.

  According to the feature A5, since the limiting resistor is provided on the first substrate, the current based on the electric charge remaining in the transmission unit is limited by the limiting resistor. Thereby, the large electric current accompanying attachment of a transmission means can be suppressed more suitably.

Feature A6. A substrate box for accommodating the first substrate;
Trace means for leaving a trace when the substrate box is opened,
The gaming machine according to Feature A5, comprising:

  According to the feature A6, the limiting resistance is accommodated in the substrate box, and the trace remains when the substrate box is opened. As a result, it is possible to suppress fraudulent acts such as replacing the limiting resistor with another resistor and intentionally flowing a large current to the control means to induce malfunction of the control means.

Feature A7. At least a portion of the common path is formed on the second substrate;
The gaming machine according to any one of features A1 to A4, wherein the limiting resistor is provided in a portion (power supply side first bus 301) formed in the second substrate in the common path.

  According to the feature A7, the number of components mounted on the first substrate can be reduced by providing the limiting resistor on the second substrate. Thereby, since the visibility of the control means of the first substrate can be further improved, it is easy to find the trace when an illegal act is performed on the control means. Therefore, it is possible to suitably suppress fraudulent acts on the control means.

  Feature A8. The gaming machine according to any one of features A1 to A7, wherein the first path is formed by attaching the transmission means.

  According to the feature A8, by attaching the transmission means, it is possible to supply power to the charge / discharge means by the power supply means. Thereby, the charge to the charging / discharging means in the state where the transmission means is not attached can be avoided. Therefore, by avoiding unintentional charging / discharging of the charging / discharging means due to malfunction of the power supply means in the situation where the transmission means is not attached, it is possible to prevent electric shock when removing the transmission means and performing the inspection. In addition, power loss can be reduced. Furthermore, a large current that can be generated instantaneously when the transmission means is attached in a state where the power supply means is in a supply state and the charging / discharging means is completed without being absorbed by the charging / discharging means. , It is possible to avoid a situation in which the control means flows into the control means and malfunctions or breaks.

  Feature A9. The second path includes an individual path (downstream bus 142b, 202b) having one end connected to a midway position of the first path and the other end connected to the control means. A gaming machine according to any one of A8.

  According to the feature A9, the electric power from the power supply unit is supplied to the control unit through a part of the first path and the individual path, and is also supplied to the charging / discharging unit through the first path. Thereby, the first route and the second route can be partially shared with the power supply route when the power supply means is in the supply state.

Feature A10. The control means includes
A first terminal (VCC terminal) that is electrically connected to a control unit (MPU102) that performs at least predetermined control using information about the game;
A second terminal (VBB terminal) that is electrically connected to a memory holding unit (RAM 104) that stores and holds the information while power is supplied to itself;
With
The gaming machine according to any one of features A1 to A9, wherein the second path is connected to the second terminal.

  According to the feature A10, when power is cut off, information relating to the game can be stored and held by supplying power to the storage holding unit in the control means. Therefore, compared with the structure which supplies electric power to the whole control means when it becomes a power interruption state, the discharge | released power per unit time in a charging / discharging means can be reduced.

  Note that the specific configuration of the feature A10 is as follows.

“Comprising a third path (first input path EL11a) for electrically connecting the power supply means and the first terminal of the control means,
The 3rd path | route is provided so that the transmission part shared with the said 2nd path | route may not be included. "

Feature A11. The first substrate is provided with grasping means (reset circuits 153 and 210) for grasping whether the power supply means is in the supply state or the power interruption state.
The control means executes a predetermined start-up process (main process) when the grasping means grasps that the power supply means has shifted from the power interruption state to the supply state. The gaming machine according to Feature A9 or Feature A10, characterized by

  When the power supply path to the control means in the supply state and the power supply path to the control means in the power interruption state are partially shared, the control means determines whether the power supply means is in the supply state or is disconnected based on the power supply path. It is not possible to specify whether it is in a state, and it is not known at what timing the startup process should be executed.

  On the other hand, according to the present feature, a grasping unit is separately provided, and the startup process is executed based on the grasping result of the grasping unit. As a result, it is possible to avoid the inconvenience caused by partially sharing the power supply path between the supply state and the power interruption state.

  Feature A12. The control means executes the start-up process after a predetermined specific period has elapsed from the timing when the grasping means grasps that the power supply means has shifted from the power interruption state to the supply state. The gaming machine according to Feature A11, wherein:

  When the configuration of the feature A12 is adopted, when the power supply unit is in a supply state in a state where the transmission unit is attached, the charge / discharge unit is charged and power is supplied to the control unit. During charging of the charging / discharging means, the power supply to the control means tends to become unstable.

  In this respect, according to this feature, it is possible to avoid the start-up process during the period in which the power supply to the control unit is unstable due to the charging of the charge / discharge unit, and the stable start-up. Can be realized.

  As the “specific period”, for example, “a period longer than the period required for charging the charging / discharging unit” can be considered.

  Feature A13. When the power supply unit is in the supply state, the limit is set such that power that enables the control unit to operate is supplied to the control unit regardless of the charge accumulation state in the charge / discharge unit. The gaming machine according to any one of features A9 to A12, wherein a resistance value of the resistor is set.

  According to the feature A13, the control unit can be operated by setting the power supply unit to the supply state regardless of the charge accumulation state in the charge / discharge unit. This makes it possible to start the operation of the control means quickly and stably.

Feature A14. A first board (main control board 101) on which control means (MPU102) for storing and holding the information is stored while power is supplied to the game board. When,
A second board (power supply and launch control board 121) on which power supply means (power supply module 131) that can be switched between a supply state in which power can be supplied to the control means and an interruption state in which power cannot be supplied to the control means is mounted. )When,
Transmission means (harness H) used to transmit power between the first substrate and the second substrate;
In a gaming machine equipped with
The second substrate has charging / discharging means (backup capacitor 132) that is in a charged state in which charges are accumulated when power is supplied, and in a discharged state in which charges are discharged when power is not supplied. Installed,
As a route for transmitting power,
A first path (charging paths EL2, EL12) for electrically connecting the charging / discharging means and the power supply means;
A second path (power supply paths EL3 and EL13 for power interruption) electrically connecting the charge / discharge means and the control means via the transmission means;
With
The charge / discharge means includes
While the power supply means is in the supply state, power is supplied from the power supply means via the first path, and the charge state is obtained.
When the power supply means is in the power-off state, the power supply means supplies power to the control means via the second path by entering the discharge state.
At least a part of the first route and the second route is configured as a common route;
A gaming machine, wherein a limiting resistor for limiting a current flowing through each of the paths is provided in the common path.

  According to the feature A14, when the power supply unit is in a supply state, power is supplied to the charge / discharge unit via the first path, and the charge / discharge unit is in a charge state in which charges are accumulated. On the other hand, when the power supply means is cut off, power supply from the power supply means is stopped, and the charge / discharge means is in a discharge state in which charges are discharged. Thereby, electric power is supplied to the control means via the second path. Therefore, information relating to the game is stored and held even in a power interruption state.

  Here, if the charging / discharging means is provided on the first substrate, it is possible to supply power to the control means by the first substrate alone. For this reason, fraudulent acts such as rewriting information on games stored and held in the control means are likely to be performed.

  Further, the charge / discharge means tends to be large due to the property of accumulating charges. For this reason, when the charging / discharging means is provided on the first substrate on which the control means that is likely to be the target of fraudulent activity is provided, there may be a problem that the charging / discharging means obstructs the trace of the fraudulent act. However, due to the mounting area of the first substrate, it is difficult to place the charging / discharging means away from the control means so that the control means can be easily seen.

  On the other hand, according to this feature, since the charging / discharging means is provided on the second substrate on which the power supply means is mounted, the power supply by the charging / discharging means can be realized while avoiding the above-described disadvantages. Can do.

  In such a configuration, if the power supply means is in a supply state in a situation where no charge is accumulated in the charge / discharge means, a current (inrush current) related to charging of the charge / discharge means flows through the first path. In addition, when the transmission unit is provided in a state where the power source unit is in the power-off state and the charge is stored in the charge / discharge unit, the current caused by the charge stored in the charge / discharge unit is supplied to the first path and the second path. Flows in both directions.

  On the other hand, according to this feature, since the limiting resistance is provided in the common path, each current based on each event as described above is limited by the limiting resistance. Thereby, when each of the above events occurs, it is possible to suppress a large current from flowing instantaneously in each path, thereby preventing the power supply means or the control means from malfunctioning or being damaged.

  In particular, since the limiting resistance is provided in the common path of each path, the resistance can be reduced as compared with a configuration in which a resistance is provided in each path. Thereby, the said effect can be show | played with a comparatively simple structure.

  Note that the configurations of the features A2 to A13 may be applied to this feature. In this case, the transmission means may be configured to be detachable as necessary.

<Feature B group>
Feature B1. A first board (main control board 101) on which control means (MPU102) for storing and holding the information is stored while power is supplied to the game board. When,
A second board (power supply and launch control board 121) on which power supply means (power supply module 131) that can be switched between a supply state in which power can be supplied to the control means and an interruption state in which power cannot be supplied to the control means is mounted. )When,
Transmission means (harness H) that is used for power transmission between the first board and the second board and is attachable to and detachable from at least one of the boards.
In a gaming machine equipped with
The second substrate has charging / discharging means (backup capacitor 132) that is in a charged state in which charges are accumulated when power is supplied, and in a discharged state in which charges are discharged when power is not supplied. Installed,
By attaching the transmission means, it becomes possible to supply power to the control means by the power supply means or the charge / discharge means,
A gaming machine characterized in that power supply to the charging / discharging means by the power supply means is restricted without attaching the transmission means.

  According to the feature B1, when the power supply means is in a power interruption state, the charging / discharging means is discharged, so that power can be supplied to the control means.

  Here, if the charging / discharging means is provided on the first substrate, it is possible to supply power to the control means by the first substrate alone. For this reason, fraudulent acts such as rewriting information on games stored and held in the control means are likely to be performed.

  Further, the charge / discharge means tends to be large due to the property of accumulating charges. For this reason, when the charging / discharging means is provided on the first substrate on which the control means that is likely to be the target of fraudulent activity is provided, there may be a problem that the charging / discharging means obstructs the trace of the fraudulent act. However, due to the mounting area of the first substrate, it is difficult to place the charging / discharging means away from the control means so that the control means can be easily seen.

  On the other hand, according to this feature, since the charging / discharging means is provided on the second substrate on which the power supply means is mounted, the power supply by the charging / discharging means can be realized while avoiding the above-described disadvantages. Can do.

  In such a configuration, power supply to the charging / discharging means by the power supply means is restricted without the transmission means being attached. Thereby, the charge to the charging / discharging means in the state where the transmission means is not attached can be avoided. Therefore, by avoiding unintended charging / discharging means being charged due to malfunction of the power supply means in the situation where the transmission means is removed, it is possible to prevent electric shock when the inspection is performed with the transmission means removed. In addition, the power loss can be reduced. Furthermore, a large current that can be generated instantaneously when the transmission means is attached in a state where the power supply means is in a supply state and the charging / discharging means is completed without being absorbed by the charging / discharging means. Therefore, it is possible to avoid a situation in which the control means flows into the control means and the control means malfunctions or is damaged.

Feature B2. The transmission means includes a first transmission unit (first connection line 143) and a second transmission unit (second connection line 146) of a system different from the first transmission unit,
As a path for transmitting power between the substrates,
A power-on-corresponding path (power supply path EL1, EL11 for power-on) for electrically connecting the power supply means and the control means via the first transmission unit;
The charge / discharge means and the control means are electrically connected by electrically connecting a predetermined portion formed on the first substrate in the route corresponding to power input and the charge / discharge means via the second transmission unit. Power interruption correspondence path (power supply paths EL3 and EL13 for power interruption) to be connected;
With
By electrically connecting a predetermined portion formed on the first substrate in the power-accepting path and the charge / discharge means, the first transmission unit, the first substrate, and the second transmission unit are passed through. The gaming machine according to Feature B1, wherein a charging path for charging / discharging means is formed.

  According to the feature B2, when the power supply means is in the supply state, the power of the power supply means is supplied to the control means via the power incoming correspondence path. On the other hand, when the power supply means is in a power interruption state, the power of the charge / discharge means is supplied to the control means via the power interruption response path.

  Moreover, since the power interruption means path is formed by electrically connecting the predetermined portion formed on the first substrate in the power correspondence path and the charge / discharge means, the power supply means in the supply state The power supply path (power-on-corresponding path) and the power supply path (power-off-corresponding path) when the power supply means is in a power-off state are partially in common. Thereby, simplification of a structure can be achieved.

  And by connecting as described above, the power supply means and the charge / discharge means are electrically connected via the first transmission part, the first substrate and the second transmission part, and a charging path via the transmission means is formed. Is done. As a result, it is possible to partially share each of the power supply path to the control means in the supply state, the power supply path to the control means in the power interruption state, and the charging path. Therefore, the configuration of the feature B1 can be realized with a simple configuration.

Feature B3. The first substrate is provided with grasping means (reset circuits 153 and 210) for grasping whether the power supply means is in the supply state or the power interruption state.
The control means executes a predetermined start-up process (main process) when the grasping means grasps that the power supply means has shifted from the power interruption state to the supply state. The gaming machine according to Feature B2, characterized by:

  When the power supply path to the control means in the supply state and the power supply path to the control means in the power interruption state are partially shared, the control means determines whether the power supply means is in the supply state or is disconnected based on the power supply path. It is not possible to specify whether it is in a state, and it is not known at what timing the startup process should be executed.

  On the other hand, according to the present feature, a grasping unit is separately provided, and the startup process is executed based on the grasping result of the grasping unit. As a result, it is possible to avoid the inconvenience caused by partially sharing the power supply path between the supply state and the power interruption state.

  Feature B4. The control means executes the start-up process after a predetermined specific period has elapsed from the timing when the grasping means grasps that the power supply means has shifted from the power interruption state to the supply state. The gaming machine according to Feature B3, wherein

  When the configuration of the feature B2 is adopted, when the power supply unit is in a supply state in a state where the transmission unit is attached, the charging / discharging unit is charged and power is supplied to the control unit via the power input correspondence path. The During charging of the charging / discharging means, the power supply to the control means tends to become unstable.

  In this respect, according to this feature, it is possible to avoid the start-up process during the period in which the power supply to the control unit is unstable due to the charging of the charge / discharge unit, and the stable start-up. Can be realized.

  As the “specific period”, for example, “a period longer than the period required for charging the charging / discharging unit” can be considered.

  Feature B5. The gaming machine according to any one of the characteristics B2 to B4, wherein a limiting resistor that limits a current flowing through each of the paths is provided in a common path of the charging path and the power interruption handling path.

  When the power supply means is in a supply state in a state where the transmission means is attached and no charge is accumulated in the charge / discharge means, a current (inrush current) related to charging of the charge / discharge means flows through the charging path. In addition, when the transmission unit is attached in a state where the power source unit is in the power-off state and the charge is accumulated in the charge / discharge unit, a current based on the charge accumulated in the charge / discharge unit flows through the power-off correspondence path. The current based on these events tends to increase instantaneously when the event occurs. For this reason, there is a concern that the control means and the power supply means may malfunction or be damaged based on the instantaneous large current.

  In this regard, according to this feature, since the limiting resistance is provided in the common path, each current based on each event as described above is limited by the limiting resistance. Thereby, when each event as described above occurs, it is possible to suppress a large current from flowing instantaneously in each path, thereby preventing the power supply means and the control means from malfunctioning or being damaged.

  In particular, since the limiting resistance is provided in the common path of each path, the resistance can be reduced as compared with a configuration in which a resistance is provided in each path. Thereby, the said effect can be show | played with a comparatively simple structure.

  Each configuration of the feature A group may be applied to the configuration of the feature B5.

Feature B6. A first board (main control board 101) on which control means (MPU102) for storing and holding the information is stored while power is supplied to the game board. When,
A second board (power supply and launch control board 121) on which power supply means (power supply module 131) that can be switched between a supply state in which power can be supplied to the control means and an interruption state in which power cannot be supplied to the control means is mounted. )When,
Transmission means (harness H) used to transmit power between the first substrate and the second substrate;
In a gaming machine equipped with
The second substrate has charging / discharging means (backup capacitor 132) that is in a charged state in which charges are accumulated when power is supplied, and in a discharged state in which charges are discharged when power is not supplied. Installed,
Power supply to the control means by the power supply means or the charge / discharge means is performed via the transmission means,
A gaming machine configured such that power is not supplied to the charging / discharging means by the power supply means without going through the transmission means.

  According to the feature B6, when the power supply means is in a power-off state, the charge / discharge means is discharged, so that power can be supplied to the control means.

  Here, if the charging / discharging means is provided on the first substrate, it is possible to supply power to the control means by the first substrate alone. For this reason, fraudulent acts such as rewriting information on games stored and held in the control means are likely to be performed.

  Further, the charge / discharge means tends to be large due to the property of accumulating charges. For this reason, when the charging / discharging means is provided on the first substrate on which the control means that is likely to be the target of fraudulent activity is provided, there may be a problem that the charging / discharging means obstructs the trace of the fraudulent act. However, due to the mounting area of the first substrate, it is difficult to place the charging / discharging means away from the control means so that the control means can be easily seen.

  On the other hand, according to this feature, since the charging / discharging means is provided on the second substrate on which the power supply means is mounted, the power supply by the charging / discharging means can be realized while avoiding the above-described disadvantages. Can do.

  In such a configuration, since the power supply means does not supply power to the charging / discharging means without going through the transmission means, charging to the charging / discharging means when the transmission means is broken is avoided. can do. Therefore, by avoiding unintentional charging of the charging / discharging means due to malfunction of the power supply means in a situation where the transmission means is destroyed, it is possible to avoid electric shock when performing the inspection by destroying the transmission means. In addition, the power loss can be reduced. Furthermore, a large current that can be generated instantaneously when the transmission means is provided in a state where the power supply means is in the supply state and the charging / discharging means is completed without being absorbed by the charging / discharging means, A situation in which the control means flows and the control means malfunctions or is broken can be avoided.

  In addition, you may apply the structure of characteristics B2-B5 to this characteristic. In this case, the transmission means may be configured to be detachable as necessary.

  DESCRIPTION OF SYMBOLS 10 ... Pachinko machine, 24 ... Game board, 71 ... Main control device, 79 ... Power source and launch control device, 101 ... Main control board, 102 ... MPU, 104 ... RAM, 121 ... Power source and launch control board, 122 ... Power transmission Circuit 131 131 Power supply module 132 Backup capacitor 151 Diode 152 Limiting resistor 153 Reset circuit 210 Reset circuit 211 Power failure monitoring circuit CN1 Power supply connector CN2 Main connector H ... Harness, EL1 ... Power supply path for turning on, EL2 ... Charging path, EL3 ... Power supply path for turning off, EL11 ... Power supply path for turning on, EL12 ... Charging path, EL13 ... Power off Power supply route for time.

Claims (2)

A first board on which control means for storing and holding the information is stored while power is supplied to the player, while performing predetermined control using information relating to the game;
A second substrate on which power supply means capable of switching between a supply state capable of supplying power to the control means and a power interruption state where power cannot be supplied to the control means;
Transmission means used for transmission of power between the first substrate and the second substrate, wherein the transmission means can be attached to and detached from at least one of the substrates;
In a gaming machine equipped with
The second substrate is equipped with charging / discharging means that is in a charged state in which electric charges are accumulated when electric power is supplied, and in a discharged state in which electric charges are discharged when electric power is not supplied,
As a route for transmitting power,
A first path electrically connecting the charge / discharge means and the power supply means;
A path formed by attaching the transmission means, the second path electrically connecting the charge / discharge means and the control means;
With
The charge / discharge means includes
While the power supply means is in the supply state, power is supplied from the power supply means via the first path, and the charge state is obtained.
When the power supply means is in the power-off state, the power supply means supplies power to the control means via the second path by entering the discharge state.
At least a part of the first route and the second route is configured as a common route;
A limiting resistor for limiting a current flowing through the first path or the second path is provided in the common path,
It said first path and said common route is formed in the second substrate,
The gaming machine according to claim 1, wherein the limiting resistor is provided in a portion of the common path formed on the second substrate. The gaming machine according to claim 1, wherein the gaming machine is any one of a pachinko machine, a slot machine, and a ball-cylinder spinning machine.

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