JP5963581B2 - Equalizer, equalization method, received signal processing device, and received signal processing method - Google Patents

Description

  The present invention relates to an equalization apparatus, an equalization method, a received signal processing apparatus, and a received signal processing method.

  In wireless communication systems and terrestrial digital broadcasting systems, a receiver not only receives a direct wave that is an incoming wave directly coming from a transmitter, but also reflects, diffracts, and reflects on an obstacle such as a building after being transmitted from the transmitter. Alternatively, indirect waves that are scattered incoming waves may also be received. In order to avoid intersymbol interference when an indirect wave exists, a guard interval is added before an effective symbol in an OFDM (Orthogonal Frequency Division Multiplexing) scheme or the like.

  As the guard interval, a cyclic prefix (CP: Cyclic Prefix) that uses the end portion of the effective symbol and a known signal (or a known sequence) are known. An OFDM scheme in which CP is used for the guard interval is called a CP-OFDM scheme, and a scheme in which a pseudo-random sequence that is a known sequence is used for the guard interval is called a TDS (Time Domain Synchronous) -OFDM scheme.

  Patent Document 1 and Non-Patent Document 1 describe techniques related to received signal processing in the TDS-OFDM system. Specifically, in Non-Patent Document 1, a signal similar to a reception signal when CP is used as a guard interval is generated from a reception signal when a known sequence is used as a guard interval. A technique for performing equalization processing on a signal similar to the CP-OFDM method is described.

US Patent Application Publication No. 2008/0049600 Guanghui Liu, “ITD-DFE Based Channel Estimation and Evaluation in TDS-OFDM Receiver”, IEEE Transactions on Consumer Electronics, Vol. 53, no. 2, pp304-309, 2007

  However, in the technique disclosed in Non-Patent Document 1, a signal similar to the reception signal when the CP is used for the guard interval is generated from the reception signal when the known signal is used as the guard interval. There is a problem that the calculation amount is large.

  The present invention provides an equalization device that can obtain a signal similar to a reception signal when CP is used as a guard interval from a reception signal when a known signal is used as a guard interval with a small amount of calculation, etc. An object of the present invention is to provide a method, a received signal processing device, and a received signal processing method.

The equalization apparatus according to the present invention transmits, via a transmission line, a transmission signal whose transmission unit is a transmission symbol composed of an effective symbol including information to be transmitted and a known signal added to the effective symbol as a guard interval. An equalization device that compensates for distortion of a received signal obtained by receiving,
For a signal in a predetermined interval having an effective symbol length corresponding to the effective symbol in the received signal, a signal in a subsequent portion following the predetermined interval in the received signal is added to a head portion of the predetermined interval, and addition is performed. Addition signal generation means for outputting a signal;
Delay profile estimating means for estimating a delay profile of the transmission path from the received signal and outputting an estimated delay profile;
Using the estimated delay profile output from the delay profile estimation means, estimate the interference component due to the known signal included in the head portion of the addition signal output from the addition signal generation means, and output the estimated interference component Interference estimation means;
Using the estimated interference component output from the interference estimation means, the interference removal means for removing the interference component from the addition signal output from the addition signal generation means, and outputting the addition signal after interference removal;
Equalizing means for equalizing the summed signal after interference output outputted from the interference removing means using an estimated delay profile outputted from the delay profile estimating means;
Equipped with a,
The interference estimation means includes
Known signal generating means for generating a generated signal corresponding to a signal obtained by connecting two known signals arranged before and after the effective symbol;
A convolution means for calculating the estimated interference component by convolving a generation signal output from the known signal generation means and an estimated delay profile output from the delay profile estimation means for the period of the head portion;
It is characterized by having .

The received signal processing apparatus according to the present invention transmits a transmission signal having a transmission symbol composed of a transmission symbol composed of an effective symbol including information to be transmitted and a known signal added to the effective symbol as a guard interval. A received signal processing device for processing a received signal obtained by receiving via a path,
For a signal in a predetermined interval having an effective symbol length corresponding to the effective symbol in the received signal, a signal in a subsequent portion following the predetermined interval in the received signal is added to a head portion of the predetermined interval, and addition is performed. Addition signal generation means for outputting a signal;
Using the delay profile of the transmission path estimated from the received signal, the interference component due to the known signal included in the head portion of the sum signal output from the sum signal generator is estimated, and the estimated interference component is output Interference estimation means for
Using the estimated interference component output from the interference estimation means, the interference removal means for removing the interference component from the addition signal output from the addition signal generation means, and outputting the addition signal after interference removal;
Equipped with a,
The interference estimation means includes
Known signal generating means for generating a generated signal corresponding to a signal obtained by connecting two known signals arranged before and after the effective symbol;
A convolution means for calculating the estimated interference component by performing a convolution operation on the generated signal output from the known signal generating means and the delay profile for the period of the head portion;
It is characterized by having .

In addition, the equalization method according to the present invention provides a transmission path for a transmission signal having a transmission symbol composed of an effective symbol including information to be transmitted and a known signal added as a guard interval to the effective symbol as a transmission unit. An equalization method for compensating for distortion of a received signal obtained by receiving via
For a signal in a predetermined interval having an effective symbol length corresponding to the effective symbol in the received signal, a signal in a subsequent portion following the predetermined interval in the received signal is added to a head portion of the predetermined interval, and addition is performed. A sum signal generation step for outputting a signal;
A delay profile estimating step of estimating a delay profile of the transmission path from the received signal and outputting an estimated delay profile;
Using the estimated delay profile output from the delay profile estimation step, the interference component due to the known signal included in the head portion of the addition signal output from the addition signal generation step is estimated, and the estimated interference component is output. An interference estimation step;
Using the estimated interference component output from the interference estimation step, the interference removal step of removing the interference component from the addition signal output from the addition signal generation step and outputting the addition signal after interference removal;
An equalization step for equalizing the summed signal after interference output output from the interference cancellation step using the estimated delay profile output from the delay profile estimation step;
I have a,
The interference estimation step includes:
A known signal generating step for generating a generated signal corresponding to a signal obtained by concatenating two known signals arranged before and after the effective symbol;
A convolution step of calculating the estimated interference component by performing a convolution operation on the generated signal output from the known signal generation step and the estimated delay profile output from the delay profile estimation step for the period of the head portion;
It is characterized by having .

Also, the received signal processing method according to the present invention transmits a transmission signal having a transmission symbol composed of a transmission symbol composed of an effective symbol including information to be transmitted and a known signal added to the effective symbol as a guard interval. A received signal processing method for processing a received signal obtained by receiving via a path,
For a signal in a predetermined interval having an effective symbol length corresponding to the effective symbol in the received signal, a signal in a subsequent portion following the predetermined interval in the received signal is added to a head portion of the predetermined interval, and addition is performed. A sum signal generation step for outputting a signal;
Using the delay profile of the transmission path estimated from the received signal, the interference component due to the known signal included in the head portion of the addition signal output from the addition signal generation step is estimated, and the estimated interference component is output An interference estimation step,
Using the estimated interference component output from the interference estimation step, the interference removal step of removing the interference component from the addition signal output from the addition signal generation step and outputting the addition signal after interference removal;
I have a,
The interference estimation step includes:
A known signal generating step for generating a generated signal corresponding to a signal obtained by concatenating two known signals arranged before and after the effective symbol;
A convolution step of calculating the estimated interference component by performing a convolution operation on the generation signal output from the known signal generation step and the delay profile for the period of the head portion;
It is characterized by having .

  According to the present invention, a signal similar to the reception signal when CP is used as the guard interval can be obtained with a small amount of calculation from the reception signal when the known signal is used as the guard interval.

It is a figure which shows the structure of a transmission signal. It is a figure which shows the delay profile in 3 wave radio wave environment. It is a figure which shows the received signal in 3 wave radio wave environment. 1 is a block diagram showing a configuration of an equalization apparatus in Embodiment 1. FIG. It is a figure for demonstrating the process of an addition signal production | generation part. It is a figure which shows the signal of the effective symbol area output from an addition part. It is a block diagram which shows the structure of an equalization part. It is a block diagram which shows the structure of an interference estimation part. It is a figure for demonstrating the process of an interference estimation part. It is a figure for demonstrating the estimation process of the interference component in the technique of a nonpatent literature 1. FIG. It is a figure for demonstrating the estimation process of the interference component in the technique of a nonpatent literature 1. FIG. It is a figure for demonstrating the effective symbol area of a received signal. It is a figure for demonstrating the effective symbol area of a received signal. 6 is a block diagram illustrating a configuration of an interference estimation unit in Embodiment 2. FIG. FIG. 10 is a diagram for explaining a convolution operation in the second embodiment. FIG. 10 is a block diagram showing a configuration of an interference estimation unit in the third embodiment. FIG. 10 is a block diagram showing a configuration of an interference estimation unit in the fourth embodiment. FIG. 10 is a block diagram showing a configuration of an equalization apparatus in a fifth embodiment. FIG. 10 is a diagram for illustrating processing in the fifth embodiment. FIG. 10 is a diagram illustrating a signal in an effective symbol period output from an addition unit according to the fifth embodiment. FIG. 16 is a diagram illustrating a period of a head portion when an effective symbol period is shifted from an effective symbol period of a main wave in the fifth embodiment. 18 is a flowchart illustrating an equalization method according to the sixth embodiment. 18 is a flowchart of an interference estimation step in the sixth embodiment.

First, the prerequisite technology will be described with reference to the drawings.
FIG. 1 is a diagram illustrating a configuration of a transmission signal transmitted from a transmitter. As shown in FIG. 1, the transmission signal is a signal that is transmitted with a transmission symbol TS as a transmission unit. The transmission symbol TS includes an effective symbol (or effective data) S including information to be transmitted and the effective symbol. And a guard interval GI added before S (or inserted between valid symbols).

  When the transmission signal is received by a receiver via a transmission path, the receiver is reflected, diffracted, or scattered by an obstacle after being transmitted from the transmitter as well as a direct wave coming directly from the transmitter. Indirect waves may also be received.

  For example, when there are a delayed wave 1 having a delay time T1 and a delayed wave 2 having a delay time T2 (> T1) in addition to the direct wave (main wave) as incoming waves arriving at the receiver The delay profile representing the characteristics of the transmission path is expressed as shown in FIG. The delay profile is specifically an impulse response of the transmission path, and more specifically is information representing the delay time and complex amplitude (or complex gain) of each incoming wave. However, in FIG. 2, only the amplitude is shown among the complex amplitudes of each incoming wave of the delay profile.

  When the delay profile of the transmission path is a three-wave environment shown in FIG. 2, the received signal is the sum of the main wave, delay wave 1, and delay wave 2. FIG. 3 shows the main wave, the delayed wave 1 and the delayed wave 2 included in the received signal. In FIG. 3, the delay time T2 of the delay wave 2 is equal to the guard interval length. FIG. 3 shows that interference between effective symbols does not occur in a radio wave environment in which the delay time of the incoming wave is equal to or shorter than the guard interval length.

  In FIG. 3, a section A indicates an effective symbol section of the received signal, and coincides with an effective symbol section of the main wave included in the received signal. When CP is used for guard interval GI, section A of the received signal in FIG. 3 includes the entire effective symbols of all incoming waves (main wave, delayed wave 1 and delayed wave 2). Therefore, in CP-OFDM or the like, the received signal can be equalized without receiving interference between effective symbols and without losing information on effective symbols. On the other hand, when a known signal (or known sequence) is used for the guard interval, the known signal interferes with the leading portion B of the interval A of the received signal in FIG. In addition, the last part of the effective symbol of the delay wave 1 and the delay wave 2 is not included in the section A, and the subsequent part C subsequent to the section A receives the interference of the known signal of the next transmission symbol.

  According to the description of Non-Patent Document 1, when a known signal is used as the guard interval, it is conceivable to equalize the received signal as follows. The receiver performs a convolution operation on the delay profile estimated from the received signal and the known signal to be generated by itself, thereby estimating the interference component due to the known signal included in the received signal, and the estimated interference component from the received signal. Subtract. At this time, the receiver uses an interference component due to a known signal included in the head part B of the section A and an interference component due to a known signal included in the subsequent part C subsequent to the section A (known to the end part of the effective symbol of the delayed wave). The interference component due to the signal) is calculated separately. Next, the receiver supplements the end portion of the effective symbol of the delayed wave to the section A by adding the signal of the subsequent part C to the head part B of the section A in the received signal, and CP is used as the guard interval. The signal of the section A similar to the case is obtained. Then, the receiver performs equalization processing on the obtained signal in section A in the same manner as when CP is used as the guard interval.

  In the technology considered from the description of Non-Patent Document 1 (hereinafter referred to as “Technology of Non-Patent Document 1”), the interference component included in the head portion B and the interference component included in the subsequent portion C are calculated separately. This increases the amount of calculation for estimating the interference component.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
Embodiment 1 FIG.
FIG. 4 is a block diagram showing a configuration of the equalization apparatus 1 according to the first embodiment. This equalization apparatus 1 compensates for distortion of a reception signal obtained by receiving a transmission signal via a transmission path. For example, the equalization apparatus 1 is included in a receiver that receives a transmission signal from a transmitter via a transmission path.

  The transmission signal is a transmission symbol composed of an effective symbol (or effective data) including information to be transmitted and a known signal added as a guard interval (or inserted between effective symbols) to the effective symbol. Is a signal whose transmission unit is. In the present embodiment, as shown in FIG. 1, the transmission signal is a transmission symbol composed of an effective symbol S and a known signal added (or inserted) as a guard interval GI before the effective symbol S. This signal has TS as a transmission unit. Here, the length of the known signal (guard interval GI) is L sample length, and both the known signal and the effective symbol are complex signals including a real axis component and an imaginary axis component. The known signal is a signal known on both the transmitting side and the receiving side, and is, for example, a pseudo-random sequence (PN sequence). Such a transmission symbol format is adopted in, for example, the DTMB (Digital Terrestrial Multimedia Broadcasting) standard which is a digital terrestrial broadcasting standard in China. In the present embodiment, the received signal is a digital signal. Specifically, the received signal is obtained by receiving a transmission signal at a receiver to obtain an analog signal, converting the analog signal into a digital signal, and converting the digital signal into a digital complex including a real axis component and an imaginary axis component. It is obtained by converting into a signal.

  Further, in this embodiment, the description will be made taking an example of a three-wave environment in which the transmission path has the delay profile shown in FIG. 2, and the received signals are the main wave, delay wave 1 and delay wave shown in FIG. 2 components are included. However, the equalization apparatus 1 of this Embodiment is applicable to arbitrary radio wave environments.

  4, the equalization apparatus 1 includes an addition signal generation unit 10, a delay profile estimation unit 20, a storage unit 30, an interference estimation unit 40, an interference removal unit 50, and an equalization unit 60.

  The addition signal generation unit 10 outputs a signal of a succeeding portion subsequent to the predetermined section of the received signal to a head portion of the predetermined section with respect to a signal of a predetermined section having an effective symbol length corresponding to an effective symbol in the received signal. Add and output the addition signal.

  In this example, the predetermined section is a section that matches the effective symbol section of the main wave (direct wave) included in the received signal, and is section A shown in FIG. The predetermined interval can be referred to as an effective symbol interval (or effective data interval) of the received signal. In the following description, the predetermined interval is referred to as an effective symbol interval A.

  Further, in this example, the length of the head portion is the same as the guard interval length (known signal length), and the addition signal generation unit 10 adds the succeeding portion C to the head portion B of the effective symbol section A in FIG. Are added. However, the length of the head portion may be determined in accordance with the delay time of the corresponding delay wave, the maximum delay time, etc., and need not be the same as the guard interval length. For example, when the maximum delay time of the delayed wave is shorter than the guard interval length, the length of the head portion may be shorter than the guard interval length.

  In the example of FIG. 4, the addition signal generation unit 10 includes a delay unit 11 and an addition unit 12. The delay unit 11 delays the received signal by an effective symbol length and outputs a delayed received signal. The adder 12 adds the received signal to the head portion of the effective symbol period A of the delayed received signal with respect to the delayed received signal output from the delay unit 11. Specifically, the adder 12 adds the received signal to the delayed received signal only during the L sample period, which is the period of the head portion, with reference to the beginning of the effective symbol period A of the delayed received signal. The adder 12 outputs the delayed received signal after the addition. In this case, the adder 12 may output all the delayed received signals after addition, or may selectively output the signal of the effective symbol period A among the delayed received signals after addition.

FIG. 5 is a diagram for explaining the processing of the addition signal generation unit 10. In FIG. 5, the main wave, the delay wave 1 and the delay wave 2 included in the delayed reception signal output from the delay unit 11, and the main wave and the delay wave 1 included in the reception signal added to the delay reception signal, And the delay wave 2 is shown. In Figure 5, n-th (n is an integer) are focused on the effective symbol S _n of, shown effective symbol section A corresponding to the n-th effective symbol S _n in the delayed received signal. This effective symbol period A coincides with the effective symbol period of the _nth effective symbol Sn of the main wave in the delayed received signal. Before the effective symbol _{S n} are arranged n-th guard interval GI _n, after the effective symbol _{S n} are arranged (n + 1) -th guard interval _{GI n + 1} and the effective symbol _{S n + 1.}

In Figure 5, the effective symbol section A of the delayed received signal does not include the signal at the end portion of the effective symbol S _n of delayed wave 1 and a delayed wave 2. Therefore, as shown in FIG. 5, the adder 12 adds the received signal to the delayed received signal for L sample periods from the beginning of the effective symbol period A of the delayed received signal, thereby enabling the delayed wave 1 and the delayed wave 2 to be effective. compensate for signal the end part of the symbol S _n enable signal section a of the delayed received signal.

  FIG. 6 is a diagram illustrating a signal in the effective symbol period A output from the adding unit 12. As shown in FIG. 6, the signal in the effective symbol period A output from the adder 12 includes the effective symbol components of the main wave, the delayed wave 1 and the delayed wave 2, the main wave, the delayed wave 1 and the delayed wave. 2 known signal components (guard interval components). In FIG. 6, paying attention to only the effective symbols, it can be seen that the signal in the effective symbol period A has the same configuration as when the cyclic prefix (CP) is used as the guard interval. However, since the signal in the effective symbol period A includes a known signal as an interference component, it is necessary to estimate and remove this.

  Referring to FIG. 4 again, the delay profile estimation unit 20 estimates the delay profile of the transmission path from the received signal, and outputs an estimated delay profile that is a delay profile estimation result. Specifically, the delay profile estimation unit 20 estimates the delay profile shown in FIG. 2 using a known signal included in the received signal. When a pseudo-random sequence (PN sequence) is used as a known signal, a method of estimating a delay profile using a sharp autocorrelation characteristic of the PN sequence is known (see Non-Patent Document 1, for example). In the present embodiment, the delay profile estimation unit 20 can take any delay profile estimation method, and therefore a specific method will not be mentioned. In this embodiment, the estimated delay profile is a complex signal having a length of (L + 1) samples. Specifically, the estimated delay profile is information representing the delay time and complex amplitude of each incoming wave, and more specifically is time-series data of complex amplitude for each delay time at regular intervals.

  The storage unit 30 holds the estimated delay profile output from the delay profile estimation unit 20, and is a memory such as a RAM (Random Access Memory), for example.

  The interference estimator 40 uses the estimated delay profile output from the delay profile estimator 20 (or the signal obtained by reading the estimated delay profile stored in the storage unit 30), and performs the addition output from the added signal generator 10. An interference component due to a known signal included in the head portion of the signal is estimated, and an estimated interference component that is an estimation result of the interference component is output. Specifically, the interference estimation unit 40 uses the estimated delay profile output from the storage unit 30 as a starting point for the interference component due to the known signal included in the effective symbol section A of the signal output from the addition unit 12. Only the portion B is estimated. The interference estimation unit 40 will be described in detail later.

  The interference removal unit 50 uses the estimated interference component output from the interference estimation unit 40 to remove the interference component due to the known signal from the addition signal output from the addition signal generation unit 10, and outputs the addition signal after the interference removal To do. Specifically, the interference removal unit 50 subtracts the estimated interference component from the head portion of the addition signal. In the example of FIG. 4, the interference removing unit 50 subtracts the output of the interference estimating unit 40 from the output of the adding unit 12 to remove an interference component due to a known signal from the output of the adding unit 12. At this time, the interference removal unit 50 performs subtraction only for the L sample period with reference to the head of the effective symbol period A of the signal output from the addition unit 12. However, the subtraction period may be shorter than the L sample period in accordance with the corresponding delay time.

  By the processing of the interference removal unit 50, the known signal component is removed from the signal in the effective symbol section A shown in FIG. Therefore, the signal in the effective symbol period A output from the interference removing unit 50 has the same configuration as the received signal when CP is used as the guard interval.

  The equalization unit 60 equalizes the post-interference-added signal (effective symbol period A signal) output from the interference cancellation unit 50 using the estimated delay profile output from the delay profile estimation unit 20. At this time, since the added signal after interference removal has the same configuration as the received signal when CP is used as the guard interval, the equalization unit 60 is the same as when CP is used as the guard interval. The equalization process can be performed.

  FIG. 7 is a block diagram illustrating a configuration of the equalization unit 60. When the effective symbols in FIG. 1 are OFDM-modulated, as shown in FIG. 7A, the equalization unit 60 includes a first Fourier transform unit 61, a second Fourier transform unit 62, and a division unit 63, The signal of the effective symbol period A output from the interference removal unit 50 is converted into a frequency domain signal by the first Fourier transform unit 61, and the estimated delay profile output from the delay profile estimation unit 20 is converted by the second Fourier transform unit 62. After conversion to a frequency domain signal, the division unit 63 divides the Fourier transform result of the received signal output from the first Fourier transform unit 61 by the Fourier transform result of the estimated delay profile output from the second Fourier transform unit 62. By doing so, equalization is performed. When the effective symbol in FIG. 1 is modulated by a single carrier, as shown in FIG. 7B, the equalization unit 60 includes the first Fourier transform unit 61, the second Fourier transform unit 62, In addition to the division unit 63, an inverse Fourier transform unit 64 is included, and an inverse Fourier transform is performed on the output from the division unit 63 to calculate an estimated value of transmission data.

  In FIG. 4, addition signal generation section 10, delay profile estimation section 20, interference estimation section 40, and interference removal section 50 constitute a received signal processing apparatus according to the present embodiment.

Hereinafter, the interference estimation unit 40 will be described in detail.
FIG. 8 is a block diagram illustrating a configuration of the interference estimation unit 40. In FIG. 8, the interference estimation unit 40 includes a known signal generation unit 41 and a convolution unit 42.

The known signal generation unit 41 generates a generated signal corresponding to a signal obtained by connecting two known signals arranged as guard intervals before and after an effective symbol. Specifically, when estimating the interference component included in the effective symbol period A corresponding to the _nth effective symbol Sn (that is, the effective symbol period A of the nth transmission symbol), the known signal generating unit 41 th and the known signal of the guard interval GI _n, and outputs continuously generates a known signal (n + 1) -th guard interval GI n _{+ 1.} That is, the known signal generation unit 41 continuously generates known signals of two transmission symbols adjacent to each other. The generated signal is a complex signal.

  The convolution unit 42 applies the generation signal output from the known signal generation unit 41 and the estimated delay profile output from the delay profile estimation unit 20 (or the storage unit 30) for the period of the head portion of the effective symbol period A. A convolution operation is performed to calculate an estimated interference component.

FIG. 9 is a diagram for explaining the processing of the interference estimation unit 40.
As illustrated in FIG. 9, the known signal generation unit 41 generates a generated signal in which the nth known signal and the (n + 1) th known signal are connected. This generated signal includes 2L samples p (− corresponding to the 0th to (L−1) th samples of the nth known signal and the 0th to (L−1) th samples of the (n + 1) th known signal. L), p (-L + 1), ..., p (-1), p (0), p (1), ..., p (L-1).

  The convolution unit 42 reads out the 0th to Lth samples h (0), h (1),..., H (L) of the estimated delay profile from the storage unit 30 in reverse order, and the generated signal and the estimated delay profile are L samples. The convolution operation is performed only for the period, and 0th to (L−1) th samples x (0), x (1),..., X (L−1) of the estimated interference components are calculated. Specifically, the convolution operation is performed as follows.

FIG. 9A shows a state in which the head of the generated signal and the head of the estimated delay profile are aligned. At this time, the zeroth sample x (0) of the estimated interference component is obtained. Specifically, the estimated delay profile samples h (0) to h (L) correspond to the generated signal samples p (0) to p (-L), respectively, and the convolution unit 42 calculates the estimated delay profile. Then, the corresponding samples of the generated signal are subjected to complex multiplication, and the total of the obtained (L + 1) multiplication results is calculated to obtain the 0th sample x (0) of the estimated interference component. This sample x (0) is represented by the following formula (1).
x (0) = p (0) h (0) + p (−1) h (1) +... + p (−L) h (L) (1)

  The convolution unit 42 shifts the estimated delay profile one sample at a time from the state of FIG. 9A to the right in the figure, and moves the start position for generating the generated signal one sample at a time, while moving the zeroth sample x ( 0), the first and subsequent samples x (1) to x (L-1) are calculated, and finally L samples x (0) to x (x) of the estimated interference component are calculated. L-1) (that is, L convolution calculation results) is obtained. However, the range for calculating the convolution operation may be made smaller than L samples according to the corresponding delay time.

FIG. 9B shows a state where the estimated delay profile is shifted by m samples (0 ≦ m <L) with reference to the head of the generated signal. At this time, the m-th sample x (m ) Is obtained. The m-th sample x (m) is represented by the following formula (2).

  FIG. 9C shows a state in which the estimated delay profile is shifted by (L−1) samples with reference to the head of the generated signal, and the end of the generated signal and the end of the estimated delay profile are aligned. Sometimes the (L-1) th sample x (L-1) of the estimated interference component is obtained.

  As described above, when one sample of the estimated interference component is calculated, the convolution unit 42 performs complex multiplication of the estimated delay profile and the generated signal for each sample over (L + 1) sample periods, and obtains (L + 1) number of obtained samples. By calculating the sum of the multiplication results, one sample of the convolution calculation result is obtained. Further, the convolution unit 42 performs the calculation for obtaining the one sample L times while moving the estimated delay profile one sample at a time with respect to the generated signal to obtain L samples of the estimated interference component.

  By performing the above convolution calculation, an interference component estimation result (estimated interference component) by a known signal included in the effective symbol section A shown in FIG. 6 is obtained.

  With reference to FIG. 8 again, an example of the configuration of the convolution unit 42 will be described. In FIG. 8, the convolution unit 42 includes a complex multiplication unit 43, an addition unit 44, and a delay unit 45.

The complex multiplication unit 43 calculates a complex multiplication of the estimated delay profile sample output from the storage unit 30 and the generated signal sample output from the known signal generation unit 41, and outputs the calculation result to the addition unit 44. . In the present embodiment, the complex multiplier 43 receives the estimated delay profile sample (a + jb) and the generated signal sample (c + jd), and performs complex multiplication represented by the following equation (3) by multiplying the real numbers by four The multiplication units 46-1 to 46-4 and the two addition units 47-1 and 47-2 that add real numbers are performed.
(A + jb) (c + jd) = (ac−bd) + j (bc + ad) (3)

  The multiplication units 46-1, 46-2, 46-3, and 46-4 calculate ac, bd, bc, and ad, respectively, and the addition units 47-1 and 47-2 respectively calculate (ac-bd) and ( bc + ad) is calculated.

  The complex multiplier 43 receives (L + 1) samples of the estimated delay profile from the storage unit 30 one sample at a time, and supplies the (L + 1) samples of the generated signal from the known signal generator 41 one sample at a time. The complex multiplication unit 43 sequentially performs the complex multiplication and sequentially outputs (L + 1) complex multiplication results.

  The adder 44 calculates (L + 1) complex multiplications output from the complex multiplier 43 by calculating the sum of the output of the complex multiplier 43 and the output of the delay unit 45 that delays the output of the adder 44. Calculate the sum of the results.

  The number of complex multiplications required to obtain one convolution operation result (that is, one sample of the estimated interference component) is (L + 1) times. The number of complex multiplications required to calculate the overall estimation result of interference components (that is, all samples of estimated interference components) from known signals included in one effective symbol period A is (L + 1) × L times.

  Even if the known signal generation unit 41 generates the generated signals in the reverse order and the convolution unit 42 reads the estimated delay profile from the storage unit 30 in the ascending order, the same calculation result as above can be obtained with the same calculation amount. It is done.

  Hereinafter, for comparison, a technique considered from the description of Non-Patent Document 1 (the technique of Non-Patent Document 1) will be described.

  According to the description of Non-Patent Document 1, an interference component due to a known signal included in the first part B of the section A in FIG. 3 and an interference component due to a known signal included in the subsequent part C subsequent to the section A are estimated. After subtracting the estimated interference components of the head part B and the subsequent part C from the head part B and the subsequent part C of the received signal, respectively, the signal of the subsequent part C of the received signal is added to the head part B, so that a delayed wave A method of supplementing the end portion of the effective symbol to the section A is conceivable. In this method, the interference component included in the received signal is estimated before the end portion of the effective symbols of the delayed waves 1 and 2 is supplemented to the section A.

10 and 11 are diagrams for explaining interference component estimation processing in the technique of Non-Patent Document 1. FIG.
In the technique of Non-Patent Document 1, when estimating the interference component of the head portion B of the effective symbol section A of the nth effective symbol, 0 is added for L samples after the nth known signal as shown in FIG. The generated signal and a convolution operation of the generated signal and the estimated delay profiles h (0) to h (L), and L samples y (0) to y (L-1) of the estimated interference components are obtained. obtain. This convolution operation is performed while shifting the estimated delay profile one sample at a time, as in the present embodiment.

  FIG. 10A shows a state in which the head of the generated signal and the head of the estimated delay profile are aligned. At this time, the zeroth sample y (0) of the estimated interference component is obtained. FIG. 10B shows a state where the estimated delay profile is shifted by m samples (0 ≦ m <L) with reference to the head of the generated signal. At this time, the m-th sample y of the estimated interference component (M) is obtained. Further, FIG. 10C shows a state in which the estimated delay profile is shifted by (L−1) samples with respect to the head of the generated signal, and the end of the generated signal and the end of the estimated delay profile are aligned. At this time, the (L-1) -th sample y (L-1) of the estimated interference component is obtained.

  When estimating the interference component of the head portion B, the number of complex multiplications required to obtain one sample of the estimated interference component is (L + 1) times, and the complex multiplication required to obtain L samples of the estimated interference component The number of times is (L + 1) × L times.

  Further, in the technique of Non-Patent Document 1, when estimating the interference component of the subsequent portion C of the effective symbol period A of the nth effective symbol, as shown in FIG. 11, L is preceded by the (n + 1) th known signal. A generated signal with 0 samples is generated, and the generated signal and the estimated delay profiles h (0) to h (L) are subjected to a convolution operation, so that L samples z (0) to z ( L-1) is obtained. This convolution operation is performed while shifting the estimated delay profile one sample at a time, as in the present embodiment.

  FIG. 11A shows a state where the head of the generated signal and the head of the estimated delay profile are aligned, and at this time, the zeroth sample z (0) of the estimated interference component is obtained. FIG. 11B shows a state where the estimated delay profile is shifted by m samples (0 ≦ m <L) with reference to the head of the generated signal. At this time, the m-th sample z of the estimated interference component (M) is obtained. Further, FIG. 11C shows a state in which the estimated delay profile is shifted by (L−1) samples with respect to the beginning of the generated signal, and the end of the generated signal and the end of the estimated delay profile are aligned. At this time, the (L-1) -th sample z (L-1) of the estimated interference component is obtained.

  When estimating the interference component of the tail portion C, the number of complex multiplications required to obtain one sample of the estimated interference component is (L + 1) times, and the complex multiplication required to obtain L samples of the estimated interference component The number of times is (L + 1) × L times.

  As described above, in the technique of Non-Patent Document 1, it is necessary to calculate 2L samples of estimated interference components (that is, the result of convolution calculation), and in order to calculate the interference component due to a known signal for one effective symbol period. The number of complex multiplications required is (L + 1) × 2L times. From this, it can be seen that the amount of calculation is half that of the technique of Non-Patent Document 1 by using the technique of the present embodiment.

  As described above, in the present embodiment, the equalization apparatus (or the received signal processing apparatus) has the received signal included in the head portion of the effective symbol period A with respect to the signal in the effective symbol period A of the received signal. A known signal included in the head portion of the addition signal using an addition signal generation unit that adds the signal of the subsequent portion following the effective symbol period A and outputs the addition signal, and an estimated delay profile estimated from the received signal An interference estimator that estimates the interference component due to and outputs the estimated interference component, and an interference eliminator that removes the interference component due to the known signal from the added signal using the estimated interference component and outputs the added signal after the interference removal With. Therefore, according to the present embodiment, a signal similar to the reception signal when CP is used as the guard interval can be obtained with a small calculation amount from the reception signal when the known signal is used as the guard interval. Can do. Specifically, in the present embodiment, after adding the signal of the subsequent part to the head part, the interference component of the head part is estimated, so when estimating the interference component of the head part and the interference component of the subsequent part, respectively Compared to the above, it is possible to reduce the amount of calculation required for estimating the interference component. More specifically, since the interference component included in the head part is estimated after adding the subsequent part to the head part of the effective symbol period A, it becomes possible to simultaneously estimate the interference component of the head part and the subsequent part, Compared with the case where the interference components of the head portion and the subsequent portion are estimated separately, the amount of calculation required for estimating the interference component can be reduced.

  Further, in the present embodiment, after supplementing the end of the effective symbol of the delayed wave to the effective symbol period A of the received signal, a generated signal corresponding to a signal obtained by connecting two known signals arranged before and after the effective symbol The interference component of the effective symbol period can be estimated simultaneously by estimating the interference component using the, and the number of complex multiplications necessary for estimating the interference component is calculated using the technique of Non-Patent Document 1. Compared to half. Further, the calculation amount can be further reduced by making the delay time of the corresponding delay wave shorter than the L sample period.

  The effects of reducing the amount of calculation are as follows. First, the convolution operation needs to be performed for each transmission symbol, and the convolution operation time must be shorter than the transmission symbol length in order to process the received signal sequentially (without delay). In the technique of Non-Patent Document 1, the operation clock frequency of the device required for making the convolution operation time equal to one transmission symbol length is fc [Hz]. When the technique of the present embodiment in which the calculation amount is halved is used, the convolution calculation is completed within one transmission symbol length even if the calculation is performed at the operation clock frequency of fc / 2 [Hz]. That is, in this embodiment, the operation clock frequency can be halved and power consumption can be reduced as compared with the technique of Non-Patent Document 1. Further, when the operation clock frequency is constant, according to the present embodiment, the calculation time can be shortened compared with the technique of Non-Patent Document 1.

  In the above description, the case where the effective symbol period A of the received signal coincides with the effective symbol period of the main wave is shown. However, the effective symbol period A may be at a position where no interference occurs between adjacent symbols. It is not necessary to coincide with the effective symbol section of the main wave.

  For example, when the maximum delay time of the delayed wave is a D sample period (D <L) shorter than the guard interval length, the effective symbol period A is temporally forward with respect to the effective symbol period of the main wave (FIG. 3). Can be shifted by R samples (0 ≦ R ≦ LD) to the left). When the effective symbol period A is thus shifted by R samples, the estimated interference component can be calculated by performing a convolution operation between the estimated delay profile shifted by R samples and the generated signal.

  Hereinafter, this will be specifically described with reference to FIGS. 12 and 13. FIG. 12 shows a case where the effective symbol period A coincides with the effective symbol period of the main wave, and FIG. 13 shows a case where the effective symbol period A is shifted leftward in the figure by R samples. Each of FIGS. 12 and 13 includes a main wave and a delay wave included in the delay reception signal, a main wave and a delay wave included in the reception signal added to the delay reception signal, a generated signal, and the zeroth of the estimated interference component. An estimated delay profile at the time of calculation of the sample x (0) and an estimated delay profile at the time of calculation of the (L-1) th sample x (L-1) of the estimated interference component are shown. 12 and 13, the maximum delay time of the delayed wave is the D sample period (D <L).

  As shown in FIG. 12, when the effective symbol interval A matches the effective symbol interval of the main wave, the estimated interference component is calculated by performing the convolution operation between the generated signal and the estimated delay profile as described above. be able to.

  On the other hand, as shown in FIG. 13, when the effective symbol period A is shifted by R samples in the forward direction (left direction in the figure) from the effective symbol period of the main wave, the estimated delay profile is also only R samples. It is necessary to shift forward in time (leftward in the figure). By performing a convolution operation between the estimated delay profile shifted by R samples and the generated signal, an interference component (known) included in the effective symbol period A of the signal obtained by adding the delayed received signal and the received signal in FIG. Signal component) can be calculated. That is, when the effective symbol period A is shifted from the effective symbol period of the main wave by R samples, the effective symbol period A coincides with the effective symbol period of the main wave by shifting the estimated delay profile by R samples. The estimated interference component can be calculated by the same convolution calculation as in the case.

  When the estimated delay profile is shifted by R samples, for example, 0 is inserted by R samples before the sample corresponding to the main wave.

Embodiment 2. FIG.
The equalization apparatus according to the second embodiment is different from the equalization apparatus according to the first embodiment in the interference estimation unit, and the other parts are the same. In the following description, the description of the same parts as those in the first embodiment is omitted or simplified, and the same or corresponding elements as those in the first embodiment are denoted by the same reference numerals.

  FIG. 14 is a block diagram showing a configuration of interference estimation section 100 in the second embodiment. In FIG. 14, the interference estimation unit 100 includes a known signal generation unit 110, (N−1) delay units 120-2 to 120-N, and a convolution unit 130. The convolution unit 130 includes N convolution units 131-1 to 131-N and a multiplexing unit 132.

  The known signal generation unit 110 outputs a generation signal, similar to the known signal generation unit 41 of the first embodiment.

  The delay units 120-2 to 120-N are connected in series to the known signal generation unit 41, delay the generation signal output from the known signal generation unit 110 by one sample, and delay by one sample (N -1) Output generation signals. That is, the delay unit 120-n (2 ≦ n ≦ N) outputs a generation signal obtained by delaying the generation signal output from the known signal generation unit 110 by (n−1) samples.

  The convolution units 131-1 to 131-N respectively correspond to generated signals among the N generated signals output from the known signal generating unit 110 and the (N−1) delay units 120-2 to 120-N. And a convolution operation with the estimated delay profile output from the delay profile estimation unit 20 (or storage unit 30).

  In the example of FIG. 14, the convolution units 131-1 to 131-N are respectively complex multiplication units 133-1 to 133-N, addition units 134-1 to 134-N, and delay units 135-1 to 135-N. including. Complex multiplier 133-n, adder 134-n, and delay 135-n (1 ≦ n ≦ N) are respectively complex multiplier 43, adder 44, and delay 45 in FIG. 8 of the first embodiment. Has the same function. The output of the known signal generator 110 is input to the multiplier 133-1, and the generated signal output from the delay unit 120-n, that is, the known signal generator, is input to the multiplier 133-n (2 ≦ n ≦ N). A signal obtained by delaying the output of the unit 110 by (n−1) samples is input.

  In the present embodiment, the convolution unit 130 calculates the estimated interference component by performing convolution operations of the generated signal and the estimated delay profile in parallel by the convolution units 131-1 to 131-N. That is, a plurality of convolution operations are processed in parallel. Specifically, the convolution units 131-1 to 131-N receive N outputs from the known signal generation unit 110 and the delay units 120-2 to 120-N, and perform parallel processing on convolution operations of consecutive N samples. To do.

  FIG. 15 shows the correspondence between the estimated delay profile input to the convolution units 131-1 to 131-4 and the generated signal in the example of the parallel processing number N = 4. In FIG. 15, the convolution unit 131-4 performs the 0th convolution operation to calculate the 0th sample x (0) of the estimated interference component, and the convolution unit 131-3 performs the 1st convolution operation. The first sample x (1) of the estimated interference component is calculated, and the convolution unit 131-2 performs the second convolution operation to calculate the second sample x (2) of the estimated interference component, and the convolution unit 131. −1 calculates the third sample x (3) of the estimated interference component by performing the third convolution operation.

  In this way, it is possible to perform convolution operations in parallel by inputting generated signals having different start positions to a plurality of convolution units.

  Returning to FIG. 14, the multiplexing unit 132 multiplexes signals output from the convolution units 131-1 to 131-N. Specifically, the multiplexing unit 132 performs parallel-serial conversion on the outputs of the N convolution units 131-1 to 131-N and outputs them in ascending order. That is, the 0, 1, 2 and 3rd samples x (0), x (1), x (2) and x (3) which are the 0, 1, 2 and 3rd convolution calculation results are output in this order. To do.

  In Embodiment 1, the estimated delay profile is shifted by one sample, and the convolution calculation is performed while shifting the start position of the generated signal by one sample. On the other hand, in the present embodiment, convolution operations are performed in parallel while shifting the estimated delay profile by N samples with respect to the generated signal. In this case, when the delay time up to the guard interval length (L sample length) is supported, the estimated delay profile is shifted L / N times to obtain L convolution calculation results (L samples of the estimated interference component). . However, the convolution operation period may be shortened according to the delay time of the corresponding delayed wave.

  In the present embodiment, the convolution calculation for N samples of the estimated interference component is performed using the estimated delay profile for (L + 1) samples read from the storage unit 30. At this time, the number of times of reading from the storage unit 30 necessary for performing the convolution operation for L samples of the estimated interference component is (L + 1) × L / N times. On the other hand, when parallel processing is not performed, reading from the storage unit 30 is required (L + 1) × L times.

  Thus, according to the present embodiment, the number of times of reading from the storage unit 30 can be reduced by performing parallel processing of the convolution operation. Thereby, for example, the clock frequency for operating the storage unit 30 can be reduced, and the power consumption can be reduced.

  Moreover, according to this Embodiment, compared with the technique of a nonpatent literature 1, the following effects are acquired. Here, it is assumed that a memory such as a RAM is used as the storage unit 30. When the above parallel processing is applied to the convolution operation in the technique of Non-Patent Document 1, (L + 1) × 2 L / N times of memory reading are necessary when performing the convolution operation. Let fm [Hz] be the memory clock frequency required to perform the convolution operation within one transmission symbol length. In the present embodiment, the number of memory readings required for the convolution operation is (L + 1) × L / N times, so even if the memory is operated at a clock frequency of fm / 2 [Hz], it is within one transmission symbol length. The convolution operation is completed. That is, in this embodiment, the operating frequency of the memory can be halved and power consumption can be reduced as compared with the technique of Non-Patent Document 1.

  Further, in the present embodiment, similarly to the first embodiment, the calculation amount of the convolution calculation can be reduced by half compared to the technique of Non-Patent Document 1. As a result, the number of parallel processes necessary for completing the convolution operation within a predetermined time is halved compared to the technique of Non-Patent Document 1, and the circuit scale can be reduced.

Embodiment 3 FIG.
The equalization apparatus in the third embodiment is different from the equalization apparatuses in the first and second embodiments in the interference estimation unit, and the other parts are the same. In the following description, the description of the same parts as those of the first and second embodiments will be omitted or simplified, and the same or corresponding elements as those of the first and second embodiments will be denoted by the same reference numerals.

  FIG. 16 is a block diagram showing a configuration of interference estimation section 200 in the third embodiment. In FIG. 16, the interference estimation unit 200 includes a known signal generation unit 210 and a convolution unit 220. The known signal generation unit 210 includes N (N is an integer of 2 or more) known signal generation units 211-1 to 211 -N, and the convolution unit 220 includes N convolution units 221-1 to 221 -N and A multiplexing unit 222 is included.

  The known signal generation units 211-1 to 211 -N generate first to Nth generation signals whose start positions are shifted by one sample as generation signals, respectively. Specifically, the N generation signals output from the known signal generation units 211-1 to 211-N are output from the known signal generation unit 110 and the delay units 120-2 to 120-N of the second embodiment, respectively. Are the same as the N generated signals.

  The convolution units 221-1 to 221-N respectively correspond to the corresponding generated signals among the first to Nth generated signals output from the known signal generating units 211-1 to 211-N, and the delay profile estimating unit 20 ( Alternatively, a convolution operation with the estimated delay profile output from the storage unit 30) is performed.

  In the example of FIG. 16, the convolution units 221-1 to 221 -N are respectively complex multiplication units 223-1 to 223 -N, addition units 224-1 to 224 -N, and delay units 225-1 to 225 -N. including. These are the same as those in the first and second embodiments. The generation signal output from the known signal generation unit 211-n is input to the complex multiplication unit 223-n (1 ≦ n ≦ N).

  In the present embodiment, the convolution unit 220 performs the convolution operation of the generated signal and the estimated delay profile in parallel by the N convolution units 221-1 to 221-N in the same manner as in the second embodiment, thereby estimating interference. Calculate the components. That is, a plurality of convolution operations are processed in parallel.

  The multiplexing unit 222 multiplexes the signals output from the convolution units 221-1 to 221-N. Specifically, the multiplexing unit 222 performs parallel-serial conversion on the outputs of the N convolution units 221-1 to 221 -N and outputs them in ascending order, as in the second embodiment.

  As described above, as can be seen from a comparison between FIG. 14 and FIG. 16, in the present embodiment, the generation method of the generation signal input to the N convolution units 221-1 to 221 -N is implemented. This is different from Form 2.

  In Embodiment 2, the interference estimation unit 100 delays the generated signal output from one known signal generation unit 110 by one sample using (N−1) delay units 120-2 to 120-N. In addition, N generation signals delayed by one sample are respectively input to the corresponding convolution units 131-1 to 131-N. On the other hand, in the present embodiment, the interference estimation unit 200 generates N generation signals whose start positions are shifted by one sample by the N known signal generation units 211-1 to 211 -N, and The generated signals are input to the corresponding convolution units 221-1 to 221-N, respectively.

  According to the third embodiment described above, the same effect as in the first and second embodiments can be obtained. For example, as in the second embodiment, the number of reads to the storage unit 30 can be reduced. As a result, the clock frequency for operating the storage unit 30 can be reduced, and the power consumption can be reduced. Further, as in the first embodiment, the number of complex multiplications necessary for estimating interference components is halved compared to the technique of Non-Patent Document 1, and the circuit scale can be reduced.

Embodiment 4 FIG.
The equalization apparatus in the fourth embodiment is different from the equalization apparatuses in the first to third embodiments in the interference estimation unit, and the other parts are the same. In the following description, the description of the same parts as those of the first to third embodiments will be omitted or simplified, and the same or corresponding elements as those of the first to third embodiments will be denoted by the same reference numerals.

  In the present embodiment, the known signal is a binary signal of 0 or 1, and the binary values of 0 and 1 correspond to complex signals of (+ 1 + j) and (−1−j), respectively. For example, in the Chinese terrestrial digital broadcasting standard DTMB, the known signal is a pseudo-random sequence (PN sequence), and binary values of 0 and 1 correspond to the complex signal.

  FIG. 17 is a block diagram showing a configuration of interference estimation section 300 in the fourth embodiment. In FIG. 17, the interference estimation unit 300 includes a known signal generation unit 310 and a convolution unit 320. The convolution unit 320 includes a complex multiplication unit 330 and an integration unit 340.

  The known signal generation unit 310 generates and outputs a generation signal as in the first embodiment. However, in the present embodiment, since the known signal is a binary signal as described above, the known signal generation unit 310 generates and outputs a binary generation signal. That is, the known signal generator 310 outputs 1-bit information of 0 or 1.

  The complex multiplier 330 calculates a complex multiplication of the generated signal output from the known signal generator 310 and the estimated delay profile output from the delay profile estimator 20 (or the storage unit 30), and outputs the multiplication result. .

  The integrator 340 integrates the multiplication result output from the complex multiplier 330 and outputs an estimated interference component. For example, the integration unit 340 includes the addition unit 44 and the delay unit 45 described in the first embodiment, and calculates the total sum of the complex multiplication results output from the complex multiplication unit 330.

Here, when the known signal is a binary signal of (+ 1 + j) or (−1−j), the complex multiplication of the estimated delay profile sample (a + jb) and the generated signal sample is expressed by the following equation (4): It is represented by (5). Equation (4) shows the case where the generated signal is (+ 1 + j), and Equation (5) shows the case where the generated signal is (−1−j).
(A + jb) (1 + j) = (ab) + j (a + b) (4)
(A + jb) (− 1−j) = (− a + b) + j (−a−b) (5)

  As shown in FIG. 17, in the present embodiment, complex multiplication section 330 includes subtraction section 331, addition section 332, sign inversion section 333, and selection section 334.

  The subtraction unit 331 subtracts the imaginary part b from the real part a of the estimated delay profile output from the delay profile estimation unit 20 (or the storage unit 30), and outputs a subtraction result (ab).

  The adding unit 332 adds the real part a and the imaginary part b of the estimated delay profile output from the delay profile estimating unit 20 (or the storage unit 30), and outputs the addition result (a + b).

  The sign inverting unit 333 generates a real part for a complex signal (ab) + j (a + b) in which the output (ab) of the subtractor 331 is a real part and the output (a + b) of the adder 332 is an imaginary part. Then, the sign of the imaginary part is inverted, and the complex signal (−a + b) + j (−a−b) after the sign inversion is output.

  The selection unit 334, based on the binary generation signal output from the known signal generation unit 310, the complex signal (a−b) + j (a + b) before the sign inversion and the complex signal (−a + b) after the sign inversion One of + j (−a−b) is selected and output to the integrating unit 340 as a multiplication result. Specifically, the selection unit 334 selects the output (−a + b) + j (−a−b) of the sign inversion unit 333 when the output of the known signal generation unit 310 is 1, and inverts the sign when the output is 0. The signal (ab) + j (a + b) which is not performed is selected.

  According to the present embodiment, in addition to the effects of the first to third embodiments, the circuit scale of the complex multiplication unit can be reduced.

Embodiment 5 FIG.
The equalization apparatus according to the fifth embodiment is further provided with a maximum delay detection unit that detects the maximum delay time of the delay wave with respect to the equalization apparatuses according to the first to fourth embodiments, and based on the detection result of the maximum delay time. However, the other points are the same. In the following description, the description of the same parts as in the first to fourth embodiments will be omitted or simplified.

  FIG. 18 is a block diagram showing a configuration of equalization apparatus 400 in the fifth embodiment. 18, the equalization apparatus 400 includes an addition signal generation unit 410, a delay profile estimation unit 420, a storage unit 430, an interference estimation unit 440, an interference removal unit 450, an equalization unit 460, and a maximum delay detection unit 470. Among these, the delay profile estimation unit 420, the storage unit 430, and the equalization unit 460 are the same as those in the first to fourth embodiments.

  Maximum delay detector 470 detects the maximum delay time of the delayed wave from the estimated delay profile output from delay profile estimator 420. As a detection method, in the estimated delay profile, a position in the time direction (for example, a sample number) of a sample larger than a preset threshold is searched, and the difference between the minimum value and the maximum value of the searched sample position is maximized. There is a method of setting a delay time. However, in the present embodiment, the detection method of the maximum delay time is not limited to the above method.

  Based on the detection result of the maximum delay detection unit 470, the addition signal generation unit 410 generates an effective symbol at the beginning of the time length corresponding to the maximum delay time of the effective symbol period A with respect to the signal of the effective symbol period A of the received signal. The signal of the subsequent part following the section A is added. Here, the time length corresponding to the maximum delay time is, for example, the same time as the maximum delay time, but may be a time obtained by adding a predetermined time to the maximum delay time.

  In the example of FIG. 18, the addition signal generation unit 410 includes a delay unit 411 and an addition unit 412. The delay unit 411 delays the received signal by an effective symbol length and outputs a delayed received signal. Adder 412 adds the received signal to the beginning of effective symbol period A of the delayed received signal for the delayed received signal output from delay unit 411. Specifically, the adding unit 412 adds the received signal to the delayed received signal by a time length corresponding to the maximum delay time with reference to the head of the effective symbol period A of the delayed received signal.

FIG. 19 is a diagram for explaining processing in the fifth embodiment. FIG. 19 shows the main wave and the delay wave included in the delayed reception signal output from the delay unit 411, and the main wave and the delay wave included in the reception signal added to the delay reception signal. In Figure 19, the n-th (n is an integer) are focused on the effective symbol S _n of, shown effective symbol section A corresponding to the n-th effective symbol S _n in the delayed received signal. Here, the effective symbol interval A is consistent with the n-th valid symbol interval of the effective symbol S _n of the main wave in the delayed received signal. In FIG. 19, the maximum delay time of the delayed wave is a D sample period (D <L). As can be seen from FIG. 19, when the maximum delay time of the delayed wave is shorter than the guard interval length, the length of the known signal that interferes with the effective symbol period A is shorter than the guard interval length.

  As illustrated in FIG. 19, the adder 412 adds the received signal to the delayed received signal for the maximum delay time (D sample period) with reference to the head of the effective symbol period A of the delayed received signal.

  FIG. 20 is a diagram illustrating a signal in the effective symbol period A output from the adding unit 412. As illustrated in FIG. 20, the signal in the effective symbol period A output from the adder 412 includes main symbol and delayed wave effective symbol components, and main signal and delayed wave known signal components. In FIG. 20, paying attention to only the effective symbols, it can be seen that the signal in the effective symbol period A has the same configuration as when the cyclic prefix (CP) is used as the guard interval. On the other hand, the interference component due to the known signal exists in a period of D samples from the head of the effective symbol period A.

  Returning to FIG. 18, interference estimation section 440 estimates the interference component due to the known signal and outputs the estimated interference component in the same procedure as in the first to fourth embodiments. However, while the interference components for L samples are estimated in the first to fourth embodiments, in this embodiment, the interference estimation unit 440 estimates the interference components for D (<L) samples. . This can be realized by limiting the range in which the estimated delay profile is shifted to 0 ≦ m <D in FIG.

  The interference removal unit 450 removes the interference component due to the known signal from the addition signal output from the addition signal generation unit 410 using the estimated interference component output from the interference estimation unit 440, and outputs the addition signal after the interference removal To do. Specifically, the interference removal unit 450 subtracts the output of the interference estimation unit 440 from the output of the addition unit 412, thereby removing the interference component due to the known signal from the output of the addition unit 412. At this time, the subtraction of the L sample period is performed in the first to fourth embodiments, whereas in the present embodiment, D is based on the beginning of the effective symbol section A of the signal output from the adder 412. (<L) Subtraction is performed only during the sample period.

  As described above, in the present embodiment, based on the detection result of the maximum delay time, the signal of the subsequent portion is added to the head portion of the time length corresponding to the maximum delay time with respect to the signal of the effective symbol period A of the received signal. Is added. That is, the range in which interference components are estimated and removed is controlled based on the detection result of the maximum delay time. Therefore, according to the present embodiment, it is possible to further reduce the amount of calculation required for estimating and removing interference components in a radio wave environment in which the maximum delay time is shorter than the guard interval length.

  In the above description, the case where the effective symbol interval A coincides with the effective symbol interval of the main wave is shown. However, as shown in FIG. 21, the effective symbol interval A is illustrated with reference to the effective symbol interval of the main wave. When shifted to the left by R samples, the period of the head part of the effective symbol period A (that is, the period for which the signal of the subsequent part is to be added and the target for interference component estimation and removal) is (D + R). Sample period.

Embodiment 6 FIG.
FIG. 22 is a flowchart showing an equalization method according to the sixth embodiment. This equalization method is executed by, for example, the equalization apparatus 1 according to the first embodiment. In FIG. 22, the equalization method includes an addition signal generation step S10, a delay profile estimation step S20, a storage step S30, an interference estimation step S40, an interference removal step S50, and an equalization step S60. In addition, since the process of each step S10-S60 is the same as the process of each part 10-60 of Embodiment 1, detailed description is abbreviate | omitted in description of each following step.

  The addition signal generation step S10 adds the signal of the succeeding part following the effective symbol period A of the received signal to the head part of the effective symbol period A to the signal of the effective symbol period A of the received signal, Output. Here, it is assumed that the received signal is the same signal as the received signal in the first embodiment.

  In the example of FIG. 22, the addition signal generation step S10 has a delay step S11 and an addition step S12. The delay step S11 delays the received signal by an effective symbol length and outputs a delayed received signal. The adding step S12 adds the received signal to the head portion of the effective symbol period A of the delayed received signal with respect to the delayed received signal output from the delay step S11.

  In the delay profile estimation step S20, the delay profile of the transmission path is estimated from the received signal, and the estimated delay profile is output.

  The storage step S30 holds the estimated delay profile output from the delay profile estimation step S20.

  The interference estimation step S40 uses the estimated delay profile output from the delay profile estimation step S20 (or held by the storage step S30), and is known in the head portion of the addition signal output from the addition signal generation step S10. The interference component due to the signal is estimated, and the estimated interference component is output.

  The interference removal step S50 uses the estimated interference component output from the interference estimation step S40 to remove the interference component due to the known signal from the addition signal output from the addition signal generation step S10, and outputs the added signal after the interference removal To do. Specifically, the interference removal step S50 removes the interference component by subtracting the estimated interference component obtained in the interference estimation step S40 from the signal obtained in the addition step S12.

  The equalization step S60 equalizes the added signal (signal in the effective symbol period A) after interference output output from the interference cancellation step S50, using the estimated delay profile output from the delay profile estimation step S20.

  FIG. 23 is a flowchart of the interference estimation step S40 in FIG. In FIG. 23, the interference estimation step S40 includes a known signal generation step S41 and a convolution step S42.

  The known signal generation step S41 generates a generation signal corresponding to a signal obtained by connecting two known signals arranged as guard intervals before and after the effective symbol.

  The convolution step S42 performs a convolution operation on the generated signal output from the known signal generation step S41 and the estimated delay profile output from the delay profile estimation step S20 for the period of the head portion of the effective symbol period A, and estimates The interference component is calculated.

  In the example of FIG. 23, the convolution step S42 includes a complex multiplication step S43 and an integration step S44.

  The complex multiplication step S43 calculates the complex multiplication of the estimated delay profile and the generated signal output from the known signal generation step S41, and outputs the calculation result.

  The integration step S44 obtains a convolution calculation result of the estimated delay profile and the generated signal by calculating the sum of (L + 1) calculation results of the complex multiplication step S43.

  As described in the first embodiment, the number of multiplications necessary to calculate an interference component due to a known signal included in one effective symbol period A is (L + 1) × L times. On the other hand, the number of multiplications required by the technique of Non-Patent Document 1 is (L + 1) × 2L times.

  According to the present embodiment, the same effect as in the first embodiment can be obtained. Specifically, after supplementing the effective symbol period A of the received signal with the end of the effective symbol of the delayed wave, the interference component is estimated using adjacent known signals that are continuously generated, thereby obtaining the effective symbol period A. Thus, the number of complex multiplications required for estimating the interference component is halved compared to the technique of Non-Patent Document 1. As a result, the calculation speed (for example, the number of CPU clocks) required for completing the above calculation within a predetermined one transmission symbol period can be reduced, and the power consumption can be reduced.

  Moreover, when the calculation speed is constant, according to the present embodiment, the calculation time can be shortened compared to the technique of Non-Patent Document 1.

  In addition, this invention is not limited to the said embodiment, In the range which does not deviate from the summary of this invention, it can implement with a various aspect.

  1,400 Equalizer, 10,410 Addition signal generation unit, 11,411 delay unit, 12,412 addition unit, 20,420 Delay profile estimation unit, 30,430 storage unit, 40, 100, 200, 300, 440 Interference estimation unit 41, 110, 210, 211-1 to 211-N, 310 known signal generation unit 42, 130, 131-1 to 131-N, 220, 221-1 to 221-N, 320 convolution unit, 50,450 Interference remover, 60,460 equalization unit, 120-2 to 120-N delay unit, 132,222 multiplexing unit, 330 complex multiplication unit, 331 subtraction unit, 332 addition unit, 333 code inversion unit, 334 Selection unit, 340 integration unit, 470 maximum delay detection unit.

Claims (9)

Of a received signal obtained by receiving, via a transmission line, a transmission signal having a transmission symbol composed of an effective symbol including information to be transmitted and a known signal added as a guard interval to the effective symbol. An equalizer that compensates for distortion,
For a signal in a predetermined interval having an effective symbol length corresponding to the effective symbol in the received signal, a signal in a subsequent portion following the predetermined interval in the received signal is added to a head portion of the predetermined interval, and addition is performed. Addition signal generation means for outputting a signal;
Delay profile estimating means for estimating a delay profile of the transmission path from the received signal and outputting an estimated delay profile;
Using the estimated delay profile output from the delay profile estimation means, estimate the interference component due to the known signal included in the head portion of the addition signal output from the addition signal generation means, and output the estimated interference component Interference estimation means;
Using the estimated interference component output from the interference estimation means, the interference removal means for removing the interference component from the addition signal output from the addition signal generation means, and outputting the addition signal after interference removal;
Equalizing means for equalizing the summed signal after interference output outputted from the interference removing means using an estimated delay profile outputted from the delay profile estimating means;
Equipped with a,
The interference estimation means includes
Known signal generating means for generating a generated signal corresponding to a signal obtained by connecting two known signals arranged before and after the effective symbol;
A convolution means for calculating the estimated interference component by convolving a generation signal output from the known signal generation means and an estimated delay profile output from the delay profile estimation means for the period of the head portion;
An equalizing apparatus comprising: The interference estimation means further includes (N−1) (N is an integer of 2 or more) series-connected delay means for delaying the generated signal output from the known signal generating means by one sample at a time,
The convolution means is
The convolution of the corresponding generated signal among the N generated signals output from the known signal generating means and the (N−1) delay means and the estimated delay profile output from the delay profile estimating means, respectively. First to Nth convolution means for performing calculations;
Multiplexing means for multiplexing the signals output from the first to Nth convolution means;
Including
The first to Nth convolution means performs a convolution operation of the generated signal and the estimated delay profile in parallel to calculate the estimated interference component.
The equalization apparatus according to claim 1 . The known signal generating means includes first to Nth known signal generating means for generating first to Nth (N is an integer of 2 or more) generated signals whose start positions are shifted by one sample as the generated signals. Including
The convolution means is
Each of the first to Nth generated signals output from the first to Nth known signal generating means performs a convolution operation with the corresponding generated signal and the estimated delay profile output from the delay profile estimating means. First to Nth convolution means to perform;
Multiplexing means for multiplexing the signals output from the first to Nth convolution means;
Including
The first to Nth convolution means performs a convolution operation of the generated signal and the estimated delay profile in parallel to calculate the estimated interference component.
The equalization apparatus according to claim 1 . The known signal is a binary signal of (+ 1 + j) or (−1−j),
The convolution means is
Complex multiplication means for calculating a complex multiplication of the generated signal output from the known signal generation means and the estimated delay profile output from the delay profile estimation means, and outputting a multiplication result;
Integrating means for integrating the multiplication results output from the complex multiplying means;
Including
The complex multiplication means includes
Subtracting means for subtracting the imaginary part from the real part of the estimated delay profile output from the delay profile estimating means;
Adding means for adding the real part and the imaginary part of the estimated delay profile output from the delay profile estimating means;
Sign inversion means for inverting the sign of the real part and imaginary part and outputting the complex signal after sign inversion for the complex signal with the output of the subtraction means as the real part and the output of the addition means as the imaginary part;
Selection means for selecting one of the complex signal before sign inversion and the complex signal after sign inversion based on a binary generation signal output from the known signal generation means and outputting the result as a multiplication;
The equalization apparatus according to claim 1 , comprising: Maximum delay detection means for detecting the maximum delay time of the delay wave from the estimated delay profile output from the delay profile estimation means,
The addition signal generation means, based on the detection result of the maximum delay detection means, with respect to the signal of the predetermined section of the received signal, the head portion of the time length according to the maximum delay time of the predetermined section, Add the signal of the following part,
The equalization apparatus according to any one of claims 1 to 4 , wherein The addition signal generating means includes
Delay means for delaying the received signal by an effective symbol length and outputting a delayed received signal;
Adding means for adding the received signal to the head portion of the predetermined section of the delayed received signal with respect to the delayed received signal output from the delay means;
Equalizer according to claim 1, any one of 5, characterized in that it comprises a. A received signal obtained by receiving, via a transmission path, a transmission signal having a transmission symbol composed of an effective symbol including information to be transmitted and a known signal added as a guard interval to the effective symbol. A received signal processing device for processing,
For a signal in a predetermined interval having an effective symbol length corresponding to the effective symbol in the received signal, a signal in a subsequent portion following the predetermined interval in the received signal is added to a head portion of the predetermined interval, and addition is performed. Addition signal generation means for outputting a signal;
Using the delay profile of the transmission path estimated from the received signal, the interference component due to the known signal included in the head portion of the sum signal output from the sum signal generator is estimated, and the estimated interference component is output Interference estimation means for
Using the estimated interference component output from the interference estimation means, the interference removal means for removing the interference component from the addition signal output from the addition signal generation means, and outputting the addition signal after interference removal;
Equipped with a,
The interference estimation means includes
Known signal generating means for generating a generated signal corresponding to a signal obtained by connecting two known signals arranged before and after the effective symbol;
A convolution means for calculating the estimated interference component by performing a convolution operation on the generated signal output from the known signal generating means and the delay profile for the period of the head portion;
Reception signal processing apparatus characterized by having a. Of a received signal obtained by receiving, via a transmission line, a transmission signal having a transmission symbol composed of an effective symbol including information to be transmitted and a known signal added as a guard interval to the effective symbol. An equalization method for compensating for distortion,
For a signal in a predetermined interval having an effective symbol length corresponding to the effective symbol in the received signal, a signal in a subsequent portion following the predetermined interval in the received signal is added to a head portion of the predetermined interval, and addition is performed. A sum signal generation step for outputting a signal;
A delay profile estimating step of estimating a delay profile of the transmission path from the received signal and outputting an estimated delay profile;
Using the estimated delay profile output from the delay profile estimation step, the interference component due to the known signal included in the head portion of the addition signal output from the addition signal generation step is estimated, and the estimated interference component is output. An interference estimation step;
Using the estimated interference component output from the interference estimation step, the interference removal step of removing the interference component from the addition signal output from the addition signal generation step and outputting the addition signal after interference removal;
An equalization step for equalizing the summed signal after interference output output from the interference cancellation step using the estimated delay profile output from the delay profile estimation step;
I have a,
The interference estimation step includes:
A known signal generating step for generating a generated signal corresponding to a signal obtained by concatenating two known signals arranged before and after the effective symbol;
A convolution step of calculating the estimated interference component by performing a convolution operation on the generated signal output from the known signal generation step and the estimated delay profile output from the delay profile estimation step for the period of the head portion;
An equalization method comprising: A received signal obtained by receiving, via a transmission path, a transmission signal having a transmission symbol composed of an effective symbol including information to be transmitted and a known signal added as a guard interval to the effective symbol. A received signal processing method to process,
For a signal in a predetermined interval having an effective symbol length corresponding to the effective symbol in the received signal, a signal in a subsequent portion following the predetermined interval in the received signal is added to a head portion of the predetermined interval, and addition is performed. A sum signal generation step for outputting a signal;
Using the delay profile of the transmission path estimated from the received signal, the interference component due to the known signal included in the head portion of the addition signal output from the addition signal generation step is estimated, and the estimated interference component is output An interference estimation step,
Using the estimated interference component output from the interference estimation step, the interference removal step of removing the interference component from the addition signal output from the addition signal generation step and outputting the addition signal after interference removal;
I have a,
The interference estimation step includes:
A known signal generating step for generating a generated signal corresponding to a signal obtained by concatenating two known signals arranged before and after the effective symbol;
A convolution step of calculating the estimated interference component by performing a convolution operation on the generation signal output from the known signal generation step and the delay profile for the period of the head portion;
Reception signal processing method characterized in that it comprises a.

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