JP5990940B2 - Method for manufacturing circuit connection structure - Google Patents

Description

  The present invention relates to a method for manufacturing a circuit connection structure.

  2. Description of the Related Art Conventionally, when manufacturing a circuit connection structure such as a semiconductor device, for example, a wire bonding method using a thin metal wire such as a gold wire is widely used for connecting a semiconductor chip and a substrate. On the other hand, in order to meet the demands for high functionality, high integration, high speed, etc. for the circuit connection structure, a flip chip that directly connects the semiconductor chip and the substrate by forming conductive protrusions called bumps on the semiconductor chip or substrate Connection methods (FC connection methods) are becoming widespread.

  Flip chip connection methods include metal bonding using solder, tin, gold, silver, copper, or the like, metal bonding by applying ultrasonic vibration, method of maintaining mechanical contact by the shrinkage force of the resin, etc. It has been known. Among these, as a flip chip connection method, a method of metal bonding using solder, tin, gold, silver, copper, or the like is generally used from the viewpoint of reliability of the connection portion. For example, in connection between a substrate and a semiconductor chip, a COB (Chip On Board) type connection method that is actively used in BGA (Ball Grid Array), CSP (Chip Size Package), etc. is also a flip chip connection method. .

  Furthermore, in order to meet the demands for further miniaturization, thinning, and high functionality, chip stack type packages, POPs (Package On Packages), TSVs (Through-Silicon Vias), etc., in which the above connection methods are stacked and multi-staged, etc. Has also started to spread widely. Such a technique can reduce the package by arranging the objects to be stacked not in two dimensions (planar) but in three dimensions (three-dimensional). For this reason, the above-described technology is widely used, and is effective in improving the performance of the semiconductor, reducing noise, reducing the mounting area, and saving power, and is attracting attention as a next-generation semiconductor wiring technology.

  Flip chip mounting methods (connection methods) are roughly divided into two, namely, a Capillary-Flow method and a Pre-applied method (for example, see Patent Documents 1 to 4 below). The Capillary-Flow method is a method of supplying a semiconductor sealing adhesive to the connection portion after connecting the connection portions through a heating process in which a metal (solder or the like) of the connection portion is melted in a reflow furnace or the like. The pre-applied system is a system in which the connection parts are connected to each other through a heating process in which the connection parts are heated to a melting point or higher of the material constituting the connection parts in a state where the adhesive for semiconductor sealing is supplied.

  Area array type semiconductor packages used in CPUs, MPUs, etc. are strongly required to have high functionality, and it is required to increase the size of the chip, increase the number of pins (bumps, wiring), and increase the pitch and gap density. ing. On the other hand, in the Capillary-Flow method, as the chip becomes larger, the number of pins increases, and the bump pitch becomes narrower and the gap becomes narrower, it takes time to inject the adhesive for semiconductor sealing. May decrease. On the other hand, in the pre-applied method, there is no concern about the adhesive injection.

JP 2001-223227 A JP 2002-283098 A JP 2005-272547 A JP 2006-169407 A

  By the way, when the circuit members are electrically connected to each other, a connection process for heating at a temperature equal to or higher than the melting point of the material constituting the connection portion (for example, a process for heating at a temperature of 240 ° C. or higher if the metal is solder), In the subsequent heating process (for example, thermosetting process), the circuit connection structure may become high temperature. In this case, if the coefficients of thermal expansion of the constituent members of the circuit connection structure (for example, the semiconductor chip and the printed circuit board) are different, the temperature of the circuit connection structure is lowered after the circuit connection structure is heated to a high temperature. In some cases, the circuit connection structure may be warped due to a difference in shrinkage between the constituent members.

  When the warpage generated in such a circuit connection structure increases, for example, in a package in which the circuit connection structure needs to be mounted on a mother board or the like, the connection portion may be damaged during mounting, or electrical connection may occur due to insufficient contact. It may be difficult to secure a sufficient connection. Further, when the warpage generated in the circuit connection structure increases, the size in the stacking direction occupied by the package tends to increase, and thus it becomes difficult to cope with the reduction in thickness and size of electrical devices.

  The present invention has been made to solve the above-described problems, and an object thereof is to provide a method for manufacturing a circuit connection structure capable of reducing warpage.

The method for manufacturing a circuit connection structure according to the present invention includes a first substrate, a first circuit member having a first connection portion disposed on a main surface of the first substrate, and a second substrate. And a preparation step for preparing a second circuit member having a second connection portion arranged on the main surface of the second substrate, and an adhesive between the first substrate and the second substrate A connecting step of crimping the first circuit member and the second circuit member with a layer interposed therebetween to obtain a laminate in which the first connecting portion and the second connecting portion are electrically connected to each other; Thereafter, a first heating step of heating the laminated body at a temperature T1 and a second heating step of heating the laminated body at a temperature T2 after the first heating step, the temperature T1 and the temperature T2 are as follows: The condition of the formula (1) is satisfied.
Temperature T1> temperature T2 ≧ glass transition temperature of the cured product of the adhesive layer (1)

  In the method for manufacturing a circuit connection structure according to the present invention, in the second heating step, the laminate is heated at a temperature equal to or higher than the glass transition temperature of the cured product of the adhesive layer, whereby flexibility for alleviating warpage. Is maintained in the state of the adhesive layer. And in the manufacturing method of the circuit connection structure which concerns on this invention, a 2nd heating process WHEREIN: By heating a laminated body at the temperature below the heating temperature of a 1st heating process, a 1st heating process and a 2nd The warpage caused by the temperature difference in the heating process is alleviated during the second process, and the temperature of the second heating process is lower than the temperature of the first heating process, thereby lowering the temperature of the laminate. Since warpage at the time (for example, when returning to room temperature (25 ° C.)) is reduced, warpage remaining in the stacked body after the first heating step can be reduced.

  40-200 degreeC may be sufficient as the glass transition temperature of the hardened | cured material of an adhesive bond layer.

  The adhesive layer may contain an epoxy resin and a curing agent. In this case, the curing of the adhesive layer is likely to proceed, and the occurrence of spring back voids and poor connection due to insufficient curing of the adhesive layer is easily suppressed.

  By the way, a metal such as solder, tin, gold, silver, copper and nickel, and a conductive material containing these are used for many connection portions (for example, bumps and wirings) of the above-described package. When the connection portion is formed of a metal such as copper or solder, the metal is likely to be oxidized and an oxide is likely to be generated at the connection portion, and an impurity such as an oxide tends to adhere to the metal surface. . If these oxides and impurities are present, it may be difficult to ensure sufficient connection reliability and insulation reliability between circuit members, and it may be difficult to assemble the package. On the other hand, the adhesive layer may contain a flux agent. In this case, the flux agent can act as a removing agent to sufficiently express the flux activity. As a result, even when the connection portion is formed of a metal that easily generates oxides or impurities, the oxides and impurities can be removed, so that connection reliability and insulation reliability between circuit members can be further increased. Can be improved. In the pre-applied method, oxides and impurities can be removed at the same time as the connection between the connection portions. Therefore, when such a method for removing oxides and impurities is adopted in the pre-applied method, compared to the capillary-flow method. Workability and productivity can be improved.

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the circuit connection structure which can reduce curvature can be provided. According to the present invention, the circuit connection structure is mounted on the motherboard, such as a package (for example, CPU, MPU, GPU, etc.) that needs to be secondarily mounted on the motherboard after the semiconductor chip is mounted on the printed circuit board. In a package that needs to be mounted, etc., it is possible to prevent the connection part from being damaged and insufficient electrical connection due to insufficient contact, etc., and to reduce the thickness of an electric device using the package. And can easily cope with downsizing.

  Moreover, according to this invention, curvature can also be relieve | moderated efficiently in a short time. Furthermore, according to the present invention, workability and productivity can be improved, and the circuit connection structure can be manufactured at low cost.

It is a schematic cross section which shows the circuit connection structure obtained by the manufacturing method of the circuit connection structure which concerns on one Embodiment of this invention. It is a schematic cross section which shows the circuit connection structure obtained by the manufacturing method of the circuit connection structure which concerns on other embodiment of this invention. It is a schematic cross section which shows the circuit connection structure obtained by the manufacturing method of the circuit connection structure which concerns on other embodiment of this invention. It is a schematic cross section which shows the circuit connection structure obtained by the manufacturing method of the circuit connection structure which concerns on other embodiment of this invention. It is a schematic cross section which shows the circuit connection structure obtained by the manufacturing method of the circuit connection structure which concerns on other embodiment of this invention. It is a schematic cross section which shows the manufacturing method of the circuit connection structure which concerns on one Embodiment of this invention. It is a schematic cross section which shows the manufacturing method of the circuit connection structure which concerns on one Embodiment of this invention.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings as the case may be. However, the present invention is not limited to the following embodiments, and can be implemented with various modifications within the scope of the gist. In the following description, the same or corresponding parts are denoted by the same reference numerals, and redundant description is omitted.

<Circuit connection structure>
A circuit connection structure obtained by the method for manufacturing a circuit connection structure according to the present embodiment will be described with reference to FIGS. FIG. 1 is a schematic cross-sectional view showing a circuit connection structure obtained by the method for manufacturing a circuit connection structure according to the first embodiment. FIG. 2 is a schematic cross-sectional view showing a circuit connection structure obtained by the method for manufacturing a circuit connection structure according to the second embodiment. FIG. 3 is a schematic cross-sectional view showing a circuit connection structure obtained by the method for manufacturing a circuit connection structure according to the third embodiment. FIG. 4 is a schematic cross-sectional view showing a circuit connection structure obtained by a method for manufacturing a circuit connection structure according to another embodiment.

  In the semiconductor device (circuit connection structure) 100 shown in FIG. 1, a COB type connection method is adopted. The semiconductor device 100 includes a circuit member 10, a circuit member 20, connection bumps 30, and connection members 40. The circuit member 10 includes a wired circuit board (first board) 11 and a plurality of wirings (first connection portions) 13 arranged on the main surface 11 a of the wired circuit board 11. The circuit member 20 includes a semiconductor chip (second substrate) 21 and a plurality of wirings (second connection portions) 23 arranged on the main surface 21 a of the semiconductor chip 21. The semiconductor device 100 is, for example, a package including a copper wiring as the wiring 13, a copper pillar as the wiring 23, and a solder bump as the connection bump 30. The arrangement configuration of the connection bumps 30 is, for example, a full array arrangement.

  The printed circuit board 11 and the semiconductor chip 21 face each other and are flip-chip connected by the wirings 13 and 23 and the connection bumps 30. The wiring 13 and the wiring 23 are electrically connected through connection bumps 30. The connection member 40 is formed from a cured product of an adhesive composition that is filled without a gap between the printed circuit board 11 and the semiconductor chip 21. The wirings 13 and 23 and the connection bumps 30 are sealed by the connection member 40 and are shielded from the external environment.

  In the semiconductor device (circuit connection structure) 200 shown in FIG. 2, a COB type connection method is adopted. The semiconductor device 200 is a semiconductor device except that the solder resist (insulating layer) 34 is disposed on the main surface 11a of the printed circuit board 11 and the connection member 40 is disposed between the solder resist 34 and the semiconductor chip 21. The configuration is the same as that of the apparatus 100.

  In the semiconductor device (circuit connection structure) 300 shown in FIG. 3, a COB type connection method is adopted. In the semiconductor device 300, the solder resist 34 is disposed on the main surface 11 a of the printed circuit board 11, the solder resist (insulating layer) 36 is disposed on the main surface 21 a of the semiconductor chip 21, and the connection member 40 is provided. The semiconductor device 100 has the same configuration as that of the semiconductor device 100 except that it is disposed between the solder resist 34 and the solder resist 36.

  Openings are formed in the solder resists 34 and 36 at positions where the connection bumps 30 are arranged. By providing the solder resists 34 and 36, it is possible to suppress the generation of a bridge between the wirings and further improve the connection reliability and the insulation reliability. The solder resists 34 and 36 can be formed using, for example, a commercially available solder resist ink. Specific examples of commercially available solder resist inks include SR series (trade name, manufactured by Hitachi Chemical Co., Ltd.) and PSR4000-AUS series (trade name, manufactured by Taiyo Ink Manufacturing Co., Ltd.).

  In the semiconductor device (circuit connection structure) 400 shown in FIG. 4A, a COC type connection method is adopted. The semiconductor device 400 includes a circuit member 50 having a semiconductor chip 51 and a plurality of wirings 53 arranged on the main surface 51a of the semiconductor chip 51 instead of the circuit member 10, and the semiconductor chip 21 and the semiconductor chip 51 are connected to each other. The semiconductor device 100 has the same configuration as that of the semiconductor device 100 except that the flip-chip connection is performed by 23 and 53 and the connection bump 30.

  A semiconductor device (circuit connection structure) 500 shown in FIG. 4B includes a circuit member 60, a circuit member 70, and a connection member 40. The circuit member 60 includes a printed circuit board (first board) 61 and a plurality of bumps (first connection parts) 63 disposed on the main surface 61 a of the printed circuit board 61. The circuit member 70 includes a semiconductor chip (second substrate) 71 and a plurality of bumps (second connection portions) 73 disposed on the main surface 71 a of the semiconductor chip 71. The printed circuit board 61 and the semiconductor chip 71 are opposed to each other and are flip-chip connected by bumps 63 and 73. The bump 63 and the bump 73 are electrically connected while being in contact with each other. The bumps 63 and 73 are sealed by the connection member 40 and are blocked from the external environment.

  In the semiconductor device (circuit connection structure) 600 shown in FIG. 4C, a circuit member 80 having a semiconductor chip 81 and a plurality of bumps 83 arranged on the main surface 81a of the semiconductor chip 81 is used as the circuit member 60. Instead, it has the same configuration as the semiconductor device 500 except that the semiconductor chip 71 and the semiconductor chip 81 are flip-chip connected by bumps 73 and 83.

  As described above, the configuration of the semiconductor device may be a configuration in which one of the substrates facing each other is a semiconductor chip and the other is a printed circuit board or a semiconductor chip. Further, the configuration of the semiconductor device may be a configuration in which wired circuit boards are connected to each other.

  In a semiconductor device in which electrical connection is made between a semiconductor chip and a printed circuit board, warping is less than that in a semiconductor device employing a connection method such as a COC (Chip On Chip) type in which electrical connection is made between semiconductor chips. Reduction effect is easy to express. Further, the thermal expansion coefficients of the substrates to be connected may be different from each other, and the greater the difference in the thermal expansion coefficient, the more easily the effect of reducing warpage is exhibited. In a semiconductor device in which electrical connection is made between a semiconductor chip and a printed circuit board, warpage tends to occur on the printed circuit board side.

  The connection between the substrates on which the wiring and bumps are arranged on the main surface may be flip-chip connection, and may be any of bump-wiring and metal bonding by the bump and bump. The bump may be formed on either the semiconductor chip or the printed circuit board.

The constituent material of the semiconductor chip is not particularly limited, and various semiconductors such as an elemental semiconductor composed of the same kind of element such as silicon and germanium, and a compound semiconductor such as gallium arsenide and indium phosphide can be used. The thickness of the semiconductor chip is, for example, 20 to 760 μm. The area of the main surface of the semiconductor chip is, for example, 20 to 900 mm ² .

The wiring circuit board (semiconductor substrate) having wiring is not particularly limited as long as it is a normal circuit board, and the surface of the insulating substrate whose main component is glass epoxy, polyimide, polyester, ceramic, epoxy, bismaleimide triazine or the like. In addition, a circuit board having a wiring pattern formed by etching away unnecessary portions of the metal film, a circuit board having a wiring pattern formed by metal plating or the like on the surface of the insulating substrate, and conducting on the surface of the insulating substrate. A circuit board or the like having a wiring pattern formed by printing a conductive material can be used. The thickness of the printed circuit board is, for example, 100 to 2000 μm. The area of the main surface of the printed circuit board is, for example, 25 to 90000 mm ² .

  As materials for wiring (wiring pattern) and bump (conductive protrusion), gold, silver, copper, solder (main components are, for example, tin-silver, tin-lead, tin-bismuth, tin-copper, tin-silver-) Copper, etc.), tin, nickel, etc. are used as the main components. Among these, generally used copper and solder are preferable because they are inexpensive. In this case, it is preferable that flux activity is provided. Further, when a metal that exhibits creep characteristics such as solder is used as the material, the stress in the circuit connection structure is relaxed over time, and the warpage can be further reduced. However, the relaxation amount and relaxation time vary greatly depending on conditions. The wiring and the bump may be composed of only a single component, or may be composed of a plurality of components. Further, the wiring and the bump may be a single layer, or may have a structure in which a plurality of metal layers are laminated. The height of the wiring and the bump is, for example, 1 to 100 μm.

  Gold, silver, copper, solder (main components are, for example, tin-silver, tin-lead, tin-bismuth, tin-copper, tin-silver-copper, etc.), tin, nickel, etc. A metal layer containing as a main component may be formed. Among these, generally used copper and solder are preferable because they are inexpensive. In this case, it is preferable that flux activity is provided. This metal layer may be composed of only a single component, or may be composed of a plurality of components. The metal layer may be a single layer or may have a structure in which a plurality of metal layers are stacked.

  In addition, the circuit connection structure may be formed by stacking a plurality of structures (packages) as shown in the semiconductor devices 100 to 600. In this case, the semiconductor devices 100 to 600 include gold, silver, copper, solder (main components are, for example, tin-silver, tin-lead, tin-bismuth, tin-copper, tin-silver-copper), tin, or nickel. Etc., and may be electrically connected to each other by bumps or wiring including the like. As the material for the bump and wiring, copper and solder which are generally used are preferable because they are inexpensive. In this case, it is preferable that flux activity is provided.

  As a method of stacking a plurality of semiconductor devices, for example, as in TSV (Through-Silicon Via) technology, a plurality of circuit members are flip-chip connected or stacked, a hole penetrating the circuit member is formed, and a connection portion on the pattern surface A method of connecting (electrodes, etc.) is mentioned. In the semiconductor device (circuit connection structure) 700 shown in FIG. 5, the wiring 94 disposed on the interposer 92 is connected to the wiring 23 of the semiconductor chip 21 through the connection bumps 30, whereby the semiconductor chip 21 and the interposer are connected. 92 is flip-chip connected. The gap between the semiconductor chip 21 and the interposer 92 is filled with the adhesive composition without any gaps to form the connection member 40. On the surface of the semiconductor chip 21 opposite to the interposer 92, the semiconductor chip 21 is repeatedly stacked via the wiring 23, connection bumps 30, and connection members 40.

  The wirings 23 on the pattern surface on the front and back sides of the semiconductor chip 21 are connected to each other by a through electrode 96 filled in a hole penetrating the inside of the semiconductor chip 21. In addition, as a material of the penetration electrode 96, copper, aluminum, etc. can be used.

  Such a TSV technique makes it possible to acquire signals from the back surface of a semiconductor chip that is not normally used. Furthermore, since the through electrode 96 is vertically passed through the semiconductor chip 21, the distance between the semiconductor chips 21 facing each other, and the distance between the semiconductor chip 21 and the interposer 92 can be shortened, and flexible connection is possible. The adhesive composition can also be used between the laminated chip and the interposer in such TSV technology.

  Further, in a bump forming method with a high degree of freedom such as area bump chip technology, a semiconductor chip can be directly mounted on a mother board without using an interposer. In this embodiment, the semiconductor chip may be directly mounted on the mother board as described above.

<Semiconductor sealing adhesive>
Hereafter, the component of the adhesive agent for semiconductor sealing which comprises an adhesive composition is demonstrated.

(A) Epoxy resin The adhesive for semiconductor encapsulation can contain an epoxy resin. The epoxy resin is not particularly limited as long as it has two or more epoxy groups in the molecule. For example, bisphenol A type, bisphenol F type, naphthalene type, phenol novolak type, cresol novolak type, phenol aralkyl type, biphenyl Type, triphenylmethane type and dicyclopentadiene type epoxy resins, various polyfunctional epoxy resins, and the like can be used. These can be used alone or as a mixture of two or more. The compounding quantity of an epoxy resin is 10-50 mass parts with respect to 100 mass parts of the whole semiconductor sealing adhesive, for example.

(B) Hardener The adhesive for semiconductor sealing can contain a hardener. Examples of the curing agent include phenol resin curing agents, acid anhydride curing agents, amine curing agents, imidazole curing agents, and phosphine curing agents. Hereinafter, each curing agent will be described.

(I) Phenolic resin-based curing agent The phenolic resin-based curing agent is not particularly limited as long as it has two or more phenolic hydroxyl groups in the molecule. For example, phenol novolak, cresol novolak, phenol aralkyl resin, cresol A naphthol formaldehyde polycondensate, a triphenylmethane type polyfunctional phenol, various polyfunctional phenol resins, etc. can be used. These can be used alone or as a mixture of two or more. Since the phenol resin-based curing agent containing a phenolic hydroxyl group exhibits flux activity for removing an oxide film, the connection reliability and the insulation reliability can be further improved by using the phenol resin-based curing agent.

  (A) The equivalent ratio (phenolic hydroxyl group / epoxy group, molar ratio) of the (i) phenol resin-based curing agent to the epoxy resin is 0.3 to 1. in terms of curability, adhesiveness, storage stability, and the like. 5 is preferable, 0.4 to 1.0 is more preferable, and 0.5 to 1.0 is still more preferable. When the equivalent ratio is less than 0.3, the curability is lowered and the adhesive force tends to be lowered. When the equivalent ratio exceeds 1.5, unreacted phenolic hydroxyl groups remain excessively, the water absorption rate increases, and the insulation reliability tends to decrease.

(Ii) Acid anhydride curing agent Examples of acid anhydride curing agents include methylcyclohexanetetracarboxylic dianhydride, trimellitic anhydride, pyromellitic anhydride, benzophenonetetracarboxylic dianhydride, ethylene glycol bis Anhydro trimellitate and the like can be used. These can be used alone or as a mixture of two or more. An acid anhydride-based curing agent containing an acid anhydride exhibits a flux activity for removing an oxide film, and therefore the connection reliability and insulation reliability can be further improved by using an acid anhydride-based curing agent. .

  (A) The equivalent ratio of the acid anhydride curing agent to the epoxy resin (acid anhydride group / epoxy group, molar ratio) is 0.3 to 0.3 from the viewpoints of curability, adhesiveness, storage stability, and the like. 1.5 is preferable, 0.4 to 1.0 is more preferable, and 0.5 to 1.0 is still more preferable. When the equivalent ratio is less than 0.3, the curability is lowered and the adhesive force tends to be lowered. When the equivalence ratio exceeds 1.5, unreacted acid anhydride remains excessively, the water absorption rate increases, and the insulation reliability tends to decrease.

(Iii) Amine-based curing agent The amine-based curing agent may be, for example, a compound in which one or more hydrogen atoms of ammonia are substituted with a hydrocarbon group, and dicyandiamide or the like can be used. Since amine-based curing agents containing amines exhibit flux activity for removing oxide films, the use of amine-based curing agents can further improve connection reliability and insulation reliability.

  (A) The equivalent ratio of the amine curing agent to the epoxy resin (amine / epoxy group, molar ratio) is preferably 0.3 to 1.5 from the viewpoints of curability, adhesiveness, storage stability, and the like. 0.4 to 1.0 is more preferable, and 0.5 to 1.0 is still more preferable. When the equivalent ratio is less than 0.3, the curability is lowered and the adhesive force tends to be lowered. When the equivalent ratio exceeds 1.5, unreacted amine remains excessively and the insulation reliability tends to be lowered.

(Iv) Imidazole-based curing agent Examples of the imidazole-based curing agent include 2-phenylimidazole, 2-phenyl-4-methylimidazole, 1-benzyl-2-methylimidazole, 1-benzyl-2-phenylimidazole, 1- Cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimellitate, 1-cyanoethyl-2-phenylimidazolium trimellitate, 2,4-diamino-6 -[2'-methylimidazolyl- (1 ')]-ethyl-s-triazine, 2,4-diamino-6- [2'-undecylimidazolyl- (1')]-ethyl-s-triazine, 2, 4-Diamino-6- [2'-ethyl-4'-methylimidazolyl- (1 ')]-ethyl-s Triazine, 2,4-diamino-6- [2′-methylimidazolyl- (1 ′)]-ethyl-s-triazine isocyanuric acid adduct, 2-phenylimidazole isocyanuric acid adduct, 2-phenyl-4,5- Examples include dihydroxymethylimidazole, 2-phenyl-4-methyl-5-hydroxymethylimidazole, adducts of epoxy resins and imidazoles. Among these, from the viewpoints of curability, storage stability, and connection reliability, 1-cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimellitate, 1-cyanoethyl-2-phenylimidazolium trimellitate, 2,4-diamino-6- [2'-methylimidazolyl- (1 ')]-ethyl-s-triazine, 2,4-diamino-6- [2 '-Ethyl-4'-methylimidazolyl- (1')]-ethyl-s-triazine, 2,4-diamino-6- [2'-methylimidazolyl- (1 ')]-ethyl-s-triazine isocyanuric acid Adduct, 2-phenylimidazole isocyanuric acid adduct, 2-phenyl-4,5-dihydroxymethylimidazole, 2-phenyl-4-methyl Lu-5-hydroxymethylimidazole is preferred. You may use a liquid thing with the similar structure (a different substituent etc.) of imidazole mentioned above. These may be used alone or in combination of two or more. Moreover, you may use what microencapsulated these and raised the potential.

  0.1-20 mass parts is preferable with respect to 100 mass parts of (a) epoxy resin, and, as for the compounding quantity of an imidazole type hardening | curing agent, 0.1-10 mass parts is more preferable. If the amount of the imidazole-based curing agent is less than 0.1 parts by mass, the curability tends to decrease. When the compounding quantity of an imidazole type hardening | curing agent exceeds 20 mass parts, it will harden | cure before a metal-metal connection part is formed, and there exists a tendency for a connection defect to generate | occur | produce.

(V) Phosphine-based curing agent Examples of the phosphine-based curing agent include triphenylphosphine, tetraphenylphosphonium tetraphenylborate, tetraphenylphosphonium tetra (4-methylphenyl) borate, tetraphenylphosphonium (4-fluorophenyl) borate, and the like. Is mentioned.

  0.1-10 mass parts is preferable with respect to (a) 100 mass parts of epoxy resins, and, as for the compounding quantity of a phosphine type hardening | curing agent, 0.1-5 mass parts is more preferable. When the amount of the phosphine-based curing agent is less than 0.1 parts by mass, the curability tends to decrease. When the compounding quantity of a phosphine type hardening agent exceeds 10 mass parts, it will harden | cure before a metal-metal connection part is formed, and there exists a tendency for a connection defect to generate | occur | produce.

  The phenol resin curing agent, the acid anhydride curing agent and the amine curing agent can be used singly or as a mixture of two or more. The imidazole-based curing agent and the phosphine-based curing agent may be used alone for (a) the epoxy resin, but as a curing accelerator, a phenol resin-based curing agent, an acid anhydride-based curing agent, or an amine-based curing agent. May be used together.

(C) Flux agent The semiconductor sealing adhesive may contain a flux agent that is a compound exhibiting flux activity (activity for removing oxides and impurities). Examples of the flux activator include nitrogen-containing compounds having an unshared electron pair such as imidazoles and amines; carboxylic acids; phenols; alcohols. Among these, carboxylic acids have a strong flux activity, and (a) react easily with the epoxy resin and do not exist in a cured state of the adhesive composition, so that it is possible to prevent a decrease in insulation reliability. .

  Carboxylic acids include saturated fats such as ethanoic acid, propanoic acid, butanoic acid, pentanoic acid, hexanoic acid, heptanoic acid, octanoic acid, nonanoic acid, decanoic acid, dodecanoic acid, tetradecanoic acid, hexadecanoic acid, heptadecanoic acid and octadecanoic acid Unsaturated carboxylic acids such as oleic acid, linoleic acid, linolenic acid, arachidonic acid, docosahesaenoic acid, eicosapentaenoic acid; aliphatic dicarboxylic acids such as oxalic acid, malonic acid, succinic acid, glutaric acid, adipic acid Acids; Aromatic carboxylic acids such as benzoic acid, phthalic acid, isophthalic acid, terephthalic acid, trimellitic acid, trimesic acid, hemimellitic acid, pyromellitic acid, pentanecarboxylic acid, mesic acid, diphenolic acid; maleic acid and fumaric acid Examples include acids. The carboxylic acid may be a carboxylic acid having a hydroxyl group such as lactic acid, malic acid, citric acid, and salicylic acid. Examples of the phenols include monohydric phenols such as phenol and cresol; dihydric phenols (diphenol) such as catechol and resorcinol; and trihydric phenols (triphenol) such as pyrogallol and phloroglucinol. Examples of the alcohols include those obtained by converting the carboxyl group of the above carboxylic acid into a hydroxyl group. The compounding quantity of a flux agent is 3-30 mass parts with respect to 100 mass parts of (a) epoxy resins, for example.

(D) Filler The semiconductor sealing adhesive further contains a filler for controlling the viscosity and physical properties of the cured product, and for suppressing generation of voids and moisture absorption when the circuit connecting members are connected to each other. You may do it. As the filler, an insulating inorganic filler, whisker, or resin filler can be used.

  Examples of the insulating inorganic filler include glass, silica, alumina, titanium oxide, carbon black, mica, boron nitride, etc. Among them, silica, alumina, titanium oxide, boron nitride, and the like are preferable, and silica, alumina, boron nitride, and the like are preferable. Is more preferable. Examples of whiskers include aluminum borate, aluminum titanate, zinc oxide, calcium silicate, magnesium sulfate, and boron nitride. As the resin filler, polyurethane, polyimide, or the like can be used. These fillers and whiskers can be used alone or as a mixture of two or more. (D) The shape, particle size and content of the filler are not particularly limited. (D) The compounding quantity of a filler is 50-150 mass parts with respect to 100 mass parts of (a) epoxy resins, for example.

(E) Polymer component having a weight average molecular weight of 10,000 or more The semiconductor sealing adhesive may contain a polymer component having a weight average molecular weight of 10,000 or more. When the semiconductor sealing adhesive contains the above polymer component, film formability is improved. When the semiconductor sealing adhesive is formed into a film, workability and productivity are improved. Whether or not a polymer component having a weight average molecular weight of 10,000 or more is blended and the blending amount can be appropriately determined in consideration of other physical properties. In addition, in this specification, a weight average molecular weight means the weight average molecular weight when measured in polystyrene conversion using a high performance liquid chromatography (Shimadzu Corporation C-R4A).

  Examples of the polymer component having a weight average molecular weight of 10,000 or more include, for example, phenoxy resin, polyimide resin, polyamide resin, polycarbodiimide resin, cyanate ester resin, acrylic resin, polyester resin, polyethylene resin, polyethersulfone resin, polyetherimide resin, A polyvinyl acetal resin, a urethane resin, an acrylic rubber, etc. are mentioned. These may be used alone or in combination of two or more.

(Other ingredients)
The adhesive for semiconductor encapsulation may further contain additives such as an antioxidant, a silane coupling agent, a titanium coupling agent, a leveling agent, and an ion trap agent. These may be used singly or in combination of two or more. About these compounding quantities, what is necessary is just to adjust suitably so that the effect of each additive may express.

  The adhesive layer is made of a film-like semiconductor sealing adhesive (hereinafter referred to as “semiconductor sealing film-like adhesive”) or a paste-like semiconductor sealing adhesive (hereinafter referred to as “semiconductor sealing paste-like”). It can be formed using an “adhesive”.

  The film-like adhesive for semiconductor encapsulation can be obtained by the following production method. First, an epoxy resin, a curing agent, a fluxing agent, a filler, a polymer component having a weight average molecular weight of 10,000 or more, an additive and the like are added to an organic solvent, and then each component is dissolved or dispersed by stirring, mixing or kneading. A resin varnish is prepared. And after apply | coating resin varnish using a knife coater, a roll coater, and an applicator on the base film which performed the mold release process, the organic solvent is reduced by heating and a film adhesive is applied on a base film. Form. In addition, when a polymer component (for example, polyimide resin) having a weight average molecular weight of 10,000 or more is blended, each component is added to the varnish obtained after synthesis without isolation after synthesizing the polymer component having a weight average molecular weight of 10,000 or more. In addition, the resin varnish may be prepared.

  The base film is not particularly limited as long as it has heat resistance capable of withstanding the heating conditions when the organic solvent is volatilized. The polyester film, the polypropylene film, the polyethylene terephthalate film, the polyimide film, the polyetherimide film, the poly Examples include ether naphthalate films and methylpentene films. The base film is not limited to a single layer made of these films, and may be a multilayer film made of two or more materials.

  The conditions for volatilizing the organic solvent from the resin varnish after coating are preferably such that the organic solvent is sufficiently volatilized. Specifically, heating is performed at 50 to 200 ° C. for 0.1 to 90 minutes. It is preferable.

  Paste adhesive for semiconductor sealing is prepared by adding an epoxy resin, a curing agent, a flux agent, a filler, a polymer component having a weight average molecular weight of 10,000 or more, an additive and the like to an organic solvent, and then stirring and mixing or kneading. It can be prepared by dissolving or dispersing each component.

  Examples of the method for adjusting the Tg of the cured adhesive that can be used in the present embodiment include the following methods. For example, methods for increasing the Tg of the cured adhesive include increasing the amount of filler in the adhesive used, using an epoxy resin with a single molecule and many glycidyl functional groups in the adhesive, and increasing the amount of filler in the adhesive. For example, a Tg polymer may be contained.

<Method for manufacturing circuit connection structure>
The manufacturing method of the circuit connection structure according to the present embodiment includes a preparation step of preparing a plurality of circuit members, a connection step of connecting the connection portions of the circuit members, and a curing step of curing the adhesive layer (first step Heating step) and a heat treatment step (second heating step) for reducing warpage are provided in this order.

  Hereinafter, a method for manufacturing the circuit connection structure according to the present embodiment will be described with reference to FIGS. 6 and 7 are schematic cross-sectional views showing the steps of the method for manufacturing the circuit connection structure according to the present embodiment.

  First, the manufacturing method of the circuit connection structure which concerns on the 1st aspect of this embodiment is demonstrated. In the preparation step, first, the circuit member 10 (FIG. 6A) and the circuit member 20 are prepared. Next, a thermosetting adhesive layer 40a is supplied onto the main surface 11a of the printed circuit board 11 so that the adhesive layer 40a fills the entire wiring 13 and connection bumps 15 to obtain the circuit member 10a (FIG. 6 (b)). The adhesive layer 40a is composed of the semiconductor sealing adhesive, and the connection member 40 is obtained by thermosetting the adhesive layer 40a.

  As a method of supplying the adhesive layer 40a onto the main surface 11a, a film-like adhesive for semiconductor sealing may be attached to the main surface 11a using a laminator, and a varnish-like semiconductor sealing adhesive is mainly used. The surface 11a may be spin-coated, or a semiconductor sealing paste adhesive may be applied to the main surface 11a. The adhesive layer 40a may be a single layer or may have a plurality of layers.

  The film sealing adhesive for semiconductor sealing can be applied by a hot press, roll lamination, vacuum lamination, or the like. The supply area and thickness of the film-like adhesive for semiconductor sealing are appropriately set depending on the size of the semiconductor chip and the printed circuit board, the height of the connection bump, and the like. The film-like adhesive for semiconductor sealing is supplied under conditions such that the viscosity of the adhesive for semiconductor sealing is low. The film sealing adhesive for semiconductor sealing may be affixed on the printed circuit board or may be affixed to the semiconductor chip. Workability | operativity can be improved by making the adhesive agent for semiconductor sealing into a film form.

  The semiconductor sealing paste adhesive may be applied to the printed circuit board or may be applied to the semiconductor chip. After applying the semiconductor sealing paste adhesive, it can be shaped by spin coating or printing. When the semiconductor-sealing paste adhesive contains a solvent, a drying step may be performed. The supply area and thickness of the semiconductor-sealing paste adhesive are appropriately set depending on the size of the printed circuit board or the semiconductor chip, the bump height, and the like. When using the paste adhesive for semiconductor sealing, the connection method of a connection part, the manufacturing method of the semiconductor device including the connection conditions, etc. can be made the same as that of the film adhesive for semiconductor sealing.

  The adhesive layer 40a preferably contains (a) an epoxy resin and (b) a curing agent. Due to this, during the connection process such that the heating process above the melting point of the material constituting the connection portion, the curing reaction of a part of the adhesive for semiconductor sealing does not proceed sufficiently so that voids due to springback can occur. It becomes easy to suppress the occurrence of poor connection.

  As described above, examples of the main metal used for the connection portion (bump or wiring) of the package include solder, tin, gold, silver, copper, nickel, and a conductive material containing these. In this case, since copper and solder may easily generate oxides and impurities, the adhesive layer 40a preferably contains (c) a flux agent.

  In the first aspect, the connecting step includes a crimping step and a heating step. In the heating step, the connection part is heated at a temperature equal to or higher than the melting point of the material constituting the connection part, and the connection parts are electrically connected to each other.

  In the crimping step, first, as shown in FIG. 7A, the circuit member 10 and the circuit member 20 are arranged so that the main surface 11a of the printed circuit board 11 and the main surface 21a of the semiconductor chip 21 face each other. The connection bump 15 and the connection bump 25 are aligned using a connection device such as a flip chip bonder so that the connection bump 15 and the connection bump 25 face each other. Next, the circuit member 20 is mounted on the circuit member 10 so that the connection bump 15 and the connection bump 25 are in contact with each other.

  Next, the circuit member 10 and the circuit member 20 are pressure-bonded with the adhesive layer 40 a interposed between the printed circuit board 11 and the semiconductor chip 21. The pressure bonding temperature is, for example, 150 to 350 ° C., and the pressure bonding pressure is, for example, 0.05 to 2 MPa. By the pressure bonding, the printed circuit board 11 and the semiconductor chip 21 are connected via the adhesive layer 40a. In addition, the gap between the printed circuit board 11 and the semiconductor chip 21 is sealed and filled with the adhesive layer 40a.

  In the heating step, for example, the connection bumps 15 and 25 are heated at a temperature equal to or higher than the melting point of the material constituting the connection bumps 15 and 25. As a result, as shown in FIG. 7B, the connection bump 15 and the connection bump 25 are integrated to form the connection bump 30, and the wiring 13 and the wiring 23 are electrically connected via the connection bump 30. . In the heating step, the connection bumps 15 and 25 may be heated under pressure. The laminated body 100a is obtained by the above.

  The temperature of the connection part (connection temperature) in the heating process is preferably equal to or higher than the melting point of the material constituting the connection bumps 15 and 25, but at a temperature at which the metal joint of each connection part (bump or wiring) is formed. I just need it. When the connection bump 30 is a solder bump, the connection temperature is preferably 240 ° C. or higher, more preferably 240 to 340 ° C., and still more preferably 240 to 280 ° C.

  The connection load depends on the number of bumps, but is set in consideration of absorption of bump height variations and control of the amount of bump deformation. The connection load is, for example, 0.05 to 2 Pa. The connection time is preferably as short as possible from the viewpoint of productivity improvement, and is preferably 20 seconds or less in order to melt the solder, remove the oxide film and impurities on the surface, and form a metal joint at the connection portion. More preferred is seconds or less.

  In the curing step, the laminate 100a is heated to accelerate the curing of the adhesive layer 40a, and the connection member 40 is obtained. The heating temperature, heating time, and curing reaction rate of the semiconductor sealing adhesive after the curing process are not particularly limited as long as the semiconductor sealing adhesive exhibits physical properties that satisfy the reliability of the semiconductor device.

  It is preferable that the heating temperature and the heating time in the curing process are appropriately set so that the curing reaction of the semiconductor sealing adhesive proceeds and the semiconductor sealing adhesive is completely cured. The heating temperature is preferably as low as possible from the viewpoint of reducing warpage. The heating temperature is preferably 100 to 200 ° C, more preferably 110 to 190 ° C, and still more preferably 120 to 180 ° C. The heating time is preferably 0.1 to 10 hours, more preferably 0.1 to 8 hours, and still more preferably 0.1 to 5 hours. It is preferable to react as much as possible the unreacted part of the adhesive for semiconductor sealing during the curing step, and the curing reaction rate after the curing step is preferably 95% or more. Heating in the curing step can be performed using a heating device such as an oven.

In the heat treatment process, the stacked body 100a is heated to reduce warpage generated in the connection process or the curing process. The heating temperature of the heat treatment step is adjusted so as to satisfy the condition of the following formula (1).
Temperature T1> temperature T2 ≧ glass transition temperature of the cured product of the adhesive layer (1)
(In Formula (1), T1 shows the heating temperature of a curing process, and T2 shows the heating temperature of a heat treatment process.)

  The “cured product of the adhesive layer” in the above formula (1) is a cured product obtained by adding a heat amount equal to or higher than that in the curing process to the adhesive for semiconductor sealing. It is a cured product obtained by heat curing at 165 ° C./1 hour. The glass transition temperature (Tg) of the cured product is, for example, the highest peak when a plurality of tan δ peak values (tan δ peaks appear) when a viscoelasticity measuring device (viscoelastic device RSAII, manufactured by Rheometrics) is used. Obtained as the temperature at the time of). Measurement conditions are, for example, −30 ° C. to 270 ° C., 10 ° C./min, and a frequency of 10 Hz. The glass transition temperature of the cured product is preferably 40 to 200 ° C, more preferably 50 to 190 ° C, and still more preferably 50 to 180 ° C, from the viewpoints of mountability and reliability.

  The heating temperature in the heat treatment step is not particularly limited as long as it satisfies the above formula (1), but is preferably as low as possible. The heating temperature is preferably 50 to 180 ° C, more preferably 60 to 160 ° C, and still more preferably 70 to 150 ° C. As the heating time is longer, warping can be reduced, but from the viewpoint of improving productivity, a shorter time is preferable. The heating time is preferably 24 hours or less, more preferably 5 hours or less, and even more preferably 2 hours or less.

  The heat treatment in the heat treatment step can be performed using a heating device such as an oven or a hot plate. The heat treatment may be moved to another heating device having a different in-layer temperature after the curing step, or may be adjusted to the heat treatment temperature by gradually lowering the temperature with the same heating device.

  Thus, the semiconductor device 100 (see FIG. 1) is obtained.

  Next, a method for manufacturing a circuit connection structure according to the second aspect of the present embodiment will be described. In the second aspect, in the connection step, the circuit members are thermocompression bonded at a temperature equal to or higher than the melting point of the material constituting the connection portion, thereby heating the connection portion and electrically connecting the connection portions to each other. Different from one embodiment. The preparation process, the curing process and the heat treatment process are the same as in the first embodiment.

  In the connection step, first, as in the first embodiment, the circuit member 10 and the circuit member 20 are arranged so that the main surface 11a of the printed circuit board 11 and the main surface 21a of the semiconductor chip 21 face each other, and the connection bump 15 The connection bumps 15 and the connection bumps 25 are aligned so that the connection bumps 25 face each other (FIG. 7A). Next, the circuit member 20 is mounted on the circuit member 10 so that the connection bump 15 and the connection bump 25 are in contact with each other.

  Subsequently, with the adhesive layer 40a interposed between the printed circuit board 11 and the semiconductor chip 21, the circuit member 10 and the circuit member 20 are thermocompression bonded at a temperature equal to or higher than the melting point of the material constituting the connection bumps 15 and 25, for example. To do. As a result, as shown in FIG. 7B, the printed circuit board 11 and the semiconductor chip 21 are connected via the adhesive layer 40a. In addition, the gap between the printed circuit board 11 and the semiconductor chip 21 is sealed and filled with the adhesive layer 40a. Further, the connection bump 15 and the connection bump 25 are integrated to form the connection bump 30, and the wiring 13 and the wiring 23 are electrically connected through the connection bump 30. The preferable ranges of the connection temperature and the connection load in the connection step are the same as in the first aspect.

  In addition, the manufacturing method of a circuit connection structure is not restricted above. For example, after positioning and mounting the other circuit member on one circuit member, the semiconductor device is obtained by melting the connection bumps (for example, solder bumps) by heat treatment in a reflow furnace and connecting the circuit members to each other May be manufactured. At the time of mounting the circuit member, since the necessity of forming a metal joint is not significantly required, the above method may require a lower load, a shorter time, and a lower temperature than the above-described main crimping, and improve productivity, Advantages such as prevention of deterioration can be obtained.

  Further, in the pre-applied method in the above-described embodiment, a temperature can be partially applied to the heating target portion using a crimping head or the like. When a semiconductor chip is mounted on a printed circuit board in the pre-applied system, the entire semiconductor device is connected at a temperature of about 260 ° C. in a reflow furnace by pressing the semiconductor chip from the semiconductor chip side while heating the semiconductor chip. In comparison, the temperature of the printed circuit board can be suppressed. Thereby, the amount of warpage can be further reduced. In addition, the supply method of the semiconductor sealing adhesive in the method for manufacturing the circuit connection structure is not limited to the pre-applied method, and adopts Capillary-Flow using a paste-like semiconductor sealing adhesive. May be.

  Moreover, after sticking the film-like adhesive for semiconductor sealing on the semiconductor wafer, the semiconductor chip to which the film-like adhesive for semiconductor sealing is attached is manufactured by dicing and dividing into pieces. be able to. A semiconductor chip to which the semiconductor sealing paste adhesive is supplied can also be manufactured by applying a semiconductor sealing paste adhesive to a semiconductor wafer and then dicing the semiconductor wafer into individual pieces.

  The configuration of the circuit member is not limited to the above. For example, connection bumps may be formed only on one wiring of circuit members connected to each other. Each circuit member only needs to have at least one connecting portion.

  EXAMPLES Hereinafter, although an Example demonstrates this invention, this invention is not limited to these Examples.

(1) Production of adhesive for semiconductor sealing The constituent components of the adhesive for semiconductor sealing used in Examples and Comparative Examples are shown below.
(A) Epoxy resin Multifunctional solid epoxy containing triphenolmethane skeleton (Japan Epoxy Resin Co., Ltd., EP1032H60, hereinafter referred to as “EP1032”)
(B) Curing agent 2-phenyl-4,5-dihydroxymethylimidazole (manufactured by Shikoku Kasei Co., Ltd., 2PHZ-PW, hereinafter referred to as “2PHZ”)
(C) Flux agent Diphenolic acid (manufactured by Tokyo Chemical Industry Co., Ltd.)
(D) Filler 0.5 μm silica filler (Admatex Corporation, SE2050)
METABLEN-type organic filler (Mitsubishi Rayon, W5500)
(E) Polymer component having a weight average molecular weight of 10,000 or more The following synthetic polyimide (weight average molecular weight Mw: 35000, Tg: 97 ° C.)

(Synthetic method of synthetic polyimide)
In a 300 ml flask equipped with a thermometer, a stirrer and a calcium chloride tube, 10.7 g of 1,12-diaminododecane, 2.4 g of polyetherdiamine (manufactured by BASF, ED400 (weight average molecular weight: about 400)), 1,3- 13.3 g of bis (3-aminopropyl) tetramethyldisiloxane (manufactured by Shin-Etsu Chemical, LP-7100) and 165 g of N-methyl-2-pyrrolidone (manufactured by Kanto Chemical) were charged and stirred. After dissolution of the diamine, 4,4 ′-(4,4′-isopropylidenediphenoxy) bis (phthalic dianhydride) (made by ALDRICH, purified by recrystallization with acetic anhydride while cooling the flask in an ice bath, BPADA) 57 g was added in small portions. After reacting at 170 ° C. for 5 hours, it was washed with methanol. Then, after drying at 120 ° C./3 hours in an oven (DKN402, manufactured by Yamato Kagaku) and further drying at 75 ° C. Hg at 80 ° C./5 hours in a vacuum oven (LHV-112, manufactured by Espec), a solid synthetic polyimide was obtained ( (Tg of polyimide resin: 97 ° C., weight average molecular weight: 35000).

  A semiconductor sealing adhesive was prepared using the above components as follows. First, synthetic polyimide: 2.0 g, epoxy resin (EP1032): 2 g, 2PHZ: 0.2 g, diphenolic acid: 0.4 g, SE2050: 3.0 g, W5500: 0.3 g, solid content concentration (NV) It was added to an organic solvent (a mixed solvent of toluene and ethyl acetate 1: 1) so as to be 60%. Next, Φ0.8 mm and Φ2.0 mm beads were added in the same mass as the solid content and stirred for 30 minutes with a bead mill (Fritsch Japan KK, planetary pulverizer P-7). Thereafter, the beads used for stirring were removed by filtration to obtain a varnish. The produced varnish was coated on a base film (trade name “Purex A53” manufactured by Teijin DuPont Films, Ltd.) with a small precision coating device (Yurui Seiki Co., Ltd.) and then dried in a clean oven (manufactured by ESPEC) (110 And a film adhesive was obtained.

(2) Production of Semiconductor Device The produced semiconductor sealing adhesive (film shape: 20.5 mm long × 20.5 mm wide × 0.100 mm thick) was applied to a glass epoxy substrate (wiring circuit board 11 in FIG. 35mm x width 35mm x thickness 0.8-1.0mm, core: E679FGR (0.8mm), solder resist PSR4000, solid land Cu (wiring) + solder bump (SAC: Sn-Ag-Cu solder, tip part) Height: 25 μm from the upper surface of the solder resist), solder resist opening 0.08 mm, bump pitch 150 μm, 14884 pins, manufactured by WALTS) to obtain a circuit member A1.

  Also, a semiconductor chip with solder bumps (semiconductor chip 21 in FIG. 2, chip size: vertical 20 mm × horizontal 20 mm × thickness 0.725 mm, bump height: copper pillar + solder total approximately 50 μm, bump pitch 150 μm, 14884 pins, surface: Hitachi Chemical DuPont PL-H708, manufactured by WALTS) was prepared as a circuit member A2. Four circuit members A2 were prepared.

  Then, the four circuit members A2 were mounted on the circuit member A1 by a flip chip mounting apparatus “FCB3” (manufactured by Panasonic), and then mounted to produce a semiconductor device having the same configuration as FIG. 2 (connection process). The four circuit members A2 were arranged at the positions of the vertices of the square so as to be separated from each other. The mounting conditions of the semiconductor chip were 100 ° C./100 N, and the stage temperature was 80 ° C. or 100 ° C. The connection conditions after mounting were 250 ° C./60 N / 10 seconds, and the stage temperature was the same as the mounting conditions.

  Subsequently, the connection structure of the circuit member A1 and the circuit member A2 was heated in an oven (DKN402, manufactured by Yamato Kagaku) at 165 ° C./1 hour (curing step). After the curing step, the connection structure was heated at each temperature shown in Table 1 for 2 hours in the same kind of oven (DKN402, manufactured by Yamato Kagaku) separately prepared (heat treatment step).

(3) Connection evaluation After mounting the glass epoxy substrate and the semiconductor chip with solder bumps (daisy chain connection) on FCB3, the possibility of initial conduction was measured using a multimeter (manufactured by ADVANTEST, R6871E). Conductivity was measured at a total of eight locations at the four corners of each semiconductor chip. Samples with initial connection resistance values of 12 to 17Ω at all eight locations were evaluated as A (good connection), and samples with initial connection resistance values of unstable values other than 12 to 17Ω were B (connection failure: solder wet) Insufficient connection and poor curability control, etc.) were evaluated, and unconnected samples were evaluated as C (defective connection). The evaluation results are shown in Table 1.

(4) Tg measurement of adhesive for semiconductor sealing The Tg of the adhesive for semiconductor sealing was measured using a viscoelasticity measuring device (viscoelastic device RSAII, manufactured by Rheometrics). The sample size of the measured semiconductor sealing adhesive was 4 mm × 35 mm and the thickness was 100 μm. After the semiconductor sealing adhesive was cured at 165 ° C./1 hour, Tg was measured. The measurement conditions were -30 ° C to 270 ° C, 10 ° C / min, and a frequency of 10 Hz. The peak temperature of tan δ was defined as Tg. The measurement results are shown in Table 1.

(5) Measurement of warpage amount As described above, the warpage amount of the connection structure heat-treated after the curing step was measured. Thermoray PS200 (manufactured by AKROMETRIX) was used as a measuring device. The amount of warpage was determined by measuring the substrate surface (room temperature: 25 ° C.) and taking the value of Coplanarity of the substrate. The measurement results are shown in Table 1.

  As shown in Table 1, it was confirmed that the warpage increases as the stage temperature during the connection process increases (the higher the substrate temperature). In Examples 1 and 2 that satisfy the condition of the above formula (1), it was confirmed that the amount of warpage was reduced. In addition, since it was confirmed from the results of connection evaluation that good connection was obtained in any of the examples and comparative examples, the amount of warpage was appropriately measured without greatly depending on the connection state. It is estimated that

  10, 10a, 20, 50, 60, 70, 80 ... circuit member, 11, 61 ... wiring circuit board, 11a, 21a, 51a, 61a, 71a, 81a ... main surface, 13, 23, 53 ... wiring, 63, 73, 83... Bump, 21, 51, 71, 81... Semiconductor chip, 40a. Adhesive layer, 100, 200, 300, 400, 500, 600, 700... Semiconductor device, 100a.

Claims (4)

A first circuit member, a first circuit member having a first connection portion disposed on a main surface of the first substrate, a second substrate, and a main surface of the second substrate A preparatory step of preparing a second circuit member having a second connection portion arranged in
The first circuit member and the second circuit member are pressure-bonded with an adhesive layer interposed between the first substrate and the second substrate, and the first connection portion and the second connection are bonded. A connection step of obtaining a laminate in which the parts are electrically connected to each other;
After the connecting step, a first heating step of heating the laminated body at a temperature T1,
A second heating step of heating the laminated body at a temperature T2 after the first heating step;
The adhesive layer is formed using a film adhesive,
A method for manufacturing a circuit connection structure, wherein the temperature T1 and the temperature T2 satisfy a condition of the following formula (1).
Temperature T1> Temperature T2 ≧ Glass transition temperature of the cured product of the adhesive layer (1)   The manufacturing method of the circuit connection structure of Claim 1 whose glass transition temperature of the hardened | cured material of the said adhesive bond layer is 40-200 degreeC.   The manufacturing method of the circuit connection structure of Claim 1 or 2 with which the said adhesive bond layer contains an epoxy resin and a hardening | curing agent.   The manufacturing method of the circuit connection structure as described in any one of Claims 1-3 in which the said adhesive bond layer contains a flux agent.

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