JP5994466B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof.

  As a semiconductor memory device, a ferroelectric random access memory (hereinafter referred to as a ferroelectric memory) has been developed (see, for example, Patent Documents 1 to 3). A ferroelectric memory has a ferroelectric capacitor in which a ferroelectric film is sandwiched between an upper electrode and a lower electrode. With the progress of higher integration and higher performance of semiconductor devices, miniaturization of ferroelectric capacitors and the use of multilayer wiring structures are required. Furthermore, low voltage operation is required in connection with application to portable information processing devices.

  In order to operate the ferroelectric memory at a low voltage, it is preferable that the ferroelectric film of the ferroelectric capacitor has a large inversion charge amount Qsw. However, for example, there is a problem that the ferroelectric film deteriorates due to a reducing atmosphere treatment or a non-oxidizing atmosphere treatment used in the process of forming the multilayer wiring structure.

  More specifically, when the upper electrode is formed of a film containing Pt, a film containing Ir, or the like, hydrogen in a reducing atmosphere used when forming an interlayer insulating film in the multilayer wiring structure is used as the upper electrode film. The ferroelectric film in the ferroelectric capacitor is reduced by the hydrogen that has entered the inside and is activated by the catalytic action of Pt or Ir. When the ferroelectric film is reduced, the operating characteristics of the ferroelectric capacitor deteriorate. Such a problem is particularly noticeable in a fine ferroelectric capacitor.

  Further, the ferroelectric capacitor can be used not only for a memory element but also for other purposes. For example, it can be used as a smoothing capacitor for power supply wiring of a logic circuit that drives a memory element.

  However, different characteristics are required between the memory capacitor and the smoothing capacitor. If the capacitor for memory and the smoothing capacitor are formed at the same time, and the capacitor dielectric film having a common structure is used for the memory capacitor and the smoothing capacitor, the following difficulties arise, for example.

  A memory capacitor used in a ferroelectric memory is required to have a low voltage operation, a large inversion charge amount, an excellent retention characteristic, and a good imprint characteristic, and a thin ferroelectric film is suitable as a capacitor dielectric film. On the other hand, the smoothing capacitor is required to have a high breakdown voltage. If a thin ferroelectric film suitable for a memory capacitor is also used as a capacitor dielectric film for a smoothing capacitor, the leakage current is large and the dielectric breakdown voltage is lowered.

JP 2007-281373 A JP 2011-199071 A International Publication No. 07/116442 Pamphlet

  An object of the present invention is to provide a novel technique capable of improving the barrier property against hydrogen or the like of a ferroelectric capacitor.

  Another object of the present invention is to provide a novel technique suitable for simultaneous formation of ferroelectric capacitors having different characteristics.

According to an aspect of the present invention, a semiconductor substrate, a lower electrode formed above the first region of the semiconductor substrate, a ferroelectric film formed on the lower electrode, and on the ferroelectric film A first conductive film formed of iridium oxide or ruthenium oxide, and an ABO formed above the first conductive film and having a perovskite structure or a bismuth layered crystal structure. a second conductive film formed of an _x- type oxide and having a thickness of 0.5 nm to 30 nm; and a third conductive film formed above the second conductive film and formed of iridium oxide or ruthenium oxide. A semiconductor device is provided.

ABO _x- type oxide having a perovskite structure or a bismuth layered crystal structure formed between a first conductive film and a third conductive film made of iridium oxide or ruthenium oxide, and between the first conductive film and the third conductive film The upper electrode having the second conductive film formed in (1) improves the barrier property against hydrogen and the like of the ferroelectric capacitor.

1A to 1C are schematic cross-sectional views showing main steps of a semiconductor device manufacturing method according to a first embodiment. 1D to 1F are schematic cross-sectional views showing the main steps of the semiconductor device manufacturing method according to the first embodiment. FIG. 1G to FIG. 1I are schematic cross-sectional views showing main steps of the semiconductor device manufacturing method according to the first embodiment. 1J and 1K are schematic cross-sectional views showing the main steps of the semiconductor device manufacturing method according to the first embodiment. FIG. 1L and FIG. 1M are schematic cross-sectional views showing the main steps of the semiconductor device manufacturing method according to the first embodiment. 1N and 1O are schematic cross-sectional views showing the main steps of the semiconductor device manufacturing method according to the first embodiment. 1P and 1Q are schematic cross-sectional views showing the main steps of the semiconductor device manufacturing method according to the first embodiment. 1R and 1S are schematic cross-sectional views showing main steps of the semiconductor device manufacturing method according to the first embodiment. FIG. 1T is a schematic cross-sectional view showing the main steps of the method of manufacturing a semiconductor device according to the first embodiment. FIG. 1U is a schematic cross-sectional view showing the main steps of the method of manufacturing a semiconductor device according to the first embodiment. FIG. 2A is a schematic flow of a ferroelectric capacitor forming process according to the first embodiment. FIG. 2B is a schematic flow of a ferroelectric capacitor forming process according to a modification of the first embodiment. FIG. 3 is a schematic cross-sectional view of the semiconductor device according to the second embodiment. 4A to 4D are schematic cross-sectional views showing the main steps of the semiconductor device manufacturing method according to the third embodiment. 4E to 4H are schematic cross-sectional views showing the main steps of the semiconductor device manufacturing method according to the third embodiment. 4I to 4K are schematic cross-sectional views showing main processes of the semiconductor device manufacturing method according to the third embodiment. FIG. 5 is a schematic sectional view showing the entire structure of the semiconductor device according to the third embodiment. 6A and 6B are schematic cross-sectional views of a memory capacitor and a smoothing capacitor according to the third embodiment, respectively. FIG. 7 is a schematic flow of a memory capacitor and smoothing capacitor forming process according to the third embodiment. FIG. 8 is a schematic sectional view of a semiconductor device according to the fourth embodiment. FIG. 9A and FIG. 9B are a graph showing the relationship between the inversion charge amount and the read voltage and the graph showing the relationship between the leakage current and the applied voltage, respectively, of the ferroelectric capacitor according to the example. FIG. 10 is a graph showing the relationship between the Ir content and resistivity of the Ir-added PZT film.

  A semiconductor device and a manufacturing method thereof according to a first embodiment of the present invention will be described. 1A to 1U are schematic cross-sectional views illustrating main steps of a method for manufacturing a semiconductor device according to a first embodiment.

  Reference is made to FIG. 1A. An element isolation region 12 that defines an element region is formed on the semiconductor substrate 10 by, for example, shallow trench isolation (STI). For example, an n-type or p-type silicon substrate is used as the semiconductor substrate 10. Note that the method of forming the element isolation region 12 is not limited to STI. For example, the element isolation region 12 may be formed by silicon local oxidation (LOCOS).

  Next, the well 14 is formed by introducing dopant impurities by ion implantation. As the dopant impurity, for example, a p-type dopant impurity is used. For example, boron (B) is used as the p-type dopant impurity. When a p-type dopant impurity is used as the dopant impurity, a p-type well 14 is formed.

  Next, the gate insulating film 16 is formed on the element region by, for example, thermal oxidation. Next, the polysilicon film 18 is formed by, for example, chemical vapor deposition (CVD). The polysilicon film 18 becomes a gate electrode (word line).

  Here, the case where the polysilicon film 18 is formed as the film to be the gate electrode has been described as an example, but the film to be the gate electrode is not limited to the polysilicon film. For example, a stacked film of an amorphous silicon film and a tungsten silicide film may be formed as a film to be a gate electrode.

  Next, the polysilicon film 18 is patterned by photolithography and etching to form a gate electrode (word line) 18. Next, dopant impurities are introduced into the semiconductor substrate 10 on both sides of the gate electrode 18 by ion implantation, for example, using the gate electrode 18 as a mask. For example, an n-type dopant impurity is used as the dopant impurity. For example, phosphorus (P) is used as the n-type dopant impurity. Thereby, an extension region for forming a shallow region of the extension source / drain is formed.

  Next, an insulating film is formed on the entire surface by, eg, CVD. For example, a silicon oxide film is formed as the insulating film. Next, this insulating film is anisotropically etched. Thus, the sidewall insulating film 20 is formed on the side wall portion of the gate electrode 18 from the insulating film.

  Next, dopant impurities are introduced into the semiconductor substrate 10 on both sides of the gate electrode 18 by ion implantation, for example, using the gate electrode 18 with the sidewall insulating film 20 formed as a mask. For example, an n-type dopant impurity is used as the dopant impurity. For example, arsenic (As) is used as the n-type dopant impurity. Thereby, an impurity diffusion layer forming a deep region of the extension source / drain is formed. A source / drain diffusion layer 22 is formed by the extension region and the deep impurity diffusion layer.

  Next, a refractory metal film is formed on the entire surface by, for example, sputtering. For example, a cobalt film is formed as the refractory metal film. Next, by performing heat treatment, the surface layer portion of the semiconductor substrate 10 and the refractory metal film are reacted, and the upper portion of the gate electrode 18 and the refractory metal film are reacted. Next, the unreacted refractory metal film is removed by wet etching, for example.

  Thus, for example, a silicide layer 24 b of cobalt silicide is formed on the source / drain diffusion layer 22. Further, a silicide layer 24a of cobalt silicide, for example, is formed on the gate electrode 18. Thus, the transistor 26 having the gate electrode 18 and the source / drain diffusion layer 22 is formed.

  Refer to FIG. 1B. An insulating film (antioxidation film) 28 is formed on the entire surface by, eg, plasma CVD. As the insulating film 28, for example, a silicon oxynitride film is formed. Next, an interlayer insulating film 30 is formed on the insulating film 28. The film thickness of the interlayer insulating film 30 is, for example, 1 μm. Next, the surface of the interlayer insulating film 30 is planarized by, for example, chemical mechanical polishing (CMP).

  Reference is made to FIG. 1C. A contact hole 32 reaching the silicide layer 24b on the source / drain diffusion layer 22 is formed by photolithography and etching.

  Reference is made to FIG. 1D. A Ti film is formed on the interlayer insulating film 30 so as to cover the inner surface of the contact hole 32 by, for example, sputtering. A TiN film is formed on the Ti film by sputtering, for example. Thus, the adhesion film 34 is formed by the Ti film and the TiN film.

  A conductive film 36 is formed on the adhesion film 34 by, for example, CVD. As the conductive film 36, for example, a tungsten film is formed. Next, the conductive film 36 and the adhesion film 34 are polished by CMP, for example, until the surface of the interlayer insulating film 30 is exposed. Thus, for example, a tungsten conductor plug 36 is buried in the contact hole 32.

  Reference is made to FIG. 1E. A silicon oxynitride film 38 is formed on the interlayer insulating film 30 so as to cover the conductor plug 36 by, for example, plasma CVD. A silicon oxide film 40 is formed on the silicon nitride oxide film 38 by, for example, plasma CVD (plasma TEOSCVD) using tetraethoxysilane (TEOS) as a raw material.

  The silicon nitride oxide film 38 and the silicon oxide film 40 form an interlayer insulating film 42. The interlayer insulating film 42 is for preventing the upper surface of the conductor plug 36 from being oxidized after the conductor plug 36 is embedded in the interlayer insulating film 30. Here, the case where a laminated film of the silicon oxynitride film 38 and the silicon oxide film 40 is formed as the interlayer insulating film 42 has been described as an example, but the interlayer insulating film 42 is formed of the silicon oxynitride film 38 and the silicon oxide film. It is not limited to a laminated film with the film 40. For example, a silicon nitride film or an aluminum oxide film may be formed as the antioxidant film 42. Next, heat treatment is performed, for example, in a nitrogen atmosphere. This heat treatment is for releasing the gas contained in the interlayer insulating film 42 from the interlayer insulating film 42 (degassing).

  Next, an adhesion film 43 is formed on the interlayer insulating film 42 by, for example, sputtering. The adhesion film 43 is for ensuring adhesion of the capacitor lower electrode 48 described later to the base. As the adhesion film 43, for example, an aluminum oxide film is formed.

  Reference is made to FIG. 1F. A noble metal film (conductive film) 44 is formed on the adhesion layer 43 by sputtering, for example. The conductive film 44 becomes a part of the capacitor lower electrode 48 (see also FIG. 1N). As the conductive film 44, for example, a platinum film is formed. Next, in order to further improve the crystallinity of the conductive film 44, heat treatment is performed in an inert gas atmosphere (for example, in an Ar gas atmosphere) by rapid thermal annealing (RTA).

An amorphous noble metal oxide film 45 is formed on the conductive film 44 by sputtering, for example. The noble metal contained in the noble metal oxide film 45 and the noble metal contained in the conductive film 44 are preferably the same element. The noble metal oxide film 45 is reduced in a later step to become, for example, a noble metal film 46. The noble metal film 46 formed by reducing the noble metal oxide film 45 becomes a part of the capacitor lower electrode 48. As the amorphous noble metal oxide film 45, for example, a platinum oxide film (PtO _x film) is formed.

  Reference is made to FIG. 1G. A ferroelectric film 50 is formed on the noble metal oxide film 45. The ferroelectric film 50 is made of, for example, lead zirconate titanate (PZT). If necessary, PZT to which one or more elements of Ca, Sr, and La are added can also be used.

  In this embodiment, the ferroelectric film 50 is formed of PZT. If necessary, PZT added with La or the like can be used. As a method for forming the ferroelectric film 50, for example, sputtering is used. More specifically, for example, the ferroelectric film 50 is formed by high-frequency sputtering using a PZT target. The film thickness of the ferroelectric film 50 is, for example, 70 nm.

  The deposition temperature of the ferroelectric film 50 is preferably 30 ° C. or higher and 100 ° C. or lower, for example. Here, the deposition temperature of the ferroelectric film 50 is set to 50 ° C., for example. At the stage where the ferroelectric film 50 is formed by sputtering, the ferroelectric film 50 is not crystallized and is amorphous.

  If the deposition temperature of the ferroelectric film 50 is set lower than 30 ° C., the film thickness may be non-uniform in the wafer surface. Further, when the deposition temperature of the ferroelectric film 50 is set lower than 30 ° C., the (100) orientation variation becomes large, and the crystallinity may become non-uniform.

  On the other hand, when the deposition temperature of the ferroelectric film 50 is set higher than 100 ° C., the (101) orientation and (100) orientation increase and the (111) orientation decreases in the ferroelectric film 50. In some cases, it may be difficult to obtain a capacitor having good electrical characteristics.

  Next, the ferroelectric film 50 is crystallized in an atmosphere containing oxygen by, for example, RTA. More specifically, the ferroelectric film 50 is heat-treated in a mixed gas atmosphere containing an inert gas and an oxygen gas. For example, argon gas is used as the inert gas.

  The heat treatment conditions are as follows. The heat treatment temperature is set to 600 ° C., for example. The heat treatment time is 90 seconds, for example. In order to make the crystallinity of the ferroelectric film 50 in the wafer surface uniform, it is preferable that the flow rate of the argon gas during the heat treatment is 1500 sccm or more.

  Refer to FIG. 1H. Even when the ferroelectric film 50 is formed on the amorphous noble metal oxide film 45 and the ferroelectric film 50 is crystallized by heat treatment, the crystallinity of the noble metal film 44 is not sufficiently uniform. A ferroelectric film 50 having uniform crystallinity is obtained. In addition, the amorphous noble metal oxide film 45 is reduced by this heat treatment to become a noble metal film 46.

  Further, oxygen is released from the noble metal oxide film 45 during this heat treatment. The oxygen released from the noble metal oxide film 45 compensates for oxygen vacancies in the ferroelectric film 50. Therefore, the ferroelectric film 50 with good crystallinity can be obtained. When the platinum oxide film is formed at the stage of forming the noble metal oxide film 45, a noble metal film (conductive film) 46 which is a platinum film is formed.

  With the heat treatment for crystallizing the amorphous PZT film 50, the interface between the platinum film 46 and the PZT film 50 is flattened. The platinum film 46 has a cubic structure and (111) orientation. The PZT film 50 on the platinum film 46 has a perovskite structure and (111) orientation.

Here, the case where a platinum film is formed as the conductive film 44 has been described as an example, but the conductive film 44 is not limited to the platinum film. As the conductive film 44, an iridium film, a ruthenium film, a ruthenium oxide (RuO ₂ ) film, a SrRuO ₃ film, or the like may be formed. Alternatively, the conductive film 44 may be formed using these stacked films.

  As the amorphous noble metal oxide film 45, for example, an iridium oxide film may be formed. In this case, the iridium oxide noble metal oxide film 45 is reduced in a later step to become an iridium film.

Further, as the metal oxide film 45, a SrRuO ₃ film, a LaSrCoO ₃ film, or the like may be formed. When a SrRuO ₃ film or a LaSrCoO ₃ film is formed as the metal oxide film 45, the metal oxide film 45 of SrRuO ₃ or LaSrCoO ₃ is not reduced in the heat treatment in the subsequent process.

Although the case where a platinum oxide film is formed as the amorphous noble metal oxide film 45 has been described as an example, the amorphous noble metal oxide film 45 is not limited to the platinum oxide film. For example, as the amorphous noble metal oxide film 45, an amorphous iridium oxide (IrO _x ) film, an amorphous ruthenium oxide (RuO _x ) film, an amorphous palladium oxide (PdO _x ) film, A crystalline SrRuO ₃ film, an amorphous LaSrCoO ₃ film, or the like may be formed.

  Although the case where the noble metal oxide film 45 is formed by sputtering has been described as an example here, the method for forming the noble metal oxide film 45 is not limited to sputtering. For example, after the noble metal film 44 is formed, heat treatment is performed, and thereafter, the surface of the noble metal film 44 is naturally oxidized by being left in the atmosphere for, for example, 6 hours or more. The film 45 may be formed.

  Although the case where the ferroelectric film 50 is formed by sputtering has been described as an example, the method for forming the ferroelectric film 50 is not limited to sputtering. For example, the ferroelectric film 50 may be formed by MOCVD, a sol-gel method, metal-organic decomposition (MOD), chemical solution deposition (CSD), CVD, or epitaxial growth.

  When the ferroelectric film 50 is formed by MOCVD, since the ferroelectric film 50 is crystallized at the stage of forming the ferroelectric film 50, the ferroelectric film 50 is crystallized. No heat treatment is required.

  However, when the ferroelectric film 50 is formed by MOCVD, carbon or organic matter may be present on the surface of the ferroelectric film 50. Therefore, it is preferable to perform a heat treatment for sufficiently removing such carbon and organic substances from the surface of the ferroelectric film 50. The heat treatment temperature is set to, for example, 550 ° C. to 650 ° C., similarly to the heat treatment temperature when the ferroelectric film 50 is formed by the sputtering method. The atmosphere for the heat treatment is an oxygen-containing atmosphere as in the heat treatment atmosphere when the ferroelectric film 50 is formed by sputtering. More specifically, the atmosphere is a mixed gas of oxygen and argon gas.

  Reference is made to FIG. A ferroelectric film 52 is formed on the ferroelectric film 50 by sputtering, more specifically, high-frequency sputtering, for example, and a capacitor dielectric film 54 having a laminated structure of the ferroelectric films 50 and 52 is formed. .

  The ferroelectric film 52 is formed of the same material as the ferroelectric film 50, for example, PZT. If necessary, PZT added with La or the like can be used. The composition of the ferroelectric film 52 is not limited to the same as that of the ferroelectric film 50, but may be any film that can be crystallized by taking over the crystallinity of the ferroelectric film 50. For example, the ferroelectric film 52 can be formed by PZT in which the addition amount of Ca, Sr, and La is changed with respect to the ferroelectric film 50 using PZT.

  From the viewpoint of improving the electrical characteristics of the capacitor and facilitating low-voltage operation, the thickness of the ferroelectric film 50 in the capacitor dielectric film 54 is, for example, about 30 nm to 150 nm, and more preferably, for example, 50 nm to 120 nm. The film thickness of the ferroelectric film 52 is, for example, about 5 nm to 20 nm.

  Sputtering is exemplified as a method for forming the ferroelectric film 52, but the method for forming the ferroelectric film 52 is not limited to sputtering. For example, MOCVD, sol-gel method, organometallic decomposition (MOD), chemical solution deposition (CSD), CVD, epitaxial growth, etc. can be used.

Reference is made to FIG. 1J. A capacitor upper electrode 60 having a stacked structure of conductive films 56, 57, and 58 is formed on the ferroelectric film 52 (see also FIG. 1K). First, on the ferroelectric film 52, a conductive film 56 serving as the upper electrode first layer is formed of, for example, iridium oxide (IrO _x ).

  The film thickness of the conductive film 56 is preferably set to be relatively thin so that oxygen is sufficiently supplied to the ferroelectric film 52 through the conductive film 56 in a heat treatment in a later step. Specifically, the thickness of the conductive film 56 is preferably about 10 nm to 70 nm. More preferably, the film thickness of the conductive film 56 is about 20 nm to 50 nm. Here, the film thickness of the conductive film 56 is, for example, about 25 nm.

  The conductive film 56 is formed, for example, by oxidizing iridium by reactive sputtering using an iridium target. For example, the conductive film 56 is formed under the following film formation conditions. The substrate temperature is, for example, 150 ° C. to 350 ° C., more preferably 200 ° C. to 350 ° C. Here, the substrate temperature is set to 300 ° C.

The gas introduced into the film formation chamber is, for example, a mixed gas of argon gas and oxygen gas. The flow rate of argon gas is about 140 sccm, for example. The flow rate of oxygen gas is about 60 sccm. The ratio of the O ₂ flow rate to the Ar flow rate is preferably small.

  The deposition temperature of the conductive film 56 is preferably 150 ° C. or higher and 350 ° C. or lower. By forming the conductive film 56 at a relatively high temperature of 150 ° C. to 350 ° C., the uniformity of crystal grains is high, and the conductive film 56 that is crystallized at the time of film formation can be formed.

  When the film is formed at a temperature lower than 150 ° C., the conductive film 56 is likely to be amorphous or a mixture of amorphous and crystal. When the conductive film 56 is recrystallized by the subsequent heat treatment, the crystal grains become non-uniform, and the interdiffusion with the capacitor dielectric film 54 is likely to occur, and the paraelectric is generated at the interface between the capacitor dielectric film 54 and the conductive film 56. Body layer is likely to occur. On the other hand, when the film is formed at a temperature higher than 350 ° C., abnormal growth of the conductive film 56 is likely to occur, and a defect is generated at the interface between the capacitor dielectric film 54 and the conductive film 56 to obtain a capacitor having good electrical characteristics. It becomes difficult.

The oxygen composition ratio x in the conductive film (IrO _x film) 56 is preferably relatively small, for example, 1.3 <x <1.98 (the stoichiometric composition is x = 2). By reducing the oxygen composition x, the interface between the conductive film 56 and the capacitor dielectric film 54 can be easily flattened.

  Next, heat treatment is performed in an atmosphere containing oxygen by, for example, RTA. The heat treatment conditions are as follows, for example. The substrate temperature is about 725 ° C., for example. The heat treatment time is set to 120 seconds, for example. The atmosphere in the chamber is, for example, an atmosphere of a mixed gas of inert gas and oxygen gas. For example, argon gas is used as the inert gas.

  By this heat treatment, the ferroelectric film 52 that was in an amorphous state at the time of film formation is crystallized taking over the crystallinity of the ferroelectric film 50. At the same time, the interface between the capacitor dielectric film 54 and the conductive film 56 is planarized. In addition, the adhesion between the capacitor dielectric film 54 and the conductive film 56 is improved. By forming the conductive film 56 crystallized at the time of film formation, mutual diffusion between the capacitor dielectric film 54 and the conductive film 56 can be suppressed, and the paraelectric layer at the interface can be made thin.

  If the heat treatment temperature is too low, the state of the interface between the capacitor dielectric film 54 and the conductive film 56 and the diffusion state are not uniform in the wafer surface, and the variation in the leakage current of the capacitor 62 becomes large. The variation in the amount of inversion of the charge increases. For this reason, it is preferable that the substrate temperature at the time of heat processing shall be about 700 to 750 degreeC, for example.

Next, an ABO _x- type oxide (A and B are metal elements, O is an oxygen element, and x> 0) film 57 is formed as a second upper electrode layer on the conductive film 56 that is the first upper electrode layer. .

As the ABO _x- type oxide film 57, an ABO _x- type oxide ferroelectric film having a perovskite structure or a bismuth layer structure can be formed. For example, Pb (Zr, Ti) O ₃ , PbTiO ₃ , Pb _1-x La _x TiO ₃ , Pb _1-x La _x (Zr, Ti) O _{3 having} a perovskite structure, or (Bi ₁ ) having a bismuth layer structure. _{-x R x) Ti 3 O 12} (R is a rare earth _{element, 0 <x <1),} SrBi 2 Ta 2 O 9 (SBT), SrBi 4 Ti 4 O 15, or the like can be used. Such a ferroelectric ABO _x- type oxide film 57 is insulative at the time of film formation, but can be changed to conductivity by adding Ir or the like in a later step.

In this embodiment, as the ABO _x- type oxide film 57, for example, a PZT film is formed by sputtering. More specifically, for example, the ABO _x- type oxide film 57 is formed in an amorphous state by high-frequency sputtering using a PZT target. The film thickness of the ABO _x- type oxide film 57 is desirably about 0.5 nm to 30 nm (for example, 10 nm), for example. The ABO _x type oxide film 57 is preferably formed by high frequency sputtering using a target of ceramic oxide ABO _x (A and B are metal elements, O is an oxygen element, x> 0). The deposition conditions for the ABO _x- type oxide film 57 are, for example, as follows. RF magnetron sputtering is performed in an argon gas atmosphere at a substrate temperature of 20 ° C. to 100 ° C. (more preferably 50 ° C. to 60 ° C.).

Next, a conductive film 58 to be a third layer of the upper electrode is formed on the ABO _x- type oxide film 57 that is the second layer of the upper electrode by using, for example, iridium oxide (IrO _y ). The film thickness of the conductive film 58 is preferably set to be relatively thick (thicker compared to the conductive film 56) in order to improve the barrier property of the upper electrode 60 against hydrogen or the like. Specifically, the film thickness of the conductive film 58 is preferably about 70 nm to 200 nm, for example. Here, the film thickness of the conductive film 58 is about 150 nm, for example.

  The conductive film 58 is formed by oxidizing iridium by reactive sputtering using an iridium target, for example. For example, the conductive film 58 is formed under the following film formation conditions. The substrate temperature is, for example, 10 ° C. to 100 ° C. (more preferably 50 ° C. to 75 ° C.). Here, the substrate temperature is set to 60 ° C. By forming the conductive film 58 at a relatively low temperature of 10 ° C. to 100 ° C., the amorphous or microcrystalline conductive film 58 can be formed.

The oxygen composition ratio y in the conductive film (IrO _y film) 58 is preferably larger than the oxygen composition ratio x in the conductive film (IrO _x film) 56. The composition ratio y of oxygen in the conductive film 58 is preferably, for example, 1.8 <y ≦ 2, and more preferably 2 which is a stoichiometric composition. By increasing the oxygen composition ratio y, the hydrogen barrier property of the conductive film 58 is improved, and the capacitor dielectric film 54 is easily prevented from being reduced by hydrogen.

  Next, heat treatment is performed. The heat treatment conditions are as follows, for example. For example, it is set to about 700 ° C. to 750 ° C. Here, the substrate temperature is set to about 725 ° C., for example. The heat treatment time is set to 120 seconds, for example. The atmosphere in the chamber is, for example, an atmosphere of a mixed gas of inert gas and oxygen gas. For example, argon gas is used as the inert gas.

The conductive film (IrO _x film) 56 has already been crystallized. The ABO _x- type oxide film (PZT film) 57 and the conductive film (IrO _y film) 58 are amorphous when formed. By this heat treatment, the ABO _x- type oxide film (PZT film) 57 is crystallized and the conductive film (IrO _y film) 58 is also crystallized.

The conductive film (IrO _x film) 56 and the conductive film (IrO _y film) 58 have a rutile structure (one of tetragonal crystals) and have a (101) orientation or a (200) orientation. An ABO _x- type oxide film (PZT film) 57 disposed between the conductive film (IrO _x film) 56 and the conductive film (IrO _y film) 58 has a perovskite structure and is randomly oriented.

In this heat treatment, Ir is diffused from the conductive film (IrO _x film) 56 and the conductive film (IrO _y film) 58 to the ABO _x- type oxide film (PZT film) 57, thereby the ABO _x- type oxide. The film (PZT film) 57 becomes conductive. The amount of diffusion of Ir is greater from the conductive film (IrO _y film) 58 that is amorphous or microcrystalline than the conductive film (IrO _x film) 56 that has already been crystallized. Somewhat many Ir is by diffusion enters the grain boundary of the ABO _x type oxide film (PZT film) 57, the added conductive ABO _x type oxide film of Ir (PZT film) 57 is formed Is done.

  FIG. 10 is a graph showing the relationship between the Ir content in the Ir-added PZT film (PZTI film) and the resistivity of the Ir-added PZT film. PZT is an insulator when the iridium content is 0.8 mol% or less. When the iridium content is 1 mol% or more, a conductive oxide is formed. In order to lower the resistance of the conductive oxide, the iridium content is desirably 2 mol% or more.

Note that an ABO _x- type oxide conductive film having a perovskite structure can be formed as the ABO _x- type oxide film 57 of the modified example. For example, CaRuO ₃ , SrRuO ₃ (SRO), BaRuO ₃ , La ₄ Ru ₂ O ₁₀ , LaSrCoRuO ₃ , LaSrRuO ₃ , LaSrMnRuO ₃ , and the like can be used. Also, for example, the ABO _x- type oxide ferroelectric (perovskite structure Pb (Zr, Ti) O ₃ , PbTiO ₃ , Pb _1-x La _x TiO ₃ , Pb _1-x La _x (Zr, Ti) O ₃ and, in the bismuth layer _{structure, (Bi 1-x R x} ) Ti 3 O 12 (R is a rare earth _{element, 0 <x <1),} SrBi 2 Ta 2 O 9 (SBT), SrBi 4 Ti 4 O 15, Etc.), an ABO _x- type oxide conductive film that is made conductive by adding Ir, Ru, or the like can also be formed.

  For example, the SRO film 57 can be formed using an SRO ceramic target. For example, the Ir-added PZT film 57 can be formed using a PZT target to which iridium is added.

In such a case, since the ABO _x- type oxide film 57 is already conductive, the heat treatment after the formation of the conductive film (IrO _y film) 58 is a process for crystallizing the ABO _x- type oxide film 57. .

Note that the ABO _x- type oxide film 57 is formed at a high temperature so as to be crystalline at the time of film formation, whether it is an insulating film that can be changed to conductivity later or a conductive film that is conductive from the time of film formation. You can also Note that, when the ABO _x- type oxide ferroelectric film 57 is formed by crystal at the time of film formation, since it has already been crystallized, the heat treatment after the formation of the conductive film (IrO _y film) 58 is performed by the ABO _x- type oxidation by Ir diffusion. This is a process of changing the material film 57 to conductivity.

As described above, in this embodiment (including the modified example), the conductive films 56 and 58 are different in crystal structure and orientation between the conductive film (IrO _x film) 56 and the conductive film (IrO _y film) 58. A capacitor upper electrode having a structure in which a conductive film (for example, an Ir-added PZT film or SRO film) 57 is sandwiched is formed.

An upper electrode having a structure in which a conductive film (IrO _x film) 56 and a conductive film (IrO _y film) 58 are directly laminated without a conductive film (for example, an Ir-added PZT film or SRO film) 57 is compared with the comparative example. To do. Compared with the upper electrode of the comparative example, the upper electrode of the example has an improved barrier property against water and hydrogen entering from the upper interlayer insulating film, and the penetration path becomes longer. Thereby, the ferroelectric of the capacitor dielectric film is less likely to be eroded, and the performance degradation of the capacitor is suppressed.

  Note that the conductive film 57 is not limited to a material having a perovskite structure, and a material having a bismuth layer structure can also be used.

  Next, the lower surface (back surface) of the semiconductor substrate 10 is cleaned (back surface cleaning). This back surface cleaning is different from general wafer cleaning, and is for removing the capacitor dielectric film material adhering to the back surface of the wafer.

  Next, a protective film 92 is formed over the conductive film 58. As the protective film 92, a TiN film having a thickness of 30 nm is formed by sputtering, for example. The protective film 92 functions as a hard mask when the upper electrode 60 is patterned.

In addition, although the TiN film was illustrated as the protective film 92, for example, TaN film, TiON film, TiO _x film, TaO _x film, TaON film, TiAlO _x film, TaAlO _x film, TiAlON film, TaAlON film, TiSiON film A TaSiON film, a TiSiO _x film, a TaSiO _x film, an AlO _x film, a ZrO _x film, or the like can also be used.

  Reference is made to FIG. 1K. A photoresist film 94 is formed on the protective film 92 by, for example, spin coating. A resist pattern 94 having the shape of the capacitor upper electrode 60 is formed by photolithography. The protective film 92, the conductive film 58, the conductive film 57, and the conductive film 56 are etched using the resist pattern 94 as a mask. Thereby, the capacitor upper electrode 60 having a laminated structure of the conductive films 56, 57, and 58 is patterned. Thereafter, the resist pattern 94 is peeled off. Thereafter, the protective film 92 is removed by dry etching, for example.

Next, heat treatment is performed in an atmosphere containing oxygen. This heat treatment is for recovering damage applied to the capacitor dielectric film 54 (recovery annealing). The heat treatment temperature is, for example, 600 ° C to 700 ° C. Here, the heat treatment temperature is 600 ° C. The heat treatment time is 40 minutes, for example. By this heat treatment, Ir in the conductive film (IrO _y film) 58 is further diffused into the conductive oxide film 57, so that the resistivity of the conductive oxide film 57 is further improved.

  Reference is made to FIG. 1L. A photoresist film 96 is formed on the entire surface by, eg, spin coating. A resist pattern 96 having the shape of the capacitor dielectric film 54 is formed by photolithography. The capacitor dielectric film 54 is patterned by etching using the resist pattern 96 as a mask. Thereafter, the resist pattern 96 is peeled off. Next, heat treatment is performed in an oxygen atmosphere. The heat treatment conditions are, for example, 300 ° C. to 650 ° C. The heat treatment time is, for example, 30 minutes to 120 minutes.

  Reference is made to FIG. 1M. For example, the protective film 64 is formed by sputtering or CVD. As the protective film 64, for example, an aluminum oxide film is formed. Next, heat treatment is performed in an oxygen atmosphere. The heat treatment conditions are, for example, 400 ° C. to 600 ° C. The heat treatment time is, for example, 30 minutes to 120 minutes.

  Reference is made to FIG. A photoresist film 98 is formed on the entire surface by, eg, spin coating. A resist pattern 98 having the shape of the capacitor lower electrode 48 is formed by photolithography. Using the resist pattern 98 as a mask, the protective film 64, the conductive film 46, the conductive film 44, and the adhesion film 43 are etched, and the capacitor lower electrode 48 having a laminated structure of the conductive films 44 and 46 is patterned.

  In this way, the capacitor 62 having the lower electrode 48, the capacitor dielectric film 54, and the upper electrode 60 is formed. The protective film 64 remains so as to cover the upper electrode 60 and the capacitor dielectric film 54. Thereafter, the resist pattern 98 is peeled off. Next, heat treatment is performed in an oxygen atmosphere. The heat treatment temperature is, for example, 300 to 400 ° C. The heat treatment time is, for example, 30 to 120 minutes.

  Refer to FIG. For example, the protective film 66 is formed by sputtering or CVD. As the protective film 66, for example, an aluminum oxide film is formed. Next, heat treatment is performed in an oxygen atmosphere. This heat treatment is for supplying oxygen to the capacitor dielectric film 54 and improving the electrical characteristics of the capacitor 62. The heat treatment conditions are, for example, 500 ° C. to 700 ° C. The heat treatment time is, for example, 30 minutes to 120 minutes.

  Reference is made to FIG. 1P. For example, the interlayer insulating film 68 is formed by plasma TEOSCVD. For example, a silicon oxide film is formed as the interlayer insulating film 68. Next, the surface of the interlayer insulating film 68 is planarized by, for example, CMP.

  Reference is made to FIG. 1Q. For example, the protective film 70 is formed by sputtering or CVD. As the protective film 70, for example, an aluminum oxide film is formed. Next, the interlayer insulating film 72 is formed by plasma TEOSCVD, for example. For example, a silicon oxide film is formed as the interlayer insulating film 72.

  Reference is made to FIG. 1R. A contact hole 74a reaching the lower electrode 48 and a contact hole 76b reaching the upper electrode 60 are formed in the interlayer insulating film 72, the protective film 70, the interlayer insulating film 68, the protective film 66, and the protective film 64 by photolithography and etching. Form.

  Next, heat treatment is performed in an oxygen atmosphere. This heat treatment is for supplying oxygen to the capacitor dielectric film 54 and improving the electrical characteristics of the capacitor 62. The heat treatment conditions are, for example, 400 ° C. to 600 ° C. The heat treatment time is, for example, 30 minutes to 120 minutes.

  Note that here, the case where heat treatment is performed in an oxygen atmosphere has been described as an example, but heat treatment may be performed in an ozone atmosphere. Even when heat treatment is performed in an ozone atmosphere, oxygen is supplied to the capacitor dielectric film 54, and the electrical characteristics of the capacitor 62 can be improved.

  Reference is made to FIG. Contact holes 76 reaching the conductor plugs 36 are formed in the interlayer insulating film 72, the protective film 70, the interlayer insulating film 68, the protective film 66, and the interlayer insulating film 42 by photolithography and etching. Next, heat treatment is performed in an inert gas atmosphere or in a vacuum. This heat treatment is for releasing gas from the interlayer insulating films 72, 68 and 42 (degassing). Next, surface treatment is performed on the inner wall surfaces of the contact holes 74a, 74b, and 76 by high frequency etching.

  Reference is made to FIG. 1T. An adhesion film 78 is formed on the entire surface by, for example, sputtering. As the adhesion film 78, for example, a TiN film is formed. Next, a conductive film is formed on the entire surface by, eg, CVD. For example, a tungsten film is formed as the conductive film.

  Next, the conductive film and the adhesion film 78 are polished by CMP, for example, until the surface of the interlayer insulating film 72 is exposed. Thus, the conductor plugs 80a to 80c are formed by the conductive film. Next, plasma cleaning is performed. The gas used when performing the plasma cleaning is, for example, Ar gas. Thereby, the natural oxide film etc. which exist on the surface of conductor plugs 80a-80c are removed.

  Reference is made to FIG. 1U. For example, by sputtering, for example, a TiN film 82, an AlCu alloy film 84, a Ti film 86, and a TiN film 88 are sequentially stacked to form a stacked film. Next, the laminated film is patterned by photolithography and etching to form the wiring 90. Thereafter, if necessary, a multilayer wiring structure is further formed on the upper side. In this way, the semiconductor device according to the first embodiment is manufactured.

  2A and 2B show a flow of main processes for forming a ferroelectric capacitor according to the first embodiment and its modification.

FIG. 2A is a process flow in the case where a ferroelectric film is formed as the second upper electrode layer (ABO _x- type oxide film 57) (Example). A lower electrode film (conductive films 44 and 46) is formed, and a first ferroelectric film (ferroelectric film 50) is formed in an amorphous state. The first ferroelectric film is crystallized by heat treatment. On the crystallized first ferroelectric film, an amorphous second ferroelectric film (ferroelectric film 52) is formed. An upper electrode first layer (IrO _x film 56) is formed on the second ferroelectric film. By heat treatment, the second ferroelectric film is crystallized so as to inherit the crystallinity of the first ferroelectric film.

A third ferroelectric film (ABO _x- type oxide ferroelectric film 57) is formed as an upper electrode second layer in an amorphous state on the upper electrode first layer. An upper electrode third layer (IrO _y film 58) is formed on the upper electrode second layer / third ferroelectric film. The upper electrode second layer / third ferroelectric film is crystallized by heat treatment, and at the same time, Ir is diffused from the upper electrode first layer and third layer into the upper electrode second layer / third ferroelectric film. The upper electrode second layer / third ferroelectric film is converted into a conductive film.

FIG. 2B is a process flow in the case where a conductive film is formed as the upper electrode second layer (ABO _x- type oxide film 57) (modified example). The process up to crystallization of the second ferroelectric film is the same as that of the embodiment of FIG. 2A.

On the upper electrode first layer, the upper electrode second layer (ABO _x- type oxide conductive film 57) is formed in an amorphous state. An upper electrode third layer (IrO _y film 58) is formed on the upper electrode second layer. The upper electrode second layer is crystallized by heat treatment.

  In both the embodiment of FIG. 2A and the modification of FIG. 2B, the upper electrode third layer is also crystallized by the heat treatment for crystallization of the upper electrode second layer.

  Next, a semiconductor device and a manufacturing method thereof according to the second embodiment will be described. In the first embodiment, a planar type memory cell is formed, whereas in the second embodiment, a stack type memory cell is formed.

  FIG. 3 is a schematic cross-sectional view of the semiconductor device according to the second embodiment. The process up to forming the transistor 26 on the semiconductor substrate 10, forming the contact hole 32 in the interlayer insulating film 30 and the insulating film 28 covering the transistor 26, and forming the conductor plug 36 in the contact hole 32 is the same as in the first embodiment. It is. In order to avoid complication of explanation, the same reference numerals are assigned to members, structures and the like corresponding to the first embodiment. In addition, the film thickness etc. of each member can be changed from 1st Example as needed.

  Next, a silicon oxynitride film 100 is formed on the interlayer insulating film 30 so as to cover the conductor plug 36 by, for example, plasma CVD. Note that although the silicon nitride oxide film 100 is formed here, a silicon nitride film, an aluminum oxide film, or the like may be formed instead of the silicon nitride oxide film 100. Next, a silicon oxide film 102 is formed on the entire surface by, eg, plasma TEOSCVD. The silicon nitride oxide film 100 and the silicon oxide film 102 form an interlayer insulating film 104.

  Next, a contact hole 106 reaching the conductor plug 36 is formed in the interlayer insulating film 104 by photolithography and etching. Next, a Ti film is formed on the entire surface by, eg, sputtering. Next, a TiN film is formed on the entire surface by, for example, sputtering. Thus, the adhesion film 108 is formed by the Ti film and the TiN film. Next, the conductive film 110 is formed on the entire surface by, eg, CVD. For example, a tungsten film is formed as the conductive film 110. Next, the conductive film 110 and the adhesion film 108 are polished by CMP, for example, until the surface of the interlayer insulating film 104 is exposed.

Next, the surface of the interlayer insulating film 104 is processed by exposing the surface of the interlayer insulating film 104 to a plasma atmosphere generated using, for example, NH ₃ gas (plasma processing). Next, a Ti film is formed on the entire surface by, eg, sputtering. Since the surface of the interlayer insulating film 104 is treated as described above, Ti atoms deposited on the interlayer insulating film 104 can freely move on the surface of the interlayer insulating film 104 without being captured by oxygen atoms. Can do. Therefore, a high-quality Ti film that is self-oriented in the direction of (002) is formed on the interlayer insulating film 104.

  Next, heat treatment is performed in a nitrogen atmosphere by, for example, RTA. The heat treatment temperature is set to 650 ° C., for example. The heat treatment time is, for example, 60 seconds. By this heat treatment, the Ti film described above becomes the TiN film 114. Thus, the base film 114 which is a (111) -oriented TiN film is obtained. Here, the case where a TiN film is used as the base film 114 has been described as an example, but the base film 114 is not limited to a TiN film. For example, the base film 114 may be formed of a tungsten film, a silicon film, a copper film, or the like.

  Next, the surface of the base film 114 is polished by CMP. Thus, a planarization layer 114 having a planarized surface is formed. In the present embodiment, the surface of the base film 114 is flattened by forming the lower electrode 48a, the capacitor dielectric film 54a, and the upper electrode 60a with good orientation on the flattened base film 114. This is because it is possible.

Next, the surface of the foundation film 114 is treated (plasma treatment) by exposing the surface of the foundation film (planarization layer) 114 to a plasma atmosphere generated using, for example, NH ₃ gas. Next, a Ti film is formed on the entire surface by, eg, sputtering. Since a Ti film is formed on the base film 114 subjected to the plasma treatment, a high-quality Ti film is formed.

  Next, heat treatment is performed in a nitrogen atmosphere by, for example, RTA. The heat treatment temperature is set to 650 ° C., for example. The heat treatment time is, for example, 60 seconds. By this heat treatment, the Ti film formed on the base film 114 becomes a TiN film. Thus, the adhesion film 116 is formed of the (111) -oriented TiN film. The adhesion film 116 is for improving the crystallinity of the oxygen barrier film 118 formed in a later step and improving the adhesion between the oxygen barrier film 118 and the base film 114.

  Here, the case where the adhesion film 116 made of the TiN film is formed has been described as an example, but the adhesion film 116 is not limited to the TiN film. A material capable of improving the crystallinity of the oxygen barrier film 118 and improving the adhesion between the oxygen barrier film 118 and the base film 114 can be appropriately used as the material of the adhesion film 116. For example, the adhesion film 116 may be formed of an Ir film, a Pt film, or the like.

  Next, an oxygen barrier film (oxygen diffusion preventing film) 118 is formed on the entire surface by, for example, reactive sputtering. The film thickness of the oxygen barrier film 118 is, for example, about 100 nm. As the oxygen barrier film 118, for example, a TiAlN film is formed. The oxygen barrier film 118 is for preventing the upper surface of the conductor plug 110 from being oxidized after the conductor plug 110 is embedded in the interlayer insulating film 104.

  Here, the case where TiAlN is used as the material of the oxygen barrier film 118 has been described as an example, but the material of the oxygen barrier film 118 is not limited to TiAlN. A conductor capable of preventing oxygen diffusion can be used as a material for the oxygen barrier film 118 as appropriate. For example, TiAlON, TaAlN, TaAlON, or the like may be used as the material of the oxygen barrier film 118.

  Next, a noble metal film (conductive film) 44a is formed on the entire surface by, for example, sputtering. As the conductive film 44a, for example, an iridium film is formed. Next, heat treatment is performed in an argon atmosphere by, for example, RTA. The heat treatment temperature is set to 650 ° C., for example. The heat treatment time is, for example, 60 seconds. This heat treatment is for growing crystal grains in the noble metal film 44a and making the size of the crystal grains in the noble metal film 44a uniform.

Next, an amorphous noble metal oxide film is formed on the entire surface by, for example, sputtering. As the noble metal oxide film, for example, an iridium oxide film (IrO _x film) is formed.

  Next, a ferroelectric film 50a is formed on the entire surface by, eg, MOCVD. For example, a PZT film is formed as the ferroelectric film 50a. The film thickness of the ferroelectric film 50a is, for example, 70 nm.

  When formed by MOCVD, a ferroelectric film 50a crystallized at the time of film formation is formed. When the ferroelectric film 50a is formed by MOCVD, the amorphous noble metal oxide film is exposed to a relatively strong reducing atmosphere, so that the amorphous noble metal oxide film is reduced, and the noble metal film 46a. Oxygen released from the noble metal oxide film compensates for oxygen vacancies in the ferroelectric film 50a. When the iridium oxide film is formed at the stage of forming the noble metal oxide film, a noble metal film (conductive film) 46a which is an iridium film is formed. Note that the method of forming the ferroelectric film 50a is not limited to MOCVD, and for example, sputtering can be used as in the first embodiment.

  Next, the ferroelectric film 52 is formed on the ferroelectric film 50a by, for example, sputtering. More specifically, the ferroelectric film 52 is formed by, for example, high frequency sputtering. The film thickness of the ferroelectric film 52 is, for example, about 5 nm to 20 nm. A capacitor dielectric film 54a is formed by a laminated structure of the ferroelectric films 50a and 52.

Thereafter, the capacitor upper electrode including the laminated structure of the conductive films 56, 57 and 58 can be formed by the same method as in the first embodiment. That is, first, the conductive film 56 is formed on the ferroelectric film 52 with, for example, iridium oxide. Next, the ferroelectric film 52 is crystallized by heat treatment. Next, an ABO _x- type oxide film 57 is formed on the conductive film 56 by, for example, PZT. Next, a conductive film 58 is formed on the ABO _x- type oxide film 57 using, for example, iridium oxide. Next, Ir is diffused from the conductive films (iridium oxide films) 56 and 58 into the ABO _x- type oxide film (PZT film) 57 by heat treatment, thereby changing the ABO _x- type oxide film 57 into a conductive film. As described in the first embodiment, a conductive ABO _x- type oxide film 57 can also be used during film formation. The capacitor upper electrode including the laminated structure of the conductive films 56, 57, and 58 improves the barrier property against water and hydrogen as in the first embodiment.

  Next, the conductive film 120 is formed on the conductive film 58 by, for example, sputtering. The conductive film 120 becomes a part of the upper electrode 60a. The film thickness of the conductive film 120 is about 50 nm, for example. For example, an iridium film is formed as the conductive film 120. The conductive film 120 is for preventing the capacitor dielectric film 54a from being reduced by hydrogen. The film forming conditions of the conductive film 120 are, for example, as follows. The gas introduced into the film formation chamber is, for example, Ar gas. The pressure in the film forming chamber is, for example, about 1 Pa. The sputtering power is, for example, about 1.0 W.

Note that although the case where an iridium film is used as the conductive film 120 is described here as an example, the conductive film 120 is not limited to an iridium film. For example, a Pt film, a SrRuO ₃ film, or the like may be used as the hydrogen barrier film 120.

  Next, the lower surface (back surface) of the semiconductor substrate 10 is cleaned (back surface cleaning). Next, a first protective film is formed on the entire surface by sputtering. The first protective film functions as a part of the hard mask. For example, a TiN film is formed as the first protective film. Here, the case where the TiN film is formed as the first protective film has been described as an example, but the first protective film is not limited to the TiN film. For example, a TiAlN film, a TaAlN film, a TaN film, or the like may be used as the first protective film. Moreover, you may form a 1st protective film with these laminated films. Next, a second protective film is formed on the entire surface by, for example, plasma TEOSCVD. The second protective film functions as a hard mask in combination with the first protective film.

  Next, a photoresist film is formed on the entire surface by, eg, spin coating. Next, a resist pattern having a planar shape of the capacitor 62a is formed by photolithography. Next, the second protective film is etched using this resist pattern as a mask. Next, the first protective film is etched using the etched second protective film as a mask. Thus, a hard mask is formed by the etched first and second protective films.

Next, using the first and second protective films as a mask, the conductive film 120, the conductive film 58, the conductive film 57, the conductive film 56, the ferroelectric film 54a, the conductive film 46a, and the conductive film 44a are formed by plasma etching, for example. Etch. As the etching gas, for example, a mixed gas of HBr gas, O ₂ gas, Ar gas, and C ₄ F ₈ gas is used.

  Thus, the lower electrode 48a is formed by the conductive film 44a and the conductive film 46a. Further, a capacitor dielectric film 54a is formed by the ferroelectric film 50a and the ferroelectric film 52a. Further, the upper electrode 60 a is formed by the conductive film 56, the conductive oxide film 57, the conductive film 58, and the conductive film 120. A capacitor 62a is formed by the lower electrode 48a, the ferroelectric film 54a, and the upper electrode 60a.

Next, the second protective film is removed by dry etching or wet etching, for example. Next, the antioxidant film 118, the adhesion film 116, and the base film 114 are etched by dry etching, for example. At this time, the first protective film is also removed by etching. When performing the etching, for example, a down flow type plasma etching apparatus is used. The gas introduced into the chamber is, for example, a mixed gas of CF ₄ gas and O ₂ gas.

  Next, the protective film 122 is formed on the entire surface by, for example, sputtering. The protective film 122 is for preventing the capacitor dielectric film 54a from being reduced by hydrogen, moisture, or the like. For example, an aluminum oxide film is formed as the protective film 122.

  Note that although the case where the protective film 122 is formed by sputtering is described here as an example, the method for forming the protective film 122 is not limited to sputtering. For example, the protective film 122 may be formed by MOCVD.

  Next, heat treatment is performed in an oxygen atmosphere. This heat treatment is for supplying oxygen to the capacitor dielectric film 54a to improve the electrical characteristics of the capacitor 62a. The heat treatment conditions are, for example, 500 ° C. to 700 ° C. When the capacitor dielectric film 54a is a PZT film, the substrate temperature is set to 600 ° C., for example, and the heat treatment time is set to 60 minutes, for example.

  Next, a protective film 124 is formed on the entire surface by, eg, CVD. The protective film 124 is for preventing the capacitor dielectric film 54a from being reduced by hydrogen, moisture, or the like. For example, an aluminum oxide film is formed as the protective film 124.

  Although the case where an aluminum oxide film is formed as the protective film 124 has been described as an example here, the protective film 124 is not limited to the aluminum oxide film. As the protective film 124, for example, a titanium oxide film, a tantalum oxide film, a zirconium oxide film, an aluminum nitride film, a tantalum nitride film, an aluminum oxynitride film, or the like may be formed.

  Next, the interlayer insulating film 68 is formed by, for example, plasma TEOSCVD. For example, a silicon oxide film is formed as the interlayer insulating film 68. Here, a case where a silicon oxide film is formed as the interlayer insulating film 68 has been described as an example, but the interlayer insulating film 68 is not limited to a silicon oxide film. For example, an insulating inorganic film or the like can be used as appropriate. Next, the surface of the interlayer insulating film 68 is planarized by, for example, CMP.

  Next, the protective film 70 is formed by, for example, sputtering or CVD. As the protective film 70, for example, an aluminum oxide film is formed. The protective film 70 is for preventing the capacitor dielectric film 54a from being reduced by hydrogen, moisture, or the like. Since the protective film 70 is formed on the interlayer insulating film 68 having a flat surface, the protective film 70 becomes flat.

  Next, the interlayer insulating film 72 is formed by plasma TEOSCVD, for example. For example, a silicon oxide film is formed as the interlayer insulating film 72. Although the case where a silicon oxide film is formed as the interlayer insulating film 72 has been described as an example here, the interlayer insulating film 72 is not limited to a silicon oxide film. For example, a silicon oxynitride film or a silicon nitride film may be used as the interlayer insulating film 72. Next, the surface of the interlayer insulating film 72 is planarized by, for example, CMP.

  Next, contact holes 126 a reaching the conductor plugs 36 are formed in the interlayer insulating film 72, the protective film 70, the interlayer insulating film 68, the protective film 124, the protective film 122, and the interlayer insulating film 104 by photolithography and etching. Further, a contact hole 126b reaching the upper electrode 60a is formed in the interlayer insulating film 72, the protective film 70, the interlayer insulating film 68, the protective film 124, and the protective film 122 by photolithography and etching.

  Next, heat treatment is performed in an oxygen atmosphere. This heat treatment is for supplying oxygen to the capacitor dielectric film 54a, compensating for oxygen vacancies in the capacitor dielectric film 54a, and restoring the electrical characteristics of the capacitor 62a. The substrate temperature during the heat treatment is set to 450 ° C., for example. Next, surface treatment is performed on the inner wall surfaces of the contact holes 126a and 126b by high frequency etching.

  Next, the adhesion film 128 is formed on the entire surface by, for example, sputtering. As the adhesion film 128, for example, a TiN film is formed. The film thickness of the adhesion film 128 is about 125 nm, for example. Next, a conductive film is formed on the entire surface by, eg, CVD. For example, a tungsten film is formed as the conductive film. Next, the conductive film and the adhesion film 128 are polished by CMP, for example, until the surface of the interlayer insulating film 72 is exposed. Thus, the conductor plugs 130a and 130b are formed by the conductive film. Next, plasma cleaning is performed. The gas used when performing the plasma cleaning is, for example, Ar gas. As a result, the natural oxide film and the like existing on the surfaces of the conductor plugs 130a and 130b are removed.

  Next, for example, by sputtering, for example, a TiN film 82, an AlCu alloy film 84, a Ti film 86, and a TiN film 88 are sequentially stacked to form a stacked film. Next, the laminated film is patterned by photolithography and etching to form the wiring 90. Thereafter, if necessary, a multilayer wiring structure is further formed on the upper side. In this way, the semiconductor device according to the second embodiment is manufactured.

  Next, a semiconductor device and a manufacturing method thereof according to the third embodiment will be described. In the third embodiment, by applying the ferroelectric capacitor forming method according to the first embodiment, a memory capacitor used for a ferroelectric memory element and a smoothing capacitor used for a smoothing capacitor element of a power supply wiring are simultaneously formed. To do. 4A to 4K are schematic cross-sectional views showing the main steps of the semiconductor device manufacturing method according to the third embodiment.

  The steps up to forming the MOS transistor 26 and forming the antioxidant film 42 on the semiconductor substrate 10 are the same as those in the first embodiment. 4A to 4K particularly show a process of separately forming a memory capacitor and a smoothing capacitor above the antioxidant film 42.

  Reference is made to FIG. 4A. A lower electrode adhesion layer 43, a lower electrode film 44, a ferroelectric film 50, a ferroelectric film 52, and a conductive film 56 are laminated on the entire surface (on the antioxidant film 42). Next, heat treatment is performed in an atmosphere containing oxygen by RTA, and the ferroelectric film 52 is crystallized so that the crystallinity of the ferroelectric film 50 is inherited.

As in the first embodiment, the ferroelectric films 50 and 52 are made of, for example, a PZT film, and the conductive film 56 is made of, for example, iridium oxide. The film thickness, film forming conditions, and oxygen composition x of the conductive film (IrO _x film) 56 are the same as in the first embodiment.

  Refer to FIG. 4B. The conductive film 56 is used as a part of the upper electrode in the memory capacitor. A resist pattern RP is formed on the conductive film 56, and the conductive film 56 is patterned using the resist pattern RP as a mask. Outside the memory capacitor, the conductive film 56 is removed and the ferroelectric film 52 is exposed. Since the resist pattern is not formed on the ferroelectric film, damage to the ferroelectric film due to contact with the photoresist is suppressed. Thereafter, the resist pattern RP is peeled off.

Reference is made to FIG. 4C. An ABO _x- type oxide (A and B are metal elements, O is an oxygen element, x> 0) film 53 is formed on the ferroelectric film 52 so as to cover the patterned conductive film 56. The ABO _x- type oxide film 53 is finally used as a part of the upper electrode in the memory capacitor and as a part of the capacitor dielectric film in the smoothing capacitor. As the ABO _x- type oxide film 53, a ferroelectric film that can be crystallized by taking over the crystallinity of the ferroelectric film 52 is formed. As the ABO _x- type oxide film 53, for example, a PZT film having a thickness of 10 nm can be formed in the same manner as the ABO _x- type oxide film 57 of the first embodiment, for example.

Reference is made to FIG. 4D. Next, heat treatment is performed in an atmosphere containing oxygen by, for example, RTA. By this heat treatment, the ABO _x- type oxide film 53 is crystallized. In the region where the ABO _x- type oxide film (PZT film) 53 is formed on the ferroelectric film (PZT film) 52 outside the conductive film (IrO _x film) 56, that is, in the smoothing capacitor forming portion, Taking over the crystallinity of the dielectric film (PZT film) 52, the ABO _x- type oxide film (PZT film) 53 is crystallized.

On the conductive film (IrO _x film) 56, that is, in the memory capacitor forming portion, the ABO _x type oxide film (PZT film) 53 is crystallized in a random orientation. Incidentally, this heat treatment, the conductive film (IrO _x film) 56, the ABO _x type oxide film (PZT film) 53, the conductive film (IrO _x film) 56 parts formed in the vicinity 57p, to some extent Ir diffusion To do.

  In the memory capacitor forming portion, a capacitor dielectric film having a structure in which the ferroelectric films 50 and 52 are laminated is formed. On the other hand, in the smoothing capacitor forming portion, a capacitor dielectric film having a structure in which a ferroelectric film 53 is further laminated on the ferroelectric films 50 and 52 is formed.

Reference is made to FIG. 4E. A conductive film 58 is formed on the entire surface of the ABO _x- type oxide film 53 by sputtering, for example. The conductive film 58 forms an upper electrode having a structure in which the conductive films 56, 57, and 58 are stacked in the memory capacitor forming portion, and forms an upper electrode in a single layer of the conductive film 58 in the smoothing capacitor forming portion. To do. Similar to the first embodiment, the conductive film 58 is formed of, for example, iridium oxide (IrO _y ). The film thickness, film forming conditions, and oxygen composition y of the conductive film (IrO _y film) 58 are the same as in the first embodiment.

  Next, heat treatment is performed. The heat treatment conditions are as follows, for example. The substrate temperature is set to about 700 ° C. to 750 ° C., for example. The heat treatment time is set to 120 seconds, for example. The atmosphere in the chamber is, for example, an atmosphere of a mixed gas of inert gas and oxygen gas.

By this heat treatment, the conductive film (IrO _y film) 58 is crystallized. In addition, by this heat treatment, in the memory capacitor formation portion, the conductive film (IrO _x film) 56 and the conductive film (IrO _y film) 58 are changed to the conductive film (IrO _x film) 56 and the conductive film (IrO _y film) 58. By diffusing Ir into the sandwiched portion of the ABO _x- type oxide film (PZT film) 57p, a conductive film 57 made of PZT doped with Ir is formed.

In the smoothing capacitor forming portion, Ir diffuses from the conductive film (IrO _y film) 58 to the ABO _x- type oxide film (PZT film) 53. However, in the smoothing capacitor forming portion, Ir diffuses throughout the thick capacitor dielectric film in which the ferroelectric films 50, 52, and 53 are stacked. For this reason, it is suppressed that the capacitor dielectric film of the smoothing capacitor becomes conductive.

  Reference is made to FIG. 4F. Similar to the first embodiment, the lower surface (back surface) of the semiconductor substrate 10 is cleaned (back surface cleaning). Then, a protective film 92 and a photoresist film 94 are formed. A resist pattern 94 in the shape of the upper electrode of the memory capacitor and the upper electrode of the smoothing capacitor is formed by photolithography.

  The protective film 92 and the conductive film 58 are patterned by etching using the resist pattern 94 as a mask. Thereafter, the resist pattern 94 is peeled off. Further, the protective film 92 is removed by dry etching, for example.

  Next, heat treatment is performed in an atmosphere containing oxygen. This heat treatment is for recovering the damage applied to the ferroelectric films 50, 52 and 53 (recovery annealing). The heat treatment temperature is, for example, 600 ° C to 700 ° C. Here, the heat treatment temperature is 600 ° C. The heat treatment time is 40 minutes, for example.

This heat treatment further diffuses Ir from the iridium oxide films 56 and 58 to improve the resistivity of the ABO _x- type oxide film (Ir-added PZT film) 57 in the upper electrode of the memory capacitor.

  Reference is made to FIG. 4G. A photoresist film 96 is formed on the entire surface by, eg, spin coating. A resist pattern 96 in the shape of a capacitor dielectric film of the memory capacitor and a capacitor dielectric film of the smoothing capacitor is formed by photolithography. Using the resist pattern 96 as a mask, the ferroelectric films 53, 52, and 50 are etched. Thereafter, the resist pattern 96 is peeled off.

  Refer to FIG. 4H. For example, the protective film 64 is formed on the entire surface by sputtering or CVD. As the protective film 64, for example, an aluminum oxide film is formed. Next, a photoresist film 98 is formed on the entire surface by, eg, spin coating. Next, a resist pattern 98 having the shape of the lower electrode 48 is formed by photolithography.

  Reference is made to FIG. 4I. The protective film 64 and the lower electrode film 44 are etched using the resist pattern 98 as a mask. A lower electrode 48 is formed by the conductive film 44.

  Thus, as a capacitor having a lower electrode made of the conductive film 44, a capacitor dielectric film in which the ferroelectric films 50 and 52 are stacked, and an upper electrode in which the conductive films 56, 57 and 58 are stacked, A memory capacitor is formed.

  Further, a smoothing capacitor is formed as a capacitor having a lower electrode made of the conductive film 44, a capacitor dielectric film in which the ferroelectric films 50, 52, and 53 are stacked, and an upper electrode made of the conductive film 58.

  The capacitor protection film 64 remains so as to cover these upper electrodes and the capacitor dielectric film. Thereafter, the resist pattern 98 is peeled off.

  The capacitor dielectric film of the memory capacitor can be formed to a desired thickness by adjusting the thickness of the ferroelectric films 50 and 52. Thereby, a memory capacitor suitable for low-voltage operation can be formed.

  On the other hand, the capacitor dielectric film of the smoothing capacitor has a ferroelectric film 53 and is formed thicker than the capacitor dielectric film of the memory capacitor. Thereby, a smoothing capacitor in which leakage current is suppressed can be formed.

The upper electrode of the memory capacitor includes a laminated structure of a conductive film (IrO _x film) 56, a conductive film (Ir-added PZT film) 57, and a conductive film (IrO _y film) 58, as described in the first embodiment. The barrier property against water and hydrogen is enhanced.

On the other hand, the upper electrode of the smoothing capacitor, a single-layer conductive film is formed by (IrO _y film) 58, compared to the upper electrode of the memory capacitor, barrier property against water and hydrogen is low. However, since the smoothing capacitor only needs to function as a capacitor, the erosion of the ferroelectric is less likely to be a problem than the memory capacitor.

In the first example, the heat treatment after laminating the conductive film (IrO _y film) 58 was performed while the ABO _x- type oxide film (PZT film) 57 was in an amorphous state. On the other hand, in the third embodiment, before the conductive film (IrO _y film) 58 is stacked, the ABO _x- type oxide film (PZT film) 53 is crystallized by heat treatment. That is, the heat treatment after the lamination of the conductive film (IrO _y film) 58 is performed in a state where the ABO _x- type oxide film (PZT film) 53 is crystallized.

  Since the crystallized PZT film has a rough upper surface, when an electrode film is stacked on the crystallized PZT film and heat treatment is performed, the interface between the electrode film and the PZT film is formed rough.

  On the other hand, when an electrode film is stacked on an amorphous PZT film and heat treatment is performed, the interface between the electrode film and the PZT film is flattened. Note that the interface between the electrode film and the PZT film is more easily flattened when the iridium oxide electrode film is crystallized. In addition, when the oxygen composition of the iridium oxide electrode film is smaller, the interface between the electrode film and the PZT film is more easily flattened.

In the third embodiment, the interface between the conductive film (IrO _y film) 58 and the ABO _x- type oxide film (PZT film) 53, that is, the interface between the upper electrode and the capacitor dielectric film in the smoothing capacitor is formed rough. Has been. This is preferable from the viewpoint of reducing the leakage current of the smoothing capacitor.

On the other hand, the interface between the conductive film (IrO _x film) 56 and the ferroelectric film 52, that is, the interface between the upper electrode of the memory capacitor and the capacitor dielectric film is formed flat as in the first embodiment. ing. When the interface between the upper electrode and the capacitor dielectric film is flat, the paraelectric layer becomes thinner and the inversion charge amount of the capacitor can be increased as compared with the case where the interface is rough. In the memory capacitor, it is preferable to increase the inversion charge amount.

As a modification, the heat treatment before the formation of the conductive film 58 as described with reference to FIG. 4D is omitted, and the memory capacitor is formed by the heat treatment after the formation of the conductive film 58 as described with reference to FIG. 4E. The ABO _x- type oxide film (PZT film) 53 can be converted into a conductive film and the ABO _x- type oxide film (PZT film) 53 can be crystallized.

  Reference is made to FIG. 4J. For example, the protective film 66 is formed by sputtering or CVD. As the protective film 66, for example, an aluminum oxide film is formed. Next, heat treatment is performed in an oxygen atmosphere. This heat treatment is for supplying oxygen to the capacitor dielectric films of the memory capacitor and the smoothing capacitor to improve the electrical characteristics of the capacitor. The heat treatment conditions are, for example, 500 ° C. to 700 ° C. The heat treatment time is, for example, 30 minutes to 120 minutes.

  As shown in FIG. 4K, an aluminum oxide film 67 with good step coverage is formed so as to cover the protective film 66. In this embodiment, the aluminum oxide film 67 is formed by atomic layer deposition (ALD) using a batch type film forming apparatus.

  The subsequent steps will be described with reference to FIG. FIG. 5 is a schematic sectional view showing the entire structure of the semiconductor device according to the third embodiment. For example, a silicon oxide film is deposited on the aluminum oxide film 67 by, for example, plasma TEOSCVD to form an interlayer insulating film 68. Next, the surface of the interlayer insulating film 68 is planarized by, for example, CMP.

  Next, a contact hole reaching the capacitor lower electrode and a contact hole reaching the capacitor upper electrode are formed in the interlayer insulating film 68, the protective films 67 and 66, and the protective film 64 by photolithography and etching. Next, heat treatment is performed in an oxygen atmosphere. Next, contact holes reaching the conductor plugs 36 are formed in the interlayer insulating film 68, the protective films 67 and 66, the adhesion film 43, and the interlayer insulating film 42 by photolithography and etching.

  An adhesion film 78 is formed on the entire surface by, for example, sputtering. As the adhesion film 78, for example, a TiN film is formed. Next, a tungsten film, for example, is formed on the entire surface by, eg, CVD. Next, the conductive film and the adhesion film 78 are polished by, for example, CMP until the surface of the interlayer insulating film 68 is exposed. Thus, the conductor plug 80 is formed of the conductive film.

  Next, plasma cleaning is performed, and, for example, a TiN film, an AlCu alloy film, a Ti film, and a TiN film are sequentially stacked to form a stacked film by sputtering. Next, the laminated film is patterned by photolithography and etching to form the wiring 90. Thereafter, if necessary, a multilayer wiring structure is further formed on the upper side. In this way, the semiconductor device according to the third embodiment is manufactured.

  6A and 6B are schematic cross-sectional views of a memory capacitor and a smoothing capacitor according to the third embodiment, respectively.

  The memory capacitor and the smoothing capacitor have a common laminated structure from the lower electrode film (Pt film) 44 to the ferroelectric film (PZT film) 52. The lower electrode film (Pt film) 44 is a columnar crystal having a (111) orientation in a cubic structure. The ferroelectric film (PZT film) 50 continues to grow between the columnar crystals of the lower electrode film (Pt film) 44 (with the lateral position shifted), and has a (111) orientation with a perovskite structure. . The ferroelectric film (PZT film) 52 takes on the crystallinity of the ferroelectric film (PZT film) 50 and grows in a columnar shape and has a (111) orientation in a perovskite structure.

As shown in FIG. 6A, in the memory capacitor, on the ferroelectric film (PZT film) 52, a conductive film (IrO _x film) 56 that is the first layer of the upper electrode and a conductive film that is the second layer of the upper electrode. A film (Ir-added PZT film) 57 and a conductive film (IrO _y film) 58 which is the third layer of the upper electrode are laminated.

The conductive film (IrO _x film) 56 and the conductive film (IrO _y film) 58 have a rutile structure and have a (101) orientation or a (200) orientation. The conductive film (IrO _x film) 56 has already been formed as columnar crystals at the time of film formation. The conductive film (Ir-added PZT film) 57 has a perovskite structure and is randomly oriented.

Since a conductive film (Ir-added PZT film) 57 having a different crystal structure and orientation is sandwiched between the conductive film (IrO _x film) 56 and the conductive film (IrO _y film) 58, The barrier property against hydrogen is improved, and the erosion of the ferroelectric films 50 and 52 is suppressed.

As shown in FIG. 6B, in the smoothing capacitor, a ferroelectric film (PZT film) 53 is further laminated on the ferroelectric film (PZT film) 52, and the ferroelectric film (PZT film) 53 is formed. A conductive film (IrO _y film) 58 as an upper electrode is laminated.

  The ferroelectric film (PZT film) 53 grows taking over the crystallinity of the ferroelectric film (PZT film) 52, and in the smoothing capacitor, the ferroelectric films (PZT films) 50, 52, and 53 are A thick capacitor dielectric film is formed.

  As described above, according to the method of the third embodiment, the memory capacitor and the smoothing capacitor can be formed simultaneously.

  The capacitor for memory is suitable for low voltage operation because the capacitor dielectric film is formed thin, the interface between the capacitor dielectric film and the upper electrode is formed flat, and the amount of inversion charge is large. Thus, the barrier property against water and hydrogen is enhanced.

  On the other hand, in the smoothing capacitor, the capacitor dielectric film is formed thick, the leakage current is suppressed, and the dielectric breakdown voltage is increased.

FIG. 7 shows a flow of main processes for forming a memory capacitor and a smoothing capacitor according to the third embodiment. The process up to crystallization of the second ferroelectric film (ferroelectric film 52) is the same as the flow of FIG. 2A in the first embodiment. After the crystallization of the second ferroelectric film, the upper electrode first layer (IrO _x film 56) is patterned and left in the memory capacitor forming portion.

The upper electrode second layer / third ferroelectric film (ABO _x- type oxide ferroelectric film 57) is amorphous on the second ferroelectric film so as to cover the upper electrode first layer of the memory capacitor formation portion. Form with quality. The upper electrode second layer / third ferroelectric film is crystallized by heat treatment.

An upper electrode third layer (IrO _y film 58) is formed on the upper electrode second layer / third ferroelectric film. By heat treatment, Ir is diffused from the upper electrode first layer and the third layer to the upper electrode second layer / third ferroelectric film in the memory capacitor forming portion, so that the upper electrode second layer / third ferroelectric is diffused. The film is converted into a conductive film. The upper electrode third layer is also crystallized by this heat treatment.

  Thereafter, the upper electrode third layer and other layers are patterned to separate the memory capacitor and the smoothing capacitor.

  Next, a semiconductor device and a manufacturing method thereof according to the fourth embodiment will be described. In the fourth embodiment, a stack type structure memory cell forming technique according to the second embodiment is combined with a technique for separately forming the memory capacitor and the smoothing capacitor according to the third embodiment. Form.

  FIG. 8 is a schematic sectional view of a semiconductor device according to the fourth embodiment. The process up to the formation of the capacitor lower electrode film 48 is the same as in the second embodiment. On the entire surface of the capacitor lower electrode film 48, a ferroelectric film 50, a ferroelectric film 52, and a conductive film 56 are stacked.

  Next, in the third embodiment, the conductive film 56 is left in the memory capacitor forming portion in the same manner as described with reference to FIG. 4B.

Next, in the third embodiment, an ABO _x- type oxide film 53 is formed and heat-treated in the same manner as described with reference to FIGS. 4C and 4D.

Next, in the third embodiment, a conductive film 58 is formed on the ABO _x- type oxide film 53 in the same manner as described with reference to FIG. 4E. Further, a heat treatment is performed in the memory capacitor is changed ABO _x type oxide film 53 on the conductive film 57, the smoothing capacitor, the ABO _x type oxide film 53, taking over the crystallinity of the ferroelectric film 52 A crystallized ferroelectric film 53 is formed.

  Next, a conductive film 120 is formed on the conductive film 58 as in the second embodiment. After the formation of the conductive film 120, similarly to the second embodiment, the capacitors are patterned by collective etching, a protective film is formed, recovery heat treatment is performed, and wiring is formed. In this manner, the semiconductor device according to the fourth embodiment having the memory cell of the stack type structure in which the memory capacitor and the smoothing capacitor are simultaneously formed is formed.

  Next, with reference to FIG. 9A and FIG. 9B, the experimental results of examining the characteristics of the ferroelectric capacitor will be described. A-Capacitor and B-Capacitor shown in FIGS. 9A and 9B are as follows.

  The A-Capacitor has a capacitor dielectric film in which a ferroelectric film 50 having a thickness of 75 nm and a ferroelectric film 52 having a thickness of 10 nm are stacked, and has an upper electrode structure similar to that of the first embodiment. It is a capacitor.

The B-Capacitor has a capacitor dielectric film in which a ferroelectric film 50 having a thickness of 75 nm, a ferroelectric film 52 having a thickness of 10 nm, and a ferroelectric film 53 having a thickness of 10 nm are stacked. It is a capacitor using an IrO ₂ film formed at a temperature of the upper electrode.

  The A-Capacitor and the B-Capacitor are formed simultaneously, and the A-Capacitor corresponds to the memory capacitor, and the B-Capacitor corresponds to the smoothing capacitor.

  FIG. 9A is a graph showing the relationship between the inverted charge amount Qsw of the capacitor and the read voltage. The inversion charge amount Qsw of the A-Capacitor has a very steep rise with respect to the read voltage. The saturation inversion charge amount is also very large. On the other hand, the inversion charge amount Qsw of the B-Capacitor rises slowly, and the saturation inversion charge amount is about half that of the A-Capacitor.

  In the A-Capacitor, the interface between the upper electrode and the ferroelectric film is formed flat, so that the paraelectric layer at the interface is thin and a large amount of inversion charge is obtained. In the B-capacitor, the interface between the upper electrode and the ferroelectric film is formed rough, so that the paraelectric layer at the interface is thick and the inversion charge amount is smaller than that of the A-capacitor. It is thought that there is. Note that since the smoothing capacitor uses a capacity as compared with the memory capacitor, there is no particular problem even if the inversion charge amount is not large.

  FIG. 9B is a graph showing the relationship between the leakage current of the capacitor and the applied voltage. The leakage current of B-Capacitor is two orders of magnitude smaller than that of A-Capacitor.

  In the B-Capacitor, it is considered that the leakage current is suppressed by the thick capacitor dielectric film in which three layers of ferroelectric films are laminated, even if iridium is diffused to some extent from the upper electrode. In the A-Capacitor, the leakage current is larger than that of the B-Capacitor due to the diffusion of iridium from the upper electrode into the thin capacitor insulating film in which two ferroelectric films are laminated. It is thought that there is. In contrast to the smoothing capacitor, the memory capacitor does not cause a problem even if the leakage current is large to some extent.

  In the first to fourth embodiments described above, the case where PZT (including those to which La or the like is added) is used as the capacitor ferroelectric films 50 and 52 is exemplified. It is not limited to PZT. For example, other ferroelectric materials having a perovskite structure can be used. Further, a ferroelectric material having a bismuth layer structure may be used.

As the ferroelectric material of the bismuth layer _{structure, (Bi 1-x R x} ) Ti 3 O 12 (R is a rare earth _{element, 0 <x <1),} SrBi 2 Ta 2 O 9 (SBT), SrBi 4 Ti 4 O ₁₅ , those added with one or more elements of Ca, Sr, and La, BiFeO ₃ added with La, BiTiO ₃ added with La, and the like can be used.

Note that the crystallization temperature of SrBi ₄ Ti ₄ O ₁₅ to which La is added and BiTiO ₃ to which La is added are higher than the crystallization temperature of PZT to which La is added. When using SrBi ₄ Ti ₄ O ₁₅ to which La is added or BiTiO ₃ to which La is added, the heat treatment temperature is preferably about 600 ° C. to 650 ° C., for example.

  In the first to fourth embodiments described above, the case where iridium oxide is used as the conductive film 56 of the upper electrode first layer and the third electrode 58 of the upper electrode is illustrated, but the material of the conductive film 56 or 58 is It is not limited to iridium oxide. For example, an oxide of ruthenium (Ru) can be used. For example, the ruthenium oxide films 56 and 58 can be formed by reactive sputtering using a ruthenium target.

  Ruthenium oxide also has a tetragonal structure (rutile structure) like iridium oxide. Even when ruthenium oxide is used as the conductive film 56 of the upper electrode first layer, the conductive film 56 that has become columnar crystals at the time of film formation can be formed, for example, by sputtering at a sufficiently high film formation temperature. . Note that the preferable film thickness relationship and the preferable oxygen composition ratio relationship described when the conductive films 56 and 58 are formed of iridium oxide are the same when the conductive films 56 and 58 are formed of ruthenium oxide.

When a ferroelectric film is formed on the ABO _x- type oxide film 57 of the second upper electrode layer and a ruthenium oxide film is formed on the first and third conductive films 56 and 58 of the upper electrode, the ferroelectric film By diffusing ruthenium into the film 57, it can be converted into a conductive film. As a combination, there may be a structure in which one of the upper electrode first layer and third layer conductive films 56 and 58 is an iridium oxide film and the other is a ruthenium oxide film.

As described above, the upper electrode of the ferroelectric capacitor adopts a structure in which an ABO _x- type oxide conductive film having a perovskite structure or a bismuth layer structure is sandwiched between an iridium oxide film or a ruthenium oxide film. In addition, the barrier property against water, hydrogen and the like can be improved.

An ABO _x- type oxide conductive film having a perovskite structure or a bismuth layer structure can be formed, for example, by diffusing iridium or ruthenium from a conductive film forming an upper electrode into a ferroelectric material used for a capacitor dielectric film.

In the memory capacitor, the ABO _x- type oxide ferroelectric film can be converted into conductivity and used as a part of the upper electrode. In the smoothing capacitor, the ABO _x- type oxide ferroelectric film is used as the capacitor dielectric. It can be used as part of the membrane. Thereby, in the memory capacitor, a capacitor structure having a relatively thick ferroelectric film and a thick upper electrode can be obtained. On the other hand, with a smoothing capacitor, a capacitor structure having a relatively thick thick ferroelectric film and a thin upper electrode can be obtained. For example, a thin ferroelectric film for a memory capacitor is preferable for reducing operating voltage, and a thick ferroelectric film for a smoothing capacitor is preferable for reducing leakage current.

  Although the present invention has been described with reference to the embodiments, the present invention is not limited thereto. It will be apparent to those skilled in the art that various modifications, improvements, combinations, and the like can be made.

The following additional notes are further disclosed regarding the embodiment including the first to fourth examples described above.
(Appendix 1)
A semiconductor substrate;
A lower electrode formed above a first region of the semiconductor substrate;
A ferroelectric film formed on the lower electrode;
An upper electrode formed on the ferroelectric film,
The upper electrode is
A first conductive film formed of iridium oxide or ruthenium oxide;
A second conductive film formed above the first conductive film and formed of an ABO _x- type oxide having a perovskite structure or a bismuth layered crystal structure;
And a third conductive film formed above the second conductive film and formed of iridium oxide or ruthenium oxide.
(Appendix 2)
The semiconductor device according to appendix 1, wherein the second conductive film is formed of a material made conductive by adding iridium or ruthenium to a ferroelectric material.
(Appendix 3)
The semiconductor device according to appendix 1 or 2, wherein the thickness of the second conductive film is 0.5 nm to 30 nm.
(Appendix 4)
further,
Another lower electrode formed above the second region of the semiconductor substrate;
Another ferroelectric film formed on the other lower electrode;
Another upper electrode formed on the other ferroelectric film,
The other ferroelectric film is thicker than the ferroelectric film,
The second conductive film of the upper electrode is formed of a material made conductive by adding iridium or ruthenium to a ferroelectric material common to the upper layer portion of the other ferroelectric film. The semiconductor device according to any one of?
(Appendix 5)
The semiconductor device according to appendix 4, wherein a lower layer portion below the upper layer portion among the other ferroelectric films is formed of a ferroelectric material common to the ferroelectric film.
(Appendix 6)
6. The semiconductor device according to appendix 4 or 5, wherein the other upper electrode is formed of a conductive material common to the third conductive film of the upper electrode.
(Appendix 7)
The semiconductor device according to any one of appendices 4 to 6, wherein the upper electrode is thicker than the other upper electrodes.
(Appendix 8)
The semiconductor according to any one of appendices 4 to 7, wherein an interface between the upper electrode and the ferroelectric film has higher flatness than an interface between the other upper electrode and the other ferroelectric film. apparatus.
(Appendix 9)
A ferroelectric capacitor having the lower electrode, the ferroelectric film, and the upper electrode forms a part of a memory element, and the other lower electrode, the other ferroelectric film, and the other upper part are formed. 10. The semiconductor device according to any one of appendices 4 to 8, wherein the ferroelectric capacitor having an electrode forms part of a smoothing capacitive element.
(Appendix 10)
The semiconductor device according to any one of appendices 1 to 9, wherein the film thickness of the third conductive film is thicker than the film thickness of the first conductive film.
(Appendix 11)
11. The semiconductor device according to any one of appendices 1 to 10, wherein an oxygen composition ratio of a material of the third conductive film is larger than an oxygen composition ratio of a material of the first conductive film.
(Appendix 12)
Forming a lower electrode film above the semiconductor substrate;
Forming a ferroelectric film on the lower electrode;
Forming a first conductive film on the ferroelectric film with iridium oxide or ruthenium oxide;
Forming a second conductive film on the first conductive film with an ABO _x type oxide having a perovskite structure or a bismuth layered crystal structure;
Forming a third conductive film with iridium oxide or ruthenium oxide above the second conductive film.
(Appendix 13)
The step of forming the second conductive film includes:
Forming an ABO _x- type oxide ferroelectric film having a perovskite structure or a bismuth layered crystal structure above the first conductive film;
After the formation of the third conductive film, iridium or ruthenium is diffused from the first conductive film and the third conductive film into the ABO _x- type ferroelectric film by heat treatment to thereby form the ABO _x- type oxide. 13. The method for manufacturing a semiconductor device according to appendix 12, further comprising: converting a ferroelectric film into the conductive second conductive film.
(Appendix 14)
And a step of patterning the first conductive film so as to remain in the first region,
Forming the ABO _x type oxide ferroelectric layer, wherein the first region on the first conductive layer, the outer side of the first region on the ferroelectric film, the ABO _x type oxide Forming a ferroelectric film,
The step of converting the ABO _x- type oxide ferroelectric film into the conductive second conductive film includes the step of converting the ABO _x- type oxide ferroelectric film to the second conductive film in the vicinity of the first conductive film. Converted into a film, leaving the ABO _x- type oxide ferroelectric film as a ferroelectric film outside the second conductive film,
The step of forming the third conductive film above the second conductive film includes the step of forming the third conductive film on the ABO _x- type oxide ferroelectric film that remains as a ferroelectric material outside the second conductive film. 14. The method for manufacturing a semiconductor device according to appendix 13, wherein a conductive film is formed.
(Appendix 15)
15. The method of manufacturing a semiconductor device according to appendix 14, further comprising a step of crystallizing the ABO _x- type oxide ferroelectric film by performing a heat treatment before the step of forming the third conductive film.
(Appendix 16)
Furthermore, by patterning,
A ferroelectric capacitor including the lower electrode film, the ferroelectric film, and an upper electrode film having a stack of the first conductive film, the second conductive film, and the third conductive film;
A ferroelectric including the lower electrode film, a laminated ferroelectric film having a laminate of the ferroelectric film and the ABO _x- type oxide ferroelectric film, and an upper electrode film having the third conductive film 16. The method for manufacturing a semiconductor device according to appendix 14 or 15, comprising a step of forming a capacitor.
(Appendix 17)
The method of manufacturing a semiconductor device according to any one of appendices 13 to 16, wherein the step of forming the ABO _x- type oxide ferroelectric film includes high-frequency sputtering, and the ABO _x- type oxide ferroelectric film is formed. .
(Appendix 18)
The process for forming the first conductive film is the method for manufacturing a semiconductor device according to any one of appendices 12 to 17, wherein the first conductive film is formed so that the first conductive film is crystallized in a columnar shape at the time of film formation.
(Appendix 19)
The method of manufacturing a semiconductor device according to any one of appendices 12 to 18, wherein the step of forming the third conductive film forms the third conductive film so that the third conductive film is amorphous or microcrystalline at the time of film formation.

42 Interlayer insulating film 43 Adhesion films 44, 46 Conductive film 48 Capacitor lower electrodes 50, 52 Ferroelectric film 53 Ferroelectric film (ABO _x- type oxide film)
54 Capacitor power supply films 56, 58 Conductive film (iridium oxide film)
57 ABO _x- type oxide film 60 Capacitor upper electrode 64, 66 Protective film

Claims (9)

A semiconductor substrate;
A lower electrode formed above a first region of the semiconductor substrate;
A ferroelectric film formed on the lower electrode;
An upper electrode formed on the ferroelectric film,
The upper electrode is
A first conductive film formed of iridium oxide or ruthenium oxide;
A second conductive film formed above the first conductive film and formed of an ABO _x- type oxide having a perovskite structure or a bismuth layered crystal structure and having a thickness of 0.5 nm to 30 nm;
And a third conductive film formed above the second conductive film and formed of iridium oxide or ruthenium oxide.   The semiconductor device according to claim 1, wherein the second conductive film is formed of a material made conductive by adding iridium or ruthenium to a ferroelectric material. further,
Another lower electrode formed above the second region of the semiconductor substrate;
Another ferroelectric film formed on the other lower electrode;
Another upper electrode formed on the other ferroelectric film,
The other ferroelectric film is thicker than the ferroelectric film,
The second conductive film of the upper electrode is formed of a material made conductive by adding iridium or ruthenium to a ferroelectric material common to an upper layer portion of the other ferroelectric film. 3. The semiconductor device according to 1 or 2.   A ferroelectric capacitor having the lower electrode, the ferroelectric film, and the upper electrode forms a part of a memory element, and the other lower electrode, the other ferroelectric film, and the other upper part are formed. 4. The semiconductor device according to claim 3, wherein the ferroelectric capacitor having an electrode forms a part of a smoothing capacitive element. Forming a lower electrode film above the semiconductor substrate;
Forming a ferroelectric film on the lower electrode;
Forming a first conductive film on the ferroelectric film with iridium oxide or ruthenium oxide;
Forming a second conductive film with an ABO _x type oxide having a perovskite structure or a bismuth layered crystal structure on the first conductive film in a thickness of 0.5 nm to 30 nm ;
Forming a third conductive film with iridium oxide or ruthenium oxide above the second conductive film. The step of forming the second conductive film includes:
Forming an ABO _x- type oxide ferroelectric film having a perovskite structure or a bismuth layered crystal structure above the first conductive film;
After the formation of the third conductive film, iridium or ruthenium is diffused from the first conductive film and the third conductive film into the ABO _x- type ferroelectric film by heat treatment to thereby form the ABO _x- type oxide. A method for manufacturing a semiconductor device according to claim 5, further comprising: converting a ferroelectric film into the conductive second conductive film. And a step of patterning the first conductive film so as to remain in the first region,
Forming the ABO _x type oxide ferroelectric layer, wherein the first region on the first conductive layer, the outer side of the first region on the ferroelectric film, the ABO _x type oxide Forming a ferroelectric film,
The step of converting the ABO _x- type oxide ferroelectric film into the conductive second conductive film includes the step of converting the ABO _x- type oxide ferroelectric film to the second conductive film in the vicinity of the first conductive film. Converted into a film, leaving the ABO _x- type oxide ferroelectric film as a ferroelectric film outside the second conductive film,
The step of forming the third conductive film above the second conductive film includes the step of forming the third conductive film on the ABO _x- type oxide ferroelectric film that remains as a ferroelectric material outside the second conductive film. The method for manufacturing a semiconductor device according to claim 6, wherein three conductive films are formed. 8. The method of manufacturing a semiconductor device according to claim 7, further comprising a step of crystallizing the ABO _x- type oxide ferroelectric film by performing a heat treatment before the step of forming the third conductive film. Furthermore, by patterning,
A ferroelectric capacitor including the lower electrode film, the ferroelectric film, and an upper electrode film having a stack of the first conductive film, the second conductive film, and the third conductive film;
A ferroelectric including the lower electrode film, a laminated ferroelectric film having a laminate of the ferroelectric film and the ABO _x- type oxide ferroelectric film, and an upper electrode film having the third conductive film The method for manufacturing a semiconductor device according to claim 7, further comprising a step of forming a capacitor.

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