JP5994697B2 - Semiconductor drive device - Google Patents

Description

  The present invention relates to a semiconductor drive device including a switching element such as an IGBT.

  2. Description of the Related Art Conventionally, there is known a technique for improving the response of an off operation of an IGBT by increasing a gate discharge current when the IGBT is turned off (see, for example, Patent Document 1).

JP 2005-045590 A

  However, since a mirror period exists when a switching element such as an IGBT is turned off, the above-described conventional technique has a limit in speeding up the turn-off. An object of the present invention is to provide a semiconductor drive device that can speed up the turn-off of a switching element even when a mirror period exists.

To achieve the above object, the present invention provides:
A switching element having a control electrode, a first main electrode, and a second main electrode, and turned off by a decrease in control voltage applied between the control electrode and the first main electrode;
Adding means for adding an additional current that increases a current flowing through the second main electrode at the time of turn-off of the switching element to the second main electrode during a mirror period at the time of turn-off ;
The adding means starts adding the additional current when the start of the mirror period is detected, and ends adding the additional current when the end of the mirror period is detected. Is to provide.

  According to the present invention, even when the mirror period exists, the turn-off of the switching element can be speeded up.

The figure which showed the structure of the semiconductor drive device which is 1st Embodiment. The time chart which showed the operation waveform of the semiconductor drive device which is a 1st embodiment The figure which showed the structure of the semiconductor drive device which is 2nd Embodiment. Time chart showing operation waveforms of the semiconductor drive device according to the second embodiment The figure which showed the structure of the semiconductor drive device which is 3rd Embodiment.

<Configuration of Semiconductor Driving Device 1>
FIG. 1 is a diagram illustrating a configuration of a semiconductor drive device 1 according to the first embodiment. The semiconductor drive device 1 may be a semiconductor device constituted by an integrated circuit or a semiconductor device constituted by discrete components. The semiconductor drive device 1 may be an electronic control unit (so-called ECU) in which such a semiconductor device is built in a housing.

  The semiconductor drive device 1 includes a switching element 10, a switching element 20, and a control circuit 30, and is a semiconductor circuit that drives a load M (for example, a motor). The switching elements 10 and 20 may be semiconductor elements on the same substrate as the control circuit 30, or may be semiconductor elements on a different substrate from the control circuit 30. The switching element 10 may be a semiconductor element on the same substrate as the switching element 20 or may be a semiconductor element on a different substrate from the switching element 20.

  The switching elements 10 and 20 are insulated gate voltage controlled semiconductor elements that are turned on and off. The switching elements 10 and 20 are elements each having a control electrode, a first main electrode, and a second main electrode. Specific examples thereof include power transistor elements such as IGBTs and MOSFETs. FIG. 1 illustrates an IGBT as an example of the switching elements 10 and 20. Hereinafter, for convenience of explanation, the switching elements 10 and 20 are assumed to be IGBTs. In the case of a MOSFET, it is better to read “collector” as “drain” and “emitter” as “source”.

  The gate electrode G of the switching element 10 is a control electrode connected to the first power supply potential unit 61 of the power supply voltage V1 through, for example, a gate-on resistance Rgon and a gate-on switch SWon1 connected in series to the gate electrode G. . The gate electrode G is a control electrode connected to the ground potential portion GND having a ground voltage lower than the power supply voltage V1 through, for example, a gate-off resistor Rgoff and a gate-off switch SWoff1 connected in series to the gate electrode G. . For example, the gate electrode G is connected to an intermediate node to which the gate-on resistance Rgon and the gate-off resistance Rgoff are connected.

  The emitter electrode E of the switching element 10 is, for example, a first main electrode connected to the ground potential unit GND. The collector electrode C of the switching element 10 is a second main electrode connected to the second power supply potential unit 62 having a power supply voltage V2 higher than the power supply voltage V1 through the switching element 20 or the load M, for example.

  Between the collector electrode C and the emitter electrode E of the switching element 10, a diode D1 is formed. The diode D1 may be a diode additionally connected in parallel to the switching element 10 or a body diode which is a parasitic element formed between the collector electrode C and the emitter electrode E. It is also possible to use the diode portion of the reverse conducting IGBT as the diode D1.

  The switching element 10 has a parasitic capacitance between the electrodes. The switching element 10 includes an input capacitance that is parasitic between the gate electrode G and the emitter electrode E, a feedback capacitance that is parasitic between the gate electrode G and the collector electrode C, and between the collector electrode C and the emitter electrode E. There is an output capacitance that is parasitic. The diode D1 also has a parasitic diode capacitance between the anode and the cathode. In FIG. 1, a part of the parasitic capacitance of the switching element 10 is shown, and a feedback capacitance Cres parasitic between the gate electrode G and the collector electrode C of the switching element 10 is shown.

  The control circuit 30 controls the gate voltage Vge of the gate electrode G of the switching element 10 to a voltage for turning on or off the switching element 10 via the gate-on resistance Rgon or the gate-off resistance Rgoff according to the control signal S supplied from the outside. It is a control part. The gate voltage Vge is a control voltage applied between the gate electrode G and the emitter electrode E. The switching element 10 is turned on or off according to the value of the gate voltage Vge.

  The control circuit 30 is a circuit that controls the gate voltage Vge according to a control signal S supplied from, for example, a microcomputer including a CPU. Note that the control circuit 30 itself may be a microcomputer.

  In accordance with the control signal S, the control circuit 30 turns on the gate-on switch SWon1 by setting the turn-on signal A to the active level, and turns off the gate-off switch SWoff1 by setting the turn-off signal B to the inactive level. When the gate-on switch SWon1 is turned on and the gate-off switch SWoff1 is turned off, the gate electrode G is pulled up to the power supply voltage V1 via the gate-on resistance Rgon. As a result, the gate voltage Vge rises to the power supply voltage V1 that is higher than the threshold voltage Vth of the switching element 10, so that the switching element 10 is turned on.

  On the other hand, according to the control signal S, the control circuit 30 turns off the gate-on switch SWon1 by setting the turn-on signal A to the inactive level, and turns on the gate-off switch SWoff1 by setting the turn-off signal B to the active level. When the gate-on switch SWon1 is turned off and the gate-off switch SWoff1 is turned on, the gate electrode G is pulled down to the ground voltage via the gate-off resistor Rgoff. As a result, the gate voltage Vge drops to a ground voltage that is lower than the threshold voltage Vth of the switching element 10, and thus the switching element 10 is turned off.

  Here, in a state where the switching element 10 is on and stable, the voltage on the gate electrode G side of the feedback capacitor Cres is the power supply voltage V1, and the voltage on the collector electrode C side of the feedback capacitor Cres is the switching element 10. If the ON voltage (ON resistance) is ignored, it is the ground voltage. Conversely, when the switching element 10 is stable in the off state, the voltage on the gate electrode G side of the feedback capacitor Cres is the ground voltage, and the voltage on the collector electrode C side of the feedback capacitor Cres is the voltage of the switching element 20. If the on-voltage (on-resistance) is ignored, the power supply voltage V2.

  Therefore, when the switching element 10 is turned off from the on state to the off state, the voltage on the gate electrode G side of the feedback capacitor Cres decreases from the power supply voltage V1 to the ground voltage, whereas the collector electrode C side of the feedback capacitor Cres. Increases from the ground voltage to the power supply voltage V2.

  Therefore, in order to speed up the turn-off of the switching element 10, the semiconductor drive device 1 includes not only a means for reducing the gate voltage Vge when the switching element 10 is turned off, but also a means for raising the collector voltage Vce when the switching element 10 is turned off. Have. The collector voltage Vce is a voltage between the collector electrode C and the emitter electrode E of the switching element 10.

  The semiconductor drive device 1 includes a gate-off switch SWoff1 that connects the gate terminal G to the ground potential portion GND via a gate-off resistor Rgoff as a main configuration for reducing the gate voltage Vge when the switching element 10 is turned off. However, the gate-off switch SWoff1 extracts the charge on the gate electrode G side of the feedback capacitor Cres so that the gate voltage Vge decreases.

  On the other hand, the semiconductor drive device 1 is configured to increase the collector voltage Vce when the switching element 10 is turned off. The additional current Ia that increases the collector current Ic flowing through the collector electrode C when the switching element 10 is turned off is applied to the collector electrode C. An adding means for temporarily adding is provided.

  By such additional means, the charge Q (that is, the additional current Ia) can be additionally injected into the collector electrode C side of the feedback capacitor Cres. The collector voltage Vce can be increased at turn-off. When the rising speed of the collector voltage Vce when the switching element 10 is turned off increases, the mirror period Tm when the switching element 10 is turned off can be shortened. The mirror period Tm is a period in which the gate voltage Vge is temporarily constant when turned off.

  Thus, since the semiconductor drive device 1 includes the above-described additional means, the mirror period Tm when the switching element 10 is turned off can be shortened. Therefore, even if the mirror period Tm exists, the switching element 10 can be turned off. And the off-loss during switching of the switching element 10 can be reduced.

  By pulling out the charge on the gate electrode G side of the feedback capacitance Cres, the reduction of the gate voltage Vge is promoted, while by injecting the charge on the collector electrode C side of the feedback capacitance Cres, the rise of the collector voltage Vce is promoted. . Therefore, the effect of shortening the turn-off time of the switching element 10 is enhanced.

  FIG. 1 shows a mirror period detector 40, a control circuit 30 as an additional means for temporarily adding to the collector electrode C an additional current Ia that increases the collector current Ic flowing through the collector electrode C when the switching element 10 is turned off. A turn-off switch SWoff2 is illustrated.

  The mirror period detector 40 is means for detecting a mirror period Tm when the switching element 10 is turned off. The mirror period detector 40 includes a mirror period start detector that detects the start timing of the mirror period Tm, and a mirror period end detector that detects the end timing of the mirror period Tm. The mirror period detector 40 outputs a trigger signal to the control circuit 30 when detecting the start or end of the mirror period Tm.

  The mirror period detection unit 40 is a circuit including, for example, a gate voltage monitor circuit 41 and a mirror period determination circuit 42.

  The gate voltage monitor circuit 41 is a voltage detection circuit that detects the gate voltage Vge based on the monitor signal F of the gate electrode G. The mirror period determination circuit 42 detects the start or end of the mirror period Tm by detecting a decrease in the gate voltage Vge, and outputs a trigger signal to the control circuit 30 when detecting the start or end of the mirror period Tm. Circuit.

  The mirror period determination circuit 42 includes, for example, a differentiation circuit that differentiates the gate voltage Vge detected by the gate voltage monitor circuit 41. When it is detected that the value (differential value) obtained by the differentiation circuit differentiating the gate voltage Vge becomes a negative value less than a predetermined value, the mirror period determination circuit 42 starts or ends the mirror period Tm. A trigger signal indicating detection is output. When the differential value becomes a negative value less than a predetermined value, it means that the gate voltage Vge decreases at a speed exceeding a predetermined speed.

  The control circuit 30 turns on or off the switch SWoff2 at the turn-off time, triggered by reception of the trigger signal from the mirror period detection unit 40. The control circuit 30 switches the switch SWoff2 from OFF to ON by receiving the first trigger signal while the turn-off signal B is at the active level. At the time of turn-off, the switch SWoff2 is switched from off to on, whereby the additional current Ia starts to be added to the collector electrode C. Then, the control circuit 30 switches the switch SWoff2 at the turn-off time from on to off by receiving the trigger signal again while the turn-off signal B is at the active level. When the switch SWoff2 is switched from on to off at the time of turn-off, the addition of the additional current Ia to the collector electrode C is completed.

  The turn-off switch SWoff2 is, for example, means for temporarily connecting the collector electrode C to the third power supply potential unit 63 when the switching element 10 is turned off. The third power supply potential unit 63 has a power supply voltage V3 higher than the power supply voltage V1. When the switch SWoff2 is turned on at the time of turn-off, the power supply potential unit 63 is connected to the current path 51 through which the collector current Ic flows. Therefore, the current path 52 through which the additional current Ia flows is connected to the collector electrode C through the current path 51. Connected.

  FIG. 2 is a time chart showing operation waveforms of the semiconductor drive device 1.

  The control circuit 30 starts the turn-off operation of the switching element 10 according to an instruction from a microcomputer or the like via the control signal S at timing t1. The control circuit 30 switches the gate-on switch SWon1 from the on-state to the off-state at the timing t2, and then switches the gate-off switch SWoff1 from the off-state to the on-state at the timing t3. Thereby, at timing t4, the gate voltage Vge of the switching element 10 starts to decrease, and the turn-off operation of the switching element 10 starts.

  The control circuit 30 receives the trigger signal from the mirror period detector 40 and switches the switch SWoff2 at the turn-off time from OFF to ON at timing t5, assuming that the start of the mirror period Tm is detected. Thereby, since the additional current Ia is added to the collector electrode C, the speed at which the collector voltage Vce rises is higher than when the additional current Ia is not added.

  If the additional current Ia is added to the collector electrode C before the mirror period Tm starts, the additional current Ia flows from the collector electrode C to the emitter electrode E. Therefore, the additional current Ia is equal to the feedback capacitance Cres from the collector electrode C side. Cannot contribute to charging. Therefore, it is preferable that the start timing at which the additional current Ia is added to the collector electrode C is after the timing at which the start of the mirror period Tm is detected.

  When the mirror period Tm ends, the gate voltage Vge begins to decrease again at timing t6. The mirror period detection unit 40 outputs a trigger signal indicating that the gate voltage Vge has decreased again.

  The control circuit 30 starts adding the additional current Ia, and then receives the trigger signal from the mirror period detection unit 40 again, so that the end of the mirror period Tm is detected. Switching from on to off at timing t7. At timing t8 when the collector current Ic stops decreasing and the collector voltage Vc stops increasing, the turn-off operation of the switching element 10 ends.

  The additional current Ia is added to the collector electrode C until the gate voltage Vge becomes equal to or lower than the threshold voltage Vth of the switching element 10 after the mirror period Tm ends (before the switching element 10 is turned off). As a result, the rise in the collector voltage Vce is accelerated. This is a factor that increases off-surge and noise. Therefore, it is preferable to finish adding the additional current Ia to the collector electrode C immediately after the timing when the end of the mirror period Tm is detected.

  FIG. 3 is a diagram illustrating a configuration of the semiconductor drive device 2 according to the second embodiment. A description of the same configurations and effects as those of the above-described embodiment will be omitted. In the semiconductor drive device 2 of FIG. 3, a diode Dc is added to the semiconductor drive device 1 of FIG. The diode Dc is inserted between the switch SWoff2 at turn-off and the current path 51 so that the anode is connected to the switch SWoff2 side at turn-off and the cathode is connected to the collector electrode C side. In the case of FIG. 3, the power supply voltage V3 is lower than the power supply voltage V2.

  The diode Dc is a stopping unit that stops adding the additional current Ia to the collector electrode C by using the change in the collector voltage Vce of the collector electrode C. The diode Dc is an element that can stop additional charging with the additional current Ia from the collector electrode C side of the feedback capacitor Cres when the collector voltage Vce becomes higher than the power supply voltage V3.

  By providing the stopping means such as the diode Dc, it is not necessary to consider the circuit delay from when the end of the mirror period Tm is detected by the mirror period detection unit 40 until the switch SWoff2 is turned off at turn-off. Therefore, when the collector voltage Vce rises rapidly after the end of the mirror period Tm, the addition of the additional current Ia to the collector electrode C can be quickly terminated.

  FIG. 4 is a time chart showing operation waveforms of the semiconductor drive device 2. In FIG. 4, the operation up to timing t6 is the same as that in FIG.

  When the collector voltage Vce rising after the mirror period Tm ends at the timing t6 exceeds the power supply voltage V3 at the timing t7, the additional current Ia is quickly added to the collector electrode C regardless of whether the switch SWoff2 is turned on or off. Can be terminated. Therefore, in this case, the turn-off switch SWoff2 does not have to be turned off by using the trigger signal from the mirror period detection unit 40 as a trigger, and may be turned off until the switching element 10 starts the next turn-off.

  As described above, when the collector voltage Vce rises after the end of the mirror period Tm due to the presence of the diode Dc, the addition of the additional current Ia to the collector electrode C can be quickly terminated. Therefore, it is possible to prevent an increase in off-surge due to a delay in turning off the switch SWoff2 during turn-off. Further, since it is possible to prevent an increase in off-surge, for example, it is not necessary to increase the resistance value of the gate-off resistance Rgoff, so that the turn-off time of the switching element 10 can be effectively shortened.

  As described above, the semiconductor drive device has been described by way of the embodiment. However, the present invention is not limited to the embodiment. Various modifications and improvements, such as combinations and substitutions with part or all of other example embodiments, are possible within the scope of the present invention.

  For example, the means for detecting the start and end of the mirror period Tm is not limited to the above-described means for detecting a decrease in the gate voltage Vg. For example, the start and end of the mirror period Tm may be detected by detecting the occurrence of a discharge current flowing from the gate electrode G to the gate-off resistor Rgoff.

  Further, for example, the switching element configured in the semiconductor drive device is not limited to the low side arm shown in the above-described embodiment among the arms arranged in series so as to face the high side and the low side. 1 may correspond to the switching element 20).

  Further, for example, the switching element is not limited to the IGBT, but may be an N-channel MOSFET or a P-channel MOSFET. FIG. 5 illustrates a semiconductor drive device 3 in which the switching element includes a P-channel type MOSFET (switching element 11). The switching element 11 is an element having a gate electrode G as a control electrode, a source electrode S as a first main electrode, and a drain electrode D as a second main electrode.

  The semiconductor drive device 3 is configured to increase the drain voltage Vds when the switching element 11 is turned off, and temporarily adds an additional current Ia that increases the drain current Id flowing through the drain electrode D when the switching element 11 is turned off to the drain electrode D. Additional means are provided.

  With such an additional means, the charge Q (that is, the additional current Ia) can be forcibly extracted from the drain electrode D side of the feedback capacitor Cres, so that the rising speed of the drain voltage Vds when the switching element 11 is turned off is increased. be able to. When the rising speed of the drain voltage Vds when the switching element 11 is turned off increases, the mirror period Tm when the switching element 11 is turned off can be shortened.

  Thus, since the semiconductor drive device 3 includes the above-described additional means, the mirror period Tm when the switching element 11 is turned off can be shortened. Therefore, even when the mirror period Tm exists, the switching element 11 is turned off. And the off-loss during switching of the switching element 11 can be reduced.

1, 2, 3 Semiconductor driving device 10, 11, 20 Switching element 30 Control circuit 40 Mirror period detection unit 41 Gate voltage monitor circuit 42 Mirror period determination circuit 51, 52 Current path 61, 62, 63 Power supply potential unit
G Gate electrode (example of control electrode)
E Emitter electrode (example of first main electrode)
C collector electrode (example of second main electrode)
Dc diode
M load
SWon1 Gate on switch
SWoff1 Gate off switch
SWoff2 Turn-off switch

Claims (9)

A switching element having a control electrode, a first main electrode, and a second main electrode, and turned off by a decrease in control voltage applied between the control electrode and the first main electrode;
Adding means for adding an additional current that increases a current flowing through the second main electrode at the time of turn-off of the switching element to the second main electrode during a mirror period at the time of turn-off ;
The adding means starts adding the additional current when the start of the mirror period is detected, and ends adding the additional current when the end of the mirror period is detected. . The adding means starts adding the additional current when the decrease in the control voltage is detected, and ends adding the additional current when the decrease in the control voltage is detected again. 2. The semiconductor drive device according to 1. The adding means starts adding the additional current when it is detected that a value obtained by differentiating the control voltage becomes a negative value less than a predetermined value, and a value obtained by differentiating the control voltage is less than a predetermined value. 3. The semiconductor drive device according to claim 1, wherein the addition of the additional current is terminated when it is again detected that the negative value is reached. It said additional means connects the current path to which the additional current flows to the second main electrode, the semiconductor driving device according to any one of claims 1 to 3. The second utilizes a voltage change of the main electrode, comprises a stopping means for stopping the adding the additional current, the semiconductor driving device according to any one of claims 1 to 4. The semiconductor drive device according to claim 5 , wherein the stopping unit is a diode. It said additional means, put a charge on said second main electrode, the semiconductor driving device according to any one of claims 1 to 6. It said additional means, removing the charge from said second main electrode, the semiconductor driving device according to any one of claims 1 to 6. Comprising a means for reducing the control voltage, the semiconductor driving device according to any one of claims 1 or et 8.

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