JP6017183B2 - Charge control circuit, charging circuit - Google Patents

Description

  The present invention relates to a charging control circuit and a charging circuit.

  A charging circuit for charging a battery (secondary battery) such as a lithium-ion battery generally operates in a constant current mode in which the battery is charged with a constant current or a constant voltage mode in which the battery is charged with a constant voltage (for example, Patent Documents). 1).

JP 2009-284585 A

  By the way, the charging circuit generates a predetermined constant voltage for driving a load (for example, a microcomputer or the like) connected to the output terminal of the charging circuit even when the battery is not connected to the charging circuit. There are also things. When a battery having a battery voltage higher than a predetermined constant voltage is connected to the output terminal of such a charging circuit, a reverse current flows from the connected battery to the input side (input power supply) of the charging circuit.

  The present invention has been made in view of the above problems, and an object thereof is to provide a charge control circuit capable of preventing a reverse current flowing from a battery to an input side.

  In order to achieve the above object, a charge control circuit for controlling a charging circuit that generates an output voltage used for charging a battery from an input power source according to one aspect of the present invention at a terminal to which the battery is connected is the output voltage. A determination circuit for determining whether or not an input current from the input power supply is smaller than a first current that is smaller than a load current flowing in a load connected to the terminal when the maximum value is generated; An error amplification circuit that amplifies an error between a reference voltage corresponding to the maximum value of the output voltage and a feedback voltage corresponding to the output voltage, and an inductor to which the input current is supplied are connected in series, and when turned on, A first MOS transistor for increasing an inductor current flowing in the inductor; and the inductor and the first MOS transistor connected in series; When the input current is determined to be larger than the first current, the second MOS transistor for supplying to the child to raise the output voltage is complementarily switched so that the error is reduced, and the input current And a drive circuit that turns off the second MOS transistor when it is determined that is smaller than the first current.

  It is possible to provide a charge control circuit that can prevent reverse current flowing from the battery to the input side.

It is a figure which shows the outline | summary of the charging circuit 10 to which this invention is applied. 3 is a diagram illustrating an example of a switching control circuit 34. FIG. 6 is a diagram for explaining the operation of the charging circuit 10 when batteries 15 and 16 are connected to the terminal G. FIG.

  At least the following matters will become apparent from the description of this specification and the accompanying drawings.

<< Overview of Charging Circuit 10 >>
FIG. 1 is a diagram showing a configuration of a charging circuit 10 to which the present invention is applied. The charging circuit 10 is a circuit that charges two-cell lithium ion batteries (hereinafter simply referred to as batteries) 15 and 16 with a constant current or a constant voltage. In addition, since the voltage of the lithium ion battery of 1 cell changes from 2.4V to 4.2V, for example, the voltage which generate | occur | produces in the batteries 15 and 16 of 2 cells will be 4.8V-8.4V. The charging circuit 10 charges the batteries 15 and 16 and supplies power to a load 18 such as a microcomputer based on a power supply 17 supplied from, for example, a USB (Universal Serial Bus) bus.

  The charging circuit 10 includes a charging control IC (Integrated Circuit) 20, capacitors 21 to 24, an inductor 25, and a resistor 26.

  The charge control IC 20 (charge control circuit) is a circuit that generates an output voltage Vout higher than the input voltage Vin (for example, 5 V) from the power supply 17 by controlling the inductor current IL flowing through the inductor 25. The NMOS transistor 30 To 32, a current detection circuit 33, a switching control circuit 34, and terminals A to G.

  An input voltage Vin from a power source 17 (input power source) is applied to the terminal A, and a capacitor 21 for stabilizing the input voltage Vin is connected.

  The NMOS transistor 30 has a drain connected to the terminal A and a source connected to the terminal C.

  One end of the capacitor 22 and the inductor 25 is connected to the terminal C, and the other end of the inductor 25, the drain of the NMOS transistor 31, and the source of the NMOS transistor 32 are connected to the terminal D. The source of the NMOS transistor 31 is connected to the grounded terminal F.

  Therefore, the inductor 25 and the NMOS transistors 31 and 32 constitute a boost chopper circuit that boosts the input voltage Vin. Specifically, when the NMOS transistor 32 (second MOS transistor) is turned off and the NMOS transistor 31 (first MOS transistor) is turned on, the inductor current IL flowing through the inductor 25 increases. When the NMOS transistor 31 is turned off and the NMOS transistor 32 is turned on, the energy stored in the inductor 25 is released to the capacitor 24 via the terminal G. Therefore, the output voltage Vout generated at the terminal G is boosted. The diodes D1 and D2 between the sources and drains of the NMOS transistors 31 and 32 are body diodes (parasitic diodes).

  Connected to the terminal G is a load 18 such as a microcomputer that operates at the output voltage Vout. Further, the batteries 15 and 16 are appropriately connected to the terminal G. Note that the switch SW between the terminal G and the batteries 15 and 16 is not actually provided, but is drawn to facilitate understanding of whether or not the batteries 15 and 16 are connected to the terminal G. Yes.

  The current detection circuit 33 (current generation circuit) is a circuit that detects an input current Iin input via the terminal A from the power supply 17 and generates a current Ia that increases in accordance with an increase in the input current Iin. Further, since the current detection circuit 33 supplies the current Ia to the resistor 26 connected to the terminal B, a voltage Va (first voltage) that rises in accordance with the increase in the input current Iin is generated at the terminal B. . The current detection circuit 33 detects the input current Iin using a current detection resistor, a current mirror circuit of the NMOS transistor 30, or the like. Further, the current detection circuit 33 applies a voltage at which the NMOS transistor 30 is fully turned on to the gate of the NMOS transistor 30 when the output voltage Vout is boosted.

  The switching control circuit 34 controls switching of the NMOS transistors 31 and 32 based on the voltage Va and the output voltage Vout. As shown in FIG. 2, the switching control circuit 34 includes a charge / discharge circuit 50, a determination circuit 51, and a switching circuit 52. 2 is a diagram for explaining the details of the switching control circuit 34. In FIG. 2, the terminal A, the NMOS transistor 30, and the like shown in FIG. 1 are omitted as appropriate.

  The charging / discharging circuit 50 charges the capacitor 23 when the input current Iin is smaller than the current I0 when the charging circuit 10 charges the batteries 15 and 16 at a constant current, and charges the capacitor 23 when the input current Iin is larger than the current I0. To discharge. The charge / discharge circuit 50 includes a bias voltage generation circuit 60 and a transconductance amplifier 61. The bias voltage generation circuit 60 generates a voltage V1 indicating the current value of the current I0.

  The transconductance amplifier 61 charges and discharges the capacitor 23 with a current corresponding to a voltage Va that increases as the input current Iin increases and a voltage V1 that indicates the current I0. Specifically, when the current Iin is lower than the current I0, that is, when the voltage Va is lower than the voltage V1, the transconductance amplifier 61 charges the capacitor 23. On the other hand, when the current Iin is higher than the current I0, that is, when the voltage Va is higher than the voltage V1, the transconductance amplifier 61 discharges the capacitor 23. Here, the charging voltage of the capacitor 23 is assumed to be the voltage Vcap.

  The determination circuit 51 determines whether or not the input current Iin is smaller than a predetermined current I1 (first current). The current value of the current I1 is smaller than the current value of the load current flowing through the load 18 when the maximum value (8.4V) of the output voltage Vout is generated. The determination circuit 51 includes a bias voltage generation circuit 70, a comparator 71, and a counter 72.

  The bias voltage generation circuit 70 generates a predetermined bias voltage Vbias.

  The comparator 71 (comparison circuit) is a hysteresis comparator that generates two voltages in the comparator 71 based on the bias voltage Vbias. For example, the comparator 71 generates a voltage Vb that is 1.1 times the bias voltage Vbias and a voltage Vc that is 1.2 times the bias voltage Vbias. The voltage Vb (second voltage) is a voltage indicating the current value of the predetermined current I1, and the voltage Vc (third voltage) is a current of a predetermined current I2 (second current) that is larger than the current I1. This is a voltage indicating a value. Further, the current value of the current I2 is also smaller than the current value of the load current flowing through the load 18 when the maximum value (8.4 V) of the output voltage Vout is generated.

  When the input current Iin becomes smaller than the current I1 (<I2), that is, when the voltage Va becomes lower than the voltage Vb (<Vc), the comparator 71 outputs a low level (hereinafter, “L” level) signal Vcomp (comparison result). Is output. On the other hand, when the input current Iin becomes larger than the current I2 (> I1), that is, when the voltage Va becomes higher than the voltage Vc (> Vb), the comparator 71 outputs a high level (hereinafter, “H” level) signal Vcomp. To do.

  When the “H” level signal Vcomp is input, the counter 72 resets the count value CNT. When the “L” level signal Vcomp is input, the counter 72 sets the count value CNT based on the clock signal CLK. Increment. The count value CNT of the counter 72 becomes “0” (decimal number) when reset.

  The switching circuit 52 is a circuit that controls on / off of the NMOS transistors 31 and 32, and includes resistors 90 to 92, a reference voltage circuit 93, an operational amplifier 94, a capacitor 95, and a drive circuit 96.

  The resistors 90 and 91 divide the output voltage Vout to generate a feedback voltage Vfb, and the reference voltage circuit 93 generates a predetermined reference voltage Vref corresponding to the maximum value (8.4 V) of the output voltage Vout.

  The operational amplifier 94 has two non-inverting input terminals (+) and one inverting input terminal (−), and the lower one of the voltages applied to the two non-inverting input terminals (+). And a voltage corresponding to an error between the voltage applied to the inverting input terminal (−). Here, the reference voltage Vref is applied to one of the two non-inverting input terminals (+), and the voltage Vcap is applied to the other terminal. Therefore, when the voltage Vcap is lower than the reference voltage Vref, an error between the voltage Vcap and the feedback voltage Vfb is amplified. When the reference voltage Vref is lower than the voltage Vcap, an error between the reference voltage Vref and the feedback voltage Vfb is amplified. A resistor 92 and a capacitor 95 for compensating the phase of the feedback loop of the switching circuit 52 are connected to the output of the operational amplifier 94. The voltage of the capacitor 95 is assumed to be the voltage Vd.

  The drive circuit 96 complements the NMOS transistor 31 and the NMOS transistor 32 based on the level of the voltage Vd until the count value CNT reaches a predetermined value (hereinafter, for example, “5” (decimal number)). Switching to Specifically, the drive circuit 96 switches the NMOS transistors 31 and 32 so that the output voltage Vout increases as the level of the voltage Vd increases.

  Further, the drive circuit 96 turns off the NMOS transistor 32 when the count value CNT is incremented to be “5” (becomes “5” or more).

<< Operation of Charging Circuit 10 with Batteries 15 and 16 Connected >>
== Constant current charging ==
First, the operation when the voltage Vcap is lower than the reference voltage Vref and the charging circuit 10 charges the batteries 15 and 16 with a constant current will be described.

  For example, when the input current Iin becomes larger than the current I0 as the charging current of the batteries 15 and 16 increases, the voltage Va becomes higher than the voltage V1 indicating the predetermined current I0. Thereby, since the transconductance amplifier 62 discharges the capacitor 23, the voltage Vcap decreases. Further, when the voltage Vcap is lowered, the capacitor 95 is discharged, so that the voltage Vd is lowered. As a result, the period during which the NMOS transistor 31 is turned on is shortened, and the output voltage Vout decreases. When the output voltage Vout used for charging the batteries 15 and 16 decreases, the charging current of the batteries 15 and 16 decreases, and the input current Iin also decreases. Thus, when the input current Iin becomes larger than the current I0, the charging circuit 10 decreases the input current Iin.

  On the other hand, for example, when the input current Iin becomes smaller than the current I0 in accordance with the decrease in the charging current, the output voltage Vout becomes higher, contrary to the above case. As a result, the charging current and the input current Iin increase. Thus, the switching control circuit 34 charges the batteries 15 and 16 with a constant current so that the input current Iin becomes the current I0.

  By the way, when the batteries 15 and 16 are charged with a constant current (current I0), the battery voltage Vbat of the batteries 15 and 16 gradually increases. In such a state, if the output voltage Vout is constant, the charging current and the input current Iin gradually decrease. However, when the battery voltage Vbat gradually increases and the input current Iin decreases, the switching control circuit 34 increases the voltage Vcap and increases the output voltage Vout as described above. As a result, the charging circuit 10 can continue to charge the batteries 15 and 16 with a constant current with high accuracy even when the battery voltage Vbat increases.

== Constant voltage charging ==
As described above, when the batteries 15 and 16 are continuously charged with a constant current, the battery voltage Vbat increases. When the battery voltage Vbat approaches 8.4 V, which is the maximum value, the transconductance amplifier 61 charges the capacitor 23 so that the output voltage Vout becomes higher than 8.4 V. As a result, the voltage Vcap becomes higher than the reference voltage Vref when the output voltage Vout is 8.4V. Therefore, in the present embodiment, when the battery voltage Vbat approaches 8.4 V, which is the maximum value, the switching circuit 52 causes the NMOS transistors 31 and 32 so that the level of the feedback voltage Vfb matches the level of the reference voltage Vref. Will be switched. That is, when the charging voltage Vbat increases, the charging circuit 10 causes the battery 15, with an output voltage Vout of 8.4 V, from the constant current mode in which the input current Iin is made to coincide with the current I0 and the batteries 15, 16 are charged with a constant current. 16 operates in a constant voltage mode for charging 16.

<< Operation of Charging Circuit 10 When Batteries 15 and 16 are Connected to Terminal G >>
Next, referring to FIG. 3, the charging circuit 10 when the batteries 15 and 16 having a battery voltage Vbat (for example, 8.5 V) higher than 8.4 V, which is the maximum value of the output voltage Vout, are connected to the terminal G. Will be described. FIG. 3 is a diagram illustrating main waveforms of the charging circuit 10 before and after the batteries 15 and 16 are connected to the terminal G.

  Since the load current is smaller than the current I0 during constant current charging, the voltage Va is lower than the voltage V1. Therefore, since the capacitor 23 continues to be charged by the transconductance amplifier 62, the voltage Vcap (solid line) rises to near the level of the power supply voltage Vdd that operates the transconductance amplifier 62. At this time, since the voltage Vcap is higher than the reference voltage Vref (dashed line), an output voltage Vout of 8.4 V is generated.

  At time t1, when batteries 15 and 16 having a battery voltage Vbat of 8.5V are connected to a terminal G to which an output voltage Vout of 8.4V is applied, current is supplied from the batteries 15 and 16 to the load 18. Is done. For this reason, the input current Iin decreases rapidly. When the input current Iin becomes smaller than the current I1 at time t2, that is, when the voltage Va becomes smaller than the voltage Vb, the signal Vcomp becomes “L” level. In addition, when the count value CNT that was “0” at time t2 becomes “5” at time t3, the drive circuit 96 turns off the NMOS transistor 32. Therefore, even when the batteries 15 and 16 having a high battery voltage Vbat are connected to the terminal G, the output side (batteries 15 and 16 side) of the charging circuit 10 is changed to the input side (power supply 17 side) of the charging circuit 10. It is possible to prevent a reverse current from flowing. When the NMOS transistor 32 is turned off, the input current Iin flows to the terminal G through the diode D2. The drive circuit 96 continues to turn off the NMOS transistor 32 until, for example, the batteries 15 and 16 are removed from the terminal G and the input current Iin becomes larger than the current I2. Then, when the input current Iin becomes larger than the current I2, the driving circuit 96 resumes switching of the NMOS transistors 31 and 32.

  The charging circuit 10 to which the charging control IC 20 according to the embodiment of the present invention is applied has been described above. When the batteries 15 and 16 having the battery voltage Vbat higher than the output voltage Vout are connected to the terminal G, the NMOS transistor 32 is turned off. For this reason, the charging control IC 20 can prevent a reverse current flowing from the batteries 15 and 16 to the input side (power source 17 side). For this reason, it is possible to prevent the input voltage Vin from increasing due to the reverse current.

  The comparator 71 is a hysteresis comparator. Therefore, in this embodiment, the diode rectification mode (mode in which the NMOS transistor 32 is turned off and the NMOS transistor 31 is switched) and the synchronous rectification mode (mode in which the NMOS transistors 31 and 32 are switched) are frequently switched. Can be prevented. Therefore, the drive circuit 96 can switch the NMOS transistors 31 and 32 more stably.

  Further, the drive circuit 96 does not turn off the NMOS transistor 32 until the count value CNT becomes, for example, “5”. Therefore, it is possible to prevent the NMOS transistor 32 from being turned off by mistake due to transient noise or the like.

  In the present embodiment, the user can change the resistance value of the resistor 26. For this reason, the user can set the current value of the current I0 when the batteries 15 and 16 are made constant current.

  In addition, the said Example is for making an understanding of this invention easy, and is not for limiting and interpreting this invention. The present invention can be changed and improved without departing from the gist thereof, and the present invention includes equivalents thereof.

DESCRIPTION OF SYMBOLS 10 Charging circuit 15,16 Battery 17 Power supply 18 Load 20 Charge control IC
21-24, 95 Capacitor 25 Inductor 26, 90-92 Resistance 30-32 NMOS transistor 33 Current detection circuit 34 Switching control circuit 50 Charging / discharging circuit 51 Determination circuit 52 Switching circuit 60, 70 Bias voltage generation circuit 61 Transconductance amplifier 71 Comparator
93 Reference voltage circuit 94 Operational amplifier 96 Drive circuit SW switch D1, D2 Diode

Claims (5)

A charge control circuit for controlling a charging circuit that generates an output voltage used for charging a battery from an input power source at a terminal to which the battery is connected,
A determination circuit that determines whether or not the input current from the input power source is smaller than a first current that is smaller than a load current flowing through a load connected to the terminal when the maximum value of the output voltage is generated When,
An error amplifying circuit for amplifying an error between a reference voltage corresponding to the maximum value of the output voltage and a feedback voltage corresponding to the output voltage;
A first MOS transistor that is connected in series to the inductor to which the input current is supplied and is turned on to increase an inductor current flowing in the inductor; a first MOS transistor that is connected in series to the inductor and the first MOS transistor; When it is determined that the input current is larger than the first current, the second MOS transistor that supplies the inductor current to the terminal to raise the output voltage is complementarily switched so that the error is reduced. A drive circuit for turning off the second MOS transistor when it is determined that the input current is smaller than the first current;
A charge control circuit comprising: The charge control circuit according to claim 1,
The determination circuit includes:
A first voltage corresponding to the input current is compared with a second voltage indicating the first current, and the first voltage and a third voltage indicating a second current larger than the first current are compared. Including a comparison circuit to compare,
The drive circuit is
Based on the comparison result of the comparison circuit, when the input current is larger than the second current, the first and second MOS transistors are complementarily switched to reduce the error, and the input current is changed to the first current. If less than the current, turning off the second MOS transistor;
A charge control circuit characterized by the above. The charge control circuit according to claim 2,
The determination circuit includes:
When the comparison result indicating that the input current is larger than the second current is input, the count value is reset, and when the comparison result indicating that the input current is smaller than the first current is input. A counter for changing the count value;
The drive circuit is
Until the count value reaches a predetermined value, the first and second MOS transistors are complementarily switched so as to reduce the error, and when the count value reaches the predetermined value, the second MOS transistor is turned off. ,
A charge control circuit characterized by the above. The charge control circuit according to claim 2 or claim 3,
The charge control circuit is an integrated circuit;
A terminal to which a resistor is connected;
A current generation circuit for supplying a current corresponding to the input current to the resistor via the terminal so that the first voltage corresponding to the input current is generated in the resistor;
A charge control circuit comprising: A charging circuit for generating an output voltage used for charging a battery from an input power source at a terminal to which the battery is connected,
An inductor supplied with an input current from the input power supply;
A first MOS transistor connected in series to the inductor and increasing an inductor current flowing in the inductor when turned on;
A second MOS transistor connected in series to the inductor and the first MOS transistor, and when turned on, supplies the inductor current to the terminal to raise the output voltage;
Smaller than the first current as compared with the load current flowing in the load connected to the terminal, a determination circuit whether the input current from the input power supply is small,
An error amplifying circuit for amplifying an error between a reference voltage corresponding to the maximum value of the output voltage and a feedback voltage corresponding to the output voltage;
When it is determined that the input current is larger than the first current, the first and second MOS transistors are complementarily switched so as to reduce the error, and the input current is smaller than the first current. A drive circuit for turning off the second MOS transistor, if determined;
A charging circuit comprising:

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