JP6048167B2 - DCDC converter and power supply device including the DCDC converter - Google Patents

Description

  The present invention relates to a power supply device including a current resonance type converter using resonance between an inductor and a capacitor.

  As a DCDC converter having a small switching loss and high efficiency, a current resonance type converter as disclosed in Patent Document 1 is known. FIG. 17 is a circuit diagram showing a current resonant converter having a general half-bridge configuration. This circuit is provided with a series resonance unit including a capacitor Cr and an inductor Lr on the primary side of the transformer T1. Lm is an exciting inductor of the transformer T1, and resonance between the exciting inductor Lm and the capacitor Cr is parallel resonance. A rectifier circuit including a diode D3 and a diode D4 is configured on the secondary side of the transformer T1. The anodes of the diode D3 and the diode D4 are respectively connected to both ends of the secondary side winding of the transformer T1, and both the cathodes thereof are connected to the positive terminal of the capacitor C4. The secondary winding of the transformer T1 has a center tap, and this center tap is connected to the negative terminal of the capacitor C4. A resistor RL connected in parallel with the capacitor C4 is a load resistor.

  FIG. 18 shows the voltage waveform and current waveform of each part of the current resonance type converter shown in FIG. The first and second waveforms from the top indicate the voltage waveforms of the drive voltages applied to the gates of the transistor (FET) Q3 and the transistor (FET) Q4, respectively. The third and fourth waveforms are the transistors (FET). The voltage waveforms between the drain and source of Q3 and transistor (FET) Q4 are shown respectively. As can be seen from these voltage waveforms, the transistor (FET) Q3 and the transistor (FET) Q4 are alternately turned on with a dead time between them at a time ratio of approximately 50%.

  The fifth and sixth waveforms from the top show the current waveforms of the currents flowing through the transistor (FET) Q3 and the transistor (FET) Q4, respectively, and the seventh waveform from the top shows the resonance current Ir flowing through the capacitor Cr and the inductor Lr. The eighth waveform from the top indicates the voltage waveform across the capacitor Cr. The resonance current Ir flows through the transistor (FET) Q3 when the transistor (FET) Q3 is on, and flows through the transistor (FET) Q4 when the transistor (FET) Q4 is on. The transistor (FET) Q3 and the transistor (FET) Q4 are turned on when current flows through the respective body diodes. By switching in this way, the overlap of voltage and current is reduced, and high efficiency and low noise can be achieved. The ninth and tenth waveforms from the top indicate the current waveform of the current flowing through the diode D3 and the current waveform of the current flowing through the diode D4, respectively. As can be seen from these current waveforms, a current flows through the diode D3 when the transistor (FET) Q3 is on, and a current flows through the diode D4 when the transistor (FET) Q4 is on. The resonance current Ir contains the excitation current Im, and only the current (hatched portion) obtained by subtracting the excitation current Im from the resonance current Ir is supplied to the secondary side via the transformer T1.

この回路において、共振周波数ｆ_０は下記の式４で与えられ、特性インピーダンスＺ_０は下記の式５で与えられ、電圧変換率Ｍ（ｆｓｗ＝ｆ_０のときのＶｏ／Ｖｉｎ（＝Ｖａｃ／Ｖｓ）を基準とした電圧変換率）は下記の式６で与えられる。

尚、式６において、Ｑ、λ及びＦは、下記の式７〜９で与えられる。但し、ｆｓｗはトランジスタ（ＦＥＴ）Ｑ３とトランジスタ（ＦＥＴ）Ｑ４のスイッチング周波数である。

ここで、式６からも分かるように、スイッチング周波数ｆｓｗと共振周波数ｆ_ｏが等しい（Ｆ＝１）ときは、電圧変換率Ｍは１となり、Ｆが１より大きいときは、Ｆを大きくすると電圧変換率Ｍは小さくなっていく。そして、この電圧変換率Ｍは、Ｑ及びλにも依存している。 Next, the relationship between the input voltage Vin applied to the primary circuit of the transformer T1 and the output voltage Vo output from the secondary circuit of the lance T1 will be described. FIG. 19 is a circuit diagram showing an equivalent circuit focusing on the fundamental frequency of the current resonance type converter shown in FIG. In this equivalent circuit, the amplitude of the voltage Vs is given by the following equation 1, the amplitude of the voltage Vac is given by the following equation 2, and the equivalent load resistance Rac is given by the following equation 3. However, n is the number of turns of the primary winding based on the number of turns of each secondary winding divided into two by the center tap (the number of turns of the primary winding: the number of turns of the secondary winding = n : 1) (the number of turns of the primary winding: the number of turns of the secondary winding = n: 1).

In this circuit, the resonance frequency f ₀ is given by the following formula 4, the characteristic impedance Z ₀ is given by the following formula 5, and the voltage conversion ratio M (Vo / Vin (= Vac / Vs when fsw = f ₀ ) The voltage conversion rate based on () is given by the following equation (6).

In Equation 6, Q, λ, and F are given by Equations 7-9 below. Here, fsw is a switching frequency of the transistor (FET) Q3 and the transistor (FET) Q4.

Here, as can be seen from Equation 6, the switching frequency fsw and the resonance frequency f _o is equal (F = 1) case, the voltage conversion ratio M is 1, when F is greater than 1, increasing the F voltage The conversion rate M becomes smaller. The voltage conversion rate M also depends on Q and λ.

Next, a change in the voltage conversion rate M when the switching frequency fsw is changed will be described with reference to a graph. FIG. 20 is a graph showing the relationship between F and voltage conversion rate M when λ = 0.2, and FIG. 21 shows the relationship between F and voltage conversion rate M when λ = 0.5. It is a graph. In these graphs, the voltage conversion rate M is shown as a ratio when the voltage conversion rate is 1 when fsw = f ₀ . 20 and 21, Q = 0 (Rac = ∞), Q = 0.4 (Rac = 2.5 × Z ₀ ), and Q = 0.8 (Rac = 1.25 × Z ₀ ). The relationship between F and the voltage conversion rate M at this time is shown.

In Figure 20, point A, the switching frequency fsw corresponding to time equal to the resonant frequency _{f 0.} As can be seen from Equation 6, when fsw = f ₀ (F = 1), the voltage conversion rate M is the same regardless of the value of Q. Point B1 corresponds to a case where the switching frequency fsw is set to a frequency (0.6 × f ₀ ) that is 0.6 times the oscillation frequency f _{0 in} a no-load state (Q = 0, that is, Rac = ∞). Point B2 is in the unloaded state (Q = 0), corresponding to when the 1.6 times the frequency of the switching frequency fsw resonance frequency _{f 0 (1.6 × f 0)} . When F is changed between 0.6 and 1.6 in the no-load state (Q = 0) (switching frequency fsw is changed between 0.6 × f ₀ and 1.6 × f ₀ The voltage conversion rate M changes on a curve passing through the points B1, A, and B2. Point C1 corresponds to the case where the switching frequency fsw is set to a frequency (0.6 × f ₀ ) that is 0.6 times the oscillation frequency f ₀ in the state of Q = 0.4. The point C2 corresponds to the case where the switching frequency fsw is 1.6 times the resonance frequency f ₀ (1.6 × f ₀ ) in the state of Q = 0.4. When F is varied between 0.6 and 1.6 with Q = 0.4 (switching frequency fsw is varied between 0.6 × f ₀ and 1.6 × f ₀ ), The voltage conversion rate M changes on a curve passing through the points C1, A and C2. As can be seen from the comparison of the curve of Q = 0 and the curve of Q = 0.4, even when the switching frequency fsw is the same, as the equivalent load resistance Rac decreases, that is, as the load resistance RL decreases, The voltage conversion rate M becomes small.

Also in FIG. 21, similarly to FIG. 20, point A, the switching frequency fsw corresponding to time equal to the resonant frequency _{f 0.} The point B1 corresponds to a case where the switching frequency fsw is set to a frequency (0.7 × f ₀ ) that is 0.7 times the oscillation frequency f _{0 in} a no-load state (Q = 0, that is, Rac = ∞). Point B2 is in the unloaded state (Q = 0), corresponding to when the 1.6 times the frequency of the switching frequency fsw resonance frequency _{f 0 (1.6 × f 0)} . When F is changed between 0.7 and 1.6 in the no-load state (Q = 0) (switching frequency fsw is changed between 0.7 × f ₀ and 1.6 × f ₀ ) The voltage conversion rate M changes on a curve passing through the points B1, A, and B2. Also, point C1 is in the state of Q = 0.4, corresponding to when the 0.7 times the frequency of the frequency _{f 0} oscillation switching frequency fsw (0.7 × _{f 0).} The point C2 corresponds to the case where the switching frequency fsw is 1.6 times the resonance frequency f ₀ (1.6 × f ₀ ) in the state of Q = 0.4. When F is changed between 0.7 and 1.6 with Q = 0.4 (switching frequency fsw is changed between 0.7 × f ₀ and 1.6 × f ₀ ), The voltage conversion rate M changes on a curve passing through the points C1, A and C2. In FIG. 21, as in FIG. 20, the voltage conversion rate M decreases as the equivalent load resistance Rac decreases, that is, as the load resistance RL decreases.

  Here, as can be seen from the comparison between the graph when λ = 0.2 (FIG. 20) and the graph when λ = 0.5 (FIG. 21), or from Formula 6, The voltage conversion rate M decreases as λ increases. Therefore, in order to lower the lower limit of the adjustable range of the output voltage Vo, λ may be increased. However, if the exciting inductor is reduced to increase λ, the exciting current Im flowing through the exciting inductor increases, and the conduction loss of the transistor (FET) Q3 and the transistor (FET) Q4 and the primary side copper loss of the transformer T1 are reduced. It will increase. Thus, the current resonance type converter shown in FIG. 17 alone cannot achieve both high efficiency and expansion of the lower limit side adjustable output voltage range.

  Next, a converter configured by connecting a step-down converter and a current resonance type converter in series will be described. As disclosed in Patent Document 2, a technique is generally known in which an output voltage is controlled by a front-stage converter (step-down converter), and a rear-stage converter (a converter having a half-bridge configuration) is operated at a constant voltage conversion rate. ing. FIG. 22 is a circuit diagram when this technique is applied to a current resonance type converter. This circuit includes a power factor correction circuit 11, a step-down converter 12, a current resonance type converter 13, a first control circuit 14, a second control circuit 15, and a command voltage generation circuit 16.

  The power factor correction circuit 11 includes a diode bridge BD1 that full-wave rectifies an AC voltage, and a step-up chopper circuit that shapes a current waveform into a sine wave waveform similar to the voltage waveform. The step-up chopper circuit includes an inductor L1, a transistor (FET) Q1, a diode D1, and a capacitor C1. The first control circuit 14 controls on / off of the transistor (FET) Q1 so that the voltage Vp generated at the connection portion between the capacitor C1 and the diode D1 has a predetermined voltage value.

  The step-down converter 12 includes a transistor (FET) Q2, a diode D2, an inductor L2, and a capacitor C2. The step-down converter 12 steps down the voltage Vp to generate a voltage Vb that is a voltage at a connection portion between the capacitor C2 and the inductor L2. The second control circuit 15 controls the ON period of the transistor (FET) Q <b> 2 so that the output voltage Vo output from the current resonance converter 13 matches the target voltage Vtgt supplied from the command voltage generation circuit 16. That is, the second control circuit 15 adjusts the time ratio at which the transistor (FET) Q2 is turned on / off based on the output voltage Vo and the target voltage Vtgt. The output voltage Vo is adjusted by PWM (Pulse Width Modulation) control performed by the second control circuit 15.

The current resonance type converter 13 includes a transistor (FET) Q3, a transistor (FET) Q4, a capacitor C3, an inductor L3, a transformer T1, a diode D3, a diode D4, and a capacitor C4. The current resonance type converter 13 operates at a predetermined voltage conversion rate. For example, the transistor (FET) Q3 and a transistor (FET) Q4 is set to OFF at the resonance frequency _{f 0.} Transistor when turns on and off the (FET) Q3 and a transistor (FET) Q4 at the resonance frequency f _0, the load resistance is the voltage conversion ratio does not change even if the fluctuation, the voltage Vb is input to the current resonance type converter 13, The conversion is always performed at a constant voltage conversion rate. The converted voltage is output as the output voltage Vo.

Thus, the transistor (FET) Q3 and a transistor (FET) Q4, when turns on and off at the resonance frequency _{f 0,} the voltage Vb which is input to the current resonant converter 13 is always converted by the fixed voltage conversion ratio Therefore, if the voltage Vb input to the current resonance type converter 13 is adjusted by the step-down converter 12, the output voltage Vo is also adjusted accordingly.

JP-A-7-236271 JP 2003-199333 A

  In the case of a converter configured by connecting the step-down converter 12 and the current resonance type converter 13 in series as described above, λ of the current resonance type converter 13 can be set to a small value. Efficiency can be increased. Moreover, since the voltage Vb input to the current resonance type converter 13 can be adjusted by the step-down converter 12, the lower limit of the adjustable range of the output voltage Vo can be lowered. However, unless the switching loss in the step-down converter 12 is reduced, the efficiency of the entire circuit cannot be increased.

  Therefore, an object of the present invention is to reduce switching loss in a step-down converter in a power supply device including a DCDC converter configured by connecting a step-down converter and a current resonance type converter in series.

  The first DCDC converter according to the present invention outputs an output voltage having a voltage value equal to the input voltage when the step-down operation is stopped, and an output voltage having a voltage value lower than the input voltage when performing the step-down operation. A voltage step-down converter, a resonant converter in which a voltage conversion rate is adjusted by a switching frequency of a switching element through which a resonant current flows, an output voltage detection circuit that detects an output voltage output from the resonant converter, and the output A control circuit for controlling the operation of the step-down converter and the resonant converter based on an output voltage detected by a voltage detection circuit; the step-down converter is connected to a preceding stage of the resonant converter; The switching frequency of the resonant converter is changed from a first predetermined frequency to a first frequency greater than the first predetermined frequency. The first step of adjusting the voltage conversion rate of the resonant converter by changing between the predetermined frequency and the step-down converter only when the switching frequency reaches the second predetermined frequency. The step-down operation is performed, and the second control for adjusting the step-down ratio in the step-down operation is performed.

  The second DCDC converter according to the present invention outputs an output voltage having a voltage value equal to the input voltage when the step-down operation is stopped, and has a voltage value lower than the input voltage when the step-down operation is performed. A step-down converter that outputs an output voltage; a resonant converter that adjusts a voltage conversion rate according to a switching frequency of a switching element through which a resonant current flows; an output voltage detection circuit that detects an output voltage output from the resonant converter; A control circuit that controls operations of the step-down converter and the resonant converter based on an output voltage detected by the output voltage detection circuit, the step-down converter being connected to a preceding stage of the resonant converter; The switching frequency of the resonant converter is increased from the first predetermined frequency to the first predetermined frequency. A first control for adjusting a voltage conversion rate of the resonant converter in a range equal to or higher than a predetermined minimum voltage conversion rate by changing between the first predetermined frequency and the second predetermined frequency; Only when the minimum voltage conversion rate is reached, the step-down converter performs the step-down operation and performs the second control for adjusting the step-down ratio in the step-down operation.

  The third DCDC converter according to the present invention outputs an output voltage having a voltage value equal to the input voltage when the step-down operation is stopped, and has a voltage value lower than the input voltage when performing the step-down operation. A step-down converter that outputs an output voltage; a resonant converter that adjusts a voltage conversion rate according to a switching frequency of a switching element through which a resonant current flows; an output voltage detection circuit that detects an output voltage output from the resonant converter; A command voltage generation circuit that outputs a target value of an output voltage output from the resonant converter, and the step-down based on an output voltage detected by the output voltage detection circuit and a target value output from the command voltage generation circuit A control circuit for controlling the operation of the converter and the resonant converter, and the step-down converter includes: Connected to a stage, and the control circuit changes the switching frequency of the resonant converter from a first predetermined frequency to a second predetermined frequency that is higher than the first predetermined frequency. The first control for adjusting the voltage conversion rate of the converter, and the step-down converter performs the step-down operation only when the target value output from the command voltage generation circuit becomes a predetermined value or less, and the step-down operation in the step-down operation The step-down ratio in the step-down operation is determined based on a target value output from the command voltage generation circuit.

  In the first to third DCDC converters according to the present invention, the step-down converter is connected to a subsequent stage of the resonant converter, and the output voltage detection circuit is replaced with an output voltage output from the resonant converter. The output voltage output from the step-down converter may be detected.

  Moreover, the power supply device which concerns on this invention is provided with the DCDC converter in any one of the said DCDC converters.

  According to the converter of the present invention, in the step-down converter that forms part of the converter, when the switching frequency of the current resonant converter reaches a predetermined frequency, the voltage conversion rate of the current resonant converter reaches a predetermined value. Is set to start the step-down operation only when the target value of the output voltage V output from the current resonance type converter becomes equal to or lower than the predetermined voltage value, so that the step-down converter always performs the step-down operation. The switching loss in the step-down converter can be reduced as compared with the power supply device. Further, the adjustable range of the output voltage can be expanded while suppressing the period during which the step-down converter performs the step-down operation.

It is the circuit diagram which showed the structure of the power supply device which concerns on this invention. It is the graph which showed the relationship between the switching frequency and voltage conversion rate in a current resonance type | mold converter. 3 is a timing chart for explaining the operation of the power supply device according to the present invention. It is the graph which showed the relationship between the switching frequency and voltage conversion rate in a current resonance type | mold converter. 3 is a timing chart for explaining the operation of the power supply device according to the present invention. It is the circuit diagram which showed the structure of the power supply device which concerns on this invention. It is the graph which showed the relationship between the switching frequency and voltage conversion rate in a current resonance type | mold converter. 3 is a timing chart for explaining the operation of the power supply device according to the present invention. It is an equivalent circuit when the leakage inductor of the transformer T1 is a resonant inductor. This is an equivalent circuit when an external inductor connected in series to the transformer T1 is a resonant inductor. This is an equivalent circuit when a leakage inductor of the transformer T1 and an external inductor are resonantly inductored. It is a circuit diagram for demonstrating the structure of a resonant capacitor. It is a circuit diagram for demonstrating the structure of a resonant capacitor. It is a circuit diagram showing composition of a current resonance type converter structure of a full bridge configuration. It is the circuit diagram which showed the structure of the rectifier circuit. It is a circuit diagram for demonstrating the connection order of a step-down converter and a current resonance type | mold converter. It is the circuit diagram which showed the structure of the current resonance type | mold converter of a half bridge structure. It is a timing chart for demonstrating operation | movement of a current resonance type | mold converter. It is a circuit diagram showing an equivalent circuit of a current resonance type converter. It is the graph which showed the relationship between the switching frequency and voltage conversion rate in a current resonance type | mold converter. It is the graph which showed the relationship between the switching frequency and voltage conversion rate in a current resonance type | mold converter. It is the circuit diagram which showed the structure of the conventional power supply device.

  Hereinafter, embodiments for implementing a power supply device of the present invention will be described with reference to the drawings.

  FIG. 1 is a circuit diagram showing a power supply device according to the present invention. The power supply device includes a power factor correction circuit 1, a step-down converter 2, a current resonance type converter 3, a first control circuit 4, a second control circuit 5, and a command voltage generation circuit 6.

  The power factor correction circuit 1 includes a diode bridge BD1 that full-wave rectifies an AC voltage, and a step-up chopper circuit that shapes a current waveform into a sine wave waveform similar to the voltage waveform. The step-up chopper circuit includes an inductor L1, a transistor (FET) Q1, a diode D1, and a capacitor C1. The first control circuit 4 controls on / off of the transistor (FET) Q1 so that the voltage Vp generated at the connection portion between the capacitor C1 and the diode D1 has a predetermined voltage value. Vc is a commercial power supply of 100V, and the voltage Vp is set to a voltage value within a range of 370 to 390V, for example, 380V.

  The step-down converter 2 includes a transistor (FET) Q2, a diode D2, an inductor L2, and a capacitor C2. The step-down converter 2 is output when the switching frequency fsw of the current resonance type converter 3 reaches a predetermined frequency, when the voltage conversion rate of the current resonance type converter 3 reaches a predetermined value, or from the current resonance type converter 3. The step-down operation is started when the target value of the output voltage Vo (target voltage Vtgt) becomes equal to or lower than a predetermined voltage value. When the step-down converter 2 starts a step-down operation, the ratio of the time when the transistor (FET) Q2 is turned on / off becomes less than 1, so the voltage Vb, which is the voltage at the connection between the capacitor C2 and the inductor L2, is lower than the voltage Vp become. When the step-down converter 2 stops the step-down operation, the ratio when the transistor (FET) Q2 is turned on and off is maintained at 1 (the transistor (FET) Q2 is kept on), and the voltage Vb and the voltage Vp are the same voltage. Value.

  The current resonance type converter 3 includes a transistor (FET) Q3, a transistor (FET) Q4, a capacitor C3, an inductor L3, a transformer T1, a diode D3, a diode D4, and a capacitor C4. In the current resonance type converter 3, the transistor (FET) Q3 and the transistor (FET) Q4 are alternately turned on with a dead time between them at a time ratio of approximately 50%. By this switching operation, a resonance current flows through the capacitor C3 and the inductor L3. The voltage conversion rate in the current resonance type converter 3 can be adjusted by changing the switching frequency at which the transistor (FET) Q3 and the transistor (FET) Q4 are turned on and off.

The second control circuit 5 adjusts the time ratio (transistor (FET) Q2) of the step-down converter 2 so that the output voltage Vo output from the current resonance converter 3 matches the target voltage Vtgt supplied from the command voltage generation circuit 6. And the switching frequency fsw of the current resonance converter 3 (switching frequency at which the transistor (FET) Q3 and the transistor (FET) Q4 are turned on / off). This control will be described with reference to the drawings. In the following description, it is assumed that λ (= Lr / Lm) determined by the inductor Lr related to series resonance and the inductor Lm related to parallel resonance is set to 0.2. Further, the resonance frequency f ₀ is the resonant frequency in the series resonance of the capacitor C3 and the inductor Lr.

The first embodiment will be described with reference to FIGS. FIG. 2 is a graph showing the relationship between the switching frequency of the current resonance type converter 3 and the voltage conversion rate. Q (= Z ₀ / Rac) is a value determined by the equivalent load resistance Rac and the characteristic impedance Z ₀ . In this graph, the horizontal axis is indicated by a ratio F of the switching frequency fsw relative to the resonance frequency _{f 0} (= fsw / _{f 0),} voltage when ordinate the switching frequency fsw is equal to the resonance frequency _{f 0} The voltage conversion rate M is based on the conversion rate (Vo / Vb). Therefore, when fsw = f ₀ , both F and M are 1.

A point on the graph, the switching frequency fsw corresponding to time equal to the resonant frequency f _0. When fsw = f ₀ (F = 1), the voltage conversion rate M becomes the same value regardless of the value of Q. Point B1 corresponds to a case where the switching frequency fsw is set to a frequency (0.6 × f ₀ ) that is 0.6 times the resonance frequency f _{0 in} a no-load state (Q = 0, that is, Rac = ∞). Point B2 is in the unloaded state (Q = 0), corresponding to when the 1.5 times the frequency of the switching frequency fsw resonance frequency _{f 0 (1.5 × f 0)} . When F is changed between 0.6 and 1.5 in the no-load state (Q = 0) (switching frequency fsw is changed between 0.6 × f ₀ and 1.5 × f ₀ The voltage conversion rate M changes on a curve passing through the points B1, A, and B2. Point C1 corresponds to the case where the switching frequency fsw is set to a frequency (0.6 × f ₀ ) that is 0.6 times the oscillation frequency f ₀ in the state of Q = 0.4. The point C2 corresponds to the case where the switching frequency fsw is 1.5 times the resonance frequency f ₀ (1.5 × f ₀ ) in the state of Q = 0.4. When F is varied between 0.6 and 1.5 with Q = 0.4 (switching frequency fsw is varied between 0.6 × f ₀ and 1.5 × f ₀ ), The voltage conversion rate M changes on a curve passing through the points C1, A and C2.

As can be seen from the graph of FIG. 2, the minimum frequency fmin (= 0.6 × _{f 0)} from the resonance frequency _{f 0} is 0.6 times the frequency of the resonant frequency _{f 0} of the switching frequency fsw of the current resonant converter 3 The voltage conversion rate M becomes maximum when the switching frequency fsw becomes the minimum frequency fmin when the frequency is changed between the maximum frequency fmax (= 1.5 × f ₀ ) which is 1.5 times the frequency of It becomes minimum when the switching frequency fsw reaches the maximum frequency fmax. Further, when the switching frequency fsw is different from the resonance frequency f _0, the voltage conversion ratio M is changed according to the value of Q. That is, when the equivalent load resistance Rac changes, the voltage conversion rate M changes accordingly. For example, when the equivalent load resistance Rac fluctuates in a state where the switching frequency fsw is maintained at the maximum frequency fmax, and as a result, Q changes between 0 and 0.4, the voltage conversion rate M is changed between points B2 and C2. It changes by connecting straight lines. In the example shown in FIG. 2, the voltage conversion rate M corresponding to the point B2 is set to 0.9.

  The second control circuit 5 changes the switching frequency fsw from the minimum frequency fmin to the maximum frequency fmax so that the output voltage Vo output from the current resonant converter 3 matches the target voltage Vtgt given from the command voltage generation circuit 6. The switching frequency fsw that is changed between the two is controlled. Here, until the switching frequency fsw reaches the maximum frequency fmax, the voltage conversion rate M is adjusted by the control of the switching frequency fsw so that the output voltage Vo matches the target voltage Vtgt. At this time, the duty ratio of the step-down converter 2 is maintained at 1. That is, the transistor (FET) Q2 is kept on. Thus, when the transistor (FET) Q2 is maintained in the on state, switching loss (loss generated when the transistor (FET) Q2 is turned on or off), loss of the diode D2, and iron loss of the inductor L2 Therefore, the loss generated in the step-down converter 2 can be kept low.

  On the other hand, when the switching frequency fsw of the current resonant converter 3 reaches the maximum frequency fmax, the second control circuit 5 adjusts the time ratio of the step-down converter 2 while maintaining the switching frequency fsw at the maximum frequency fmax. . At this time, the time ratio of the step-down converter 2 becomes smaller than 1, and the transistor (FET) Q2 starts a switching operation. That is, the step-down converter 2 starts a step-down operation. By this step-down operation, the voltage Vb input to the current resonance type converter 3 becomes lower than the voltage Vp generated by the power factor correction circuit 1. The reason why the voltage Vb is lowered in this manner is that when the switching frequency fsw reaches the maximum frequency fmax, the voltage conversion rate M of the current resonance type converter 3 cannot be further reduced. When the voltage conversion rate M cannot be further reduced, that is, when the switching frequency fsw reaches the maximum frequency fmax, the following control is performed. When the target voltage Vtgt supplied from the command voltage generation circuit 6 is lower than the output voltage Vo output from the current resonance type converter 3, the second control circuit 5 decreases the time ratio of the step-down converter 2. As the time ratio of the step-down converter 2 decreases, the voltage Vb input to the current resonance type converter 3 decreases, so the output voltage Vo also decreases. The second control circuit 5 decreases the time ratio of the step-down converter 2 until the output voltage Vo becomes equal to the target voltage Vtgt. On the contrary, when the target voltage Vtgt is higher than the output voltage Vo, the second control circuit 5 increases the time ratio of the step-down converter 2. As the time ratio of the step-down converter 2 increases, the voltage Vb input to the current resonance type converter 3 increases, so the output voltage Vo also increases. The second control circuit 5 increases the time ratio of the step-down converter 2 until the output voltage Vo becomes equal to the target voltage Vtgt. As described above, the second control circuit 5 controls the time ratio of the step-down converter 2 to adjust the voltage Vb input to the current resonance type converter 3 so that the output voltage Vo matches the target voltage Vtgt.

  Next, operations of the step-down converter 2 and the current resonance type converter 3 will be described with reference to FIG. FIG. 3 is a timing chart for explaining switching operations of the transistor (FET) Q2 of the step-down converter 2 and the transistors (FET) Q3 and the transistor (FET) Q4 of the current resonance type converter 3. In FIG. 3, the first and second waveforms from the top indicate the voltage waveforms of the drive voltages applied to the gates of the transistor (FET) Q3 and the transistor (FET) Q4, respectively, and the fourth waveform from the top indicates the transistor (FET) The voltage waveform of the drive voltage applied to the gate of Q2 is shown. The transistors (FETs) Q2 to Q4 are turned on when the drive voltage is at a high level and turned off when the drive voltage is at a low level. In addition, from the top, the change in the switching frequency fsw at which the transistor (FET) Q3 and the transistor (FET) Q4 are turned on and off is shown, and from the top, the voltage Vb output from the step-down converter 2 and the power factor are shown. The ratio (Vb / Vp) of the voltage Vp output from the improvement circuit 1 is shown.

  In the period Ta, the switching frequency fsw of the transistor (FET) Q3 and the transistor (FET) Q4 increases, and the transistor (FET) Q2 is maintained in the on state. During this period, the second control circuit 5 controls the switching frequency fsw of the transistor (FET) Q3 and the transistor (FET) Q4 so that the output voltage Vo output from the current resonant converter 3 matches the target voltage Vtgt. To do. In this example, the second control circuit 5 increases the switching frequency fsw in order to make the output voltage Vo coincide with the target voltage Vtgt. As a result, the output voltage Vo output from the current resonance type converter 3 decreases as the switching frequency fsw increases. Then, at the time t1, the switching frequency fsw reaches the maximum frequency fmax and shifts to the period Tb.

  In the period Tb, the switching frequency fsw of the transistor (FET) Q3 and the transistor (FET) Q4 is maintained at the maximum frequency fmax. On the other hand, the time ratio at which the transistor (FET) Q2 is turned on / off is less than 1, and the transistor (FET) Q2 starts a switching operation. During this period, the second control circuit 5 maintains the switching frequency fsw of the current resonance type converter 3 at the maximum frequency fmax, and matches the output voltage Vo output from the current resonance type converter 3 with the target voltage Vtgt. The ratio of when the transistor (FET) Q2 is turned on and off is controlled. That is, if there is no influence of the change in the equivalent load resistance Rac, the second control circuit 5 decreases the time ratio at which the transistor (FET) Q2 is turned on / off when the target voltage Vtgt decreases, and the target voltage Vtgt increases. Sometimes the ratio when the transistor (FET) Q2 is turned on and off is increased. When the time ratio at which the transistor (FET) Q2 is turned on / off decreases, the voltage Vb output from the step-down converter 2 decreases, so the value of Vb / Vp decreases and the output voltage Vo decreases. When the time ratio at which the transistor (FET) Q2 is turned on / off increases, the voltage Vb output from the step-down converter 2 increases, so the value of Vb / Vp increases and the output voltage Vo increases. When the time ratio at which the transistor (FET) Q2 is turned on / off becomes 1, the voltage Vp and the voltage Vb become equal, so the value of Vb / Vp becomes 1. In this example, the time ratio at which the transistor (FET) Q2 is turned on and off at time t2 becomes 1. Then, this period ends at time t2 and shifts to a period Tc.

  In the period Tc, the switching frequency fsw of the transistor (FET) Q3 and the transistor (FET) Q4 decreases, and the time ratio when the transistor (FET) Q2 is turned on / off is maintained at 1 (the transistor (FET) Q2 is Kept on). During this period, the second control circuit 5 controls the switching frequency fsw of the transistor (FET) Q3 and the transistor (FET) Q4 so that the output voltage Vo output from the current resonant converter 3 matches the target voltage Vtgt. To do. In this example, the second control circuit 5 sets the switching frequency fsw of the transistor (FET) Q3 and the transistor (FET) Q4 in order to make the output voltage Vo output from the current resonance type converter 3 coincide with the target voltage Vtgt. I will let you go down. At this time, the output voltage Vo output from the current resonance type converter 3 increases as the switching frequency fsw decreases unless there is an influence of a change in the equivalent load resistance Rac.

  As described above, in this embodiment, the transistor (FET) Q2 starts the switching operation only when the switching frequency fsw of the current resonance type converter 3 reaches the maximum frequency fmax. Therefore, the loss in the step-down converter 2 can be reduced as compared with the case where the transistor (FET) Q2 always performs the switching operation.

A second embodiment will be described with reference to FIGS. FIG. 4 is a graph showing the relationship between the switching frequency of the current resonance type converter 3 and the voltage conversion rate, as in FIG. The horizontal axis and the vertical axis of this graph also correspond to F (= fsw / f ₀ ) and voltage conversion rate M, respectively, as in FIG.

A point on the graph corresponds to when the switching frequency fsw is equal to the resonant frequency f _0. When fsw = f ₀ (F = 1), the voltage conversion rate M becomes the same value regardless of the value of Q. Point B1 corresponds to a case where the switching frequency fsw is set to a frequency (0.6 × f ₀ ) that is 0.6 times the oscillation frequency f _{0 in} a no-load state (Q = 0, that is, Rac = ∞). Point B2 is in the unloaded state (Q = 0), corresponding to when the 1.5 times the frequency of the switching frequency fsw resonance frequency _{f 0 (1.5 × f 0)} . Here, the voltage conversion rate M corresponding to the point B2 is set to be 0.9. In this embodiment, the minimum value of the voltage conversion rate M is limited to 0.9. Point C1 corresponds to the case where the switching frequency fsw is set to a frequency (0.6 × f ₀ ) that is 0.6 times the oscillation frequency f ₀ in the state of Q = 0.4. The point C2 corresponds to the case where the voltage conversion rate M becomes 0.9 in the state of Q = 0.4.

In the present embodiment, similarly to the first embodiment, the switching frequency fsw of the current resonance type converter 3 is resonated from the minimum frequency fmin (= 0.6 × f ₀ ), which is 0.6 times the resonance frequency f _0. Although varied until the maximum frequency fmax (= 1.5 × _{f 0)} is 1.5 times the frequency of the frequency _{f 0,} the lower limit of the voltage conversion ratio M is set to 0.9. For this reason, when the voltage conversion rate M reaches 0.9, the range in which the switching frequency fsw is changed is limited. That is, when Q is larger than 0, the switching frequency fsw when the voltage conversion rate M reaches 0.9 becomes the upper limit of the variable range of the switching frequency fsw.

  The second control circuit 5 is a target in which the output voltage Vo output from the current resonance converter 3 is given from the command voltage generation circuit 6 until the voltage conversion rate M of the current resonance converter 3 reaches 0.9. The switching frequency fsw is controlled to change the switching frequency fsw between the minimum frequency fmin and the maximum frequency fmax so as to coincide with the voltage Vtgt. Here, until the voltage conversion rate M reaches 0.9, the voltage conversion rate M is adjusted by the control of the switching frequency fsw so that the output voltage Vo matches the target voltage Vtgt. At this time, the duty ratio of the step-down converter 2 is maintained at 1, and the transistor (FET) Q2 is maintained in the ON state. As described above, when the transistor (FET) Q2 is maintained in the ON state, the switching loss, the loss of the diode D2, and the iron loss of the inductor L2 do not occur when the transistor (FET) Q2 is turned on or off. Therefore, the loss generated in the step-down converter 2 can be suppressed low.

  In the present embodiment, the second control circuit 5 detects the output voltage Vo output from the current resonant converter 3 and the voltage Vb input to the current resonant converter 3 (voltage Vb output from the step-down converter 2). By doing so, the voltage conversion rate M can be calculated. When the time ratio of the step-down converter 2 is maintained at 1, the voltage Vp output from the power factor correction circuit 1 and the voltage Vb output from the step-down converter 2 are equal. Alternatively, the voltage conversion rate M may be calculated by detecting only the output voltage Vo. That is, the voltage Vp output from the power factor correction circuit 1 may be maintained at a predetermined voltage, and the voltage conversion rate M may be calculated based on the predetermined voltage and the output voltage Vo. In this case, after the voltage conversion rate M reaches 0.9, the switching frequency fsw of the current resonant converter 3 is maintained at the switching frequency fsw when the voltage conversion rate M reaches 0.9.

  On the other hand, when the voltage conversion rate M of the current resonant converter 3 reaches 0.9, the second control circuit 5 sets the time ratio of the step-down converter 2 while maintaining the voltage conversion rate M at 0.9. Controls the changing time ratio. At this time, the time ratio of the step-down converter 2 becomes smaller than 1, and the transistor (FET) Q2 starts a switching operation. That is, the step-down converter 2 starts a step-down operation. The second control circuit 5 adjusts the voltage Vb input to the current resonance type converter 3 by controlling the duty ratio of the step-down converter 2.

  When the voltage conversion rate M of the current resonance type converter 3 is maintained at 0.9, the following control is performed. When the target voltage Vtgt supplied from the command voltage generation circuit 6 is lower than the output voltage Vo output from the current resonance type converter 3, the second control circuit 5 decreases the time ratio of the step-down converter 2. As the time ratio of the step-down converter 2 decreases, the voltage Vb input to the current resonance type converter 3 decreases, so the output voltage Vo also decreases. The second control circuit 5 decreases the time ratio of the step-down converter 2 until the output voltage Vo matches the target voltage Vtgt. On the contrary, when the target voltage Vtgt given from the command voltage generating circuit 6 is higher than the output voltage Vo outputted from the current resonance type converter 3, the second control circuit 5 increases the time ratio of the step-down converter 2. Go. As the time ratio of the step-down converter 2 increases, the voltage Vb input to the current resonance type converter 3 increases, so the output voltage Vo also increases. The second control circuit 5 increases the time ratio of the step-down converter 2 until the output voltage Vo matches the target voltage Vtgt. As described above, the second control circuit 5 adjusts the voltage Vb input to the current resonance type converter 3 by controlling the time ratio of the step-down converter 2, and makes the output voltage Vo coincide with the target voltage Vtgt.

  Next, operations of the step-down converter 2 and the current resonance type converter 3 will be described with reference to FIG. FIG. 5 is a timing chart for explaining switching operations of the transistor (FET) Q2 of the step-down converter 2 and the transistors (FET) Q3 and the transistor (FET) Q4 of the current resonance type converter 3. In FIG. 5, the first and second waveforms from the top indicate the voltage waveforms of the drive voltages applied to the gates of the transistor (FET) Q3 and the transistor (FET) Q4, respectively, and the fifth waveform from the top indicates the transistor (FET) The voltage waveform of the drive voltage applied to the gate of Q2 is shown. The transistors (FETs) Q2 to Q4 are turned on when the drive voltage is at a high level and turned off when the drive voltage is at a low level. Also, the third change from the top shows the change in the switching frequency fsw at which the transistor (FET) Q3 and the transistor (FET) Q4 turn on and off, and the fourth from the top shows the change in the voltage conversion rate M of the current resonance converter 3. 6 shows the ratio (Vb / Vp) between the voltage Vb output from the step-down converter 2 and the voltage Vp output from the power factor correction circuit 1.

  In the period Ta, the switching frequency fsw of the transistor (FET) Q3 and the transistor (FET) Q4 increases, and the transistor (FET) Q2 is maintained in the on state. The voltage conversion rate M decreases as the switching frequency fsw increases. During this period, the second control circuit 5 maintains a time ratio of the step-down converter 2 at 1 and a transistor (FET) so that the output voltage Vo output from the current resonant converter 3 matches the target voltage Vtgt. The switching frequency fsw of Q3 and transistor (FET) Q4 is controlled. In this example, the second control circuit 5 increases the switching frequency fsw and decreases the voltage conversion rate M in order to make the output voltage Vo coincide with the target voltage Vtgt. As a result, like the voltage conversion rate M, the output voltage Vo output from the current resonant converter 3 decreases as the switching frequency fsw increases. At time t1, the voltage conversion rate M reaches 0.9 and shifts to the period Tb.

  In the period Tb, the voltage conversion rate M is maintained at 0.9. On the other hand, the time ratio of the step-down converter 2 becomes less than 1, and the transistor (FET) Q2 starts a switching operation. During this period, the second control circuit 5 maintains the voltage conversion rate M of the current resonance type converter 3 at 0.9, and matches the output voltage Vo output from the current resonance type converter 3 with the target voltage Vtgt. In addition, the time ratio at which the transistor (FET) Q2 is turned on and off is controlled. That is, the second control circuit 5 decreases the time ratio at which the transistor (FET) Q2 is turned on / off when the target voltage Vtgt is lowered, and the time ratio at which the transistor (FET) Q2 is turned on / off when the target voltage Vtgt is increased. To raise. When the time ratio at which the transistor (FET) Q2 is turned on / off decreases, the voltage Vb output from the step-down converter 2 decreases, so the value of Vb / Vp decreases and the output voltage Vo decreases. When the time ratio at which the transistor (FET) Q2 is turned on / off increases, the voltage Vb output from the step-down converter 2 increases, so the value of Vb / Vp increases and the output voltage Vo increases. When the time ratio at which the transistor (FET) Q2 is turned on / off becomes 1, the voltage Vp and the voltage Vb become equal, so the value of Vb / Vp becomes 1. In this example, the time ratio of the step-down converter 2 becomes 1 at time t2. Then, this period ends at time t2 and shifts to a period Tc.

  In the period Tc, the switching frequency fsw of the transistor (FET) Q3 and the transistor (FET) Q4 decreases, and the time ratio when the transistor (FET) Q2 is turned on / off is maintained at 1 (the transistor (FET) Q2 is Kept on). The voltage conversion rate M increases as the switching frequency fsw decreases. During this period, the second control circuit 5 controls the switching frequency fsw of the transistor (FET) Q3 and the transistor (FET) Q4 so that the output voltage Vo output from the current resonant converter 3 matches the target voltage Vtgt. To do. In this example, the second control circuit 5 decreases the switching frequency fsw and increases the voltage conversion rate M. At this time, the output voltage Vo output from the current resonance type converter 3 increases as the voltage conversion rate M increases.

  As described above, in this embodiment, the transistor (FET) Q2 starts a switching operation only when the voltage conversion rate M of the current resonance type converter 3 reaches a predetermined value. Therefore, the loss in the step-down converter 2 can be reduced as compared with the case where the transistor (FET) Q2 always performs the switching operation.

  A third embodiment will be described with reference to FIGS. FIG. 6 is a circuit diagram showing the power supply device according to the present embodiment. The power supply device includes a power factor correction circuit 1, a step-down converter 2, a current resonance type converter 3, a first control circuit 4, a third control circuit 7, a fourth control circuit 8, and a command voltage generation circuit 6. ing. Among these circuits, the power factor correction circuit 1, the step-down converter 2, the current resonance type converter 3, the first control circuit 4, and the command voltage generation circuit 6 are the same circuits as those shown in FIG. A similar circuit. Note that the target voltage Vtgt output from the command voltage generation circuit 6 is input to the third control circuit 7 and the fourth control circuit 8.

The third control circuit 7 controls the time ratio of the step-down converter 2 (the time ratio at which the transistor (FET) Q2 is turned on / off) based on the target voltage Vtgt given from the command voltage generation circuit 6. In this control, when the target voltage Vtgt is equal to or lower than a predetermined voltage value, the voltage Vb output from the step-down converter 2 based on the target voltage Vtgt, that is, the voltage that is input to the current resonance type converter 3. The voltage value of Vb is adjusted. The predetermined voltage value is set to a voltage value lower than the rated output voltage Vr. In this embodiment, the voltage value of the output voltage Vo output from the current resonance type converter 3 when the following two conditions are satisfied is the rated output voltage Vr. The first condition is that the voltage Vp output from the power factor correction circuit 1 and the voltage Vb input to the current resonant converter 3 are equal, that is, the time ratio of the step-down converter 2 is maintained at 1. There, the second condition is that the switching frequency fsw of the current resonance type converter 3 is equal to the resonance frequency f _0.

  Based on the target voltage Vtgt given from the command voltage generation circuit 6, the fourth control circuit 8 switches the switching frequency fsw of the current resonance type converter 3 (switching frequency at which the transistor (FET) Q3 and the transistor (FET) Q4 are turned on / off). To control. In this control, the switching frequency fsw is controlled so that the output voltage Vo output from the current resonance type converter 3 matches the target voltage Vtgt.

Next, referring to FIG. 7, the control of the time ratio of the step-down converter 2 performed by the third control circuit 7 and the control of the switching frequency fsw of the current resonance type converter 3 performed by the fourth control circuit 8 are performed. This will be specifically described. FIG. 7 is a graph showing the relationship between the switching frequency fsw and the voltage change rate. In this graph, the horizontal axis corresponds to the ratio F (= fsw / f ₀ ) of the switching frequency fsw based on the resonance frequency f ₀ . The vertical axis corresponds to the voltage conversion rate M ′ based on the voltage conversion rate (Vo / Vp) when Vb = Vp and fsw = f ₀ . This voltage conversion rate M ′ is a voltage conversion rate combining the step-down converter 2 and the current resonance type converter 3. Therefore, if Vb = Vp, the voltage conversion rate M ′ is the same as the voltage conversion rate M of the current resonance type converter 3.

In FIG. 7, the curve indicated by the solid line corresponds to when Vb = Vp, and the curve indicated by the broken line corresponds to when Vb = 0.5 Vp. As can be seen from these two curves, the voltage input to the current resonant converter 3 when Vb = 0.5 Vp is ½ of the voltage input to the current resonant converter 3 when Vb = Vp. Therefore, the voltage conversion rate M ′ when Vb = 0.5 Vp is ½ (0.5 times) the voltage conversion rate M ′ when Vb = Vp. The point A on the curve indicated by the solid line corresponds to the case where fsw = f ₀ , and the voltage conversion rate M ′ at this time is 1. On the other hand, the point B on the curve indicated by the broken line also corresponds to the case where fsw = f ₀ , and the voltage conversion rate M ′ at this time is 0.5. The output voltage Vo output from the current resonance type converter 3 at the point A corresponds to the rated output voltage Vr. Therefore, at the point B, a voltage that is 1/2 (0.5 times) the rated output voltage Vr is output from the current resonance type converter 3 as the output voltage Vo.

  The third control circuit 7 controls the time ratio of the step-down converter 2 based on the target voltage Vtgt. Note that, when the target voltage Vtgt is larger than a predetermined voltage value, the third control circuit 7 maintains the duty ratio of the step-down converter 2 at 1. In the following description, the predetermined voltage value is 0.9 Vr (0.9 times the rated output voltage Vr).

  The third control circuit 7 maintains the time ratio of the step-down converter 2 to 1 when the target voltage Vtgt is greater than 0.9 Vr, and the target voltage Vtgt and the rated output when the target voltage Vtgt is 0.9 Vr or less. Step-down converter 2 so that the ratio of voltage Vr (Kref = Vtgt / Vr) is equal to the ratio (Vb / Vp) of voltage Vb input to current resonance converter 3 and voltage Vp output from power factor correction circuit 1 Control the time ratio. That is, when the target voltage Vtgt becomes 0.9 Vr or less, the third control circuit 7 sets the time ratio of the step-down converter 2 so that the voltage Vb matches the voltage Kref times the voltage Vp (Kref × Vp). To control. For example, when Kref is 0.8, the third control circuit 7 sets the time ratio of the step-down converter 2 so that the voltage Vb becomes equal to 0.8 times the voltage Vp (0.8 × Vp). Control.

  Note that other methods may be used to determine the target value of the voltage Vb. For example, the target value of the voltage Vb may be a value obtained by (Kref + 0.05) × Vp. That is, the time ratio of the step-down converter 2 may be controlled so that the voltage Vb becomes equal to the value obtained by (Kref + 0.05) × Vp. In this case, when Kref is 0.9, the target value of the voltage Vb is 0.95 Vp, and when Kref is 0.8, the target value of the voltage Vb is 0.85 Vp. Further, the target value of the voltage Vb may be a value obtained by (Kref−0.05) × Vp. That is, the time ratio of the step-down converter 2 may be controlled so that the voltage Vb is equal to the value obtained by (Kref−0.05) × Vp. In this case, when Kref is 0.9, the target value of the voltage Vb is 0.85 Vp, and when Kref is 0.8, the target value of the voltage Vb is 0.75 Vp.

  Further, the target value of the voltage Vb may be changed stepwise. For example, a value (Kref ′) obtained by rounding Kref to the second decimal place may be used instead of Kref. That is, this Kref′Vp may be set as the target value of the voltage Vb. In this case, when Kref is 0.85 or more and 0.9 or less, the target value of voltage Vb is 0.9 Vp, and when Kref is 0.75 or more and less than 0.85, the target value of voltage Vb is 0.8 Vp. When Kref is 0.65 or more and less than 0.75, the target value of the voltage Vb is 0.8 Vp.

  In the above description, the time ratio of the step-down converter 2 is determined based on the ratio (Kref = Vtgt / Vr) between the target voltage Vtgt and the rated output voltage Vr, and the step-down converter 2 is switched at this time ratio. Good. In this case, for example, a value obtained by multiplying Kref by a predetermined constant may be used as the time ratio of the step-down converter 2.

  Next, operations of the step-down converter 2 and the current resonance type converter 3 will be described with reference to FIG. FIG. 8 is a timing chart for explaining switching operations of the transistor (FET) Q2 of the step-down converter 2 and the transistors (FET) Q3 and the transistor (FET) Q4 of the current resonance type converter 3. In FIG. 8, the first and second waveforms from the top indicate the voltage waveforms of the drive voltages applied to the gates of the transistor (FET) Q3 and the transistor (FET) Q4, respectively, and the fifth waveform from the top indicates the transistor (FET) The voltage waveform of the drive voltage applied to the gate of Q2 is shown. The transistors (FETs) Q2 to Q4 are turned on when the drive voltage is at a high level and turned off when the drive voltage is at a low level. Also, the third change from the top shows the change in the switching frequency fsw at which the transistor (FET) Q3 and the transistor (FET) Q4 are turned on and off, and the fourth from the top is the ratio of the target voltage Vtgt to the rated output voltage Vr (Kref = Vtgt / Vr) is shown, and the ratio (Vb / Vp) between the voltage Vb output from the step-down converter 2 and the voltage Vp output from the power factor correction circuit 1 is shown sixth from the top.

  In the period Ta, since the target voltage Vtgt decreases, the switching frequency fsw of the transistor (FET) Q3 and the transistor (FET) Q4 increases as the target voltage Vtgt decreases. At this time, Kref (= Vtgt / Vr) also decreases. However, since Kref is larger than 0.9, the transistor (FET) Q2 is maintained in the ON state. During this period, the third control circuit 7 maintains a time ratio of 1 at which the transistor (FET) Q2 is turned on / off. Therefore, the voltage Vp output from the power factor correction circuit 1 and the voltage Vb output from the step-down converter 2 are maintained at the same voltage value. On the other hand, the fourth control circuit 8 controls the switching frequency fsw of the transistor (FET) Q3 and the transistor (FET) Q4 so that the output voltage Vo output from the current resonant converter 3 matches the target voltage Vtgt. . In this example, the second control circuit 5 increases the switching frequency fsw of the current resonance type converter 3 as the target voltage Vtgt decreases. Then, Kref reaches 0.9 at time t1, and shifts to the period Tb.

  In the period Tb, since Kref becomes 0.9 or less, the third control circuit 7 causes the transistor (FET) Q2 to match the voltage Vb to a voltage (Kref × Vp) that is Kref times the voltage Vp. Controls the on / off ratio. At this time, the time ratio of turning on / off the transistor (FET) Q2 becomes smaller than 1, and the transistor (FET) Q2 starts a switching operation. On the other hand, the fourth control circuit 8 controls the switching frequency fsw of the transistor (FET) Q3 and the transistor (FET) Q4 to make the output voltage Vo output from the current resonance type converter 3 coincide with the target voltage Vtgt. In other words, the third control circuit 7 controls the time ratio at which the transistor (FET) Q2 is turned on and off so that the voltage Vb matches the target value (Kref × Vp), and the fourth control circuit 8 The switching frequency fsw of the current resonance type converter 3 is controlled so that the output voltage Vo output from the type converter 3 matches the target value (target voltage Vtgt). As long as Kref is 0.9 or less, the third control circuit 7 continues to control the time ratio of the step-down converter 2 so that the voltage Vb matches the target value (Kref × Vp). When returning to the larger region, the time ratio of the step-down converter 2 is set to 1, and the voltage Vb and the voltage Vp are made equal. In this example, at time t2, the region returns to the region where Kref is greater than 0.9. Then, this period ends at time t2 and shifts to a period Tc.

  In the period Tc, since Kref is larger than 0.9, the transistor (FET) Q2 is turned on, and the voltage Vb becomes equal to the voltage Vp. When the ratio of turning on and off the transistor (FET) Q2 is returned to 1 (when the transistor (FET) Q2 stops switching operation), the voltage Vb increases rapidly, so that the transistor (FET) Q3 and the transistor (FET) In Q4, the switching frequency fsw rises temporarily, but thereafter falls as the target voltage Vtgt rises. During this period, the third control circuit 7 maintains a time ratio of 1 at which the transistor (FET) Q2 is turned on / off. On the other hand, the fourth control circuit 8 controls the switching frequency fsw of the transistor (FET) Q3 and the transistor (FET) Q4 so that the output voltage Vo output from the current resonant converter 3 matches the target voltage Vtgt. . In this example, the second control circuit 5 decreases the switching frequency fsw of the current resonance type converter 3 as the target voltage Vtgt increases.

  As described above, in this embodiment, the transistor (FET) Q2 starts the switching operation only when the target voltage Vtgt is equal to or lower than the predetermined voltage value. Therefore, the loss in the step-down converter 2 can be reduced as compared with the case where the transistor (FET) Q2 always performs the switching operation.

  Next, a configuration method of the resonance circuit of the current resonance type converter will be described with reference to the drawings. In this resonant circuit, an inductor related to series resonance (series resonant inductor) and an inductor related to parallel resonance (parallel resonant inductor) are configured as follows. FIG. 9 shows a case where the series resonant inductor is constituted by leakage inductors Lrp and Lrs of the transformer T1. In this case, a resonant circuit is configured by loosely coupling the transformer T1 and connecting a resonant capacitor to the transformer T1. At this time, the coupling coefficient of the transformer T1 is set to about 0.8 to 0.9. The exciting inductor Lm of the transformer T1 is a parallel resonant inductor.

  FIG. 10 shows a case where the series resonant inductor is configured by an external inductor Ladd. In this case, the transformer T1 is tightly coupled, and an external inductor Ladd and a resonant capacitor are connected to the transformer T1 to form a resonant circuit. The exciting inductor Lm of the transformer T1 is a parallel resonant inductor as in the case of FIG.

  FIG. 11 shows a case where the series resonant inductor is constituted by an external inductor Ladd and leakage inductors Lrp and Lrs. In this case, the transformer T1 is loosely coupled, and the transformer T1 is connected to an external inductor Ladd and a resonance capacitor to form a resonance circuit. The exciting inductor Lm of the transformer T1 is a parallel resonant inductor as in the case of FIG.

  Next, a configuration method of the resonance capacitor of the resonance circuit will be described. FIG. 12 shows a case where a resonant capacitor is configured by the capacitor C11 and the capacitor C12. In this case, a capacitor C11 and a capacitor C12 are connected in series to both ends of the DC power supply Vin, and one end of the primary winding of the transformer T1 is connected to a connection portion between the capacitor C11 and the capacitor C12.

  FIG. 13 shows a case where a resonant capacitor is configured by the capacitor C13, the capacitor C14, and the capacitor C15. In this case, the capacitor C14 and the capacitor C15 are connected in series to both ends of the DC power source Vin, and the capacitor C13 is connected between the connection portion of the capacitor C14 and the capacitor C15 and one end of the primary winding of the transformer T1. Further, a diode D11 and a diode 12 may be connected in parallel to these capacitors in order to protect the capacitors C14 and C15 from overload. In this example, a diode D11 is connected in parallel with the capacitor C14. In this connection, the cathode of the diode D11 is connected to the positive side of the DC power supply Vin. In addition, a diode D12 is connected in parallel with the capacitor C15. In this connection, the anode of the diode D12 is connected to the negative electrode side of the DC power supply Vin. Note that the output voltage can be lowered by connecting the diode D11 and the diode 12 in this way.

  In the first to third embodiments, the half-bridge current resonance converter is used, but a full-bridge current resonance converter as shown in FIG. 14 may be used. In this circuit, a transistor (FET) Q11 and a transistor (FET) Q12 are connected in series to both ends of the DC power supply Vin, and a transistor (FET) Q13 and a transistor (FET) Q14 are also connected in series to both ends of the DC power supply Vin. Has been. A connection portion between the transistor (FET) Q11 and the transistor (FET) Q12 is connected to one end of the primary winding of the transformer T1 via the capacitor Cr and the inductor Cr constituting the resonance circuit, and the transistor (FET) Q13 and the transistor (FET) ) The connection portion of Q14 is connected to the other end of the primary winding of the transformer T1. The transistor (FET) Q11 and the transistor (FET) Q14 are simultaneously turned on, and the transistor (FET) Q12 and the transistor (FET) Q13 are simultaneously turned on. The pair of the transistor (FET) Q11 and the transistor (FET) Q14 and the pair of the transistor (FET) Q12 and the transistor (FET) Q13 are alternately turned on with a dead time between them at a time ratio of approximately 50%.

  Further, the rectifier circuit provided on the secondary side of the transformer T1 may be a diode bridge 10 as shown in FIG.

  As described above, there are various configurations of the current resonance type converter that forms a part of the converter according to the present invention, and the voltage conversion rate is adjusted by the switching frequency of the switching element through which the resonance current flows. If so, the configuration is not particularly limited. Therefore, the current resonance type converter can be similarly implemented even if it is a current resonance type converter (so-called LCC converter) in which a capacitor is connected in parallel to the primary winding or the secondary winding of the transformer T1. Further, the configuration of the step-down converter is not particularly limited as long as it is configured to perform a step-down operation.

  In the above embodiment, the case where the step-down converter is connected to the front stage of the current resonance type converter has been described. However, the present invention is similarly applied to the case where the step-down converter is connected to the subsequent stage of the current resonance type converter. Can do. That is, as shown in FIG. 16, the present invention can be similarly implemented even when the output of the current resonant converter is connected to the input of the step-down converter. When the step-down converter is connected to the subsequent stage of the current resonance type converter in this way, the step-down converter and the current resonance type are set so that the output voltage output from the step-down converter matches the target voltage given from the command voltage generation circuit. The operation of the converter is controlled.

DESCRIPTION OF SYMBOLS 1 Power factor improvement circuit 2 Buck converter 3 Current resonance type converter 4 1st control circuit 5 2nd control circuit 6 Command voltage generation circuit 7 3rd control circuit 8 4th control circuit

Claims (5)

A step-down converter that outputs an output voltage equal to the input voltage when the step-down operation is stopped and outputs an output voltage lower than the input voltage when the step-down operation is performed;
A resonant converter in which the voltage conversion rate is adjusted by the switching frequency of the switching element through which the resonant current flows;
An output voltage detection circuit for detecting an output voltage output from the resonant converter;
A control circuit for controlling operations of the step-down converter and the resonant converter based on an output voltage detected by the output voltage detection circuit;
The step-down converter is connected to the previous stage of the resonant converter,
The control circuit changes the switching frequency of the resonant converter from a first predetermined frequency to a second predetermined frequency that is higher than the first predetermined frequency, thereby changing the voltage conversion rate of the resonant converter. And the step-down converter performs a step-down operation only when the voltage conversion rate reaches the predetermined minimum voltage conversion rate, and the step-down converter performs the step-down operation. A DCDC converter configured to perform second control for adjusting a step-down ratio in operation. A step-down converter that outputs an output voltage equal to the input voltage when the step-down operation is stopped and outputs an output voltage lower than the input voltage when the step-down operation is performed;
A resonant converter in which the voltage conversion rate is adjusted by the switching frequency of the switching element through which the resonant current flows;
An output voltage detection circuit for detecting an output voltage output from the resonant converter;
A command voltage generation circuit that outputs a target value of an output voltage output from the resonant converter;
A control circuit for controlling operations of the step-down converter and the resonant converter based on an output voltage detected by the output voltage detection circuit and a target value output from the command voltage generation circuit;
The step-down converter is connected to the previous stage of the resonant converter,
The control circuit changes the switching frequency of the resonant converter from a first predetermined frequency to a second predetermined frequency that is higher than the first predetermined frequency, thereby changing the voltage conversion rate of the resonant converter. And a step of adjusting the step-down ratio in the step-down operation by causing the step-down converter to perform a step-down operation only when the target value output from the command voltage generation circuit becomes a predetermined value or less. 2 control, and
The step-down ratio in the step-down operation is determined based on a target value output from the command voltage generation circuit. A step-down converter that outputs an output voltage equal to the input voltage when the step-down operation is stopped and outputs an output voltage lower than the input voltage when the step-down operation is performed;
A resonant converter in which the voltage conversion rate is adjusted by the switching frequency of the switching element through which the resonant current flows;
An output voltage detection circuit for detecting an output voltage output from the step-down converter;
A control circuit for controlling operations of the step-down converter and the resonant converter based on an output voltage detected by the output voltage detection circuit;
The step-down converter is connected to a subsequent stage of the resonant converter,
The control circuit changes the switching frequency of the resonant converter from a first predetermined frequency to a second predetermined frequency that is higher than the first predetermined frequency, thereby changing the voltage conversion rate of the resonant converter. And the step-down converter performs a step-down operation only when the voltage conversion rate reaches the predetermined minimum voltage conversion rate, and the step-down converter performs the step-down operation. A DCDC converter configured to perform second control for adjusting a step-down ratio in operation. A step-down converter that outputs an output voltage equal to the input voltage when the step-down operation is stopped and outputs an output voltage lower than the input voltage when the step-down operation is performed;
A resonant converter in which the voltage conversion rate is adjusted by the switching frequency of the switching element through which the resonant current flows;
An output voltage detection circuit for detecting an output voltage output from the step-down converter;
A command voltage generation circuit that outputs a target value of an output voltage output from the resonant converter;
A control circuit for controlling operations of the step-down converter and the resonant converter based on an output voltage detected by the output voltage detection circuit and a target value output from the command voltage generation circuit;
The step-down converter is connected to a subsequent stage of the resonant converter,
The control circuit changes the switching frequency of the resonant converter from a first predetermined frequency to a second predetermined frequency that is higher than the first predetermined frequency, thereby changing the voltage conversion rate of the resonant converter. And a step of adjusting the step-down ratio in the step-down operation by causing the step-down converter to perform a step-down operation only when the target value output from the command voltage generation circuit becomes a predetermined value or less. 2 control, and
The step-down ratio in the step-down operation is determined based on a target value output from the command voltage generation circuit. The power supply device provided with the DCDC converter of any one of Claims 1 thru | or 4.

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