JP6068167B2 - Wiring board and manufacturing method thereof - Google Patents

Description

  The present invention relates to a wiring board in which a frame wiring board and a cap wiring board are sequentially laminated on a base wiring board, and an electronic component built in the frame wiring board and a method for manufacturing the wiring board.

  FIG. 6 shows a conventional wiring board B. The conventional wiring board B includes a base wiring board 40 and a cap wiring board 50. Such a wiring board B has a so-called package-on-package structure in which a cap wiring board 50 is bonded onto a base wiring board 40 via solder bumps.

  The base wiring board 40 includes a plurality of through holes 32 penetrating vertically and an insulating substrate 31 having an electronic component D therein, a wiring conductor layer 33 deposited in the upper and lower surfaces of the insulating substrate 31 and the through holes 32, and It has an insulating substrate 31 and a solder resist layer 34 deposited on the wiring conductor layer 33. The inside of the through hole 32 is filled with a hole filling resin.

In the central portion of the upper surface of the base wiring board 40, a plurality of semiconductor element connection pads 35 for electrical connection with the electrodes of the semiconductor element S are formed by a part of the wiring conductor layer 33. A plurality of first bonding pads 36 for attaching solder bumps used for bonding the cap wiring board 50 are formed on a part of the wiring conductor layer 33 on the outer peripheral portion of the upper surface of the base wiring board 40.
The semiconductor element connection pad 35 is exposed in an opening 34 a provided in the solder resist layer 34. Then, the semiconductor element S is mounted on the upper surface of the base wiring board 40 by connecting the electrodes of the semiconductor element S to the semiconductor element connection pads 35 via solder bumps.
The first bonding pad 36 is exposed in the opening 34 b provided in the solder resist layer 34. The semiconductor element connection pad 35 and a part of the first bonding pad 36 are electrically connected to each other.
An electronic component D is embedded in the base wiring board 40. The electronic component D is electrically connected to a part of the wiring conductor layer 33. Examples of the electronic component D include a chip capacitor that stabilizes the supply of power to the semiconductor element S. Further, a plurality of external connection pads 37 for connecting to an external electric circuit board are formed on a lower surface of the base wiring board 40 by a part of the wiring conductor layer 33. These external connection pads 37 are exposed in the openings 34 c provided in the solder resist layer 34. These external connection pads 37 are electrically connected to a part of the semiconductor element connection pads 35 through the through holes 32.

  The cap wiring substrate 50 includes an insulating substrate 41 having a plurality of through holes 42 penetrating vertically, a wiring conductor layer 43, and a solder resist layer 44.

On the upper surface of the cap wiring board 50, for example, a semiconductor element connection pad 45 for mounting another semiconductor element U is formed by a part of the wiring conductor layer 43. These semiconductor element connection pads 45 are exposed in openings 44 a provided in the solder resist layer 44. Then, another semiconductor element U is mounted on the cap wiring board 50 by connecting another semiconductor element U to the semiconductor element connection pad 45 via a solder bump.
In addition, a second bonding pad 46 is formed on a lower surface of the cap wiring board 50 by a part of the wiring conductor layer 43 at a position corresponding to the first bonding pad 36 described above. These second bonding pads 46 are exposed in the openings 44 b provided in the solder resist layer 44. The base wiring board 40 and the cap wiring board 50 are electrically connected by connecting the second bonding pads 46 to the first bonding pads 36 via solder bumps.

  By the way, in recent years, electronic devices represented by mobile phones and portable music players have been improved in functionality and size. For this reason, a large number of electronic components are mounted on the wiring boards used for these in order to meet the demand for higher functionality. On the other hand, in order to respond to the demand for miniaturization, higher density and thinner wires are being promoted.

  However, as the function and size of the wiring board are increased, the density of wiring and through holes formed on the base wiring board is increasing. For this reason, there is a problem that it is difficult to secure a space for embedding a large number of electronic components in the base wiring board as in the conventional wiring board.

JP 2012-79854 A

  The present invention makes it possible to mount a large number of electronic components on a small wiring board in which wirings are formed with high density. Accordingly, it is an object to provide a highly functional and small wiring board.

The wiring board of the present invention has a flat base wiring board having an element mounting portion and a frame-shaped frame bonding portion surrounding the element mounting portion on the upper surface, and a plurality of first bonding pads formed on the frame bonding portion. And a semiconductor element mounted on the element mounting portion and a second portion bonded to the frame bonding portion, having an opening surrounding the element mounting portion and bonded to the first bonding pad on the lower surface via solder bumps. A frame wiring board having a bonding pad and having a plurality of third bonding pads on the upper surface is bonded to the frame wiring substrate so as to close the opening, and is bonded to the third bonding pad via solder bumps on the lower surface. And a cap wiring board having a fourth bonding pad, wherein the frame wiring board has an electronic component embedded therein and has a through hole vertically passing through the frame wiring board. Formed in the via hole by the through-hole conductors formed in the hole and a second junction pad and a third junction pad extending from at least one of the upper and lower surfaces of the frame wiring board with and is electrically connected to the electronic component the via conductor is one in which a second junction pads and the third at least one electronic component of the junction pad is characterized by being electrically connected.

The method for manufacturing a wiring board according to the present invention is characterized in that, in the above-described wiring board, the frame wiring board is formed by steps including the following steps (1) to (7).
(1) An electronic component, a middle layer prepreg formed with a housing hole capable of accommodating an electronic component from the upper surface to the lower surface, a lower layer prepreg laminated on the lower surface of the middle layer prepreg, and laminated on the upper surface of the middle layer prepreg Step (2) of preparing the upper layer prepreg, the lower layer copper foil laminated on the lower surface of the lower layer prepreg, and the upper layer copper foil laminated on the upper surface of the upper layer prepreg Thereafter, a step of sequentially stacking the lower layer prepreg and the middle layer prepreg on the lower layer copper foil and sequentially stacking the upper layer prepreg and the upper layer copper foil on the middle layer prepreg (3) the lower layer copper foil and the lower layer prepreg, Lower layer prepreg and middle layer prepreg are heated while pressing a laminate of middle layer prepreg, electronic component, upper layer prepreg and upper layer copper foil from above and below. And a step of forming a cured laminate by curing the prepreg for the upper layer (4) a step of forming a through hole from the upper surface to the lower surface of the cured laminate and forming a through-hole conductor in the through hole (5) the cured laminate Forming a via hole reaching an internal electronic component from at least one of the upper and lower surfaces of the substrate and forming a via conductor in the via hole. (6) Forming the second and third bonding pads on the upper and lower surfaces of the cured laminate. Step (7) Step of forming an opening in the cured laminate

  According to the wiring board and the manufacturing method thereof of the present invention, an electronic component is embedded in the frame wiring board, at least one of the second and third bonding pads formed on the upper and lower surfaces of the frame wiring board, and the electronic component Are electrically connected by via conductors. In this way, by embedding electronic components in the frame wiring board to secure a space for mounting a large number of electronic components, the wiring is formed with a high density, and a high function and a large number of electronic components are mounted. A small wiring board can be provided.

1A and 1B are a schematic plan view and a cross-sectional view showing an example of an embodiment of a wiring board according to the present invention. 2 (a) and 2 (b) are schematic cross-sectional views showing states for respective steps in the method for manufacturing a wiring board of the present invention. 3A to 3F are schematic cross-sectional views illustrating an example of a method for manufacturing a frame wiring board according to the present invention. 4G to 4J are schematic cross-sectional views showing an example of a method for manufacturing a frame wiring board according to the present invention. 5A to 5D are schematic cross-sectional views showing an example of another method for manufacturing the frame wiring board of the present invention. FIG. 6 is a schematic sectional view showing an example of a conventional wiring board.

  Next, an example of an embodiment of the wiring board of the present invention will be described in detail with reference to FIG.

  Fig.1 (a) is a top view of the wiring board A which concerns on an example of embodiment of this invention, FIG.1 (b) is sectional drawing which passes between P-P shown to Fig.1 (a). The wiring board A includes a base wiring board 10 on which a semiconductor element S is mounted, a frame wiring board 20 in which an electronic component D is embedded, and a cap wiring board 30. The wiring board A has a plurality of product regions X1 and a disposal margin region Y1 integrally formed around the product region X1, and is disposed between the product regions X1 and between the product region X1 and the product region X1. A large number of individual products are manufactured at the same time by cutting between the marginal region Y1.

  The base wiring substrate 10 includes an insulating substrate 1 having a plurality of through-holes 2 penetrating vertically, a wiring conductor layer 3 deposited on the upper and lower surfaces of the insulating substrate 1 and the through-hole 2, and the insulating substrate 1 and the wiring conductor. And a solder resist layer 4 deposited on the layer 3. The inside of the through hole 2 is filled with a hole filling resin.

An element mounting portion 1 a for mounting the semiconductor element S is formed on the upper surface of the base wiring board 10. In these element mounting portions 1 a, a plurality of semiconductor element connection pads 5 for electrical connection with the electrodes of the semiconductor element S are formed by a part of the wiring conductor layer 3. These semiconductor element connection pads 5 are exposed in the openings 4 a provided in the solder resist layer 4. The semiconductor element S and the base wiring board 10 are electrically connected by connecting the electrodes of the semiconductor element S to the semiconductor element connection pads 5 via solder bumps.
A plurality of first bonding pads 6 for electrical connection with the frame wiring board 20 are formed in the frame bonding portion 1 b by a part of the wiring conductor layer 3. These first bonding pads 6 are exposed in the openings 4 b provided in the solder resist layer 4. Part of the semiconductor element connection pad 5 and the first bonding pad 6 are electrically connected to each other.
A plurality of external connection pads 7 for connecting to an external electric circuit board are formed on a lower surface of the base wiring board 10 by a part of the wiring conductor layer 3. These external connection pads 7 are exposed in the openings 4 c provided in the solder resist layer 4. These external connection pads 7 are electrically connected to the semiconductor element connection pads 5 through the through holes 2.

The frame wiring board 20 includes an insulating substrate 11 having a plurality of through holes 12a and electronic components D penetrating vertically, a wiring conductor layer 13 deposited on the surface of the insulating substrate 11 and in the through holes 12a, and an insulating substrate 11 And a solder resist layer 14 deposited on the upper and lower surfaces.
The insulating substrate 11 includes an upper insulating plate 11a, an intermediate insulating plate 11b, and a lower insulating plate 11c. A plurality of through holes 12 a are formed in the insulating substrate 11. A part of the wiring conductor layer 13 is deposited as a through-hole conductor in the through hole 12a, and the base wiring board 10 and the cap wiring board 30 are electrically connected.
In addition, the middle layer insulating plate 11b in the gap between the through holes 12a is formed with a housing hole H that can accommodate the electronic component D, and the electronic component D is accommodated therein. The space other than the electronic component D in the accommodation hole H is filled with resin. The upper and lower insulating plates 11a and 11c are disposed on the upper and lower surfaces of the middle insulating plate 11b. Further, via holes 12b reaching the electronic component D from the surfaces of the upper and lower insulating plates 11a and 11c are formed, and the electronic component is formed by a part of the wiring conductor layer 13 filled as a via conductor in the via hole 12b. second and third junction pads 16a to be described later D, 16b and are electrically connected.
As described above, in the frame wiring board 20, the through holes 12 a that electrically connect the base wiring board 10 and the cap wiring board 30 are formed with a relatively moderate density. Can be secured.
The frame wiring board 20 is formed with an opening 15 having a size surrounding the element mounting portion 1a. A plurality of second bonding pads 16 a are formed on a lower surface of the frame wiring board 20 by a part of the wiring conductor layer 13 at positions corresponding to the first bonding pads 6 of the base wiring board 10. These second bonding pads 16 a are exposed in the openings 14 a provided in the solder resist layer 14. Then, the second bonding pad 16a and the first bonding pad 6 are bonded to each other through solder bumps. Thereby, a part of the wiring conductor layer 3 of the base wiring board 10 and the wiring conductor layer 13 of the frame wiring board 20 are electrically connected.
Further, a plurality of third bonding pads 16 b are formed on a part of the wiring conductor layer 13 on the upper surface of the frame wiring board 20. The third bonding pad 16 b is exposed in the opening 14 b provided in the solder resist layer 14.

  The cap wiring board 30 includes an insulating substrate 21 having a plurality of through holes 22 penetrating vertically, a wiring conductor layer 23 deposited on the upper and lower surfaces of the insulating substrate 21 and the through holes 22, and the insulating substrate 21 and the wiring conductor. And a solder resist layer 24 deposited on the layer 23. The inside of the through hole 22 is filled with a hole filling resin.

On the upper surface of the cap wiring board 30, for example, a plurality of semiconductor element connection pads 25 for electrically connecting to electrodes of another semiconductor element (not shown) are formed by a part of the wiring conductor layer 23. These semiconductor element connection pads 25 are exposed in the openings 24 a provided in the solder resist layer 24. Then, by connecting an electrode of another semiconductor element to the semiconductor element connection pad 25 via a solder bump, the other semiconductor element and the cap wiring board 30 are electrically connected. A plurality of fourth bonding pads 26 are formed on a lower surface of the cap wiring board 30 by a part of the wiring conductor layer 23 at positions corresponding to the third bonding pads 16 b of the frame wiring board 20. These fourth bonding pads 26 are exposed in the openings 24 b provided in the solder resist layer 24. Then, the fourth bonding pad 26 and the third bonding pad 16b are bonded to each other via the solder bump. Thereby, a part of the wiring conductor layer 13 of the frame wiring board 20 and the wiring conductor layer 23 of the cap wiring board 30 are electrically connected.
Further, a sealing resin R is filled in a gap between the base wiring board 10 and the frame wiring board 20 in the frame joint portion 1b. The sealing resin R protects the semiconductor element S by firmly bonding the base wiring board 10 and the frame wiring board 20 and preventing moisture and foreign matter from entering the element mounting portion 1a through the gap. It has a function.

  The insulating substrates 1, 11, and 21 are made of an electrically insulating material in which a glass cloth is impregnated with a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin. Further, the wiring conductor layers 3, 13, and 23 are made of a highly conductive material such as copper foil or copper plating. The solder resist layers 4, 14, and 24 are made of an electrically insulating material obtained by curing a photosensitive thermosetting resin such as an acrylic-modified epoxy resin.

  As described above, in the wiring board A of this example, the electronic component D is embedded in the frame wiring board 20, and the second and third bonding pads 16 a and 16 b formed on the upper and lower surfaces of the frame wiring board 20. And the electronic component D are electrically connected by a via conductor. In this way, by embedding the electronic components D in the frame wiring board 20 to secure a space for mounting a large number of electronic components D, the wiring is formed with a high density and a large number of electronic components D are mounted. A highly functional and small-sized wiring board A can be provided.

  Next, an example of the manufacturing method of the wiring board of this invention is demonstrated in detail based on FIGS. 2 to 4, the same parts as those of the wiring board A described with reference to FIG. 1 are denoted by the same reference numerals, and detailed description thereof is omitted. First, as shown in FIG. 2A, a base wiring board 10, a frame wiring board 20, a cap wiring board 30, and a semiconductor element S are prepared.

  As described above, the base wiring substrate 10 is insulated from the insulating substrate 1 having a plurality of through holes 2 penetrating vertically, the wiring conductor layer 3 deposited in the upper and lower surfaces of the insulating substrate 1 and the through holes 2, And a solder resist layer 4 deposited on the substrate 1 and the wiring conductor layer 3. On the upper surface of the base wiring board 10, an element mounting portion 1a and a frame-shaped frame joint portion 1b surrounding the element mounting portion 1a are formed. A plurality of semiconductor element connection pads 5 are formed on the element mounting portion 1a. A plurality of first bonding pads 6 are formed in the frame bonding portion 1b.

  Such a base wiring board 10 is formed as follows, for example. First, a double-sided copper-clad plate in which a copper foil of about 12 to 18 μm is coated on both sides of an insulating plate formed by impregnating a glass cloth with a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin is prepared. Next, a plurality of through holes 2 having a diameter of about 50 to 300 μm are formed by drilling, laser processing, or blasting. Next, a copper plating layer is deposited on the inner wall of the through hole 2, and the wiring conductor layer 3 having a predetermined pattern is formed on the insulating plate and in the through hole 2 by a known subtractive method. Next, the base wiring board 10 is formed by forming the solder resist layer 4 having the opening 4a exposing the semiconductor element connection pad 5 and the opening 4b exposing the first bonding pad 6. Finally, the semiconductor element S is mounted on the element mounting portion 1a by a known flip chip technique.

As described above, the frame wiring board 20 includes an insulating substrate 11 having a plurality of through holes 12a and electronic components D penetrating vertically, a wiring conductor layer 13 deposited on the surface of the insulating substrate 11 and in the through holes 12a, And a solder resist layer 14 deposited on the upper and lower surfaces of the insulating substrate 11. The insulating substrate 11 includes an upper insulating plate 11a, an intermediate insulating plate 11b, and a lower insulating plate 11c. The middle layer insulating plate 11b is formed with a housing hole H that can accommodate the electronic component D, and the electronic component D is accommodated therein. Further, a resin other than the electronic component D in the accommodation hole H is filled with resin. The upper and lower insulating plates 11a and 11c are disposed on the upper and lower surfaces of the middle insulating plate 11b. Further, via holes 12b reaching the electronic component D from the surfaces of the upper and lower insulating plates 11a and 11c are formed, and the wiring conductor layer 13 filled in the via hole 12b as a via conductor fills the electronic component D and will be described later. second and third junction pads 16a, 16b and are electrically connected. Furthermore, an opening 15 having a size surrounding the element mounting portion 1 a is provided at a position corresponding to the element mounting portion 1 a of the base wiring board 10.
On the lower surface of the frame wiring board 20, a plurality of second bonding pads 16 a are formed at positions corresponding to the first bonding pads 6 in the base wiring board 10. A third bonding pad 16 b is formed on the upper surface of the frame wiring board 20. The solder resist layer 14 has an opening 14a that exposes the second bonding pad 16a and an opening 14b that exposes the third bonding pad 16b.

A schematic diagram of an example of a method for forming such a frame wiring board 20 is shown in FIGS. First, as shown in FIG. 3 (a), a glass cloth is impregnated with a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin, and an accommodation hole H for accommodating an electronic component D is formed . The prepreg P2 is placed on a flat plate having an adhesive surface. Next, as shown in FIG. 3B, for example, an epoxy resin J is injected into the accommodation hole H. Next, as shown in FIG. 3C, the electronic component D is accommodated in the accommodation hole H into which the resin J is injected. Next, as shown in FIG. 3D, after the resin J is cured, the middle layer prepreg P2 in which the electronic component D is accommodated is separated from the flat plate. Next, as shown in FIG. 3E, the lower layer prepreg P3 and the middle layer prepreg P2 are sequentially stacked on the lower layer copper foil C2, and the upper layer prepreg P1 and the upper layer copper foil are laminated on the middle layer prepreg P2. C1 is sequentially stacked to form a laminate. Next, as shown in FIG. 3 (f), the laminated body is heated while being pressed from above and below to form the cured laminated body K by curing the prepregs P1, P2, and P3 for the upper layer, the middle layer, and the lower layer. To do. Next, as shown in FIG. 4G, via holes 12b reaching the electronic component D are formed above and below the cured laminate K by laser processing, and filled with a copper-plated metal. Next, as shown in FIG. 4H, a plurality of through holes 12a having a diameter of about 50 to 300 μm are formed by drilling, laser processing, or blasting, and the opening 15 is formed by router processing, laser processing, or blasting. (Not shown) is formed. Next, as shown in FIG. 4 (i), a copper plating layer is deposited in the through-hole 12a, and a wiring having a predetermined pattern on the surface of the cured laminate K and the through-hole 12a by a known subtractive method. The conductor layer 13 is formed. Finally, as shown in FIG. 4J, solder resist layers 14 may be formed on the upper and lower surfaces.

  As described above, the cap wiring substrate 30 is insulated from the insulating substrate 21 having the plurality of through holes 22 penetrating vertically, the wiring conductor layer 23 deposited in the upper and lower surfaces of the insulating substrate 21 and the through holes 22, and the insulating substrate 21. And a solder resist layer 24 deposited on the substrate 21 and the wiring conductor layer 23. A plurality of semiconductor element connection pads 25 to which another semiconductor element (not shown) is connected are formed on the upper surface of the cap wiring board 30. A plurality of fourth bonding pads 26 are formed on a lower surface of the cap wiring board 30 by a part of the wiring conductor layer 23 at positions corresponding to the third bonding pads 16 b of the frame wiring board 20.

  The cap wiring board 30 is formed as follows, for example. First, a double-sided copper-clad plate in which a copper foil of about 12 to 18 μm is coated on both sides of an insulating plate formed by impregnating a glass cloth with a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin is prepared. Next, a plurality of through holes 22 having a diameter of about 50 to 300 μm are formed by drilling, laser processing, or blasting. Next, a copper plating layer is deposited on the inner wall of the through hole 22, and a wiring conductor layer 23 having a predetermined pattern is formed on the insulating plate and in the through hole 22 by a known subtractive method. Next, the cap wiring board 30 is formed by forming the solder resist layer 24 having the opening 24a exposing the semiconductor element connection pad 25 and the opening 24b exposing the fourth bonding pad 26.

  Next, as shown in FIG. 2B, the base wiring board 10, the frame wiring board 20, and the cap wiring board 30 are joined via solder bumps. These joinings are performed as follows, for example. First, solder for solder bumps is welded to at least one of the first bonding pad 6 or the second bonding pad 16 a and at least one of the third bonding pad 16 b or the fourth bonding pad 26. Next, the frame wiring is formed on the base wiring substrate 10 on which the semiconductor element S is mounted so that the corresponding first bonding pad 6 and the second bonding pad 16a and the third bonding pad 16b and the fourth bonding pad 26 face each other. The substrate 20 is placed, and the cap wiring substrate 30 is placed on the frame wiring substrate 20. Next, the solder is melted by a reflow process, and the corresponding first bonding pad 6, second bonding pad 16a, third bonding pad 16b, and fourth bonding pad 26 are bonded to each other via the solder bump, thereby providing a base wiring. The substrate 10, the frame wiring substrate 20, and the cap wiring substrate 30 are joined.

  Finally, a liquid sealing resin R is filled in the gap between the base wiring board 10 and the frame wiring board 20 in the frame joint portion 1b, and then thermosetting is performed to complete the wiring board A shown in FIG.

  Thus, in the method for manufacturing the wiring board A of the present invention, the electronic component D is embedded in the frame wiring board 20 and the second and third bonding pads 16a formed on the upper and lower surfaces of the frame wiring board 20 are used. , 16b and the electronic component D are electrically connected by via conductors. In this way, by embedding the electronic components D in the frame wiring board 20 to secure a space for mounting a large number of electronic components D, the wiring is formed with a high density and a large number of electronic components D are mounted. A highly functional and small-sized wiring board A can be provided.

In addition, this invention is not limited to an example of the above-mentioned embodiment, A various change is possible if it is a range which does not deviate from the summary of this invention. For example, in the example of the manufacturing method described above, the electronic component D is accommodated after injecting the resin J into the accommodating hole H provided in the prepreg P2 for the middle layer, but the electronic component D may be accommodated after injecting the resin J. Good. In this case, for example, as shown in FIG. 5A, the middle layer prepreg P4 in which the accommodation hole H is formed on the flat plate having the adhesive surface is placed. Next, the electronic component D is accommodated in the accommodation hole H as shown in FIG. Next, as shown in FIG. 5C, the resin J is injected into the gap in the accommodation hole H. Next, as shown in FIG. 5D, after the resin J is cured, the middle layer prepreg P4 is separated from the flat plate. Thereafter, the frame wiring board 20 is formed by performing the same processes as those shown in FIGS. 3E and 3F and FIGS. 4G to 4J.

DESCRIPTION OF SYMBOLS 1a Element mounting part 1b Frame joining part 6 1st joining pad 10 Base wiring board 12a Through hole 12b Via hole 15 Opening part 16a 2nd joining pad 16b 3rd joining pad 20 Frame wiring board 26 4th joining pad 30 Cap wiring board A Wiring Substrate D Electronic component S Semiconductor element

Claims (2)

A flat base wiring board having an element mounting portion on the upper surface and a frame-shaped frame bonding portion surrounding the element mounting portion, and a plurality of first bonding pads formed on the frame bonding portion , and the element mounting portion a semiconductor element mounted on said are joined onto the frame joint, a second junction and having an opening which surrounds the element mounting portion joined via a solder bump on the first bonding pad to the lower surface a pad, via a frame circuit board having a plurality of third bonding pads on the upper surface, the is bonded to the frame wiring substrate close the opening, a solder bump in the third bonding pads on the lower surface And a cap wiring board having a fourth bonding pad bonded to each other, wherein the frame wiring board has an electronic component embedded therein, The second bonding pad and the third bonding pad are electrically connected by a through-hole conductor formed in a through-hole penetrating downward, and the electrons are transmitted from at least one of the upper surface and the lower surface of the frame wiring board. A wiring board, wherein at least one of the second bonding pad and the third bonding pad and the electronic component are electrically connected by a via conductor formed in a via hole reaching the component. 2. The method of manufacturing a wiring board according to claim 1, wherein the frame wiring board is formed by a process including the following processes (1) to (7).
(1) A prepreg for an intermediate layer in which an accommodation hole capable of accommodating the electronic component from the upper surface to the lower surface is formed, a prepreg for a lower layer laminated on the lower surface of the prepreg for the intermediate layer, and the prepreg for the intermediate layer (2) Step of preparing the upper layer prepreg laminated on the upper surface, the lower layer copper foil laminated on the lower surface of the lower layer prepreg, and the upper layer copper foil laminated on the upper surface of the upper layer prepreg After accommodating the electronic component in the hole, the lower layer prepreg and the middle layer prepreg are sequentially stacked on the lower layer copper foil, and the upper layer prepreg and the upper layer copper foil are sequentially stacked on the middle layer prepreg. a step (3) the lower copper foil and the copper foil for the lower layer prepreg and the intermediate layer prepreg and the electronic component and the upper layer prepreg layer overlaying overlap A step of forming a cured laminate by curing the lower layer prepreg, the middle layer prepreg and the upper layer prepreg by pressing the layer body from above and below (4) from the upper surface to the lower surface of the cured laminate Forming a through hole and forming the through hole conductor in the through hole (5) forming the via hole reaching the electronic component inside from at least one of an upper surface and a lower surface of the cured laminated body and the via hole; The step of forming the via conductor in (6) The step of forming the second bonding pad and the third bonding pad on the upper and lower surfaces of the cured laminate (7) The step of forming the opening in the cured laminate

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