JP6096569B2 - Method for manufacturing heterojunction bipolar transistor - Google Patents

Description

The present invention relates to a manufacturing method of a heterojunction bipolar transitional scan data obtained by the base layer from InGaAsSb carbon is a doped p-type.

  There is an increasing demand for high-speed communication and large capacity, and there is a demand for improved performance of high-frequency semiconductor transistors such as heterojunction bipolar transistors (HBTs). Particularly in recent years, in addition to the conventional trend of higher speed, reduction of power consumption at the integrated circuit level and the device level is required.

These transistors use an Fe-doped InP substrate whose resistivity is increased to 10 ⁷ Ω · cm or more, and materials such as InGaAs, InAlAs, AlInGaAsSb, InAlGaP, and InAlGaAsP that are lattice-matched on this substrate, In general, the semiconductor layer is composed of a semiconductor layer manufactured by a technique such as metal organic chemical vapor deposition (MOVPE) or molecular beam epitaxy (MBE).

  In order to reduce the power consumption of an integrated circuit, it is effective to use a material having a narrow band gap (narrow band gap) for the base layer of the HBT. InGaAsSb and InAlGaAsSb are narrow band gap materials having a lattice constant relatively close to that of the InP substrate. These materials have a smaller band gap than InGaAs, which has been widely used as a base layer for HBT. By applying such a narrow band gap material to the base layer of the HBT, the built-in potential between the base and the emitter is reduced, so that the operating voltage of the transistor can be lowered. Therefore, when a functional electric circuit using such an HBT is manufactured, a reduction in power consumption of the entire circuit can be expected.

By the way, in the above-described HBT, a base layer doped with a high concentration of n-type or p-type is generally used in order to improve high-frequency characteristics. For example, in an npn type HBT formed on an InP substrate, it is common to use a material such as InGaAs or GaAsSb doped at a high concentration of 10 ¹⁹ cm ⁻³ or higher for the base layer.

  Therefore, in order to apply InGaAsSb and InAlGaAsSb, which are narrow band gap materials, to HBT as described above, high-concentration p-type doping is required. However, in these quaternary or higher mixed crystal material systems, it is extremely difficult to obtain high hole concentration by performing high-concentration p-type doping. The reason for this will be described below.

In GaAsSb and InGaAs, a widely used p-type dopant is carbon (C). C is also known to exhibit p-type conduction in InGaAsSb and InAlGaAsSb as well. In many cases, a halomethane-based material such as carbon tetrachloride (CCl ₄ ) or carbon tetrabromide (CBr ₄ ) is used as a material for performing C doping.

  However, it is known that the halomethane-based raw material contains an etching reaction simultaneously with crystal growth because the raw material contains a halogen element such as chlorine (Cl) or bromine (Br). Due to this etching effect, the composition of the solid phase taken in as a semiconductor thin film during crystal growth varies as compared with the case where no doping is performed. Such a change in the solid phase composition due to the etching effect can be a factor that reduces the controllability and reproducibility of the solid phase composition of the semiconductor thin film.

  Although the degree of the etching effect varies depending on the elements constituting the solid phase, when In and Ga are compared, In is more susceptible to the etching effect than Ga (see Non-Patent Document 1). Accordingly, when C doping is performed on InGaAsSb with a halomethane-based material, the solid phase In composition is reduced. For this reason, it is not easy to obtain a high success concentration without C doping at a high concentration in a state where the In composition is set to a desired value.

  Further, in many III-V group compound semiconductors, it is known that doping efficiency decreases due to mixed crystallization of materials. Similarly, in InGaAsSb, as the solid-phase In composition is in the middle of InGaAs and GaAsSb, that is, as the solid-phase In composition x approaches 0.2 <x <0.3, the hole concentration decreases significantly. .

Attempts to dope using elements other than C have also been made. For example, it has been reported that an InGaAsSb thin film having a high hole concentration of about 10 ¹⁹ cm ⁻³ is formed by performing beryllium (Be) doping by the MBE method. A method using zinc (Zn) as a dopant is also conceivable.

  However, these materials are all Group II elements, and enter Group III and In sites by doping. For this reason, compared with the case of using C entering the group V site, the doped element is easily diffused in the semiconductor layer, and in particular, the steepness of the heterojunction interface of the semiconductor layer is reduced, and desired transistor characteristics can be obtained. There may not be. In addition, the long-term reliability of the transistor may deteriorate due to the influence of diffusion of these doping elements. Further, Zn remains in the inside of the crystal growth apparatus (film formation chamber) for forming a semiconductor thin film, and may affect the formation of a semiconductor thin film not doped with zinc, for example.

  As described above, when a uniform composition of InGaAsSb or InAlGaAsSb mixed crystal is used as the base layer material, it is difficult to obtain a high solid-phase In composition and a high doping concentration at the same time. It is difficult to reduce the operating voltage of the HBT without impairing other characteristics of the transistor. For this reason, a technique of performing band engineering by introducing a semiconductor superstructure into the layer structure of HBT has been reported. This semiconductor superstructure will be described below.

For example, in the case of forming an HBT on a GaAs substrate, a technique for reducing the operating voltage of the HBT by applying a base layer made of a superlattice of InGaAs and GaAs has been reported. In this case, instead of using p-type GaAs for the base layer, a superlattice of In _0.15 Ga _0.85 As and GaAs is used to reduce the average band gap of the base layer, compared with a normal GaAs base HBT. Thus, a small operating voltage is realized (see Non-Patent Document 2).

The above method can be similarly applied to the HBT on the InP substrate. For example, instead of growing InGaAsSb having a uniform composition, if In _0.53 Ga _0.47 As and GaAs _0.51 Sb _0.49 lattice-matched with InP are grown alternately, their average composition In _0.265 Ga _0.735 As _0.755 Sb _0.245 The semiconductor layer is obtained. In this method, since the band gap of In _0.53 Ga _0.47 As is 0.74 eV and the band gap of GaAs _0.51 Sb _0.49 is 0.78 eV, the average band gap does not change greatly.

However, In _0.53 Ga _0.47 As and GaAs _0.51 Sb _0.49 , on the other hand, have a type II band structure with a negative offset in both the conduction band and the valence band. In this case, the conduction band offset is reported to be 360 meV at low temperatures. For this reason, if the thickness of each layer is set to be sufficiently thin to about 10 nm or less, the average energy values of the conduction band edge and the valence band edge are the average values of each, and therefore effective. The band gap is smaller than when each material is formed of a single layer (see Non-Patent Document 3).

  However, in the case of the structure described above, it is ideal to switch the supply of raw materials when forming the interface of each layer in the stage of growing GaAsSb after growing InGaAs and the stage of growing InGaAs after growing GaAsSb. If not performed, recombination centers and the like are introduced as the interface is formed. When the recombination centers are introduced in this manner, in the HBT, electrons injected from the emitter layer are promoted to recombine in the base layer, and the current gain is greatly reduced. In addition, since two materials with significantly different energy differences at the conduction band edge of the base layer are used, when a superlattice or the like is formed, the influence of fluctuations in the conduction band potential energy on electrons that are minority carriers is large, and high frequency Properties can be impaired and caution is required.

K. Tateno et al., "Carbon Doping and Etching in GaxIn1-xAsyP1-y on GaAs Substrates Using CBr4 by Metalorganic Chemical Vapor Deposition", Journal of Electronic Materials, vol.28, pp.63-68, 1999. R.Driad et al., "InP-based heterojunction bipolar transistors with InGaAs / GaAs strainedlayer-superlattice", APPLIED PHYSICS LETTERS, vol.98,043503, 2011. J. Hu et al., "Type II photoluminescence and conduction band offsets of GaAsSb / InGaAs and GaAsSb / InP heterostructures grown by metalorganic vapor phase epitaxy", APPLIED PHYSICS LETTERS, vol.73, no.19, pp.2899-2801, 1998.

  As described above, first, in a transistor such as an HBT or FET, if the required doping concentration of the layer is insufficient, the resistance increases, and the high-frequency characteristics of the device may be degraded. Particularly in HBT, if the base layer does not have a sufficiently high hole concentration, the sheet resistance of the base layer increases and a high maximum oscillation frequency cannot be obtained.

  However, a mixed crystal material such as InGaAsSb has a problem that it is difficult to perform high-concentration doping because the doping efficiency is significantly reduced. As described above, when C is doped using a halomethane-based material as a doping material, it is difficult to control the solid phase composition of InGaAsSb due to the etching effect. In particular, in Ga and In, since In has a larger etching effect, the In composition is lowered, and it is difficult to obtain a high In composition C-doped InGaAsSb.

  In addition, as described above, a method using a dopant other than C is also conceivable, but the dopant entering the group III site is likely to cause diffusion of elements in the solid phase, resulting in deterioration of interface steepness and long-term reliability of the device. A decline is caused. In the case where Zn is used as a dopant, another problem that the environment for film formation fluctuates due to the remaining Zn in the film formation chamber or the like may occur.

  Thus, with the method of forming a uniform semiconductor layer, it is difficult to lower the operating voltage of the HBT without sacrificing transistor characteristics. For this reason, a method of lowering the operating voltage of the HBT by applying the semiconductor superlattice to the base layer of the HBT is conceivable. However, if the interface formation of each semiconductor layer is not properly performed, the recombination center or the like is used as the base layer. The current gain is significantly reduced. Accordingly, there is a need for a semiconductor superlattice that can achieve the effect of reducing the operating voltage of the HBT and that can be easily formed, and a method for forming the same.

  When applying to the heterojunction bipolar transistor to reduce the operating voltage without sacrificing the high-frequency characteristics, such as a method of pseudo-mixing by modulation of raw material supply, simply increase the effective solid phase In composition Doing so may impair device characteristics. For example, when a superlattice or the like is formed using two materials that have significantly different energy differences at the conduction band edge of the base layer, the influence of fluctuations in the conduction band potential energy on electrons that are minority carriers is large, and high-frequency characteristics are impaired There is a possibility.

  The present invention has been made in order to solve the above-described problems. The base layer made of InGaAsSb doped with C at a high concentration in a state where a desired In composition can be obtained provides a cutoff frequency and a maximum oscillation. The purpose is to reduce the operating voltage of the HBT without degrading characteristics such as frequency and current gain.

  The method of manufacturing a heterojunction bipolar transistor according to the present invention includes a collector forming step of forming an n-type collector layer made of a III-V group compound semiconductor on a substrate, and a first semiconductor layer and a second semiconductor layer made of InGaAsSb. Forming a p-type base structure formed on a collector layer by doping carbon and comprising a stacked structure in which a plurality of layers are stacked in contact with each other, and III- An emitter forming step of forming an n-type emitter layer made of a group V compound semiconductor. In the base forming step, InGaAsSb is formed under a first condition including supplying an In source, a Ga source, an As source, and an Sb source. A first step of depositing on the collector layer to form a first semiconductor layer, and subsequent to the first step, an In source, Ga source, As source And a second step of depositing InGaAsSb on the collector layer to form a second semiconductor layer under a second condition including supplying an Sb source, wherein the second condition is compared to the first condition. Reduce the supply of halomethane-based carbon doping materials.

In the method for manufacturing the heterojunction bipolar transistor, the first and second conditions are, In material, Ga material, As the raw material, and intends row as the same supply amount of Sb raw material. The carbon doping raw material may be carbon tetrachloride or carbon tetrabromide.

Heterojunction bipolar transistor has a collector layer n-type composed of the formed group III-V compound semiconductor on a substrate made of InGaAsSb, the first semiconductor layer and the second semiconductor layer are stacked in contact with each other A p-type base structure formed of a stacked structure and formed on the collector layer; and an n-type emitter layer made of a III-V group compound semiconductor formed on the base structure. The semiconductor layer is doped with carbon to have a lower In composition and a lower Sb composition than the second semiconductor layer, and the second semiconductor layer is in a state of less carbon doping than the first semiconductor layer.

  In the heterojunction bipolar transistor, in the first semiconductor layer and the second semiconductor layer, the relationship between the composition x of In and the composition y of Sb is y ≦ 0.49 × (1−x / 0.53), The first semiconductor layer and the second semiconductor layer may have a thickness of 10 nm or less.

  As described above, according to the present invention, characteristics such as cutoff frequency, maximum oscillation frequency, and current gain are reduced by the base layer made of InGaAsSb doped with C at a high concentration in a state where a desired In composition is obtained. An excellent effect is obtained in that the operating voltage of the HBT can be lowered without causing it to occur.

FIG. 1A is a cross-sectional view schematically showing a state in an intermediate process for explaining a method of manufacturing a heterojunction bipolar transistor in an embodiment of the present invention. FIG. 1B is a cross-sectional view schematically showing a state in an intermediate process for explaining the method of manufacturing the heterojunction bipolar transistor in the embodiment of the present invention. FIG. 1C is a cross-sectional view schematically showing a state in an intermediate process for explaining the method of manufacturing the heterojunction bipolar transistor in the embodiment of the present invention. FIG. 1D is a cross-sectional view schematically showing a state in an intermediate process for explaining the method of manufacturing the heterojunction bipolar transistor in the embodiment of the present invention. FIG. 1E is a cross-sectional view schematically showing a state in an intermediate process for explaining the method of manufacturing the heterojunction bipolar transistor in the embodiment of the present invention. FIG. 1F is a cross-sectional view schematically showing a state in an intermediate process for explaining the method of manufacturing the heterojunction bipolar transistor in the embodiment of the present invention. FIG. 1G is a cross-sectional view schematically showing a state in an intermediate step for explaining the method of manufacturing the heterojunction bipolar transistor in the embodiment of the present invention. FIG. 1H is a cross-sectional view schematically showing a state in an intermediate process for explaining the method of manufacturing the heterojunction bipolar transistor in the embodiment of the present invention. FIG. 2 is an explanatory diagram for explaining the solid phase composition in InGaAsSb grown using a halomethane-based material. FIG. 3 is a band diagram showing the band relationship of InP, InGaAs, GaAsSb, and the first semiconductor layer 151 and the second semiconductor layer 152 in a thermal equilibrium state. FIG. 4 is a band diagram for explaining the band structure in the stacking direction of the HBT in the embodiment of the present invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. 1A to 1H are cross-sectional views schematically showing a state in an intermediate process for explaining a method of manufacturing a heterojunction bipolar transistor in an embodiment of the present invention.

  First, as shown in FIG. 1A, for example, a substrate 101 made of InP, which has been made high resistance by doping iron, is prepared, a buffer layer 102 made of InP, and an n-type impurity at a high concentration are formed on the substrate 101. A sub-collector layer 103 made of InP into which is introduced is formed. Next, as shown in FIG. 1B, an InP layer 104 a made of undoped InP is formed on the subcollector layer 103. The InP layer 104a becomes a collector. These may be formed, for example, by epitaxial growth by a known metal organic vapor phase growth method. The same applies to each semiconductor layer described later.

  Next, as shown in FIGS. 1C and 1D, a stacked structure 105a in which a plurality of first semiconductor layers 151 and second semiconductor layers 152 made of InGaAsSb are in contact with each other is formed on the collector layer 104a. The laminated structure 105a serves as a base. First, the first semiconductor layer 151 is formed by depositing InGaAsSb on the InP layer 104a under the first condition including supplying the In source, Ga source, As source, and Sb source. Next, InGaAsSb is deposited on the InP layer 104a (first semiconductor layer 151) under the second condition including supplying the In source, Ga source, As source, and Sb source to form the second semiconductor layer 152. . By repeating these a desired number of times, the laminated structure 105a can be formed.

  Here, in the formation of the multilayer structure 105a, a p-type in the base multilayer structure 105a is realized by using a halomethane-based carbon doping material. For example, in metal organic vapor phase epitaxy, p-type InGaAsSb can be formed by supplying a halomethane-based carbon doping material in addition to an In material, a Ga material, an As material, and an Sb material. Further, the second condition described above reduces the supply amount of the halomethane-based carbon doping raw material as compared with the first condition. For example, under the second condition, the supply amount of the carbon doping raw material may be zero. Note that in the stacked structure 105a, the first semiconductor layers 151 and the second semiconductor layers 152 may be stacked alternately, and the stacking order may be switched.

Further, the In raw material is trimethylindium (TMIn), the Ga raw material is triethylgallium (TEGa), the As raw material is arsine (AsH ₃ ), and the Sb raw material is trimethylantimony (TMSb). ) As a halomethane-based carbon doping raw material, there is CBr ₄ .

Next, as shown in FIG. 1E, an InP layer 106a made of undoped InP is formed on the stacked structure 105a. As shown in FIG. 1F, n-type impurities are highly concentrated on the InP layer 106a. An n ⁺ -InGaAs layer 107a made of introduced InGaAs is formed. Further, a metal is deposited on the n ⁺ -InGaAs layer 107a by, for example, a sputtering method or a vacuum evaporation method to form an electrode metal layer 108a. The InP layer 106a serves as an emitter, the n ⁺ -InGaAs layer 107a serves as a contact cap for connecting an emitter electrode, and the electrode metal layer 108a serves as an emitter electrode.

Next, an emitter mesa is formed by patterning the electrode metal layer 108a, the n ⁺ -InGaAs layer 107a, and the InP layer 106a into a mesa shape by a known lithography technique and etching technique. Next, the stacked structure 105a and the InP layer 104a are patterned into a mesa shape wider than the emitter mesa in plan view to form a collector mesa. As a result, as shown in FIG. 1G, the collector layer 104 and the base structure 105 are formed on the sub-collector layer 103, and the emitter layer 106 and the contact cap layer 107 are formed on the base structure 105. Thus, a state in which the emitter electrode 108 is formed on the contact cap layer 107 is obtained.

  Next, as shown in FIG. 1H, a base electrode 109 connected to the base structure 105 around the emitter mesa is formed, and a collector electrode 110 connected to the sub-collector layer 103 around the collector mesa is formed. As described above, a heterojunction bipolar transistor is obtained.

  The heterojunction bipolar transistor described above is formed of an n-type collector layer 104 made of a III-V group compound semiconductor formed on a substrate 101 and InGaAsSb, and the first semiconductor layer 151 and the second semiconductor layer 152 are in contact with each other. And a p-type base structure 105 formed on the collector layer 104, and an n-type compound composed of a group III-V compound semiconductor formed on the base structure 105. And an emitter layer 106.

  Here, as described above, a halomethane-based carbon doping material is used as a p-type, and in the formation (growth) of the first semiconductor layer 151, a halomethane-based carbon doping material is used as compared with the second semiconductor layer 152. The supply amount is increased. As a result, the first semiconductor layer 151 is doped with carbon to have a lower In composition and a lower Sb composition than the second semiconductor layer 152, and the second semiconductor layer 152 has a carbon doping amount higher than that of the first semiconductor layer 151. It will be in a state where there are few.

Next, the formation of the first semiconductor layer and the second semiconductor layer described above will be described in more detail. First, changes in the In composition in the solid phase due to carbon doping with a halomethane-based material in InGaAsSb will be described. First, the results of an experiment in which InGaAsSb is simply C-doped with a halomethane-based material will be described. In this experiment, crystal growth was performed by a low pressure MOCVD method, and TEGa, TMIn, AsH ₃ , and TMSb were used as raw materials. CBr ₄ was used as a doping material. The feed molar ratio of the raw materials was set under the condition that the supply molar flow rate of all group V elements was larger than the supply molar flow rate of all group III elements.

  As a result of the above-described experiment, when the doping raw material was not supplied, the In composition in the solid phase tended to increase in proportion to the increase in the group III raw material supply ratio. Such a tendency is generally obtained in the crystal growth of a group III-V semiconductor crystal. On the other hand, when the doping raw material was supplied, the In composition in the solid phase was not proportional to the Group III raw material supply ratio, and there was a region where In was hardly taken into the solid phase. In particular, in the region where the Group III raw material supply ratio is small, the solid phase In composition is smaller than 0.1, and it has been found that a thin film may be formed without containing In.

This is because Br generated in the decomposition process of CBr ₄ as a doping material has an etching effect on InGaAsSb, and the degree of etching is larger for In than for Ga. When a halomethane-based carbon doping material such as CBr ₄ is introduced, an etching effect is exhibited, and the amount of In desorbed is larger than Ga during this etching process. As a result, the In composition of the solid phase becomes smaller than that when no doping is performed.

  Such a phenomenon is essentially a phenomenon that can occur if the material used for C doping has an etching effect on the semiconductor layer to be formed. For example, many halomethane-based materials can be used as a C-doping material, and the same etching effect can occur.

Next, the result of investigating the change in the solid phase In composition of InGaAsSb with respect to the change in the supply amount of the halomethane-based carbon doping material will be described. The change in the solid phase In composition of InGaAsSb with respect to the supply ratio of the group III raw material under two conditions where the supply amount of CBr ₄ was changed was investigated. Under one condition, the supply amount of the doping material was increased by a factor of 1.5. It was found that when the doping raw material supply amount was increased, a state in which almost no In was taken into the solid phase occurred in a wide group III raw material ratio region.

Next, the result of investigating the relationship between the hole concentration and the solid-phase In composition when CBr ₄ is simply supplied and InGaAsSb is grown will be described. When the doping raw material supply amount was constant, the hole concentration significantly decreased with the increase in the solid phase In composition. Further, even if the supply amount of the doping raw material at the time of forming the semiconductor thin film was increased 1.5 times, the hole concentration could not be significantly increased. On the other hand, under the condition where the solid phase In composition was small, the hole concentration was maintained at a relatively high value comparable to that of GaAsSb not containing In grown under the same conditions.

  As described above, in addition to the In raw material, Ga raw material, As raw material, and Sb raw material, when supplying a halomethane-based C doping raw material to grow InGaAsSb crystals, the supply amount of the C doping raw material is increased. As a result, it has been found that there are cases where the In composition in the growing film cannot be brought into a desired state. In other words, high hole concentration and a desired In composition cannot be obtained simultaneously by crystal growth in which a C doping raw material is simply supplied.

  Next, raw material supply capable of simultaneously obtaining a high hole concentration and a desired In composition in InGaAsSb will be described. First, the supply of each raw material will be described. The raw materials to be supplied are Ga raw material, In raw material, As raw material, Sb raw material, and doping raw material.

  First, at the first time, the supply of Ga source, In source, As source, Sb source, and doping source is started, and film formation on the semiconductor substrate is started. Here, the supply ratio of the Ga raw material and the In raw material, which are Group III element raw materials, is selected within a range in which In is hardly taken in while the doping raw material is supplied. Next, at the second time, the supply of the doping material is stopped, and this state is continued until the third time. During the period from the first time to the third time, the supply amounts of Ga raw material, In raw material, As raw material, and Sb raw material other than the doping raw material are not changed.

  In the period from the first time to the third time, since the doping material is supplied from the first time to the second time, almost all In is taken into the growing layer (solid phase). However, on the other hand, a high hole concentration is obtained by doping C at a high concentration. Next, since the doping raw material is not supplied from the second time to the third time, an InGaAsSb layer is obtained with an In composition in a state substantially proportional to the raw material group III supply ratio, while carbon is almost undoped. It becomes the state of. By doing so, the first semiconductor layer having a low In composition is formed between the first time and the second time by doping C with a high concentration, and the second semiconductor layer having a desired In composition without doping is formed in the first time. It is formed between the second time and the third time. Such an interval from the first time to the third time is set as one cycle, and similarly, the stop and start of the doping material supply are repeated.

  By forming the film according to the above sequence, as shown in the cross-sectional view of FIG. 1D, a stacked structure 105a made of p-type InGaAsSb doped with C to obtain a high hole concentration is formed on the InP layer 104a. Formed on top. On the InP layer 104a, a first semiconductor layer 151 having a low In composition, doped with C at a high concentration, and a second semiconductor layer 152 having a desired In composition, for example, non-doped are laminated alternately. 105a is configured.

  By the way, in the description of the sequence for forming the stacked structure 105a described above, the supply of the doping material is started at the same time as the start of film formation, and the supply of the doping material is stopped in the middle. Sometimes, the supply of the doping material may be started in the middle of one cycle without supplying the doping material. For example, the supply of the doping material may not be started at the first time, the supply of the doping material may be started at the second time, and the supply of the doping material may be stopped at the third time. Even in this way, as described above, the laminated structure 105a made of InGaAsSb having a desired In composition and a high hole concentration can be obtained.

  In the above description, the supply of the doping material is stopped and each period is set to the same time. However, the present invention is not limited to this. For example, the supply amount of the doping material may be reduced (changed) from the second time to the third time instead of stopping the supply of the doping material. Moreover, you may make it change the space | interval between each time.

  Next, a solid phase composition in InGaAsSb grown using the above-described halomethane-based material will be described with reference to FIG. In FIG. 2, the horizontal axis indicates the solid phase In composition of InGaAsSb, and the vertical axis indicates the solid phase Sb composition. A dotted line 201 in FIG. 2 indicates the composition of InGaAsSb lattice-matched with InP.

  As described above, in InGaAsSb, the solid phase In composition and the solid phase Sb composition decrease due to the supply of the halomethane-based material. When the solid phase In composition and the solid phase Sb composition of the second semiconductor layer 152 are indicated by a point 204 in the drawing, the solid phase In composition and the solid phase Sb composition of the first semiconductor layer 151 are both from the second semiconductor layer 152. The position is represented by a small point 203. Since the variation of the solid phase composition with respect to the supply amount of the halomethane-based raw material is almost linear, the position of the point 203 moves on the arrow line in the figure as the supply amount of the halomethane-based raw material changes.

  This inclination of the line of sight and the behavior with respect to changes in the supply amount of the halomethane-based raw material depend on the actual growth conditions and the growing system. In any case, since both the solid phase In composition and the solid phase Sb composition decrease due to the supply of the halomethane-based raw material, when the solid phase composition of the second semiconductor layer 152 is point 204, the solid phase of the first semiconductor layer 151 The composition (point 203) is present in the gray area 204 in the figure.

  The solid phase In composition of the stacked structure 105a formed by the above-described formation method is determined by the ratio of the layer thickness of the first semiconductor layer 151, the layer thickness of the second semiconductor layer 152, and the solid phase In compositions x1 and x2. For example, if the layer thicknesses of the first semiconductor layer 151 and the second semiconductor layer 152 are set equal, the solid phase In composition of the stacked structure 105a is simply expressed as x = (x1 + x2) / 2.

  Similarly, the solid phase Sb composition of the stacked structure 105a to be formed is determined by the ratio between the thicknesses of the first semiconductor layer 151 and the second semiconductor layer 152 and the solid phase Sb compositions y1 and y2. If the thicknesses of the first semiconductor layer 151 and the second semiconductor layer 152 are equal, y = (y1 + y2) / 2 is simply expressed.

  As described above, the control of the solid phase In composition can be easily realized by simply controlling the supply of the halomethane raw material, and a high hole concentration can be obtained. In general, such a method of alternately stacking two kinds of layers introduces crystal defects or the like if the supply of raw materials is not properly switched when switching from one layer to the other. As a result, the characteristics are significantly deteriorated. In contrast, in the production of the stacked structure 105a described above, the supply of the first semiconductor layer 151 and the second semiconductor layer 152 is simply made by changing the supply amount of the halomethane-based material and keeping the other materials constant. It can be easily obtained by carrying out the method.

  Next, the effect of HBT in the first embodiment will be described. FIG. 3 is a band diagram showing the band relationship of InP, InGaAs, GaAsSb, and the first semiconductor layer 151 and the second semiconductor layer 152 in a thermal equilibrium state. Note that InGaAs and GaAsSb have a composition lattice-matched to InP, the solid phase In composition of InGaAs is 0.53, and the solid phase Sb composition of GaAsSb is 0.49.

When the above-described InGaAs layers and GaAsSb layers are alternately stacked at equal thicknesses, the finally formed stacked structure is effectively In _0.265 Ga _0.735 As _0.755 which is the average composition of each layer. Sb _0.245 . Generally, two such materials are used when an attempt is made to reduce the average band gap by forming a superlattice layer.

  The valence band edge energy of the semiconductor layer (laminated structure) is greatly affected by the composition of the solid-state group V material. In this system, the higher the Sb composition, the higher the valence band edge energy. On the other hand, the band gap decreases as the In composition and the Sb composition increase. InGaAs lattice-matched to InP described above is a material having an energy difference between InP and the positive conduction band edge, and the conduction band energy difference is about 180 meV at a low temperature. On the other hand, GaAsSb lattice-matched to InP is a material having an energy difference between InP and the negative conduction band edge, and the conduction band energy difference is about −180 meV at low temperatures.

  Therefore, the energy difference between the conduction band edges of the two materials of InGaAs and GaAsSb is the sum of the two materials, and is approximately 360 meV. This value is slightly reduced at room temperature, but there is still a conduction band edge energy difference of several hundred meV. On the other hand, the band gap energy at room temperature is 0.74 eV and 0.78 eV, respectively. For this reason, the positional relationship between the conduction band and the valence band shown in FIG. 3 is obtained.

  In contrast to the above-described configuration, the InGaAsSb solid-phase In composition x1 and solid-phase Sb composition y1 in the first semiconductor layer 151 and the InGaAsSb solid-phase In composition x2 and solid-phase Sb composition y2 in the second semiconductor layer 152 are described above. As described above, there is a relationship of x1 <x2 and y1 <y2. For example, when the solid phase In composition of the first semiconductor layer 151 is set to about 0.1 and the solid phase In composition of the second semiconductor layer 152 is set to about 0.4 as the solid phase composition, the stacked structure 105a to be formed is formed. The average solid phase In composition is about 0.25, which is the same as that obtained when InGaAs and GaAsSb lattice-matched to InP are used.

  However, unlike the case of using InGaAs and GaAsSb lattice-matched to InP, the stacked structure 105a has a first semiconductor layer 151 that has both a solid phase In composition and a solid phase Sb composition as compared to the second semiconductor layer 152. Due to the small band gap, the second semiconductor layer 152 has a smaller band gap. However, since the first semiconductor layer 151 has a smaller solid phase Sb composition, the energy of the valence band edge is higher in the second semiconductor layer 152.

  Therefore, in the laminated structure 105a, the positional relationship between the conduction band and the valence band has a conduction band between two layers as compared to the case where InGaAs and GaAsSb lattice-matched to InP are used, as shown in FIG. The energy difference becomes smaller.

  Next, the band structure of the HBT in the embodiment will be described with reference to FIG. FIG. 4B shows a band structure in the HBT in the case where the base structure is a laminated structure using InGaAs and GaAsSb lattice-matched to InP described with reference to FIG. 4A shows a band structure in the HBT of the embodiment.

  For the reason described with reference to FIG. 3, when a laminated structure in which InGaAs and GaAsSb that are lattice-matched to InP are alternately laminated is used as a base, as shown in FIG. The band diagram shows a very large discontinuity in the valence band. On the other hand, the band structure of the HBT based on the stacked structure 105a in which the first semiconductor layer 151 and the second semiconductor layer 152 are alternately stacked in the embodiment has a valence band as shown in FIG. Although the discontinuity at the edge is large, the discontinuity at the conduction band edge is smaller than the HBT in the state shown in FIG. 4B because the band gap of the second semiconductor layer 152 is small.

  As shown in FIG. 4B, when the conduction band discontinuity in the base is large, electrons traveling through the base are strongly subjected to a large discontinuous potential change at the conduction band edge. The operation speed decreases. On the other hand, the HBT in the embodiment has the band structure shown in FIG. 4A, so that the discontinuity of the conduction band edge is small, and therefore the potential change felt by electrons traveling through the base is also small. It's small. For this reason, according to the embodiment, the HBT can be operated at a low voltage without reducing the operation speed of the HBT.

  Next, other conditions in the first semiconductor layer 151 and the second semiconductor layer 152 will be described. For example, the solid phase In composition x1 and the solid phase Sb composition y1 of the first semiconductor layer 151 are in the region of “y1 ≦ 0.49 × (1−x1 / 0.53)”. Further, the solid phase In composition x2 and the solid phase Sb composition y2 of the second semiconductor layer 152 are in a region of “y2 ≧ 0.49 × (1−x2 / 0.53)”. Furthermore, the layer thickness of the first semiconductor layer 151 and the second semiconductor layer 152 is 10 nm or less.

  In the above-described embodiment, the relationship between the solid phase In composition and the solid phase Sb composition of the first semiconductor layer 151 and the second semiconductor layer 152 constituting the stacked structure 105a that forms the base structure 105 constituting the HBT is expressed by x1 <x2. And y1 <y2. Further, substantially each layer constituting the HBT in the embodiment is grown using an InP substrate.

  Here, according to FIG. 2, the solid phase In composition and the solid phase Sb composition of InGaAsSb lattice-matched to InP decrease from GaAsSb as the solid phase In composition increases. Therefore, even if one of the first semiconductor layer 151 and the second semiconductor layer 152 is set to a composition that matches InP lattice, the other semiconductor layer cannot be set to a composition that matches lattice. If the layer thickness of the semiconductor layer not lattice-matched to InP exceeds the critical thickness, as is well known, crystal defects are introduced along with strain relaxation, and the recombination center density increases, Desired characteristics may not be obtained. In HBT, the recombination current in the base increases, so the current gain may decrease.

  On the other hand, as described above, the solid phase In composition x1 and the solid phase Sb composition y1 of the first semiconductor layer 151 are in the region of “y1 ≦ 0.49 × (1−x1 / 0.53)”. 2 The solid phase In composition x2 and the solid phase Sb composition y2 of the semiconductor layer 152 are in a region of “y2 ≧ 0.49 × (1−x2 / 0.53)”, so that the first semiconductor layer 151 is pulled. Due to the strain, the second semiconductor layer 152 is subjected to a compressive strain. In this way, by setting the solid phase composition so that the compressive strain and tensile strain alternate so as to compensate each other's strain, the problem of exceeding the critical film thickness in the lattice mismatch state is avoided. can do.

  Furthermore, by setting the thicknesses of the first semiconductor layer 151 and the second semiconductor layer 152 to 10 nm or less and not exceeding the critical film thickness in the solid phase In composition and the solid phase Sb composition of each layer, Can lower the operating voltage without reducing the current gain.

  Next, the characteristics of the actually manufactured HBT will be described. In order to demonstrate the effect of the present invention, an HBT including an n-type subcollector, an undoped InP collector, a p-type base, an undoped InP emitter layer, and an n-type cap layer was fabricated. The p-type base has a stacked structure in which first semiconductor layers and second semiconductor layers are alternately stacked. Further, in order to ensure the symmetry of the device, the device is manufactured starting from the second semiconductor layer from the collector side, and the second semiconductor layer and the first semiconductor layer are grown alternately by five layers, and finally the second semiconductor layer is finally formed. Growing layer.

The layer thickness of the first semiconductor layer and the second semiconductor layer was 2 nm. The doping concentration of the first semiconductor layer was 10 ¹⁹ cm ⁻³ . The solid phase In composition x2 of the second semiconductor layer is approximately 0.3, and the solid phase In composition x1 of the first semiconductor layer is approximately zero. The solid phase Sb composition y2 of the second semiconductor layer was set to approximately 0.4, and the solid phase Sb composition y1 of the first semiconductor layer was set to a value smaller than 0.4.

  In the HBT according to the present invention having the above-described configuration, the operating voltage, that is, the collector current rises earlier than the conventional HBT having a base layer of GaAsSb. Thus, it was confirmed that the HBT of the present invention operates at a lower voltage.

  As described above, according to the present invention, the base is made of InGaAsSb, and is formed on the collector layer, which is formed of a stacked structure in which a plurality of first semiconductor layers and second semiconductor layers are stacked in contact with each other. The first semiconductor layer is doped with carbon to have a lower In composition and a lower Sb composition than the second semiconductor layer, and the second semiconductor layer is more carbon than the first semiconductor layer. The amount of doping is made small. As a result, the base layer made of InGaAsSb doped with C at a high concentration in a state where a desired In composition can be obtained lowers the operating voltage of the HBT without degrading characteristics such as cutoff frequency, maximum oscillation frequency, and current gain. be able to.

The present invention is not limited to the embodiment described above, and many modifications and combinations can be implemented by those having ordinary knowledge in the art within the technical idea of the present invention. It is obvious. For example, in the above description, the case where CBr ₄ is mainly used as a doping material has been described. However, the present invention is not limited to this. The etching effect on the mixed crystal material containing In, Ga, As, and Sb is attributed to the halogen-based element, and the same is true when other halomethane raw materials such as CCl ₄ are used.

  Further, the layer thickness and the number of repetitions of the first semiconductor layer and the second semiconductor layer are not limited to the above-described embodiments. What is necessary is just to set and use appropriately the layer thickness and repeating number which can draw out the transport characteristic of the minority carrier in a base structure to the maximum. Further, although the supply amount of the doping material is sharply changed between the growth of the first semiconductor layer and the growth of the second semiconductor layer, the present invention is not limited to this. For example, in the transition from the growth of the first semiconductor layer to the growth of the second semiconductor layer, the supply amount of the doping material may be gradually decreased, or the supply amount of the doping material may be gradually increased. Good. Further, in the repetition of the growth of the first semiconductor layer and the growth of the second semiconductor layer, the supply amount of the doping material may be changed in a sine wave with respect to the change of time.

DESCRIPTION OF SYMBOLS 101 ... Substrate, 102 ... Buffer layer, 103 ... Subcollector layer, 104 ... Collector layer, 104a ... InP layer, 105 ... Base structure, 105a ... Multilayer structure, 106 ... Emitter layer, 106a ... InP layer, 107 ... Contact cap Layer 107a... N ⁺ -InGaAs layer 108 emitter electrode 108a metal layer 109 base electrode 110 collector electrode 151 first semiconductor layer 152 second semiconductor layer

Claims (2)

A collector forming step of forming an n-type collector layer made of a III-V group compound semiconductor on the substrate;
A p-type base structure is formed on the collector layer by being composed of a stacked structure in which a plurality of first semiconductor layers and second semiconductor layers made of InGaAsSb are in contact with each other and doped with carbon. A base forming process;
Forming an n-type emitter layer made of a group III-V compound semiconductor on the base structure, and
In the base forming step,
A first step of forming the first semiconductor layer by depositing InGaAsSb on the collector layer under a first condition including supplying an In source, a Ga source, an As source, and an Sb source;
Subsequent to the first step, the second semiconductor layer is formed by depositing InGaAsSb on the collector layer under a second condition including supplying an In source, a Ga source, an As source, and an Sb source. Including at least two steps,
In the first condition and the second condition, the supply amounts of the In raw material, the Ga raw material, the As raw material, and the Sb raw material are the same,
The second condition is a method of manufacturing a heterojunction bipolar transistor, wherein the supply amount of a halomethane-based carbon doping material is reduced as compared with the first condition. The method of manufacturing a heterojunction bipolar transistor according to claim 1 Symbol placement,
The method of manufacturing a heterojunction bipolar transistor, wherein the carbon doping material is carbon tetrachloride or carbon tetrabromide.