JP6137865B2 - Transmitting apparatus and symbol mapping method - Google Patents

Description

  The present invention relates to a transmission device and a reception device to which differential space-time coding is applied.

  In wireless communication, transmission diversity is used as a technique for improving performance against fading that occurs in a transmission path. As one of transmission diversity, there is a system in which a transmission sequence is space-time coded (STBC), a plurality of orthogonal sequences are generated, and each is transmitted from different antennas. Furthermore, differential space-time coding (DSTBC: Differential Space-Time Block Coding) combining differential coding that does not require transmission path estimation and STBC in the receiving apparatus has been studied (for example, Non-Patent Document 1). ). This document discloses a transmission method and a reception method that perform differential space-time coding for every two symbols subjected to phase modulation.

V. Tarokh, H. Jafarkhani, “A Differential Detection Scheme for Transmit Diversity”, IEEE Journal on Selected Areas in Comm., Vol. 18, no. 7, Jul. 2000.

  In the transmission processing to which the conventional differential space-time coding is applied, two symbols to be differential space-time coded are independently phase-modulated and generated and transmitted. Also in the reception process, the decoded two symbols are determined independently of each other.

  The present invention has been made in view of the above, and by setting a phase difference and an amplitude difference between two symbols to be differential space-time coded, and assigning information to the phase difference and the amplitude difference, the present invention An object is to obtain a transmission device and a reception device that increase the number of bits to be transmitted and realize a high transmission rate.

  In addition, by adjusting the amplitude and phase of the phase-modulated symbol, the distance between signal points can be increased, and further, information bits allocated in units of two symbols differentially encoded in the reception process. It is an object of the present invention to obtain a transmission device, a reception device, and a symbol mapping method that improve reception performance.

  In order to solve the above-described problems and achieve the object, the present invention provides a transmission apparatus that encodes a transmission sequence using a DSTBC (Differential Space-Time Block Coding) scheme and transmits the transmission sequence with a predetermined bit. A bit dividing unit that divides the signal into three bit sequences, a phase modulating unit that generates a phase modulation symbol by phase-modulating each of two bit sequences out of the bit sequences output from the bit dividing unit, and the phase modulating unit The phase difference information modulation symbol is generated by rotating the phase of the two phase modulation symbols generated by the phase modulation means by an arbitrary phase based on the value of one bit string not subjected to phase modulation. DST for DSTBC encoding phase difference information modulation means and two phase difference information modulation symbols output from the phase difference information modulation means Characterized in that it comprises a C coding means.

  According to the present invention, it is possible to increase the number of bits of a bit string transmitted with two symbols as compared with the conventional case, and to achieve a high transmission rate.

FIG. 1 is a diagram illustrating a configuration example of a transmission apparatus according to the first embodiment. FIG. 2 is a diagram illustrating an example of a bit division method according to the first embodiment. FIG. 3 is a diagram illustrating an example of a phase modulation operation by the phase modulation unit. FIG. 4 is a diagram illustrating an example of a correspondence relationship between input bits and phase offsets. Figure 5 is a diagram illustrating a constellation plot of phase difference information modulation symbols y _a and y _b of the first embodiment in the IQ plane. FIG. 6 is a diagram illustrating a configuration example of the receiving apparatus according to the first embodiment. FIG. 7 is a diagram illustrating a configuration example of the transmission apparatus according to the second embodiment. FIG. 8 is a diagram illustrating an example of a bit division method according to the second embodiment. FIG. 9 is a diagram illustrating an example of a correspondence relationship between input bits and amplitude coefficients. FIG. 10 is a diagram illustrating an example of a fixed phase offset. FIG. 11 is a diagram showing a constellation in which the amplitude information modulation symbols z _a and z _b of the second embodiment are plotted on the IQ plane. FIG. 12 is a diagram showing a constellation in which all signal points shown in FIG. 11 are plotted on one IQ plane. FIG. 13 is a diagram illustrating a configuration example of a receiving apparatus according to the second embodiment. FIG. 14 is a diagram illustrating a configuration example of a transmission apparatus according to the third embodiment. FIG. 15 is a diagram illustrating an example of a bit division method according to the third embodiment. FIG. 16 is a diagram illustrating an example of a correspondence relationship between input bits and phase offsets. FIG. 17 is a diagram illustrating an example of a correspondence relationship between input bits and amplitude coefficients. FIG. 18 is a diagram illustrating an example of a fixed phase offset. FIG. 19A is a diagram illustrating a constellation in which the amplitude information modulation symbols z _a and z _{b according} to the third embodiment are plotted on the IQ plane. FIG. 19-2 is a diagram showing a constellation in which the amplitude information modulation symbols z _a and z _b of the third embodiment are plotted on the IQ plane. FIG. 19-3 is a diagram showing a constellation in which the amplitude information modulation symbols z _a and z _b of the third embodiment are plotted on the IQ plane. FIG. 19-4 is a diagram showing a constellation in which the amplitude information modulation symbols z _a and z _b of the third embodiment are plotted on the IQ plane. FIG. 20 is a diagram illustrating a configuration example of a receiving apparatus according to the third embodiment. FIG. 21 is a diagram illustrating a configuration example of a transmission apparatus according to the fourth embodiment. FIG. 22 is a diagram illustrating an example of a bit dividing method by the bit dividing unit according to the fourth embodiment. FIG. 23 is a diagram illustrating an example of an amplitude coefficient used in amplitude adjustment by the amplitude information modulation unit according to the fourth embodiment. FIG. 24 is a diagram showing a constellation in which the amplitude information modulation symbols z _a and z _b of the fourth embodiment are plotted on the IQ plane. FIG. 25 is a diagram illustrating a configuration example of a receiving apparatus according to the fourth embodiment. FIG. 26 is a diagram illustrating a configuration example of a transmission apparatus according to the fifth embodiment. FIG. 27 is a diagram illustrating an example of a bit dividing method by the bit dividing unit according to the fifth embodiment. FIG. 28 is a diagram illustrating an example of amplitude coefficients used in amplitude adjustment by the amplitude information modulation unit according to the fifth embodiment. FIG. 29 is a diagram showing a constellation in which amplitude information modulation symbols z _a and z _{b according} to the fifth embodiment are plotted on the IQ plane. FIG. 30 is a diagram illustrating a configuration example of a receiving device according to the fifth embodiment.

  Hereinafter, embodiments of a transmission device, a reception device, and a symbol mapping method according to the present invention will be described in detail with reference to the drawings. Note that the present invention is not limited to the embodiments.

Embodiment 1 FIG.
(Transmitter)
First, the transmission apparatus will be described. FIG. 1 is a diagram illustrating a configuration example of a transmission apparatus according to a first embodiment of the present invention. The transmission apparatus according to the present embodiment divides an input transmission bit sequence into three and outputs it, and one of the bit sequences divided into three by the bit division unit 11 is phase-modulated. The phase modulation units 12a and 12b that generate the phase modulation symbols and the phase modulation symbols input from the phase modulation units 12a and 12b are applied with different phase rotations according to the bit sequences input from the bit division unit 11. A phase difference information modulation unit 13 that generates a phase difference information modulation symbol, and a DSTBC code that performs DSTBC coding on the phase difference information modulation symbol from the phase difference information modulation unit 13 and generates a transmission symbol for each transmission antenna And a transmission radio unit 15a that performs processing for transmitting the transmission symbol from the antenna and outputs the transmission symbol as a transmission radio signal. Comprising, 15b and, a transmitting antenna 16a and 16b respectively transmit the output of the transmission radio section 15a and 15b, a.

The bit dividing unit 11 processes the input transmission bit string by N bits. N is the number of bits transmitted in 2 symbols to be DSTBC encoded. The N bits are divided into N _ph bits, N _a bits, and N _b bits, which are output to the phase difference information modulation unit 13, the phase modulation unit 12a, and the phase modulation unit 12b, respectively. N _ph bits, the N _a bit and N _b bits value, the phase difference information modulation section 13, respectively, the number of bits to be used for modulation processing by the phase modulation unit 12a and the phase modulation unit 12b. When performing M _a phase modulation and M _b-phase modulation respectively by the phase modulation unit 12a and _{12b, N a = log 2 M} a, a N _b = log ₂ M _b bits. In this embodiment, N _ph = 1.

As an example of a bit dividing method performed by the bit dividing unit 11, FIG. 2 illustrates a case where both of the phase modulating units 12a and 12b perform quaternary phase shift keying (QPSK). In FIG. 2, the phase modulation unit 12a is described as a phase modulation unit a, and the phase modulation unit 12b is described as a phase modulation unit b. When the dividing method shown in FIG. 2 is applied, the bit dividing unit 11 converts N = 5 bit string b ₁ , b ₂ ,..., B ₅ into N _ph = 1 bit (b ₁ ), N _a = 2. The bit (b ₂ , b ₃ ) and N _b = 2 bits (b ₄ , b ₅ ) are divided into three bits, and 1 bit (b ₁ ) is sent to the phase difference information modulator 13 and 2 bits (b ₂ , b ₃ ) is output to the phase modulation unit 12a, and 2 bits (b ₄ , b ₅ ) are output to the phase modulation unit 12b. Note that the bit division method is not limited to this, and as long as the number of bits input to each unit is the same, the extraction method of each bit, the order of allocation to each unit, and the like may be changed. For example, the order of bit output to the phase modulation unit 12b may be reversed.

  The phase modulation units 12a and 12b perform gray coding on the input bit string, and then convert the gray-coded binary bit sequence to a decimal integer i, perform M-phase modulation according to the following equation (1), and perform phase modulation symbol x Is output.

  As an example, the operation of the phase modulation units 12a and 12b will be described in the case of four-phase phase modulation (QPSK). The phase modulation units 12a and 12b first generate an integer i from the input bit sequence according to FIG. FIG. 3 shows a 2-bit input bit string, a series obtained by gray-coding them, and i obtained by converting them into a decimal number. Gray coding is a general process and will not be described in detail. Next, in the above equation (1), M = 4 and the generated i is substituted to output a complex symbol x.

The phase difference information modulation unit 13 indicates the complex symbols x _a and x _b input from the phase modulation units 12 a and 12 b according to the value of 1 bit input from the bit division unit 11, respectively, by the following equation (2). and phase rotation in the phase rotation amount theta _a, theta _b, and outputs the phase difference information modulation symbols y _a, as y _b.

An example of the phase rotation amounts θ _a and θ _b for one input bit is shown in FIG. When the input bit is 0, θ _a = 0 and θ _b = π / M _b are set. When the input bit is 1, θ _a = π / M _a and θ _b = 0. M _a, M _b is the phase modulation unit 12a, 12b represents the implementation phase modulation in, indicating that the M _a phase, respectively, the phase modulation of M _b-phase is performed. [pi / M _a is equivalent to half of the phase of a phase rotation unit in the M _a phase modulation 2 [pi / M _a, only one half of the phase difference between the signal points according to the phase modulation to the phase rotation Show. The same is true for π / M _b. Since four-phase phase modulation is assumed here, M _a = 4 and M _b = 4. The phase rotation amounts θ _a and θ _b are not limited to the values used in this description.

Which is the output of the phase difference information modulation section 13 in the case of a series of processes described above, the constellation plot of phase difference information modulation symbols y _a and y _b in the IQ plane shown in FIG. Note that the constellation shown in FIG. 5 is for the case where the phase modulation performed by the phase modulation units 12a and 12b is QPSK (M _a = 4, M _b = 4). In FIG. 5, the signal points are represented by circles, and the numbers given to the signal points are bit strings input to the phase modulation units 12a and 12b. That is, it represents a position where a signal point is arranged when each bit string is input. As shown in FIG. 5, in this embodiment, two symbols y _a, and assigns the information to the phase difference between y _b.

DSTBC encoding unit 14, the input symbol s _k = y _a certain time _k, s k ₊ 1 = do DSTBC coding for two symbols y _b, transmitted symbol c _k and -c in transmission radio section 15a ^* _{k + 1} and DSTBC encoded symbols c _{k + 1} and c ^* _k are output to transmitting radio section 15b. DSTBC encoding is performed as in the following equation (3).

Let C _k and S _k in equation (3) be the following equation (4).

  The transmission radio units 15a and 15b convert the transmission symbols into transmission radio signals in order to transmit the radio symbols wirelessly. Note that this process is a general process and will not be described in detail.

(Receiver)
Next, the receiving apparatus according to this embodiment that receives a signal transmitted from the transmitting apparatus shown in FIG. 1 will be described.

  FIG. 6 is a diagram illustrating a configuration example of the first embodiment of the receiving device according to the present invention. The receiving apparatus according to the present embodiment includes a receiving antenna 51 that receives a radio signal transmitted by a transmitting apparatus, a receiving radio unit 52 that converts a received radio signal received by the receiving antenna 51 into a received symbol, and a received symbol as a DSTBC. A DSTBC decoding unit 53 that decodes and outputs a DSTBC decoded symbol, a candidate symbol generation unit 54 that generates all transmission symbols that the transmission apparatus may transmit, and an error that calculates an error between the DSTBC decoded symbol and the candidate symbol A calculation unit 55 and a minimum error selection unit 56 that selects a minimum error from all the errors output by the error calculation unit 55 and outputs a bit sequence corresponding to the candidate symbol as a received bit sequence.

  The reception antenna 51 receives a radio signal transmitted from the transmission device, and outputs it to the reception radio unit 52 as a reception radio signal.

  The reception radio unit 52 converts the reception radio signal into a baseband reception symbol. Note that this process is a general process and will not be described in detail.

The DSTBC decoding unit 53 performs DSTBC decoding processing on two received symbols r _k and r _{k + 1} received at certain times k and k + 1, and outputs DSTBC decoded symbols s ′ _k and s ′ _{k + 1} To do. The DSTBC decoding process is expressed by the following equation (5).

Let S ′ _k and R _k in equation (5) be the following equation (6).

Candidate symbol generator 54 sequentially outputs all combinations of two symbols that are DSTBC encoded as candidate symbols. In this embodiment, since N bits are transmitted with two symbols, all candidates for a transmission bit sequence are generated with an N bit counter. The counter values 0 to 2 ^N −1 are each used as a bit sequence, and the same processing as the processing of the bit division unit 11, the phase modulation units 12a and 12b, and the phase difference information modulation unit 13 of the transmission device (see FIG. 1) is performed. A set of candidate 2 symbols (y _an , y _bn ); n = 0, 1,..., 2 ^N −1 are sequentially output.

Error calculator 55, DSTBC decoded symbol _{s 'k, s' k +} 1 and the candidate symbol _{a n = y an, b n} = error between _{y bn e n; n = 0,1} , ..., 2 N -1 Are calculated as shown in the following equation (7) and sequentially output.

The minimum error selection unit 56 selects the smallest error among e _n ; n = 0, 1,..., 2 ^N −1, and inversely transforms Gray coding for n at that time (bit division of the transmission device) Unit 11, phase modulation units 12 a and 12 b, and phase difference information modulation unit 13.

  As described above, in the transmitting apparatus and the receiving apparatus according to the present embodiment, information is assigned to the phase difference between two symbols to be DSTBC-encoded and transmitted and received, so the number of bits of a bit string transmitted with two symbols Can be increased by 1 bit as compared with the prior art, and a higher transmission rate can be realized.

  In this embodiment, the DSTBC transmission apparatus and the DSTBC reception apparatus have been particularly described. However, by replacing DSTBC encoding with STBC encoding and DSTBC decoding with STBC decoding, the STBC transmission apparatus and the STBC reception apparatus are also used. Applicable.

Embodiment 2. FIG.
In Embodiment 1, a case has been described in which 1-bit information is allocated to a phase difference between two symbols to be DSTBC encoded, and transmission / reception is performed. 1-bit information is assigned to the amplitude difference for transmission / reception. That is, a high transmission rate is realized using the phase difference and amplitude difference between two symbols.

(Transmitter)
FIG. 7 is a diagram illustrating a configuration example of the transmission apparatus according to the second embodiment. In addition, the same code | symbol as FIG. 1 is attached | subjected to the same component as the transmission apparatus (refer FIG. 1) of Embodiment 1. FIG. In the present embodiment, parts different from those of the transmission apparatus of the first embodiment will be described. As shown in the figure, the transmission apparatus according to the present embodiment replaces the bit division unit 11 of the transmission apparatus according to the first embodiment with a bit division unit 21, and further, between the phase difference information modulation unit 13 and the DSTBC encoding unit 14. Further, an amplitude information modulation unit 22 is added.

  In the transmission apparatus according to the present embodiment, the bit division unit 21 divides an input transmission bit sequence into four and outputs the divided transmission bit sequence. The output destinations are the phase modulation units 12a and 12b, the phase difference information modulation unit 13, and the amplitude information modulation unit 22. Bit sequences having the same number of bits as in the first embodiment are input to phase modulation units 12a and 12b and phase difference information modulation unit 13, respectively. The amplitude information modulation unit 22 adjusts the amplitude of the phase difference information modulation symbol output from the phase difference information modulation unit 13 according to the bit sequence input from the bit division unit 21, and outputs the result as an amplitude information modulation symbol. The DSTBC encoding unit 14 performs DSTBC encoding on the amplitude information modulation symbol output from the amplitude information modulation unit 22.

  The operation of the transmission apparatus according to this embodiment will be described in detail.

The bit dividing unit 21 processes the input transmission bit string by N bits. N is the number of bits transmitted in 2 symbols to be DSTBC encoded. The N bits are divided into four parts of N _ph bits, N _amp bits, N _a bits, and N _b bits, which are respectively supplied to the phase difference information modulation unit 13, the amplitude information modulation unit 22, the phase modulation unit 12a, and the phase modulation unit 12b. Output. N _ph bits, bits to be used for modulation processing by the N _{# 038} bits, N _a bit and N _b values of bits, the phase difference information modulation section 13, respectively, the amplitude information modulation section 22, a phase modulation unit 12a and the phase modulating unit 12b Is a number. As each phase modulation unit 12a and 12b and performs a M _a phase modulation and M _b-phase modulation, the N _a = log ₂ M _a and N _b = log ₂ M _b bits. In this embodiment, N _ph = 1 and N _amp = 1.

As an example of the bit dividing method by the bit dividing unit 21, FIG. 8 shows a case where QPSK is performed in both the phase modulating units 12a and 12b. In FIG. 8, the phase modulation unit 12a is described as a phase modulation unit a, and the phase modulation unit 12b is described as a phase modulation unit b. When the dividing method shown in FIG. 8 is applied, the bit dividing unit 21 converts N = 6 bits into bit strings b ₁ , b ₂ ,..., B ₆ , N _ph = 1 bit (b ₁ ), and N _amp = 1. Bit (b ₂ ), N _a = 2 bits (b ₃ , b ₄ ), N _b = 2 bits (b ₅ , b ₆ ), and 1 bit (b ₁ ) is phase difference information modulator 13, 1 bit (b ₂ ) is output to the amplitude information modulation unit 22, 2 bits (b ₃ , b ₄ ) are output to the phase modulation unit 12 a, and 2 bits (b ₅ , b ₆ ) are output to the phase modulation unit 12 b, respectively. To do. Note that the bit division method is not limited to this, and as long as the number of bits input to each unit is the same, the method of extracting each bit, the order of allocation to each unit, and the like may be changed. For example, the order of bit output to the phase modulation unit 12b may be reversed.

Amplitude information modulation unit 22, phase difference information modulation symbols y _a which is inputted from the phase difference information modulating unit 13 in accordance with a 1-bit value input from the bit dividing portion 21, y _b relative amplitude coefficient a _{a, ab} is multiplied. Further, the phase is rotated by fixed phase offsets rot _a and rot _b in accordance with the amplitude coefficient, and output as amplitude information symbols z _a and z _b . The above processing can be expressed by the following equation (8).

The amplitude coefficients a _a and a _b are determined so as to satisfy the following equation (9), and the average power thereof is set to 1.

An example of amplitude coefficients a _a and a _b for one input bit is shown in FIG. FIG. 9 shows that when the input bit is 0, a _a = 1.265 and a _b = 0.632, and when the input bit is 1, a _a = 0.632 and a _b = 1.265. . As the amplitude coefficients a _a and a _b, values are selected such that one is twice the other (a _a : a _b = 2: 1, a _a : a _b = 1: 2). The amplitude coefficients a _a and a _b are not limited to the values used in this description.

An example of the fixed phase offset is shown in FIG. FIG. 10 shows that fixed phase offsets rot _a and rot _b are both set to 0 when the amplitude coefficient value is 1.265, and fixed phase offset is π when the amplitude coefficient value is 0.632. / 2M _a and π / 2M _b . Note that the fixed phase offsets rot _a and rot _b are not limited to the values used in this description.

FIG. 11 shows a constellation obtained by plotting amplitude information modulation symbols z _a and z _b on the IQ plane, which is an output of the amplitude information modulation unit 22 when the above series of processing is performed. In addition, what is shown in FIG. 11 is a constellation in the case where both of the phase modulations performed by the phase modulation units 12a and 12b are QPSK (M _a = 4, M _b = 4). In FIG. 11, signal points are represented by circles, and the numbers given to the signal points are bit strings input to the phase modulation units 12a and 12b. That is, it represents a position where a signal point is arranged when each bit string is input. As shown in FIG. 11, in this embodiment, information is assigned to the phase difference and the amplitude difference between the two symbols z _a and z _b .

  FIG. 12 shows a constellation in which all signal points shown in FIG. 11 are plotted on one IQ plane. FIG. 12 shows (a) the case where there is no fixed phase offset and (b) the case where there is a fixed phase offset. The distance between signal points indicated by arrows in each figure is larger in (b), indicating that the distance between signal points can be increased by phase rotation with a fixed phase offset.

The DSTBC encoding unit 14 is the same as that of the first embodiment except that the input symbol at a certain time k is s _k = z _a and s _{k + 1} = z _b .

(Receiver)
Next, the receiving apparatus according to the present embodiment that receives a signal transmitted from the transmitting apparatus shown in FIG. 7 will be described.

  FIG. 13 is a diagram illustrating a configuration example of a receiving apparatus according to the second embodiment. Constituent elements common to the receiving apparatus of Embodiment 1 (see FIG. 6) are denoted by the same reference numerals as in FIG. That is, the receiving apparatus of this embodiment has a configuration in which candidate symbol generating section 54 of receiving apparatus of Embodiment 1 is replaced with candidate symbol generating section 61. In the present embodiment, parts different from the receiving apparatus of Embodiment 1 will be described.

In the receiving apparatus of this embodiment, candidate symbol generating section 61 sequentially outputs all combinations of two symbols that are DSTBC encoded as candidate symbols. In this embodiment, N bits (= 6 bits) are transmitted in 2 symbols, and therefore all candidates for the transmission bit sequence are generated by the N bit counter. The counter values 0 to 2 ^N −1 are respectively used as bit sequences, and the same processing as the processing of the bit division unit 21, the phase modulation units 12a and 12b, the phase difference information modulation unit 13, and the amplitude information modulation unit 22 is performed. , Candidate symbols (z _an , z _bn ); n = 0, 1,..., 2 ^N −1 are sequentially output.

The error calculator 55 is the same as that of the first embodiment except that the input candidate symbols are an = z _an and bn = z _bn .

  As described above, in the transmission apparatus and the reception apparatus according to the present embodiment, information is assigned to the phase difference and amplitude difference between two symbols to be DSTBC-encoded and transmitted and received one bit at a time. The number of bits can be increased by 2 bits compared to the prior art, and a higher transmission rate can be realized. Further, by adjusting the amplitude and the fixed phase offset, the distance between signal points of symbols to be DSTBC encoded can be increased, and reception performance can be improved.

  In this embodiment, the DSTBC transmission apparatus and the DSTBC reception apparatus have been particularly described. However, by replacing DSTBC encoding with STBC encoding and DSTBC decoding with STBC decoding, the STBC transmission apparatus and the STBC reception apparatus are also used. Applicable.

Embodiment 3 FIG.
In the second embodiment, a case has been described in which 1-bit information is assigned to each of the phase difference and amplitude difference between two symbols that are DSTBC-encoded and transmitted / received. However, in the transmission device and the reception device of the present embodiment, Two-bit information is assigned to each of the phase difference and the amplitude difference between two symbols to be DSTBC encoded and transmitted / received.

(Transmitter)
FIG. 14 is a diagram illustrating a configuration example of a transmission apparatus according to the third embodiment. In addition, the same code | symbol as FIG. 7 is attached | subjected to the same component as the transmitter (refer FIG. 7) of Embodiment 2. FIG. In the present embodiment, parts different from those of the transmission apparatus of the second embodiment will be described. As shown in the figure, the transmission apparatus of the present embodiment includes a bit division unit 21, a phase difference information modulation unit 13, and an amplitude information modulation unit 22 of the transmission apparatus of the second embodiment. The configuration is replaced with the unit 32 and the amplitude information modulation unit 33.

In the transmission apparatus according to the present embodiment, the bit division unit 31 processes an input transmission bit string N bits at a time. N is the number of bits transmitted in 2 symbols to be DSTBC encoded. The N bits are divided into four parts of N _ph bits, N _amp bits, N _a bits, and N _b bits, which are respectively supplied to the phase difference information modulation unit 32, the amplitude information modulation unit 33, the phase modulation unit 12a, and the phase modulation unit 12b. Output. N _ph bits, bits to be used for modulation processing by the N _{# 038} bits, N _a bit and N _b values of bits, the phase difference information modulation section 32, respectively, the amplitude information modulation section 33, a phase modulation unit 12a and the phase modulating unit 12b Is a number. When performing M _a phase modulation and M _b-phase modulation respectively by the phase modulator sections 12a and 12b, the N _a = log ₂ M _a bit, N _b = log ₂ M _b bits. In this embodiment, N _ph = 2 and N _amp = 2.

As an example of a bit dividing method by the bit dividing unit 31, FIG. 15 shows a case where QPSK is performed in both the phase modulating units 12a and 12b. In FIG. 15, the phase modulation unit 12a is described as a phase modulation unit a, and the phase modulation unit 12b is described as a phase modulation unit b. When the dividing method shown in FIG. 15 is applied, the bit dividing unit 31 converts N = 8-bit bit sequences b ₁ , b ₂ ,..., B ₈ into N _ph = 2 bits (b ₁ , b ₂ ), N _amp = 2 bits (b ₃ , b ₄ ), N _a = 2 bits (b ₅ , b ₆ ), N _b = 2 bits (b ₇ , b ₈ ), and 2 bits (b ₁ , b b ₂ ) for the phase difference information modulator 32, 2 bits (b ₃ , b ₄ ) for the amplitude information modulator 33, 2 bits (b ₅ , b ₆ ) for the phase modulator 12 a, 2 bits (b ₇ , B ₈ ) are output to the phase modulator 12b. Note that the bit division method is not limited to this, and as long as the number of bits input to each unit is the same, the method of extracting each bit, the order of allocation to each unit, and the like may be changed. For example, the order of bit output to the phase modulation unit 12b may be reversed.

The phase difference information modulation unit 32 converts the complex symbols x _a and x _b input from the phase modulation units 12 a and 12 _b with phase offsets θ _a and θ _b according to the 2-bit value input from the bit division unit 31. The phase is rotated and output as phase difference information modulation symbols y _a and y _b . The above processing can be expressed by the following equation (10).

An example of the phase offsets θ _a and θ _b for the input 2 bits is shown in FIG. When the input bit is 00, θ _a = 0, θ _b = 0, when the input bit is 01, θ _a = 0, θ _b = π / M _b , and when the input bit is 10, θ _a = π / M _{When a} and θ _b = 0 and the input bit is 11, θ _a = π / M _a and θ _b = π / M _b . M _a and M _b represents that represents the phase modulation is performed by the phase modulation unit 12a and 12b, the phase modulation of the M _a phase and M _b-phase, respectively was performed. The phase rotation amounts θ _a and θ _b are not limited to the values used in this description.

The amplitude information modulation unit 33 performs amplitude coefficient a _a on the phase difference information modulation symbols y _a and y _b input from the phase difference information modulation unit 32 according to the 2-bit value input from the bit division unit 31. , A _b . Further, the phase is rotated by fixed phase offsets rot _a and rot _b in accordance with the amplitude coefficient, and output as amplitude information symbols z _a and z _b . The above processing can be expressed by the following equation (11).

The amplitude coefficients a _a and a _b are determined so as to satisfy the following expression (12), and the average power thereof is set to 1.

An example of the amplitude coefficients a _a and a _b for the input 2 bits is shown in FIG. In FIG. 17, when the input bit is 00, a _a = 1.265, a _b = 0.632, when the input bit is 01, a _a = 0.632, a _b = 1.265, and the input bit is 10. In this case, a _a = 1.104, a _b = 0.883, and when the input bit is 11, it indicates that a _a = 0.883 and a _b = 1.104. The amplitude coefficients a _a and a _b are not limited to the values used in this description.

An example of the fixed phase offset is shown in FIG. FIG. 18 shows that when the fixed phase offsets rot _a and rot _b have an amplitude coefficient value of 1.265 or 0.883, the fixed phase offset is 0 and the amplitude coefficient value is 1.104 or 0.632. If shows that the fixed phase offset, respectively [pi / 2M _a and π / 2M _b. Note that the fixed phase offsets rot _a and rot _b are not limited to the values used in this description.

FIGS. 19A to 19D show constellations obtained by plotting amplitude information modulation symbols z _a and z _b on the IQ plane, which are outputs of the amplitude information modulation unit 33 when the above-described series of processing is performed. In addition, what is shown in FIGS. 19-1 to 19-4 is a constellation when the phase modulation performed by the phase modulation units 12a and 12b is QPSK (M _a = 4, M _b = 4). . 19A is a constellation when the input bit to the phase difference information modulation unit 32 is 00, and FIG. 19B is a constellation when the input bit to the phase difference information modulation unit 32 is 01. 19-3 shows a constellation when the input bit to the phase difference information modulation unit 32 is 11, and FIG. 19-4 shows a constellation when the input bit to the phase difference information modulation unit 32 is 10. 19-1 to 19-4, signal points are represented by circles, and the numbers given to the signal points are bit strings input to the phase modulation units 12a and 12b. That is, it represents a position where a signal point is arranged when each bit string is input. As shown in FIGS. 19A to 19D, in the present embodiment, information is assigned 2 bits each to the phase difference and the amplitude difference between the two symbols z _a and z _b . The phase rotation by the fixed phase offset is performed in order to increase the distance between the signal points as in the second embodiment.

(Receiver)
Next, the receiving apparatus according to this embodiment that receives a signal transmitted from the transmitting apparatus illustrated in FIG. 14 will be described.

  FIG. 20 is a diagram illustrating a configuration example of a receiving apparatus according to the third embodiment. Constituent elements common to the receiving apparatus of Embodiment 2 (see FIG. 13) are assigned the same reference numerals as in FIG. That is, the receiving apparatus of this embodiment has a configuration in which candidate symbol generating section 61 of receiving apparatus of Embodiment 2 is replaced with candidate symbol generating section 71. In the present embodiment, parts different from the receiving apparatus of Embodiment 2 will be described.

In the receiving apparatus according to the present embodiment, candidate symbol generating section 71 sequentially outputs all combinations of two symbols that are DSTBC encoded as candidate symbols. In this embodiment, N bits (= 8 bits) are transmitted in 2 symbols, and therefore all candidates for the transmission bit sequence are generated by the N bit counter. The counter values 0 to 2 ^N −1 are respectively used as bit sequences, and the same processing as the processing of the bit division unit 31, the phase modulation units 12a and 12b, the phase difference information modulation unit 32, and the amplitude information modulation unit 33 of the transmission device is performed. , Candidate symbols (z _an , z _bn ); n = 0, 1,..., 2 ^N −1 are sequentially output.

  As described above, in the transmitting apparatus and receiving apparatus of the present embodiment, information is allocated and transmitted in two bits each for the phase difference and amplitude difference between two symbols to be DSTBC encoded, so transmission is performed with two symbols. The number of bits can be increased by 4 bits compared to the prior art, and a higher transmission rate can be realized. Further, by adjusting the amplitude and the fixed phase offset, the distance between signal points of symbols to be DSTBC encoded can be increased, and reception performance can be improved.

  In addition, although the case where information is assigned to the phase difference and amplitude difference between two symbols to be DSTBC-encoded 2 bits at a time has been described, a configuration may be adopted in which 2 bits are assigned to one of the phase difference and the amplitude difference and 1 bit is assigned to the other.

  In this embodiment, the DSTBC transmission apparatus and the DSTBC reception apparatus have been particularly described. However, by replacing DSTBC encoding with STBC encoding and DSTBC decoding with STBC decoding, the STBC transmission apparatus and the STBC reception apparatus are also used. Applicable.

Embodiment 4 FIG.
A fourth embodiment will be described. The transmission apparatus and the reception apparatus of the present embodiment achieve a high transmission rate by assigning 2-bit information to a combination of a phase difference and an amplitude difference between two symbols to be DSTBC encoded and transmitting / receiving.

(Transmitter)
FIG. 21 is a diagram illustrating a configuration example of a transmission apparatus according to the fourth embodiment. In addition, the same code | symbol as FIG. 1 is attached | subjected to the same component as the transmission apparatus (refer FIG. 1) of Embodiment 1. FIG. In the present embodiment, parts different from those of the transmission apparatus of the first embodiment will be described. As shown in the figure, the transmission apparatus of the present embodiment has a configuration in which the bit division unit 11 and the phase difference information modulation unit 13 of the transmission apparatus of the first embodiment are replaced with a bit division unit 41 and an amplitude information modulation unit 43. ing.

In the transmission apparatus according to the present embodiment, the bit division unit 41 processes an input transmission bit string N bits at a time. N is the number of bits transmitted in 2 symbols to be DSTBC encoded. The bit division unit 41 divides the N bits into three, N _amp bits, N _a bits, and N _b bits, and outputs them to the amplitude information modulation unit 43, the phase modulation unit 12a, and the phase modulation unit 12b, respectively. However, in this embodiment, the sum of N _amp , N _a , and N _b is not necessarily N. The values of N _amp , N _a , and N _b are the numbers of bits used for modulation processing in the amplitude information modulation unit 43, the phase modulation unit 12a, and the phase modulation unit 12b, respectively. When performing M _a phase modulation and M _b-phase modulation respectively by the phase modulation unit 12a and _{12b, N a = log 2 M} a, a relationship of N _b = log ₂ M _b.

An example of a bit dividing method by the bit dividing unit 41 will be described with reference to FIG. In this embodiment, N = 8 and N _amp = 2, and N _a and N _b differ depending on the value represented by the N _amp bits, that is, the bits output to the amplitude information modulation unit 43. In FIG. 22, 8 bits are represented as b1, b2,..., B8, and b1 and b2 are bits output to the amplitude information modulation unit 43, and b3 to b8 are divided by the values to determine the phase. It indicates whether the signals are output to the modulation units 12a and 12b.

  When (b1, b2) is (0, 0), the bit division unit 41 outputs 4 bits from b3 to b6 to the phase modulation unit 12a, and 2 bits from b7 to b8 to the phase modulation unit 12b. Output in reverse order. When (b1, b2) is (0, 1), 2 bits from b3 to b4 are output to the phase modulator 12a, and 4 bits from b5 to b8 are output to the phase modulator 12b in reverse order. To do. When (b1, b2) is (1, 1), the phase modulation unit 12a outputs a total of 4 bits obtained by adding 0 at the end to the 3 bits from b3 to b5, and outputs b6 to the phase modulation unit 12b. To b8, a total of 4 bits with 0 added to the head are output in reverse order. When (b1, b2) is (1, 0), the phase modulation unit 12a outputs a total of 4 bits obtained by adding 1 to the last 3 bits of b3 to b5, and the phase modulation unit 12b from b6 The 4 bits obtained by adding 1 to the head of the 3 bits of b8 are output in reverse order. Note that the bit division method is not limited to this, and as long as the number of bits input to each unit is the same, the method of extracting each bit, the order of allocation to each unit, and the like may be changed.

  The phase modulation units 12a and 12b treat the input bit string as a Gray code, convert it to a normal binary number, convert the binary bit sequence to a decimal integer i, and perform M-phase modulation according to the following equation (13) To output a phase modulation symbol x.

The amplitude information modulation unit 43 multiplies the phase modulation symbols x _a and x _b input from the phase modulation units 12 a and 12 _b by amplitude coefficients a _a and a _b according to the two bits input from the bit division unit 41. To do. Further, the phase is rotated by fixed phase offsets rot _a and rot _b in accordance with the amplitude coefficient, and output as amplitude information symbols z _a and z _b . The above processing can be expressed by the following equation (14).

The amplitude coefficients a _a and a _b are determined so as to satisfy the following expression (15), and the average power thereof is set to 1.

An example of the amplitude coefficients a _a and a _b for the input 2 bits is shown in FIG. In FIG. 23, when the input bit is 00, a _a = 1.341 and a _b = 0.449, and when the input bit is 01, a _a = 0.449 and a _b = 1.341, 10 or 11 indicates that a _a = 1.000 and a _b = 1.000. The amplitude coefficients a _a and a _b are not limited to the values used in this description.

The fixed phase offsets rot _a and rot _b are expressed by the following equation (16).

FIG. 24 shows a constellation obtained by plotting amplitude information modulation symbols z _a and z _b on the IQ plane, which is an output of the amplitude information modulation unit 43 when the above-described series of processing is performed. In FIG. 24, signal points are represented by circles, and the numbers attached to the signal points are bit strings assigned to phase modulation. Note that the numbers in parentheses are bits added by the bit division unit 41. As shown in FIG. 24, in this embodiment, 2-bit information is assigned to a combination of a phase difference and an amplitude difference between two symbols z _a and z _b . Also, by reversing the order of the bit string to output to the phase modulating part 12b at the bit dividing portion 41, the mapping z _b, even if the input bits to the amplitude information modulation section 43 is different, the same value of the same bit The quadrants are made as much as possible (for example, when (b7, b8) is (0, 0), they are mapped to the first quadrant).

(Receiver)
Next, the receiving apparatus of this embodiment that receives a signal transmitted from the transmitting apparatus shown in FIG. 21 will be described.

  FIG. 25 is a diagram illustrating a configuration example of a receiving apparatus according to the fourth embodiment. Constituent elements common to the receiving apparatus of Embodiment 1 (see FIG. 6) are denoted by the same reference numerals as in FIG. That is, the receiving apparatus of this embodiment has a configuration in which candidate symbol generating section 54 of receiving apparatus of Embodiment 1 is replaced with candidate symbol generating section 81. In the present embodiment, parts different from the receiving apparatus of Embodiment 1 will be described.

In the receiving apparatus of the present embodiment, candidate symbol generation section 81 sequentially outputs all combinations of two symbols that are DSTBC encoded as candidate symbols. In this embodiment, since N bits are transmitted with two symbols, all candidates for a transmission bit sequence are generated with an N bit counter. The counter values 0 to 2 ^N −1 are each used as a bit sequence, the same processing as the processing of the bit division unit 41, the phase modulation units 12a and 12b, and the amplitude information modulation unit 43 of the transmission device is performed, and candidate symbols (z _an , z _bn ), n = 0, 1,..., 2 ^N −1 are sequentially output.

  As described above, in the transmitting apparatus and receiving apparatus of the present embodiment, information is allocated to 2 bits for transmission / reception with a combination of phase difference and amplitude difference between two symbols to be DSTBC encoded, so transmission is performed with two symbols. It is possible to increase the number of bits to be increased by 2 bits compared to the prior art. Further, by adjusting the amplitude and setting the number of signal points different for each amplitude, the distance between the signal points of the DSTBC encoded symbol can be increased, and the reception performance can be improved.

  In this embodiment, the DSTBC transmission apparatus and the DSTBC reception apparatus have been particularly described. However, by replacing DSTBC encoding with STBC encoding and DSTBC decoding with STBC decoding, the STBC transmission apparatus and the STBC reception apparatus are also used. Applicable.

Embodiment 5. FIG.
Embodiment 5 will be described. In the fourth embodiment, the transmitting apparatus and the receiving apparatus that transmit and receive information by assigning 2-bit information to the combination of the phase difference and the amplitude difference between the two symbols to be DSTBC encoded have been described. Another mode in which information is assigned to a combination of phase difference and amplitude difference between two symbols to be transmitted and received will be described.

(Transmitter)
FIG. 26 is a diagram illustrating a configuration example of a transmission apparatus according to the fifth embodiment. In addition, the same code | symbol as FIG. 21 is attached | subjected to the same component as the transmitter (refer FIG. 21) of Embodiment 4. FIG. In the present embodiment, parts different from those of the transmission apparatus according to the fourth embodiment will be described. As shown in the figure, the transmission device of the present embodiment has a configuration in which the bit division unit 41 of the transmission device of the fourth embodiment is replaced with a bit division unit 42.

In the transmission apparatus according to the present embodiment, the bit division unit 42 processes an input transmission bit string N bits at a time. N is the number of bits transmitted in 2 symbols to be DSTBC encoded. The bit division unit 42 divides the N bits into three, N _amp bits, N _a bits, and N _b bits, and outputs them to the amplitude information modulation unit 43, the phase modulation unit 12a, and the phase modulation unit 12b, respectively. However, the sum of N _amp , N _a , and N _b is not necessarily N as in the case of the division result by the bit division unit 41 of the fourth embodiment described above. The values of N _amp , N _a , and N _b are the numbers of bits used for modulation processing in the amplitude information modulation unit 43, the phase modulation unit 12a, and the phase modulation unit 12b, respectively. When performing M _a phase modulation and M _b-phase modulation respectively by the phase modulation unit 12a and _{12b, N a = log 2 M} a, a relationship of N _b = log ₂ M _b.

An example of a bit dividing method by the bit dividing unit 42 will be described with reference to FIG. In this embodiment, N = 8 and N _amp = 2, and N _a and N _b differ depending on the value represented by the N _amp bits, that is, the bits output to the amplitude information modulation unit 43. In FIG. 27, 8 bits are represented as b1, b2,..., B8, and b1 and b2 are bits output to the amplitude information modulation unit 43, and b3 to b8 are divided according to their values to determine the phase. It indicates whether the signals are output to the modulation units 12a and 12b.

  When (b1, b2) is (0, 0), the bit division unit 42 outputs 4 bits from b3 to b6 to the phase modulation unit 12a, and 2 bits from b7 to b8 to the phase modulation unit 12b. Output in reverse order. When (b1, b2) is (0, 1), 2 bits from b3 to b4 are output to the phase modulator 12a, and 4 bits from b5 to b8 are output to the phase modulator 12b in reverse order. To do. When (b1, b2) is (1, 1), 4 bits from b3 to b6 are output to the phase modulation unit 12a, and 3 bits from b6 to b8 are output to the phase modulation unit 12b in reverse order. Output. b6 is output to both the phase modulators 12a and 12b. When (b1, b2) is (1, 0), 3 bits from b3 to b5 are output to the phase modulator 12a, and 4 bits from b5 to b8 are output to the phase modulator 12b in reverse order. To do. b5 is output to both the phase modulators 12a and 12b. Note that the bit division method is not limited to this, and as long as the number of bits input to each unit is the same, the method of extracting each bit, the order of allocation to each unit, and the like may be changed.

  The phase modulation units 12a and 12b treat the input bit string as a Gray code, convert it to a normal binary number, convert the binary bit sequence to a decimal integer i, and perform M-phase modulation according to the following equation (17) To output a phase modulation symbol x.

The amplitude information modulation unit 43 multiplies the phase modulation symbols x _a and x _b input from the phase modulation units 12 a and 12 _b by amplitude coefficients a _a and a _b according to the two bits input from the bit division unit 42. To do. Further, the phase is rotated by fixed phase offsets rot _a and rot _b in accordance with the amplitude coefficient, and output as amplitude information symbols z _a and z _b . The above processing can be expressed by the following equation (18).

The amplitude coefficients a _a and a _b are determined so as to satisfy the following equation (19), and their average power is set to 1.

An example of the amplitude coefficients a _a and a _b for the input 2 bits is shown in FIG. In FIG. 28, when the input bit is 00, a _a = 1.372 and a _b = 0.345, and when the input bit is 01, a _a = 0.345 and a _b = 1.372, and the input bit is In the case of 10, a _a = 1.154 and a _b = 0.817, and when the input bit is 11, a _a = 0.817 and a _b = 1.154. The amplitude coefficients a _a and a _b are not limited to the values used in this description.

The fixed phase offsets rot _a and rot _b are expressed by the following equation (20).

FIG. 29 shows a constellation obtained by plotting amplitude information modulation symbols z _a and z _b on the IQ plane, which is an output of the amplitude information modulation unit 43 when the above-described series of processing is performed. In FIG. 29, signal points are represented by circles, and the numbers attached to the signal points are bit strings assigned to phase modulation. The numbers of parentheses is the bit that is output redundantly from the bit dividing portion 4 2 in both of the phase modulation sections 12a and 12b. As shown in FIG. 29, in this embodiment, 2-bit or 3-bit information is assigned to a combination of a phase difference and an amplitude difference between two symbols z _a and z _b . Also, by reversing the order of the bit string to output to the phase modulating part 12b at the bit dividing portion 42, the mapping z _b, even if the input bits to the amplitude information modulation section 43 is different, the same value of the same bit The quadrants are made as much as possible (for example, when (b7, b8) is (0, 0), they are mapped to the first quadrant).

(Receiver)
Next, the receiving apparatus according to this embodiment that receives a signal transmitted from the transmitting apparatus shown in FIG. 26 will be described.

FIG. 30 is a diagram illustrating a configuration example of a receiving device according to the fifth embodiment. Receiving apparatus of the fourth embodiment (see FIG. 25) the same components are denoted by the same reference numerals as in FIG. 25. That is, the receiving apparatus according to the present embodiment has a configuration in which candidate symbol generating section 81 of receiving apparatus according to the fourth embodiment is replaced with candidate symbol generating section 91. In the present embodiment, parts different from those of the receiving apparatus of the fourth embodiment will be described.

In the receiving apparatus of the present embodiment, candidate symbol generation section 91 sequentially outputs all combinations of two symbols that are DSTBC encoded as candidate symbols. In this embodiment, since N bits are transmitted with two symbols, all candidates for a transmission bit sequence are generated with an N bit counter. The counter values 0 to 2 ^N −1 are each used as a bit sequence, the same processing as the processing of the bit division unit 42, the phase modulation units 12a and 12b, and the amplitude difference information modulation unit 43 of the transmission device is performed, and the candidate symbol (z _an , Z _bn ), n = 0, 1,..., 2 ^N −1 are sequentially output.

  As described above, in the transmission apparatus and the reception apparatus of the present embodiment, information is assigned to 2 bits or 3 bits in combination with the phase difference and amplitude difference between two symbols to be DSTBC encoded, and is transmitted and received. It is possible to increase the number of bits transmitted in symbols as compared with the conventional technique. Further, by adjusting the amplitude, it is possible to increase the distance between signal points of symbols to be DSTBC encoded, and to improve reception performance.

  In this embodiment, the DSTBC transmission apparatus and the DSTBC reception apparatus have been particularly described. However, by replacing DSTBC encoding with STBC encoding and DSTBC decoding with STBC decoding, the STBC transmission apparatus and the STBC reception apparatus are also used. Applicable.

  As described above, the transmission apparatus according to the present invention is useful as a transmission apparatus that transmits a bit sequence after differential space-time coding.

  11, 21, 31 Bit division unit, 12a, 12b Phase modulation unit, 13, 32 Phase difference information modulation unit, 14 DSTBC encoding unit, 15a, 15b Transmission radio unit, 16a, 16b Transmission antenna, 22, 33 Amplitude information modulation , 51 receiving antenna, 52 receiving radio unit, 53 DSTBC decoding unit, 54, 61, 71 candidate symbol generating unit, 56 minimum error selecting unit.

Claims (28)

A transmission device that encodes and transmits a transmission sequence using a STBC (Space-Time Block Coding) or DSTBC (Differential Space-Time Block Coding) method,
Bit dividing means for dividing the transmission sequence into three bit strings of a predetermined number of bits;
Phase modulation means for generating phase modulation symbols by phase-modulating two bit strings of the bit strings output from the bit dividing means;
A phase difference that generates a phase difference information modulation symbol by rotating the phases of the two phase modulation symbols generated by the phase modulation means by an arbitrary phase based on the value of the bit string that is not subject to phase modulation. Information modulation means;
Encoding means for STBC encoding or DSTBC encoding the two phase difference information modulation symbols output from the phase difference information modulating means;
A transmission device comprising: The phase difference information modulating means includes
When a 1-bit bit string is input from the bit dividing means,
When the input bit string is 0, the phase of the first phase modulation symbol that is one of the two phase modulation symbols is rotated by the phase rotation amount r1, and the second phase modulation symbol that is the other of the two phase modulation symbols The phase of the phase modulation symbol is rotated by a phase rotation amount r2 (where r2 ≠ r1),
When the input bit string is 1, the phase of the first phase modulation symbol is rotated by the phase rotation amount r2, and the phase of the second phase modulation symbol is rotated by the phase rotation amount r1.
The transmission apparatus according to claim 1, wherein: A transmission device that encodes and transmits a transmission sequence using a STBC (Space-Time Block Coding) or DSTBC (Differential Space-Time Block Coding) method,
Bit dividing means for dividing the transmission sequence into four bit strings of a predetermined number of bits;
Phase modulation means for generating phase modulation symbols by phase-modulating two bit strings of the bit strings output from the bit dividing means;
Based on the value of one of the two bit strings that are not subject to phase modulation, the phase of the two phase modulation symbols generated by the phase modulation means is rotated by an arbitrary phase, respectively. Phase difference information modulation means for generating information modulation symbols;
Amplitude information is obtained by adjusting the amplitudes of the two phase difference information modulation symbols generated by the phase difference information modulation means based on the value of the other bit string of the two bit strings not subjected to the phase modulation. Amplitude information modulation means for generating modulation symbols;
Encoding means for STBC encoding or DSTBC encoding the two amplitude information modulation symbols output from the amplitude information modulating means;
A transmission device comprising: The phase difference information modulating means includes
When a 1-bit bit string is input from the bit dividing means,
When the input bit string is 0, the phase of the first phase modulation symbol that is one of the two phase modulation symbols is rotated by the phase rotation amount r1, and the second phase modulation symbol that is the other of the two phase modulation symbols The phase of the phase modulation symbol is rotated by a phase rotation amount r2 (where r2 ≠ r1),
When the input bit string is 1, the phase of the first phase modulation symbol is rotated by the phase rotation amount r2, and the phase of the second phase modulation symbol is rotated by the phase rotation amount r1.
The transmission apparatus according to claim 3. The phase difference information modulating means includes
When a 2-bit bit string is input from the bit dividing means,
When the input bit string is 00, the phase of the first phase modulation symbol that is one of the two phase modulation symbols is rotated by the phase rotation amount r1, and the second phase modulation symbol that is the other of the two phase modulation symbols The phase of the phase modulation symbol is rotated by the phase rotation amount r1,
When the input bit string is 01, the phase of the first phase modulation symbol is rotated by the phase rotation amount r1, and the phase of the second phase modulation symbol is changed by the phase rotation amount r2 (where r2 ≠ r1). To rotate the phase,
When the input bit string is 10, the phase of the first phase modulation symbol is rotated by the phase rotation amount r2, and the phase of the second phase modulation symbol is rotated by the phase rotation amount r1,
When the input bit string is 11, the phase of the first phase modulation symbol is rotated by the phase rotation amount r2, and the phase of the second phase modulation symbol is rotated by the phase rotation amount r2.
The transmission apparatus according to claim 3. The amplitude information modulating means includes
When a 1-bit bit string is input from the bit dividing means,
When the input bit string is 0, the first phase difference information modulation symbol, which is one of the two phase difference information modulation symbols, is multiplied by an amplitude coefficient a1, and the other one of the two phase difference information modulation symbols. Multiplying the second phase difference information modulation symbol by an amplitude coefficient a2 (where a2 ≠ a1);
When the input bit string is 1, the first phase difference information modulation symbol is multiplied by an amplitude coefficient a2, and the second phase difference information modulation symbol is multiplied by an amplitude coefficient a1.
The transmission device according to claim 3, 4 or 5. The transmission apparatus according to claim 6, wherein the amplitude coefficients a1 and a2 have a relationship of ((a1) ² + (a2) ² ) / 2 = 1. The amplitude information modulating means includes
When a 2-bit bit string is input from the bit dividing means,
When the input bit string is 00, the first phase difference information modulation symbol which is one of the two phase difference information modulation symbols is multiplied by an amplitude coefficient a1, and the other one of the two phase difference information modulation symbols. Multiplying the second phase difference information modulation symbol by an amplitude coefficient a2 (where a2 ≠ a1);
When the input bit string is 01, the first phase difference information modulation symbol is multiplied by an amplitude coefficient a2, and the second phase difference information modulation symbol is multiplied by an amplitude coefficient a1.
When the input bit string is 10, the first phase difference information modulation symbol is multiplied by an amplitude coefficient a3 (where a3 ≠ a1, a3 ≠ a2), and the second phase difference information modulation symbol is amplitude coefficient a4 (where a4 ≠ a1, a4 ≠ a2, a4 ≠ a3),
When the input bit string is 11, the first phase difference information modulation symbol is multiplied by an amplitude coefficient a4, and the second phase difference information modulation symbol is multiplied by an amplitude coefficient a3.
The transmission device according to claim 3, 4 or 5. The amplitude coefficients a1 and a2 have a relationship of ((a1) ² + (a2) ² ) / 2 = 1, and the amplitude coefficients a3 and a4 are ((a3) ² + (a4) ² ) / 2. The transmission apparatus according to claim 8, wherein the relationship is = 1. A transmission device that encodes and transmits a transmission sequence using a STBC (Space-Time Block Coding) or DSTBC (Differential Space-Time Block Coding) method,
Bit dividing means for dividing the transmission sequence into three bit strings of a predetermined number of bits;
Phase modulation means for generating phase modulation symbols by phase-modulating two bit strings of the bit strings output from the bit dividing means;
Amplitude information modulation means for adjusting amplitudes of the two phase modulation symbols generated by the phase modulation means to generate amplitude information modulation symbols based on the value of the bit string that has not been subjected to phase modulation;
Encoding means for STBC encoding or DSTBC encoding the two amplitude information modulation symbols output from the amplitude information modulating means;
Equipped with a,
It said amplitude information modulation means, wherein for the two phase modulation symbols, transmitted by multiplying the amplitude coefficient average power after the adjustment is constant, characterized that you adjust the amplitude device. When the amplitude coefficients to be multiplied for the two phase modulation symbols are a1 and a2, the a1 and the a2 are ((a1) ² + (A2) ² The transmission apparatus according to claim 10, wherein a relationship of 2) / 2 = 1 is established. The bit dividing means includes
Of the two bit strings to be output to said phase modulation means, transmission apparatus according to claim 1 or 3, wherein to the opposite one of the sorted. A transmission device that encodes and transmits a transmission sequence using a STBC (Space-Time Block Coding) or DSTBC (Differential Space-Time Block Coding) method,
  Bit dividing means for dividing the transmission sequence into three bit strings of a predetermined number of bits;
  Phase modulation means for generating phase modulation symbols by phase-modulating two bit strings of the bit strings output from the bit dividing means;
  Amplitude information modulation means for adjusting amplitudes of the two phase modulation symbols generated by the phase modulation means to generate amplitude information modulation symbols based on the value of the bit string that has not been subjected to phase modulation;
  Encoding means for STBC encoding or DSTBC encoding the two amplitude information modulation symbols output from the amplitude information modulating means;
  With
  The bit dividing means includes
  A transmitting apparatus characterized in that one of the two bit strings output to the phase modulation means is reversed in order. A transmission device that encodes and transmits a transmission sequence using a STBC (Space-Time Block Coding) or DSTBC (Differential Space-Time Block Coding) method,
  Bit dividing means for dividing the transmission sequence into three bit strings of a predetermined number of bits;
  Phase modulation means for generating phase modulation symbols by phase-modulating two bit strings of the bit strings output from the bit dividing means;
  Amplitude information modulation means for adjusting amplitudes of the two phase modulation symbols generated by the phase modulation means to generate amplitude information modulation symbols based on the value of the bit string that has not been subjected to phase modulation;
  Encoding means for STBC encoding or DSTBC encoding the two amplitude information modulation symbols output from the amplitude information modulating means;
  With
  The bit dividing means includes
  The transmission apparatus characterized by adding 0 or 1 to the bit string output to the phase modulation means when the bit string output to the amplitude information modulation means is a specific value. The bit dividing means includes
The case of amplitude information modulation unit bit string is a specific value to be output to the transmission device according to claim 1 3, characterized in that the addition of 0 or 1 in the bit string to be output to the phase modulation means. A transmission device that encodes and transmits a transmission sequence using a STBC (Space-Time Block Coding) or DSTBC (Differential Space-Time Block Coding) method,
  Bit dividing means for dividing the transmission sequence into three bit strings of a predetermined number of bits;
  Phase modulation means for generating phase modulation symbols by phase-modulating two bit strings of the bit strings output from the bit dividing means;
  Amplitude information modulation means for adjusting amplitudes of the two phase modulation symbols generated by the phase modulation means to generate amplitude information modulation symbols based on the value of the bit string that has not been subjected to phase modulation;
  Encoding means for STBC encoding or DSTBC encoding the two amplitude information modulation symbols output from the amplitude information modulating means;
  With
  The bit dividing means includes
  A transmission apparatus characterized in that when a bit string output to the amplitude information modulation means has a specific value, a part of two bit strings output to the phase modulation means is overlapped. The bit dividing means includes
The case of amplitude information modulation unit bit string is a specific value to be output to the transmission device according to claim 1 3, characterized in that to duplicate a portion of the two-bit string to be output to the phase modulation means. A transmission device that encodes and transmits a transmission sequence using a STBC (Space-Time Block Coding) or DSTBC (Differential Space-Time Block Coding) method,
Bit dividing means for dividing the transmission sequence into three bit strings of a predetermined number of bits;
Phase modulation means for generating phase modulation symbols by phase-modulating two bit strings of the bit strings output from the bit dividing means;
Amplitude information modulation means for adjusting amplitudes of the two phase modulation symbols generated by the phase modulation means to generate amplitude information modulation symbols based on the value of the bit string that has not been subjected to phase modulation;
Encoding means for STBC encoding or DSTBC encoding the two amplitude information modulation symbols output from the amplitude information modulating means;
With
The amplitude information modulating means includes
When a 2-bit bit string is input from the bit dividing means,
When the input bit string is 00, the first phase modulation symbol that is one of the two phase modulation symbols is multiplied by the amplitude coefficient a1, and the second phase modulation symbol that is the other of the two phase modulation symbols Is multiplied by an amplitude coefficient a2 (where a2 ≠ a1),
When the input bit string is 01, the first phase modulation symbol is multiplied by an amplitude coefficient a2, and the second phase modulation symbol is multiplied by an amplitude coefficient a1,
When the input bit string is 10, the first phase modulation symbol is multiplied by an amplitude coefficient a3 (where a3 ≠ a1, a3 ≠ a2), and the second phase modulation symbol is multiplied by an amplitude coefficient a4 (where a4 ≠ a1, a4 ≠ a2, a4 ≠ a3),
When the input bit string is 11, the first phase modulation symbol is multiplied by an amplitude coefficient a4, and the second phase modulation symbol is multiplied by an amplitude coefficient a3.
It shall be the said transmit device. The amplitude coefficients a1 and a2 have a relationship of ((a1) ² + (a2) ² ) / 2 = 1, and the amplitude coefficients a3 and a4 are ((a3) ² + (a4) ² ) / 2. The transmission device according to claim 18 , wherein the relationship is = 1. A symbol mapping method in a case where a transmission sequence is encoded and transmitted using STBC (Space-Time Block Coding) or DSTBC (Differential Space-Time Block Coding),
A bit dividing step of dividing the transmission sequence into three bit strings of a predetermined number of bits;
A phase modulation step of generating phase modulation symbols by phase-modulating two bit sequences of the three bit sequences obtained in the bit division step;
An amplitude information modulation step for generating amplitude information modulation symbols by adjusting the amplitudes of the two phase modulation symbols generated in the phase modulation step based on the value of the bit string not subjected to the phase modulation;
Only including,
In the amplitude information modulation step, the amplitude is adjusted by multiplying the two phase modulation symbols by an amplitude coefficient that makes the adjusted average power constant . When the amplitude coefficients to be multiplied for the two phase modulation symbols are a1 and a2, the a1 and the a2 are ((a1) ² + (A2) ² 21. The symbol mapping method according to claim 20, wherein a relationship of / 2 = 1 is established. A symbol mapping method in a case where a transmission sequence is encoded and transmitted using STBC (Space-Time Block Coding) or DSTBC (Differential Space-Time Block Coding),
A bit dividing step of dividing the transmission sequence into three bit strings of a predetermined number of bits;
A phase modulation step of generating phase modulation symbols by phase-modulating two bit sequences of the three bit sequences obtained in the bit division step;
An amplitude information modulation step for generating amplitude information modulation symbols by adjusting the amplitudes of the two phase modulation symbols generated in the phase modulation step based on the value of the bit string not subjected to the phase modulation;
Including
In the bit division step,
Of the two bit strings that are the object of the phase modulation, wherein a to Resid down Bol mapping method to the opposite one of the sorted. A symbol mapping method in a case where a transmission sequence is encoded and transmitted using STBC (Space-Time Block Coding) or DSTBC (Differential Space-Time Block Coding),
  A bit dividing step of dividing the transmission sequence into three bit strings of a predetermined number of bits;
  A phase modulation step of generating phase modulation symbols by phase-modulating two bit sequences of the three bit sequences obtained in the bit division step;
  An amplitude information modulation step for generating amplitude information modulation symbols by adjusting the amplitudes of the two phase modulation symbols generated in the phase modulation step based on the value of the bit string not subjected to the phase modulation;
  Including
  In the bit division step,
  A symbol mapping method comprising adding 0 or 1 to a bit string to be phase-modulated when the bit string not to be phase-modulated has a specific value. In the bit division step,
23. The symbol mapping method according to claim 22 , wherein when the bit string not subject to phase modulation has a specific value, 0 or 1 is added to the bit string subject to phase modulation. A symbol mapping method in a case where a transmission sequence is encoded and transmitted using STBC (Space-Time Block Coding) or DSTBC (Differential Space-Time Block Coding),
  A bit dividing step of dividing the transmission sequence into three bit strings of a predetermined number of bits;
  A phase modulation step of generating phase modulation symbols by phase-modulating two bit sequences of the three bit sequences obtained in the bit division step;
  An amplitude information modulation step for generating amplitude information modulation symbols by adjusting the amplitudes of the two phase modulation symbols generated in the phase modulation step based on the value of the bit string not subjected to the phase modulation;
  Including
  In the bit division step,
  A symbol mapping method, wherein, when a bit string that is not subject to phase modulation has a specific value, a part of two bit strings that are subject to phase modulation are overlapped. In the bit division step,
23. The symbol mapping method according to claim 22 , wherein when a bit string that is not subject to phase modulation has a specific value, a part of two bit strings that are subject to phase modulation are overlapped. A symbol mapping method in a case where a transmission sequence is encoded and transmitted using STBC (Space-Time Block Coding) or DSTBC (Differential Space-Time Block Coding),
A bit dividing step of dividing the transmission sequence into three bit strings of a predetermined number of bits;
A phase modulation step of generating phase modulation symbols by phase-modulating two bit sequences of the three bit sequences obtained in the bit division step;
An amplitude information modulation step for generating amplitude information modulation symbols by adjusting the amplitudes of the two phase modulation symbols generated in the phase modulation step based on the value of the bit string not subjected to the phase modulation;
Including
In the amplitude information modulation step,
When a 2-bit bit string is generated in the bit division step,
When the generated bit string is 00, the first phase modulation symbol that is one of the two phase modulation symbols is multiplied by the amplitude coefficient a1, and the second phase modulation symbol that is the other of the two phase modulation symbols Is multiplied by an amplitude coefficient a2 (where a2 ≠ a1),
When the generated bit string is 01, the first phase modulation symbol is multiplied by an amplitude coefficient a2, and the second phase modulation symbol is multiplied by an amplitude coefficient a1;
When the generated bit string is 10, the first phase modulation symbol is multiplied by an amplitude coefficient a3 (where a3 ≠ a1, a3 ≠ a2), and the second phase modulation symbol is multiplied by an amplitude coefficient a4 (where a4 ≠ a1, a4 ≠ a2, a4 ≠ a3),
When the generated bit string is 11, the first phase modulation symbol is multiplied by an amplitude coefficient a4, and the second phase modulation symbol is multiplied by an amplitude coefficient a3.
Features and to Resid down Bol mapping method that. The amplitude coefficients a1 and a2 have a relationship of ((a1) ² + (a2) ² ) / 2 = 1, and the amplitude coefficients a3 and a4 are ((a3) ² + (a4) ² ) / 2. = symbol mapping method according to claim 2 7, characterized in that the first relationship.

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