JP6183395B2 - Power supply control system and power supply control method - Google Patents

Description

  The present invention relates to a power supply control system and a power supply control method, and more particularly to a power supply control system and a power supply control method that perform backup when the power is turned off.

  In recent years, there are cases in which a secondary battery such as a lithium ion battery is used as a backup function for unexpected power interruption in a computer system. A secondary battery such as a lithium ion battery has a limit of 300 to several hundreds of times of charge and discharge, and if this is exceeded, the charge capacity stored by one charge is lowered and the performance of the battery cannot be maintained. In addition, even when the battery is used after being slightly discharged from the fully charged state and added, the capacity of the battery may be deteriorated depending on the nature of the battery material such as nickel cadmium. The amount of charge that can be charged over a long period of time is reduced, and the voltage value after charging cannot be maintained, making it difficult to reliably operate the backup operation assumed at the time of design. I need.

  In aerospace-use computer systems, the backup function needs to operate from an extremely low temperature environment to an extremely high temperature environment (approximately −40 ° C. to 85 ° C.). For secondary batteries such as lithium ion batteries, It is conceivable that the battery characteristics deteriorate in a wide temperature environment.

  Furthermore, the maximum current value is limited in a secondary battery such as a lithium ion battery. For example, in a computer system, when application software that requires a high calculation amount is being executed, a power failure occurs. Immediately after the power is turned off, a large current is required including the power supply to the external nonvolatile memory including the CPU. It may be considered that the maximum allowable current value of the secondary battery is exceeded instantaneously. In this case, the worst case may be an accident such as heat generation and ignition of the battery, which is a big problem particularly in the industrial equipment and aerospace fields that require reliability.

  As a technology related to the above, Patent Document 1 discloses that an electric double layer type capacitor is used and a power supply voltage abnormality is detected in order to protect data during processing or to properly terminate the system or to reduce the size. However, a technique for saving data being processed by this detection signal and other system end processing is disclosed.

  Further, Patent Document 2 uses a capacitor power storage device having a bank switching circuit that performs series-parallel switching of capacitors according to a charging voltage in order to be able to charge and discharge for a short time and to equalize a load. The technology of the power supply adjustment device that has been disclosed is disclosed.

JP-A-11-85328 JP 2001-186691 A

  However, since Patent Document 1 provides a backup power supply for a short time (about 10 seconds) in order to perform the end processing of the computer system, there is a problem that the backup voltage cannot be maintained for a long time. .

  In addition, Patent Document 2 provides a power supply that backs up for a short time (about 1 minute) for a power supply adjustment device that can charge and discharge for a short time. There was a problem that it was not possible.

  An object of the present invention is to take this into consideration, and in a computer system, the working state of the computer system can be stored on a volatile memory and maintained for a long time, and a power source can be used without using many components. It is to start the system immediately after returning.

  In the present invention, in order to solve the above-described problem, in a power supply control system that controls the output voltage of a power supply, an output is obtained by switching a connection between a switch unit that switches a capacitor connection between a series connection and a parallel connection, and a connection of the switch unit. And a control unit for controlling the voltage.

In the present invention, in the power supply control method for controlling the output voltage of the power supply, the step of outputting the output voltage, the step of switching the connection of the capacitor between the series connection and the parallel connection,
And a step of controlling the output voltage by switching the switch portion.

  According to the present invention, the working state of the computer system can be stored on the volatile memory and maintained for a long time, and the system can be started immediately after the power is restored without using many components.

It is a block diagram which shows the structure of the capacitor serial connection of the power supply control system in the 1st Embodiment of this invention. It is a block diagram which shows the structure of the capacitor parallel connection of the power supply control system in the 1st Embodiment of this invention. It is a figure which shows the mode of the connection switching of the capacitor of the power supply control system in the 1st Embodiment of this invention. It is a flowchart which shows operation | movement of the power supply control system in the 1st Embodiment of this invention. It is a timing chart which shows the voltage waveform of each terminal of the power supply control system in the 1st Embodiment of this invention. It is a block diagram which shows the structure of the power supply control system in the 2nd Embodiment of this invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
(First embodiment)
The configuration of the first embodiment of the present invention will be described with reference to FIGS. 1, 2, and 3. FIG. 1 is a block diagram showing a configuration of capacitor series connection of the power supply control system in the present embodiment. FIG. 2 is a block diagram showing a configuration of capacitor parallel connection of the power supply control system in the present embodiment. FIG. 3 is a diagram illustrating a state of switching connection of capacitors in the power supply control system according to the present embodiment.

  FIG. 1 shows a state in which the computer system is backed up in this embodiment. The main power source 2 supplied to the computer system 1 is a DC power source, and power is supplied to the computer system 1 via the path 3, and power is supplied to the power interruption detection circuit block 5 via the monitoring path 4. Has been.

  The power interruption detection circuit block 5 constantly monitors the voltage state of the main power supply. The power supply detection circuit block 5 is supplied with power by the capacitor 6, and even if the main power supply 2 of the computer system 1 is turned off, the operation of each IC in the power supply interruption detection circuit block 5 can be continued. . The power source detection circuit block 5 has a detection level setting unit 12 for setting a voltage level to be detected with the instantaneous interruption detection circuit 11. The instantaneous power interruption detection circuit 11 of the power interruption detection circuit block 5 is specifically composed of a voltage detector IC, and is “ON (1)” if the power supply above a certain threshold is turned on, and if it is below the threshold value. “OFF (0) is output. The voltage threshold value can be variably set by the detection level setting unit 12. Specifically, the detection level setting unit 12 uses a voltage dividing resistor or the like to convert the voltage obtained from the capacitor 6. During normal operation, the capacitor 6 is charged by the main power supply 2. Here, an electric double layer capacitor is used as the capacitors 6 to 10. Since the capacitance is large, it is used for memory backup and the like.

  Here, a Schottky diode 18 and a current limiting resistor 22 are arranged in series in the power supply path 21 supplied to the five capacitors 6 to 10 (in this embodiment, the number is five, but the number is not limited). The capacitor 6 to 10 is charged with an appropriate current value. In addition, since the Schottky diode 18 has the anode side connected to the positive voltage side of the main power supply and the cathode side connected to the capacitor side, the current is prevented from flowing backward to the main power supply side when the capacitor is discharged. Further, since the Schottky diode 23 is also connected in series to the path 3 supplied to the computer system 1, it is prevented from flowing back to the main power source side for the same reason. In addition, since the electric charges are held in the capacitors 6 to 10, the power supply to the computer system 1 is held for a certain period of time (several tens to several tens of seconds) even when the power is cut off.

  Further, a small-capacitance capacitor 24 (in this case, a normal electrolytic capacitor or the like may be provided) is supplementarily provided in the power input portion of the computer system 1, and even when the capacitors 6 to 10 perform the switching operation from series to parallel, The power supply voltage gradually decreases, and the shutdown process of the computer system 1 is performed according to a predetermined procedure.

  The computer system 1 is interrupted when the power-off detection circuit block 5 detects the occurrence of power-off, and the CPU 19 stores the CPU status, various peripheral hardware statuses, the operating system and user program system data in the same package. Are saved in the volatile memory 20 existing in the memory. The volatile memory 20 is backed up by a capacitor 6 (one of five connected in series in this figure).

  The power-off detection circuit block 5 monitors the voltage of the main power supply 2 and determines whether it is above or below a certain threshold from the state where the voltage drops. When it is determined that the threshold value is not more than the threshold value, “OFF (0)” is output, and the computer system 1 saves and saves the CPU status, various peripheral hardware statuses, operating system and user program system data in the volatile memory 20. Do. As a result, the work state of the computer system 1 before the power is turned off is saved.

  The withstand voltage V when the capacitors are connected in series is expressed by the equation (1). In FIG. 1, the capacitors 6 to 10 are connected in series by the switches 13 to 17. For example, the withstand voltage per capacitor is If the values V1 to V5 are set to 3V, it is possible to withstand voltages up to 15V because five are connected in series.

V = V1 + V2 + V3 + V4 + V5 Formula (1)
The switches 13 to 17 receive the output signal from the CPU 19 and can switch the series connection and the parallel connection of the capacitors 6 to 10. FIG. 2 shows a state in which the capacitors 6 to 10 are connected in parallel by switching the switches 13 to 17 and the volatile memory 20 is backed up (supplied with alternative power when the main power is cut off). The CPU 19 issues a signal to the switches 13 to 17 when the storage of the work data in the volatile memory is completed, whereby the switches 13 to 17 perform the switching operation, and the capacitors 6 to 10 change from the serial connection to the parallel connection. Be changed. The capacitance value of the capacitors when connected in parallel is expressed by equation (2).

C = C1 + C2 + C3 + C4 + C5 Formula (2)
As a result of the parallel connection, the capacity of the capacitor is increased by a factor of 5, and the volatile memory 20 can be backed up for a long time. Also, the voltage to be backed up is 1/5 as a result of all the capacitors being in parallel according to equation (1), and if it is charged at 12V, the backup is performed at 2.4V, and the appropriate volatile memory Match the input voltage.

  FIGS. 3A and 3B show how the series / parallel switching of the capacitors corresponds to the operation of the switch. Taking the capacitor 7 as an example, in the series connection shown in FIG. 3A, the lower electrode of the capacitor 7 is connected to the upper electrode of the capacitor 6 by the switch 13, and the upper electrode of the capacitor 7 is connected to the capacitor 8 by the switch 14. Connected to the lower electrode. In the case of parallel connection as shown in FIG. 3B, the lower electrode is connected to GND by the switch 13, and the upper electrode is connected to the power input terminal of the volatile memory 20 by the switch 14. For other capacitors, the connection destination of the upper and lower electrodes is switched by the same operation. However, for the capacitor 6, the volatile memory is also used during the switching period from the hibernation transition operation of the entire computer system 1 to the backup of the volatile memory. In order to back up, power is always supplied to the power input terminal of the volatile memory 20. Similarly, the power supply interruption detection circuit block 5 is always connected to supply power.

  The operation of the embodiment of the present invention will be described with reference to FIGS. FIG. 4 is a flowchart showing the operation of the power supply control system of the present embodiment. FIG. 5 is a timing chart showing voltage waveforms at respective terminals of the power supply control system of the present embodiment.

  In FIG. 4, it is assumed that the computer system 1 is in a normal operation state after the main power supply is turned on (S125). At this timing, the capacitor is in a series state (S126) by a signal from the CPU 19, and is charged with the voltage of the main power supply 2 (12V, etc.).

  When the computer system 1 is performing a normal operation (S127), if a power interruption (S134) occurs for some reason, the occurrence of a power interruption (S128) is detected and the computer is in a sleep state (resume). The transition to (S129) is started. The CPU 19 saves and saves the CPU status, status of various peripheral hardware, operating system and system data of the user program in the volatile memory 20 existing in the package.

  When the transition to the sleep state of the computer is completed (S130), the switches 13 to 17 receive the output signal from the CPU 19 and are switched from the series connection of the capacitors to the parallel connection (S131). A small-capacitance capacitor 24 is supplementarily provided in the power input portion of the computer system 1. For this reason, the power supply voltage gradually drops during switching, and the shutdown process is performed according to a predetermined procedure. After shifting to the state where the capacitors 6 to 10 are connected in parallel and the volatile memory 20 is backed up (S132), the data in the memory is retained for a long time. After the main power supply is restored again (S135), the work data before the power interruption stored in the volatile memory 20 is called, and the original state can be restored at a high speed (S133).

  The operation of this embodiment will be described using the timing chart of FIG. In FIG. 5, (a) to (f) show respective voltages and timings. FIG. 5A shows the power supply voltage of the computer main body (main power supply 2 in FIG. 1). FIG. 5B is a switch timing for switching the connection of the capacitors 6 to 10 (switches 13 to 17 in FIG. 1). 5C shows the input voltage Vin of the computer system 1 of FIG. 1, FIG. 5D shows the input voltage to the volatile memory 20 of FIG. 1, and FIG. 5E shows the signal path 31 of FIG. FIG. 5 (f) shows the CPU instruction path 30.

  Step numbers S134, S129, and S130 entered in FIG. 5C correspond to steps having the same numbers in FIG. In FIG. 5, (e) when the power-off detection circuit detects power-off (S128), (c) the backup voltage of the computer system is turned off (S134), and the backup process is started (S129). When the backup processing is completed (S130), (f) a command is issued from the CPU to the switch to rearrange the capacitors in parallel connection (S131). It takes about 10 seconds for the backup process to be completed after the power is turned off. During this time, the backup voltage of the computer system is kept high (8 to 12 V). Thereafter, the capacitor is switched from the series connection to the parallel connection, and (d) supplies a backup voltage of the memory.

As described above, according to this embodiment, the backup voltage is lowered by rearranging each capacitor from series connection to parallel connection by switching the switches of the electric double layer capacitors used until the work data is saved. The volatile memory can be backed up for a long time.
(Second Embodiment)
The configuration of the second embodiment of the present invention will be described with reference to FIG. FIG. 6 is a block diagram showing the configuration of the power supply control system in the second embodiment.

  In FIG. 6, the same components as those of FIG. FIG. 6 is obtained by adding DC / DC converters 36 and 37 to the configuration of FIG. The DC / DC converters 36 and 37 are step-up / step-down DC / DC converters that output a predetermined output voltage even if the input voltage changes within a predetermined input voltage range.

  When the power is cut off, the voltage supplied to the computer system 1 is backed up by the capacitors 6 to 10, but the backed up voltage decreases almost linearly with time. Here, if the DC / DC converter 36 that outputs a predetermined output voltage even if the input voltage changes, the predetermined output voltage can be output even if the input voltage decreases. By doing so, the voltage supplied to the computer system 1 can be held for a certain period, and the time for holding the optimum backup voltage of the computer system 1 can be extended.

  Since the DC / DC converter 37 performs the same operation, the time for holding the optimum backup voltage for the volatile memory 20 can be extended.

  As described above, by using the DC / DC converter, a voltage change similar to that of the secondary battery can be obtained. Therefore, it is possible to construct a power control system that can withstand practical use without using battery backup by the secondary battery.

  As described above, according to this embodiment, a high withstand voltage capacitor for backing up the entire computer system and a large capacity capacitor for holding data in a volatile memory for a long time are connected in series by switching the switch. Can be switched by connecting in parallel. In addition, since a path for supplying power to the volatile memory of the computer system is individually provided, the system can be activated immediately after the power is restored without using many components.

  The present invention is not limited to the above-described embodiment, and can be implemented with various changes and modifications without departing from the gist of the present invention. For example, the number of capacitors connected in series is five in the embodiment of the present invention. However, the number of capacitors is not limited to this number, and two outputs are output, but the number of capacitors is not limited. Further, when the capacitors are connected in series, a resistor may be added so that the voltage is evenly distributed to the capacitors connected in series.

  INDUSTRIAL APPLICABILITY The present invention can be used in a computer system that can save a computer working state in a memory when the power is turned off.

DESCRIPTION OF SYMBOLS 1 Computer system 2 Main power supply 3 Path | route 4 Monitoring path | route 5 Power-off detection circuit block 6-10 Capacitor 11 Instantaneous interruption detection circuit 12 Detection level setting part 13-17 Switch 18 Schottky diode 19 CPU
20 Volatile Memory 21 Power Supply Path 22 Resistor 23 Schottky Diode 24 Capacitor 30 CPU Instruction Path 31 Signal Path 36 DC / DC Converter 37 DC / DC Converter

Claims (5)

In the power supply control system that controls the output voltage of the power supply,
A plurality of capacitors for outputting the output voltage;
A switch unit for switching between a parallel connection the capacitors connected in series,
A control unit that controls the output voltage by switching connection of the switch unit;
A power-off detection means for outputting an interrupt signal to the control unit when a drop in the input voltage from the power source is detected;
Volatile storage means for storing a working state of the control unit;
I have a,
The control unit saves the working state in the volatile storage means when receiving the interrupt signal, and switches the connection of the switch unit to the parallel connection,
Power control system for supplying the power failure detecting means and the volatile memory means the capacitor is the output voltage is switched to the parallel connection. Wherein, by switching the switch portion, the capacitor voltage becomes higher in the case of series connection, when the capacitor is connected in parallel is described in 請 Motomeko 1 that controls so that the voltage becomes lower Power control system. It said power supply, said capacitor when performing the switching operation to the parallel connection of the series connection, the power supply control system according to 請 Motomeko 1 or 2 that have a low capacitance capacitor to lower the voltage of gently said power supply . In the power supply control system that controls the output voltage of the power supply,
Power control system according to item 1 of the 請 Motomeko 1 to 3 that have a constant voltage output unit the input voltage be varied to output a constant output voltage. In the power supply control method for controlling the output voltage of the power supply,
Outputting the output voltage;
A step of switching between a parallel connection of capacitors connected in series,
Controlling the output voltage by switching a switch unit;
A step of outputting an interrupt signal from the power-off detection means when detecting a decrease in input voltage from the power source;
A storage step of storing the working state in the volatile storage means;
When the interrupt signal is received, the working state is saved in the volatile storage means, and the connection of the switch unit is switched to the parallel connection,
Step a that power control method having a <br/> supplied to the capacitor the power failure detection means and the volatile memory means the output voltage is switched to the parallel connection.

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