JP6201490B2 - Semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device in which a metal layer and a semiconductor element bonded to the metal layer are sealed with a resin.

  In a semiconductor device sealed with a resin, the resin easily peels off from the metal layer due to the difference in thermal expansion coefficient between the metal layer and the resin, and the semiconductor element bonded to the metal layer may be damaged by the peeling of the resin. There is. In order to suppress the peeling of the resin, for example, Patent Literature 1 and Patent Literature 2 disclose a resin peeling prevention means that expects an anchor effect between the metal layer and the resin.

  In the semiconductor device disclosed in Patent Document 1, a heat spreader is mounted on an insulating sheet provided with a protective film on the back surface, and a power semiconductor chip is joined to the heat spreader with solder, and these are sealed with a mold resin. It has the structure made. A plurality of dimples are provided on the surface of the heat spreader. The dimple is composed of a hollow first bottom and a second bottom deeper than the first bottom, and the side wall of the second bottom is inclined so as to protrude inward of the hollow. The part is formed.

  The mold resin for sealing is also filled under the return portion, and the adhesion between the heat spreader and the mold resin is improved by the anchor effect. Therefore, even when a stress that peels off the heat spreader and the mold resin is applied during use of the semiconductor device or due to a change in ambient temperature, the peeling of the both is suppressed by the mold resin that has entered the lower side of the return portion.

  A semiconductor device disclosed in Patent Document 2 includes a semiconductor chip, a die pad on which the semiconductor chip is placed, a first lead extending integrally from each end on the short side of the die pad, and a die pad interposed therebetween And a pair of second leads extending to the outer side. On the side portion of the die pad, a thin-walled portion that extends substantially parallel to the mounting surface is provided. Further, a bent portion that is bent in a direction from the bottom surface to the upper surface is formed on the inner side of the second lead. The die pad, the semiconductor chip, the inner part of the first lead, and the inner part of the second lead are integrally sealed with a mold resin.

  Therefore, since the mold resin is filled in the bottom side region of the thin portion of the die pad, the die pad and the first lead are hardly separated even if the bottom surface of the die pad and the inner bottom surface of the first lead are exposed. In addition, since the mold resin is filled in a region on the bottom side of the bent portion formed on the inner side of the second lead, the second resin is exposed even if the bottom surface of the second lead is exposed on the bottom surface of the mold resin. The lead does not peel from the mold resin.

Japanese Patent No. 4086774 JP-A-11-103003

  The return portion disclosed in Patent Document 1 is a structure formed in a single layer heat spreader to which a power semiconductor chip is bonded, and the thin portion disclosed in Patent Document 2 is a single layer to which a semiconductor chip is bonded. It is the structure formed in the die pad. For this reason, each of the heat spreader and the die pad needs to have a certain thickness capable of forming a dimple having a return portion or an overhanging thin wall portion by processing.

  For this reason, the peeling prevention means of the mold resin disclosed in Patent Literature 1 and Patent Literature 2 can be used in the case of a specific thick metal plate. However, for example, when the metal layer to which the semiconductor element is bonded is made thinner in order to make the semiconductor device compact, it is difficult to process dimples and overhanging thin portions, and there is a problem that it cannot be used.

  An object of the present invention is to suppress peeling of a sealing resin in a semiconductor device.

Claim 1 is a semiconductor in which a plurality of metal layers are stacked on a ceramic layer having an insulating function, a semiconductor element is bonded to the uppermost metal layer, and the ceramic layer, the metal layer, and the semiconductor element are sealed with a resin. In the device, by forming an engaging portion projecting in a planar direction of the metal layer with respect to the lower metal layer in a part of the upper metal layer of at least two adjacent metal layers, A space is formed on the lower layer side of the engaging portion, the space on the lower layer side of the engaging portion is filled with the sealing resin, and a through hole is formed in the uppermost metal layer among the plurality of metal layers. A plurality of metals including the uppermost metal layer, wherein a through hole communicating with the through hole of the uppermost metal layer is formed in one or a plurality of lower metal layers than the uppermost metal layer. In the layer, the opening area of the through-hole in the lower metal layer is reduced between adjacent metal layers. By larger than the through hole of the layer-side metal layer, characterized in that the formation of the engagement portion around the through hole of the metallic layer.

  According to the first aspect, since the engaging portion filled with the resin is configured using the two metal layers, the engaging portion capable of filling the resin can be easily formed regardless of the thickness of the metal layer. The resin can be prevented from peeling from the metal layer due to the resin being caught in the engaging portion.

In addition, the engaging portion can be easily formed by merely drilling through holes having different opening areas in the plurality of metal layers. In particular, the engaging portion can be freely formed around the semiconductor element bonded to the metal layer, and damage to the semiconductor element due to resin peeling can be reliably eliminated.

Claim 2 is a semiconductor in which a plurality of metal layers are stacked on a ceramic layer having an insulating function, a semiconductor element is bonded to the uppermost metal layer, and the ceramic layer, the metal layer, and the semiconductor element are sealed with resin. In the device, by forming an engaging portion projecting in a planar direction of the metal layer with respect to the lower metal layer in a part of the upper metal layer of at least two adjacent metal layers, A space is formed on the lower layer side of the engaging portion, the space on the lower layer side of the engaging portion is filled with the resin for sealing, and a hook-shaped protrusion is formed on the upper surface of the uppermost metal layer. It is characterized by that. According to claim 2, since the resin using a metal layer of two layers constituting the engaging portion to be filled, regardless of the thickness of the metal layer, to easily form a fillable engaging portion of the resin The resin can be prevented from peeling from the metal layer due to the resin being caught in the engaging portion. In addition, by forming a hook-shaped protrusion on the upper surface of the uppermost metal layer to which the semiconductor element is bonded, the resin is filled in the space formed by the protrusion. The peeling of the resin from the surface of the uppermost metal layer can be more reliably suppressed.

According to a third aspect of the present invention, a heat spreader and a heat sink are joined to a surface of the ceramic layer opposite to the plurality of metal layers. According to the third aspect , by bonding the heat sink to the ceramic layer, the semiconductor device in which the peeling of the resin is suppressed can be sufficiently cooled.

  The present invention can suppress peeling of the sealing resin in the semiconductor device.

10 is a front view of a semiconductor device showing Reference Example 1. FIG. FIG. 2 is a longitudinal sectional view of the semiconductor device shown in FIG. 1. FIG. 3 is a schematic plan view of FIG. 2. 10 is a plan view of a semiconductor device showing a reference example 2. FIG. It is the sectional view on the AA line of FIG. 1 is a plan view of a semiconductor device showing a first embodiment. It is the BB sectional view taken on the line of FIG. (A) is a partial sectional view showing another example of the first embodiment, (B) is a partial sectional view showing another example of the other first embodiment, (C) the other of the first embodiment It is a fragmentary sectional view showing another example. It is a top view of the semiconductor device which shows a 2nd embodiment. It is CC sectional view taken on the line of FIG.

( Reference Example 1 )
Reference Example 1 will be described with reference to FIGS. In the semiconductor device 1, a metal layer 3 and a metal layer 4 are laminated on the upper surface of a ceramic layer 2 having an insulating function, a semiconductor element 5 is joined to the uppermost metal layer 4 by solder 6, and the lower surface of the ceramic layer 2 is bonded. The cooling heat spreader 7 and the heat sink 8 (shown only in FIG. 1) are joined.

  The metal layer 3 is bonded to the ceramic layer 2 by metal diffusion bonding, brazing, or the like. Further, the two metal layers 3 and 4 are made of, for example, the same kind of metal material selected from metal materials such as aluminum alloy and copper alloy, or different kinds of metal materials, metal diffusion bonding, brazing Bonding is performed using one of bonding means such as soldering, soldering, and ultrasonic bonding. Further, an electrode 9 and an electrode 10 are fixed to the uppermost metal layer 4 and the semiconductor element 5, respectively.

  As shown in FIG. 3, the adjacent metal layer 3 and metal layer 4 are both formed of a rectangular metal material, and the size and length of the metal layer 4 are larger than the metal layer 3 in both length and width. Is formed. Therefore, when the metal layer 3 and the metal layer 4 are laminated so that the centers thereof are aligned, the end surface position 11 around the metal layer 4 protrudes from the end surface position 12 around the metal layer 3 evenly in the plane direction of the metal layer 4. An engaging portion 13 is formed. Further, a space 14 is formed on the lower layer side of the engaging portion 13 by forming the engaging portion 13.

  Note that the metal layer 3 and the metal layer 4 do not necessarily have to be laminated with the center thereof aligned, and the end surface position 11 of the metal layer 4 needs to protrude from the end surface position 12 of the metal layer 3 with a uniform shift in the plane direction. There is no. Further, the engaging portion 13 does not need to be formed on the entire periphery of the metal layer 4.

  The ceramic layer 2, the metal layer 3, the metal layer 4, the semiconductor element 5, the electrode 9, and a part of the electrode 10 constituting the semiconductor device 1 are sealed and integrated with a thermosetting resin 15. The sealing resin 15 covers the upper surface of the ceramic layer 2, the entire area of the metal layer 3, the metal layer 4, and the semiconductor element 5, and fills the space 14 of the engaging portion 13 (see FIG. 2).

  A heat spreader 7 is bonded to the surface of the ceramic layer 2 opposite to the metal layers 3 and 4, and a heat sink 8 is bonded to the heat spreader 7. Heat generated by using the semiconductor device 1 is transmitted to the heat spreader 7 and cooled by the heat sink 8.

  The metal layer 3 and the metal layer 4 that constitute the semiconductor device 1 and the resin 15 that seals the metal layer 3 are made of materials having different coefficients of thermal expansion. For this reason, due to the heat generated by the use of the semiconductor device 1 and the temperature change around the semiconductor device 1, a force separating the metal layer 3 and the metal layer 4 from the resin 15 acts, and the resin 15 becomes a metal. There is a risk of peeling from the layer 3 and the metal layer 4.

However, in Reference Example 1 , the space 15 of the engaging portion 13 formed by the metal layer 3 and the metal layer 4 is filled with the resin 15. For this reason, since the force in the peeling direction is received by the engaging portion 13 when the resin 15 is caught by the engaging portion 13, the resin 15 is suppressed from peeling from the metal layer 3 and the metal layer 4. Further, since the engaging portion 13 uses the two adjacent metal layers 3 and 4, it can be easily formed regardless of the thickness of the metal layer 3 and the metal layer 4. Further, for example, the metal layer 3 and the metal layer 4 can be brazed together in the same process, and the engaging portion 13 can be formed without increasing the number of processes.

( Reference Example 2 )
4 and 5 show Reference Example 2. The same components as those in Reference Example 1 are denoted by the same reference numerals, and detailed description thereof is omitted. In Reference Example 2 , the lower metal layer 16 laminated on the ceramic layer 2 of the semiconductor device 1 and the uppermost metal layer 17 that joins the semiconductor element 5 are the same size as the metal layer 3 and the metal layer 4 in Reference Example 1 . It is comprised with the metal material formed in the square shape.

  The metal layer 17 has a plurality of cuts 18 on the peripheral end surface. The depth of the notch 18 is matched with the end face of the metal layer 16. Note that the depth of the cut 18 does not need to coincide with the end face of the metal layer 16 and can be set as appropriate. When the metal layer 17 is laminated on the metal layer 16, the end positions of the metal layer 16 and the metal layer 17 are shifted from each other in the plane direction of the metal layer 17, and a part of the metal layer 17 is in relation to the metal layer 16. An engaging portion 20 protruding in the plane direction is formed. That is, the metal layer 17 partially protrudes from the metal layer 16 to form the engaging portion 20. Further, a space 21 is formed on the lower layer side of each engaging portion 20 by forming the engaging portions 20. The ceramic layer 2, the metal layer 16, the metal layer 17, the semiconductor element 5, and the resin 15 that seals part of the electrode 9 and the electrode 10 are filled in the space 21 of each engaging portion 20.

Also in the reference example 2 , the force in the peeling direction generated between the metal layer 16 and the metal layer 17 and the resin 15 is received by each engagement portion 20 when the resin 15 is caught by each engagement portion 20. Therefore, the reference example 1 can suppress the resin 15 from peeling from the metal layer 16 and the metal layer 17, and can obtain the same effects as the reference example 1 .

6 and 7 show the first embodiment. The same reference numerals are given to the same components as those in the first embodiment, and detailed description thereof is omitted. The semiconductor device 1 according to the first embodiment includes a first metal layer 22 bonded to a ceramic layer 2 and an uppermost metal layer 23 in which two semiconductor elements 24 and 25 are joined by solders 26 and 27. Is done.

  The metal layer 22 and the metal layer 23 are made of a rectangular metal material having the same size. The metal layer 22 and the metal layer 23 may be made of metal materials having different sizes, or metal materials having shapes other than a square shape. Electrodes 28 and 29 are fixed to the uppermost metal layer 23 and the semiconductor elements 24 and 25, respectively.

  A total of seven through holes 30 to 36 having different opening areas are formed in the upper metal layer 23 so as to surround the semiconductor elements 24 and 25. In the metal layer 22 adjacent to the lower layer side of the metal layer 23, through holes 37 to 43 are formed at positions corresponding to the through holes 30 to 36. For example, a through hole 37 is formed corresponding to the through hole 30, and a through hole 38 is formed corresponding to the through hole 31. The through holes 37 to 43 are formed so as to communicate with the corresponding through holes 30 to 36, respectively, and are formed to have an opening area larger than the opening area of the corresponding through holes 30 to 36.

  By forming the through holes 37 to 43 having an opening area larger than the opening area of the through holes 30 to 36 in the metal layer 23 that hits the periphery of the through holes 30 to 36, the metal layer 23 is flat with respect to the metal layer 22. An engaging portion 44 protruding in the direction is formed, and a space 45 is formed on the lower layer side of the engaging portion 44 by the formation of the engaging portion 44. The ceramic layer 2, the metal layer 22, the metal layer 23, the semiconductor elements 24 and 25, a part of the electrode 28 and a part of the electrode 29 constituting the semiconductor device 1 are sealed with the resin 15 and integrated. Further, a part of the resin 15 passes through the through holes 30 to 36 of the uppermost metal layer 23 and fills the spaces 45 of the respective engaging portions 44.

Accordingly, the force in the peeling direction generated between the metal layer 22 and the metal layer 23 and the resin 15 is received by the resin 15 being caught by the engaging portions 44. Also in the first embodiment, the resin 15 can be prevented from peeling from the metal layer 22 and the metal layer 23, and the same effect as the reference example 1 can be obtained. In particular, since the engaging portion 44 can be formed as close as possible to the semiconductor elements 24 and 25 in the first embodiment, the resin 15 is prevented from being peeled off at positions close to the semiconductor elements 24 and 25. The influence on the semiconductor elements 24 and 25 due to the peeling of the resin 15 can be eliminated. Further, since the engaging portion can be formed regardless of the end face position of the outer shape of the metal layer, the engaging portion 44 can be formed at the position between the two semiconductor elements 24 and 25, and the peeling of the resin 15 can be suppressed.

(A), (B), and (C) of FIG. 8 show another example of the first embodiment. A semiconductor device 1 shown in FIG. 8A has a structure in which three metal layers 46, 47, and 48 are stacked on a ceramic layer 2. A through hole 49 and a through hole 50 having the same opening area are formed in the uppermost metal layer 48 and the metal layer 47 adjacent to the lower layer side. The through hole 49 and the through hole 50 are formed at corresponding positions and are in communication with each other. A through hole 51 having an opening area larger than that of the through hole 50 is formed in the metal layer 46 adjacent to the lower layer side of the upper metal layer 47 at a position corresponding to the through hole 50 of the metal layer 47.

Therefore, in the metal layer 47 that hits the periphery of the through hole 50 of the metal layer 47, the engagement portion 52 is formed by the metal layer 47 and the adjacent metal layer 46, and the engagement portion 52 is formed by the formation of the engagement portion 52. A space 53 is formed on the lower layer side of 52. The resin 15 (see FIG. 7) that seals the ceramic layer 2 and the metal layers 46, 47, 48 passes through the through hole 49 and the through hole 50 and fills the space 53 of the engaging portion 52. The engaging portion 52 has the same operational effects as the first embodiment.

  The semiconductor device 1 shown in FIG. 8B has a structure in which four metal layers 54, 55, 56, and 57 are stacked on the ceramic layer 2. A through hole 58 is formed in the uppermost metal layer 57, and a through hole 59 having an opening area smaller than the opening area of the through hole 58 is formed in the metal layer 56 adjacent to the lower layer side of the metal layer 57. It is drilled in a state communicating with 58. A through hole 60 having an opening area larger than that of the through hole 59 is formed in the metal layer 55 adjacent to the lower layer side of the upper metal layer 56 at a position corresponding to the through hole 59. The metal layer 54 has no through hole.

Therefore, in the metal layer 56 that hits the periphery of the through hole 59 of the metal layer 56, the engagement portion 61 is formed by the metal layer 56 and the adjacent metal layer 55, and the engagement portion 61 is formed by the formation of the engagement portion 61. A space 62 is formed on the lower layer side of 61. The resin 15 (see FIG. 7) that seals the ceramic layer 2 and the metal layers 54, 55, 56, 57 passes through the through hole 58 and the through hole 59 and fills the space 62 of the engaging portion 61. The engaging portion 61 has the same operational effects as the first embodiment. Further, in another example shown in FIG. 8B, the through hole 58 of the uppermost metal layer 57 has a large opening area, so that the resin 15 can be easily introduced into the space 62 of the engaging portion 61. Can expect function.

  A semiconductor device 1 shown in FIG. 8C has a structure in which four metal layers 63, 64, 65, and 66 are stacked on the ceramic layer 2. The uppermost metal layer 66 and the second metal layer 64 are provided with a through hole 67 and a through hole 68 having substantially the same opening area. A through hole 67 and a through hole 68 are formed in the third metal layer 65 adjacent to the lower layer side of the upper metal layer 66 and the first metal layer 63 adjacent to the lower layer side of the upper metal layer 64, respectively. A through hole 69 and a through hole 70 having a larger opening area than the through hole 67 and the through hole 68 are formed at positions corresponding to. The through hole 68, the through hole 69, and the through hole 70 are all configured to communicate with the uppermost through hole 67.

  Therefore, an engaging portion 71 is formed by the metal layer 66 and the metal layer 65 adjacent to the metal layer 66 that surrounds the through hole 67 of the metal layer 66, and the engaging portion 71 is formed by forming the engaging portion 71. A space 72 is formed on the lower layer side of 71. The metal layer 64 that hits the periphery of the through hole 68 of the metal layer 64 is formed with an engagement portion 73 by the metal layer 64 and the adjacent metal layer 63, and the engagement portion 73 is formed by the formation of the engagement portion 73. A space 74 is formed on the lower layer side of 73. The resin 15 (see FIG. 7) that seals the ceramic layer 2 and the metal layers 63, 64, 65, and 66 is filled into the space 72 of the engaging portion 71 through the through hole 67, and the through hole 67 and the through hole 69 are filled. The space 74 of the engaging portion 73 is filled through the through hole 68.

The other example shown in FIG. 8C has the same effect as that of the first embodiment, and in the stacking direction of the metal layers 63, 64, 65, 66, the engaging portions 71 and the engaging portions are arranged in two steps. Since it is the structure which formed the joint part 73, the peeling effect of bigger peeling of the resin 15 can be acquired.

(Second Embodiment)
FIG. 9 and FIG. 10 show the second embodiment, and the same components as those in Reference Example 1 are denoted by the same reference numerals and detailed description thereof is omitted. Illustration of the electrodes is omitted. In the second embodiment, a means for assisting the suppression of peeling is added to Reference Example 1 . In the semiconductor device 1 according to the second embodiment, in addition to the engaging portion 13 formed by the metal layer 3 and the metal layer 4, the uppermost metal layer 4 to which the semiconductor element 5 is bonded is disposed around the semiconductor element 5. In this configuration, hook-like protrusions 75 are formed at eight locations.

  The projecting portion 75 is formed in a bowl shape by partially punching the flat portion of the metal layer 4 and bending it upward, and further bending the head portion 76 of the removed portion in the plane direction of the metal layer 4. Accordingly, a space 77 is formed on the lower surface side of the head portion 76 of the protruding portion 75, similarly to the engaging portion 13 formed by the metal layer 3 and the metal layer 4.

  The ceramic layer 2, the metal layer 3, the metal layer 4, the semiconductor element 5, and the resin 15 that seals part of the electrode 9 and the electrode 10 (see FIG. 2) are filled in the space 14 of the engaging portion 13, The space 77 of the protrusion 75 is filled. Therefore, the force for separating the resin 15 from the metal layer 3 and the metal layer 4 is the engagement portion 13 at the end face position of the metal layer 3 and the metal layer 4 and the protrusion portion 75 at the upper surface side position of the metal layer 4 close to the semiconductor element 5. Therefore, peeling of the resin 15 can be more reliably suppressed.

  The present invention is not limited to the configuration of each of the embodiments described above, and various modifications are possible within the scope of the gist of the present invention, and can be implemented as follows.

(1) Although the metal layer of the semiconductor device 1 in Reference Example 1 is composed of two layers of the metal layer 3 and the metal layer 4, it can be composed of a plurality of metal layers of three or more layers. When the metal layer is composed of four or more layers, the engaging portion 13 is formed of two metal layers adjacent in the stacking direction of the metal layer, and the forming portion of the engaging portion 13 is 1 in the stacking direction. It can be formed not only at a location but at a plurality of locations.

(2) In Reference Example 1 , the metal layer 3 and the metal layer 4 are formed of metal materials having different sizes, but may be formed of metal materials formed of the same size. In this case, the engaging portion 13 can be formed by shifting the two layers of the metal material to either one side. If the two-layer metal material is shifted in the diagonal direction, the engaging portion 13 can be formed on the two sides of the metal material.

(3) Each of the metal layers 3, 4, 16, 17, 22, 23, 46 to 48, 54 to 57, and 63 to 66 shown in Reference Examples 1, 2, 1 , and 2nd embodiments are rectangular. Not limited to this, other shapes may be used.
(4) The semiconductor device 1 is a combination of the engaging portion 13 in Reference Example 1 and the engaging portion 44 (another engaging portion 52, 61, 73) in the first embodiment (including another example). It is good also as a structure.
(5) The protrusion 75 shown in the second embodiment may be configured as the semiconductor device 1 combined with the first embodiment.
(6) In the second embodiment, the semiconductor device 1 may be configured by forming the protrusion 75 as a separate component and bonding it to the uppermost metal layer 4.

DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Ceramic layer 3, 4, 16, 17, 22, 23, 46-48, 54-57, 63-66 Metal layer 5, 24, 25 Semiconductor element 7 Heat spreader 8 Heat sink 9, 10, 28, 29 Electrode 13, 20, 44, 52, 61, 71, 73 Engaging part 14, 21, 45, 53, 62, 72, 74, 77 Space 15 Resin 30-43, 49-51, 58-60, 67-70 Through Hole 75 Projection 76 Head

Claims (3)

In a semiconductor device in which a plurality of metal layers are stacked on a ceramic layer having an insulating function, a semiconductor element is bonded to the uppermost metal layer, and the ceramic layer, the metal layer, and the semiconductor element are sealed with a resin.
The engaging portion is formed by forming an engaging portion projecting in a planar direction of the metal layer with respect to the lower metal layer in a part of the upper metal layer of at least two adjacent metal layers. Forming a space on the lower layer side, filling the space on the lower layer side of the engaging portion with the resin for sealing ,
A through hole is formed in the uppermost metal layer among the plurality of metal layers, and the one or more metal layers lower than the uppermost metal layer communicate with the through hole of the uppermost metal layer. In the plurality of metal layers including the uppermost metal layer, the opening area of the through hole of the lower metal layer is larger than the through hole of the upper metal layer between adjacent metal layers. By forming the semiconductor device, the engaging portion is formed around the through hole of the metal layer . In a semiconductor device in which a plurality of metal layers are stacked on a ceramic layer having an insulating function, a semiconductor element is bonded to the uppermost metal layer, and the ceramic layer, the metal layer, and the semiconductor element are sealed with a resin.
The engaging portion is formed by forming an engaging portion projecting in a planar direction of the metal layer with respect to the lower metal layer in a part of the upper metal layer of at least two adjacent metal layers. Forming a space on the lower layer side, filling the space on the lower layer side of the engaging portion with the resin for sealing,
2. A semiconductor device , wherein a ridge-shaped protrusion is formed on the upper surface of the uppermost metal layer . Wherein on a surface thereof opposite to the plurality of metal layers of the ceramic layer, the semiconductor device according to claim 1 or 2, characterized in that joining the heat spreader and heat sink.

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