JP6219787B2 - Wiring board manufacturing method - Google Patents

Description

  The present invention relates to a method of manufacturing a wiring board with a built-in electronic component in which an electronic component is accommodated in a cavity provided in an insulating layer.

First, an example of a wiring board B manufactured by a conventional manufacturing method will be described with reference to FIG.
The wiring board B includes an insulating substrate 21, a first insulating layer 22, a second insulating layer 23, a wiring conductor 24, a solder resist layer 25, and an electronic component D.

The insulating substrate 21 is formed with a cavity 26 for accommodating the electronic component D. In the cavity 26, the electronic component D is accommodated in a state of being fixed by the first insulating layer 22 and the second insulating layer 23.
Further, a plurality of through holes 27 are formed in the insulating substrate 21. A wiring conductor 24 is deposited on the surface of the insulating substrate 21 and in the through hole 27. The wiring conductors 24 above and below the insulating substrate 21 are electrically connected via the through hole 27.

The first insulating layer 22 is deposited on the upper surface of the insulating substrate 21. The second insulating layer 23 is attached to the lower surface of the insulating substrate 21. A plurality of via holes 28 are formed in the first and second insulating layers 22 and 23. A wiring conductor 24 is deposited on the surfaces of the first and second insulating layers 22 and 23 and in the via hole 28. A part of the wiring conductor 24 on the upper surface of the first insulating layer 22 is electrically connected to the wiring conductor 24 on the upper surface of the insulating substrate 21 through a via hole 28. In addition, another part of the wiring conductor 24 on the surface of the first insulating layer 22 is electrically connected to the electrode T of the electronic component D through the via hole 28.
Further, a part of the wiring conductor 24 formed on the surface of the first insulating layer 22 is exposed in the first opening 25 a formed in the solder resist layer 25 to form a semiconductor element connection pad 29. The semiconductor element S is mounted on the upper surface of the wiring board B by connecting the electrodes of the semiconductor element S to the semiconductor element connection pads 29 via solder bumps.

A part of the wiring conductor 24 on the lower surface of the second insulating layer 23 is electrically connected to the wiring conductor 24 on the lower surface of the insulating substrate 21 through a via hole 28. Further, another part of the wiring conductor 24 on the lower surface of the second insulating layer 23 is electrically connected to the electrode T of the electronic component D through the via hole 28.
A part of the wiring conductor 24 formed on the lower surface of the second insulating layer 23 is exposed in the second opening 25b formed in the solder resist layer 25 and is connected to an external electric circuit board. A pad 30 is formed. Then, by connecting the external connection pad 30 and the electrode of the electric circuit board, the semiconductor element S is electrically connected to the external electric circuit board, and the wiring conductor is connected between the semiconductor element S and the external electric circuit board. The semiconductor element S is activated by transmitting a signal via the electronic component 24 and the electronic component D.
Examples of the electronic component D include a chip capacitor that stabilizes the supply of power to the semiconductor element S.

  Next, an example of a conventional method for manufacturing the wiring board B will be described with reference to FIGS. 7 and FIG. 8, the principal part for every manufacturing process is shown with a schematic sectional drawing. The same parts as those in FIG. 6 are denoted by the same reference numerals, and detailed description thereof is omitted.

  First, as shown in FIG. 7A, an insulating substrate 21 in which a wiring conductor 24 is formed in the through hole 27 and on the upper and lower surfaces is prepared. The insulating substrate 21 has a cavity forming region X and a cavity peripheral region Y surrounding the cavity forming region X.

  Next, as shown in FIG. 7B, a film F for laser processing is attached to the lower surface of the insulating substrate 21. This film F is for preventing the part divided | segmented by laser processing from scattering by fixing the insulating substrate 21 on the film F. FIG.

  Next, as shown in FIG. 7C, the cavity forming region X is separated from the cavity forming region Y by laser processing along the boundary between the cavity forming region X and the cavity peripheral region Y. At this time, since the divided cavity forming region X is fixed to the film F, it does not scatter.

  Next, as shown in FIG. 7D, the cavity 26 is formed by peeling and removing the film F to which the divided cavity forming region X is fixed.

  Next, the insulating substrate 21 is placed on the adhesive sheet N as shown in FIG.

  Next, as shown in FIG. 7 (f), the electronic component D is inserted into the cavity 26, and the electronic component D is placed on the adhesive sheet N exposed in the cavity 26.

  Next, as shown in FIG. 7G, the first insulating layer 22 is formed on the upper side of the insulating substrate 21. A part of the first insulating layer 22 penetrates into the cavity 26 and adheres to the electronic component D. As a result, the electronic component D is fixed at a predetermined position in the cavity 26. In order to form the first insulating layer 22, a method of laminating an uncured resin sheet for the first insulating layer 22 on the upper surface of the insulating substrate 21 and performing a heat treatment while pressing from above is adopted.

  Next, as shown in FIG. 8 (h), the pressure-sensitive adhesive sheet N is peeled off.

  Next, as shown in FIG. 8I, a second insulating layer 23 is formed on the lower side of the insulating substrate 21. A part of the second insulating layer 23 penetrates into the cavity 26 and adheres to the electronic component D. As a result, the electronic component D is sealed in the cavity 26.

  Next, as shown in FIG. 8 (j), a plurality of via holes 28 are formed in the first and second insulating layers 22 and 23. Some of the via holes 28 have the electrode T of the electronic component D as a bottom surface. The other via hole 28 has the wiring conductors 24 on the upper and lower surfaces of the insulating substrate 21 as bottom surfaces.

  Next, as shown in FIG. 8 (k), the wiring conductor 24 is deposited on the surfaces of the first and second insulating layers 22 and 23 and the via hole 28.

  Finally, as shown in FIG. 8 (l), the first opening 25a and the second opening 25b that expose a part of the wiring conductor 24 formed on the surfaces of the first and second insulating layers 22 and 23 are formed. The wiring board B is formed by depositing the solder resist layer 25 having the upper surface of the first insulating layer 22 and the lower surface of the second insulating layer 23.

By the way, when the wiring board B is formed by such a method, the laser processing film F needs to be attached to the insulating substrate 21 before the laser processing for forming the cavity 26. If the film F is not attached to the insulating substrate 21, for example, the cavity forming region X divided by laser processing may scatter and adhere to a portion of the insulating substrate 21 where laser processing is necessary. As a result, the laser irradiation on the surface of the insulating substrate 21 to which the cavity forming region X is attached is hindered, and accurate laser processing may not be performed.
Thus, since the process of sticking the film F to the insulating substrate 21 is necessary before the laser processing for forming the cavity 26, it takes time to form the cavity 26, and the wiring board can be efficiently produced. There is a problem that you can not.

Japanese Patent No. 4117390

  An object of the present invention is to provide a method of manufacturing a wiring board with high production efficiency by reducing the time required for forming a cavity.

  The method for manufacturing a wiring board according to the present invention includes a step of preparing an insulating substrate having a cavity forming region and a cavity peripheral region surrounding the cavity forming region, and a part of a boundary between the cavity forming region and the cavity peripheral region on the lower surface of the insulating substrate. Forming a conductor pattern across the substrate, laser-treating the insulating substrate from the upper surface to the lower surface along the boundary, and separating the cavity formation region from the cavity peripheral region while being locked by the conductor pattern, and the conductor The pattern is divided between the cavity forming region and the cavity peripheral region, and the cavity forming region is separated and removed from the insulating substrate.

According to the method for manufacturing a wiring board of the present invention, the conductor pattern that crosses a part of the boundary between the cavity forming region and the cavity peripheral region is formed on the lower surface of the insulating substrate. Then, by laser processing the insulating substrate from the upper surface to the lower surface along the boundary, the cavity forming region can be separated from the cavity peripheral region in a state where the cavity forming region is locked by the conductor pattern.
As a result, the cavity forming region is scattered and does not adhere to a place where laser processing of the surface of the insulating substrate is necessary, and high-precision laser processing can be performed.
As a result, there is no need to attach a film for laser processing to the insulating substrate before laser processing, and the time required for forming the cavity can be shortened to provide a method for manufacturing a wiring substrate with high production efficiency.

FIG. 1 is a schematic cross-sectional view showing an example of an embodiment of a wiring board manufactured by the manufacturing method of the present invention. FIG. 2A to FIG. 2F are schematic cross-sectional views of main parts for each step for explaining an example of the embodiment in the manufacturing method of the present invention. 3 (g) to 3 (k) are schematic cross-sectional views of main parts for each step for explaining an example of the embodiment in the manufacturing method of the present invention. FIG. 4 is an enlarged plan view of an essential part showing an example of an embodiment of a wiring board manufactured by the manufacturing method of the present invention. FIG. 5 is an enlarged plan view of a main part showing another example of the embodiment of the wiring board manufactured by the manufacturing method of the present invention. FIG. 6 is a schematic cross-sectional view showing an example of an embodiment of a wiring board manufactured by a conventional manufacturing method. FIGS. 7A to 7G are schematic cross-sectional views of relevant parts for each step for explaining an example of an embodiment in a conventional manufacturing method. 8 (h) to 8 (l) are schematic cross-sectional views of main parts for each process for explaining an example of an embodiment in the conventional manufacturing method.

First, an example of a wiring board A manufactured by the manufacturing method of the present invention will be described with reference to FIG.
The wiring board A includes an insulating substrate 1, a first insulating layer 2, a second insulating layer 3, a wiring conductor 4, a solder resist layer 5, and an electronic component D.

The insulating substrate 1 is formed with a cavity 6 for accommodating the electronic component D. In the cavity 6, the electronic component D is accommodated in a state of being fixed by the first insulating layer 2 and the second insulating layer 3.
A plurality of through holes 7 are formed in the insulating substrate 1. The wiring conductor 4 is attached to the surface of the insulating substrate 1 and in the through hole 7, and the wiring conductors 4 above and below the insulating substrate 1 are electrically connected via the through hole 7.

The first insulating layer 2 is attached to the upper surface of the insulating substrate 1. The second insulating layer 3 is attached to the lower surface of the insulating substrate 1. A plurality of via holes 8 are formed in the first and second insulating layers 2 and 3. A wiring conductor 4 is deposited on the surfaces of the first and second insulating layers 2 and 3 and the via hole 8.
A part of the wiring conductor 4 on the upper surface of the first insulating layer 2 is electrically connected to the wiring conductor 4 on the upper surface of the insulating substrate 1 through a via hole 8. Further, another part of the wiring conductor 4 on the surface of the first insulating layer 2 is electrically connected to the electrode T of the electronic component D through the via hole 8.
Further, a part of the wiring conductor 4 formed on the surface of the first insulating layer 2 is exposed in the first opening 5 a formed in the solder resist layer 5 to form a semiconductor element connection pad 9. Then, the semiconductor element S is mounted on the upper surface of the wiring board A by connecting the electrodes of the semiconductor element S to the semiconductor element connection pads 9 via solder bumps.

A part of the wiring conductor 4 on the lower surface of the second insulating layer 3 is electrically connected to the wiring conductor 4 on the lower surface of the insulating substrate 1 through a via hole 8. Further, another part of the wiring conductor 4 on the lower surface of the second insulating layer 3 is electrically connected to the electrode T of the electronic component D through the via hole 8.
In addition, a part of the wiring conductor 4 formed on the lower surface of the second insulating layer 3 is exposed in the second opening 5b formed in the solder resist layer 5, and is connected to an external electric circuit board. External connection pads 10 are formed. Then, by connecting the external connection pad 10 and the electrode of the electric circuit board, the semiconductor element S is electrically connected to the external electric circuit board, and the wiring conductor is connected between the semiconductor element S and the external electric circuit board. The semiconductor element S is activated by transmitting a signal via 4 and the electronic component D.
Examples of the electronic component D include a chip capacitor that stabilizes the supply of power to the semiconductor element S.

  Next, a method for manufacturing a wiring board according to the present invention will be described with reference to FIGS. 2 and 3 are schematic cross-sectional views showing the main part of each manufacturing process. FIG. 4 is an enlarged plan view showing the main part of the wiring board formed by the manufacturing method of the present invention. In addition, the same code | symbol is attached | subjected to the location same as the wiring board A demonstrated based on FIG. 1, and the detailed description is abbreviate | omitted.

First, as shown in FIG. 2A, an insulating substrate 1 having a through hole 7 and wiring conductors 4 formed on the upper and lower surfaces is prepared. The insulating substrate 1 has a cavity forming region X and a cavity peripheral region Y surrounding the cavity forming region X. Further, as shown in FIG. 4, a part of the wiring conductor 4 formed on the lower surface of the insulating substrate 1 forms a conductor pattern P crossing a part of the boundary between the cavity forming region X and the cavity peripheral region Y. Yes.
The insulating substrate 1 is made of an electrically insulating material in which a glass cloth is impregnated with a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin. The thickness of the insulating substrate 1 is about 40 to 600 μm.
The wiring conductor 4 is formed of a highly conductive metal such as copper by a known semi-additive method or subtractive method, for example.
The diameter of the through hole 7 is, for example, about 50 to 300 μm, and is formed by, for example, drilling, laser processing, or blasting.

  Next, as shown in FIG. 2B, the cavity forming region X is separated from the cavity peripheral region Y by laser processing along the boundary between the cavity forming region X and the cavity peripheral region Y. At this time, since the divided cavity forming region X is locked by the conductor pattern P, it does not scatter.

Next, as shown in FIG. 2C, the conductor pattern P is divided between the cavity forming region X and the cavity peripheral region Y, and the cavity forming region X is separated and removed from the insulating substrate 1. Thereby, the cavity 6 is formed.
In order to separate and remove the cavity forming region X from the insulating substrate 1, for example, the insulating substrate 1 is placed on a table having a suction port so that the cavity forming region X is on the suction port and sucked. The conductor pattern P is divided between the cavity forming region X and the cavity peripheral region Y and separated and removed.

  Next, the insulating substrate 1 is placed on the adhesive sheet N as shown in FIG.

  Next, as shown in FIG. 2E, the electronic component D is inserted into the cavity 6, and the electronic component D is placed on the adhesive sheet N exposed in the cavity 6.

  Next, as shown in FIG. 2 (f), the first insulating layer 2 is formed on the upper side of the insulating substrate 1. A part of the first insulating layer 2 penetrates into the cavity 6 and adheres to the electronic component D. Thereby, the electronic component D is fixed at a predetermined position in the cavity 6. In order to form the first insulating layer 2, a method of laminating an uncured resin sheet for the first insulating layer 2 on the upper surface of the insulating substrate 1 and performing a heat treatment while pressing from above is adopted. The 1st insulating layer 2 consists of an electrically insulating material containing thermosetting resins, such as an epoxy resin and a polyimide resin, for example, and thickness is about 15-70 micrometers.

  Next, as shown in FIG. 3G, the adhesive sheet N is peeled off.

  Next, as shown in FIG. 3H, the second insulating layer 3 is formed on the lower side of the insulating substrate 1. A part of the second insulating layer 3 penetrates into the cavity 6 and adheres to the electronic component D. Thereby, the electronic component D is sealed in the cavity 6. The second insulating layer 3 is made of an electrical insulating material containing a thermosetting resin such as an epoxy resin or a polyimide resin, and has a thickness of about 15 to 70 μm.

Next, as shown in FIG. 3 (i), a plurality of via holes 8 are formed in the first insulating layer 2 and the second insulating layer 3. Some via holes 8 have the electrode T of the electronic component D as a bottom surface. Another via hole 8 has the wiring conductor 4 on the surface of the insulating substrate 1 as a bottom surface.
The diameter of the via hole 8 is about 20 to 100 μm and is formed by laser processing, for example.

  Next, as shown in FIG. 3J, the wiring conductor 4 is deposited on the surfaces of the first insulating layer 2 and the second insulating layer 3 and in the via holes 8. The wiring conductor 4 is formed of a highly conductive metal such as copper by, for example, a known semi-additive method.

Finally, as shown in FIG. 3 (k), the first and second insulating layers 2 and 3 have a first opening 5a and a second opening 5b that expose a part of the wiring conductor 4 formed on the surface. The wiring board A is formed by depositing the solder resist layer 5 on the upper surface of the first insulating layer 2 and the lower surface of the second insulating layer 3.
For the solder resist layer 5, for example, a resin paste or film made of an electrically insulating material containing a thermosetting resin such as an epoxy resin or a polyimide resin is applied on the first and second insulating layers 2 and 3 and the wiring conductor 4. Alternatively, it is formed by sticking and thermosetting.

By the way, according to the method for manufacturing a wiring board of the present invention, the conductor pattern P is formed on the lower surface of the insulating substrate 1 so as to cross a part of the boundary between the cavity forming region X and the cavity peripheral region Y. Then, by laser processing the insulating substrate 1 along the boundary from the upper surface to the lower surface, the cavity forming region X can be separated from the cavity peripheral region Y in a state where the cavity forming region X is locked by the conductor pattern P.
Thereby, the cavity forming region X is scattered and does not adhere to a place where laser processing of the surface of the insulating substrate 1 is necessary, and laser processing with high accuracy can be performed.
As a result, it is not necessary to attach a film for laser processing to the insulating substrate 1 before laser processing, and it is possible to provide a method for manufacturing a wiring substrate with high production efficiency by reducing the time required for forming a cavity.

The present invention is not limited to an example of the above-described embodiment, and various modifications can be made without departing from the scope of the present invention. For example, in the above-described example, the conductor pattern P is formed so as to be connected to the wiring conductor 4 formed on the lower surface of the insulating substrate 1, but the conductor pattern P2 is not connected to the wiring conductor 14 as shown in FIG. You may form in the state of. Also in this case, the wiring conductor 14 is formed of a highly conductive metal such as copper by, for example, a well-known semi-additive method or subtractive method.

1 Insulating substrate A Wiring substrate P Conductor pattern X Cavity formation area Y Cavity peripheral area

Claims (1)

  Preparing an insulating substrate having a cavity forming region and a cavity peripheral region surrounding the cavity forming region, and forming a conductor pattern across a part of a boundary between the cavity forming region and the cavity peripheral region on a lower surface of the insulating substrate; Cutting the insulating substrate from the upper surface toward the lower surface along the boundary to divide the cavity forming region from the cavity peripheral region in a state of being locked by the conductor pattern, and the conductor A step of dividing the pattern between the cavity forming region and the cavity peripheral region, and separating and removing the cavity forming region from the insulating substrate.

Images