JP6287530B2 - Drive circuit system - Google Patents

Description

  The present invention relates to a drive circuit system.

  2. Description of the Related Art Conventionally, a driving circuit that can stably operate while preventing an increase in switching loss and destruction of a switching element is known (see Patent Document 1). In Patent Document 1, a rectifier diode is disposed in each of the on-gate resistor and the off-gate resistor, and the on / off of the switching element is controlled independently.

JP 2003-319638 A

  However, Patent Document 1 is disadvantageous in terms of cost because it uses two rectifier diodes. Therefore, it is conceivable to remove the rectifier diode. However, if the rectifier diode is removed, the resistance value of the circuit increases, and there is a possibility that a delay occurs in the switching operation.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a drive circuit system capable of speeding up a switching operation at low cost.

A drive circuit system according to one embodiment of the present invention is a drive circuit system that drives a switching element having a gate electrode, a drain electrode, and a source electrode, and the first drive element that drives the switching element from an off state to an on state includes A second drive element that is connected to the gate electrode via the first resistor and drives the switching element from the on state to the off state is connected to the gate electrode via the second resistor. Also includes a first capacitor connected between the first drive element and the connecting portion between the first resistor and the second drive element connecting unit of the second resistor.

  According to the present invention, the switching operation can be speeded up at a low cost.

FIG. 1 is a circuit diagram showing a configuration of a drive circuit system according to the first embodiment of the present invention. FIG. 2 is a circuit diagram showing a configuration of a drive circuit system according to the second embodiment of the present invention. FIG. 3 is a circuit diagram showing a configuration of a drive circuit system according to the third embodiment of the present invention. FIG. 4 is a circuit diagram showing a configuration of a drive circuit system according to the fourth embodiment of the present invention. FIG. 5 is a circuit diagram showing a configuration of a drive circuit system according to the fifth embodiment of the present invention. FIG. 6 is a circuit diagram showing a configuration of a drive circuit system according to the sixth embodiment of the present invention. FIG. 7 is a circuit diagram showing a configuration of a drive circuit system according to the seventh embodiment of the present invention. FIG. 8 is a circuit diagram showing a configuration of a drive circuit system according to the eighth embodiment of the present invention. FIG. 9 is a circuit diagram showing a configuration of a drive circuit system according to the ninth embodiment of the present invention. FIG. 10 is a circuit diagram showing a configuration of a drive circuit system according to the tenth embodiment of the present invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the description of the drawings, the same portions are denoted by the same reference numerals, and description thereof is omitted.

[First Embodiment]
The configuration of the drive circuit system according to the first embodiment will be described with reference to FIG.
The drive circuit system includes a drive circuit 1 and a switching element Q connected to the drive circuit 1. The drive circuit 1 outputs a drive signal to the gate electrode G of the switching element Q and controls on / off of the switching element Q.

  The switching element Q is a high voltage / high current power semiconductor having a drain electrode D as a high potential side electrode, a source electrode S as a low potential side electrode, and a gate electrode G as a control electrode. Wide band gap semiconductors such as SiC) and diamond (C) can be used. The switching element Q has a parasitic capacitance Cg between the gate and the source.

  The drive circuit 1 includes an NPN transistor T1 that is a drive element for driving the switching element Q from an off state to an on state, and a PNP type that is a drive element for driving the switching element Q from an on state to an off state. A push-pull circuit comprising a transistor T2, a gate resistor R1, a gate resistor R2, a capacitor C1, a drive power supply E1, and a signal generator 11 for supplying a drive signal for driving the transistors T1 and T2, Consists of

Next, the connection relationship of each component of the drive circuit 1 will be described.
The positive side of the drive power supply E1 is connected to the collector C of the transistor T1. The emitter E of the transistor T1 is connected to the switching element Q via the gate resistor R1. The emitter E of the transistor T2 is connected to the switching element Q via the gate resistor R2. A capacitor C1 is connected between the emitter E of the transistor T1 and the emitter E of the transistor T2. That is, the capacitor C1 is connected between a connection portion between the emitter E of the transistor T1 and the gate resistor R1 and a connection portion between the emitter E of the transistor T2 and the gate resistance R2. The base B of the transistor T1 and the base B of the transistor T2 are connected to the signal generator 11. Further, the negative electrode side of the drive power supply E1, the collector C of the transistor T2, and the source electrode S are connected to the signal generator 11.

  Note that although the transistors T1 and T2 are described as bipolar transistors, unipolar transistors capable of the same operation may be used.

  Next, the operation of the drive circuit system according to the first embodiment will be described.

First, the ON operation of the switching element Q will be described.
When an on signal is output from the signal generator 11, the transistor T1 is turned on and the transistor T2 is turned off, and a current flows through the parasitic capacitance Cg via the drive power supply E1, the transistor T1, and the gate resistor R1 (hereinafter, this current is referred to as “current”). The path is referred to as current path a). In addition, a current flows through the parasitic capacitance Cg through the drive power supply E1, the transistor T1, the capacitor C1, and the gate resistor R2 (hereinafter, this current path is referred to as a current path b). As a result, the gate-source voltage Vgs of the switching element Q increases. When the voltage Vgs exceeds the gate threshold voltage, the switching element Q is turned on.

  In FIG. 1, when the capacitor C1 is not provided, the resistance value of the current path is increased by the gate resistance R1 of the current path a and the gate resistance R2 of the current path b as compared with Patent Document 1. The gate resistance R1 and the gate resistance R2 not only function as a gate resistance of the switching element Q but also function as a base resistance of the transistor T1. That is, an increase in the resistance value causes a delay in the operation of the transistor T1. Therefore, in the first embodiment, the capacitor C1 is connected between the emitter E of the transistor T1 and the emitter E of the transistor T2. Thereby, since the impedance when the ON signal is input to the transistor T1 can be approximated to zero, the rising speed of the base current of the transistor T1 can be increased. Thereby, the rising speed of the drive signal input to the switching element Q can be increased.

  Here, the drive signal input to the switching element Q passes through two paths: a current path a to which the gate resistor R1 is connected and a current path b to which the capacitor C1 and the gate resistor R2 are connected in series. . The gate resistor R1 and the gate resistor R2 can control the movement immediately after the rising of the drive signal input to the switching element Q. That is, the capacitor C1 increases the rising speed of the base current of the transistor T1, and the gate resistance R1 and the gate resistance R2 control the movement immediately after the increased drive signal. Thereby, the drive circuit system can speed up the ON operation of the switching element Q.

Next, the off operation of the switching element Q will be described.
When an off signal is output from the signal generator 11, the transistor T1 is turned off and the transistor T2 is turned on, and the charge stored in the parasitic capacitance Cg is discharged by the output voltage of the driving power supply E1, and the parasitic capacitance Cg and the gate resistance R2 are discharged. Current flows through the transistor T2 (hereinafter, this current path is referred to as a current path c). In addition, a current flows through the transistor T2 via the parasitic capacitance Cg, the gate resistance R1, and the capacitor C1 (hereinafter, this current path is referred to as a current path d). As a result, the gate-source voltage Vgs of the switching element Q drops. When the voltage Vgs falls below the gate threshold voltage, the switching element Q is turned off.

  When the switching element Q is turned off, the resistance value of the current path is increased by the gate resistance R2 of the current path c and the gate resistance R1 of the current path d as in the on operation. Become. Therefore, the capacitor C1 is connected to increase the falling speed of the base current of the transistor T2. The gate resistance R1 and the gate resistance R2 control the movement immediately after the high-speed drive signal falls. Thereby, the drive circuit system can speed up the OFF operation of the switching element Q.

  As described above, in the drive circuit system according to the first embodiment, the rising speed of the base current of the transistor T1 is increased by the capacitor C1, and immediately after the rising of the drive signal increased by the gate resistance R1 and the gate resistance R2. To control the movement. Further, the drive circuit system increases the falling speed of the base current of the transistor T2 by the capacitor C1, and controls the movement immediately after the falling of the increased drive signal by the gate resistance R1 and the gate resistance R2. Thereby, the drive circuit system can speed up the switching operation at low cost.

  Depending on the capacitance of the capacitor C1, the on / off operation of the switching element Q can be further accelerated. For example, when the ON operation of the switching element Q is speeded up, when the output voltage of the drive power supply E1 is divided by the capacitance of the capacitor C1 and the parasitic capacitance Cg, the gate-source voltage Vgs becomes the gate threshold value of the switching element Q. What is necessary is just to set the capacity | capacitance of the capacitor | condenser C1 so that it may become more than a voltage. Thereby, the drive circuit system can further speed up the ON operation of the switching element Q.

  On the other hand, when the switching element Q is turned off at high speed, a voltage obtained by dividing the charge accumulated in the parasitic capacitance Cg by the output voltage of the driving power supply E1 by the capacitance (C1 + Cg) obtained by adding the parasitic capacitance Cg to the capacitance of the capacitor C1. However, the capacitance of the capacitor C1 may be set so as to be lower than the gate threshold voltage of the switching element Q. Thereby, the drive circuit system can further speed up the OFF operation of the switching element Q.

[Second Embodiment]
A second embodiment of the present invention will be described with reference to FIG. The second embodiment differs from the first embodiment in that a drive power supply E2 is provided in the drive circuit 2. More specifically, the negative side of the driving power source E2 is connected to the collector C of the transistor T2, and the positive side of the driving power source E2 is connected to the source electrode S and the negative side of the driving power source E2 and the signal generator 11.

  Since the driving power source E2 can apply a negative voltage between the gate and the source when the switching element Q is turned off, it is possible to suppress malfunction during the switching element Q being turned off.

[Third Embodiment]
A third embodiment of the present invention will be described with reference to FIG. The third embodiment differs from the second embodiment in that, in the drive circuit 3, the capacitor C1 is removed, and the capacitor C2 is connected in parallel to the gate resistor R1.

  With this configuration, since the impedance when the ON signal is input to the transistor T1 can be approximated to zero, the rising speed of the base current of the transistor T1 can be increased. Thereby, the drive circuit system can speed up the ON operation of the switching element Q.

  The capacitance of the capacitor C2 is such that the gate-source voltage Vgs is equal to or higher than the gate threshold voltage of the switching element Q when the output voltage of the drive power supply E1 is divided by the capacitance of the capacitor C2 and the parasitic capacitance Cg. Can be set. Thereby, the ON operation of the switching element Q can be further accelerated.

[Fourth Embodiment]
A fourth embodiment of the present invention will be described with reference to FIG. The fourth embodiment differs from the third embodiment in that a gate resistor R3 is provided between the transistor T1 and the gate electrode G of the drive circuit 4 and connected in series to the capacitor C2. .

  The gate resistor R3 can adjust the switching speed of the switching element Q that has been speeded up by the action of the capacitor C2. Thereby, the drive circuit system can adjust the amount of noise caused by switching. For example, in order to reduce the amount of noise, the gate resistance R3 may be increased.

[Fifth Embodiment]
A fifth embodiment of the present invention will be described with reference to FIG. The fifth embodiment differs from the second embodiment in that, in the drive circuit 5, the capacitor C1 is removed, and the capacitor C3 is connected in parallel to the gate resistor R2.

  With this configuration, since the impedance when the ON signal is input to the transistor T2 can be approximated to zero, the rising speed of the base current of the transistor T2 can be increased. Thereby, the drive circuit system can speed up the OFF operation of the switching element Q.

  The capacitance of the capacitor C3 is obtained by dividing the charge accumulated in the parasitic capacitance Cg by the output voltage of the drive power supply E1 by the capacitance (C3 + Cg) obtained by adding the parasitic capacitance Cg to the capacitance of the capacitor C3. It can be set to be equal to or lower than the gate threshold voltage. Thereby, the off operation of the switching element Q can be further speeded up.

[Sixth Embodiment]
A sixth embodiment of the present invention will be described with reference to FIG. The sixth embodiment differs from the fifth embodiment in that a gate resistor R4 is provided between the transistor T2 and the gate electrode G of the drive circuit 6 and connected in series to the capacitor C3. .

  The gate resistor R4 can adjust the switching speed of the switching element Q that has been speeded up by the action of the capacitor C3. Thereby, the drive circuit system can adjust the amount of noise caused by switching. For example, in order to reduce the amount of noise, the gate resistance R4 may be increased.

[Seventh Embodiment]
A seventh embodiment of the present invention will be described with reference to FIG. The drive circuit 7 of the seventh embodiment is a combination of the drive circuit 4 of the fourth embodiment and the drive circuit 6 of the sixth embodiment.

  With this configuration, the drive circuit system can increase the switching speed of both the on and off of the switching element Q. Furthermore, the drive circuit system can individually adjust the switching speed, and can adjust the amount of noise caused by switching.

[Eighth Embodiment]
With reference to FIG. 8, an eighth embodiment of the present invention will be described. The eighth embodiment differs from the second embodiment in that a capacitor C4 is connected in parallel to the parasitic capacitance Cg of the switching element Q in the drive circuit 8. That is, the capacitor C4 is connected to the gate electrode G and the source electrode S.

  There are cases where the switching element Q malfunctions due to a voltage change in the gate-source voltage Vgs that occurs when the switching element Q is switched at high speed. Therefore, the capacitor C4 is connected to increase the gate-source capacitance. Thereby, the drive circuit system can suppress the voltage change of the voltage Vgs, and can reduce the malfunction of the switching element Q.

  The capacity of the capacitor C1 is such that the voltage Vgs between the gate and the source when the output voltage of the drive power supply E1 is divided by the capacity (Cg + C4) obtained by adding the capacitor C4 to the parasitic capacity Cg and the capacity of the capacitor C1. You may set so that it may become more than the gate threshold voltage of the switching element Q. Thereby, the drive circuit system can speed up the ON operation of the switching element Q.

  The capacitance of the capacitor C1 is obtained by dividing the charge accumulated in the parasitic capacitance Cg and the capacitor C4 by the output voltage of the drive power supply E1 by the capacitance (C1 + Cg + C4) obtained by adding the capacitance of the parasitic capacitance Cg and the capacitor C4 to the capacitance of the capacitor C1. You may set so that a voltage may become below the gate threshold voltage of a switching element. Thereby, the drive circuit system can speed up the OFF operation of the switching element Q.

[Ninth Embodiment]
A ninth embodiment of the present invention will be described with reference to FIG. The ninth embodiment differs from the seventh embodiment in that in the drive circuit 9, a capacitor C4 is connected in parallel to the parasitic capacitance Cg of the switching element Q.

  With this configuration, the drive circuit system can increase the switching speed of both the on and off of the switching element Q. The drive circuit system can individually adjust the switching speed, and can adjust the amount of noise caused by switching. Further, since the gate-source capacitance increases, the voltage change of the gate-source voltage Vgs can be suppressed, and the malfunction of the switching element Q can be reduced.

  The capacitance of the capacitor C2 is such that the gate-source voltage Vgs is equal to the output voltage of the drive power supply E1 divided by the capacitance (Cg + C4) obtained by adding the capacitor C4 to the parasitic capacitance Cg and the capacitance of the capacitor C2. You may set so that it may become more than the gate threshold voltage of the switching element Q. Thereby, the drive circuit system can speed up the ON operation of the switching element Q.

  The capacitance of the capacitor C3 is obtained by dividing the charge stored in the parasitic capacitance Cg and the capacitor C4 by the output voltage of the drive power supply E1 by the capacitance (C3 + Cg + C4) obtained by adding the capacitance of the parasitic capacitance Cg and the capacitor C4 to the capacitance of the capacitor C3. You may set so that a voltage may become below the gate threshold voltage of a switching element. Thereby, the drive circuit system can speed up the OFF operation of the switching element Q.

[Tenth embodiment]
A tenth embodiment of the present invention will be described with reference to FIG. The tenth embodiment differs from the ninth embodiment in that in the drive circuit 10, a capacitor C1 is connected between the emitter E of the transistor T1 and the emitter E of the transistor T2.

  With this configuration, the drive circuit system can increase the switching speed of both the on and off of the switching element Q. The drive circuit system can individually adjust the switching speed, and can adjust the amount of noise caused by switching. Further, since the gate-source capacitance increases, the voltage change of the gate-source voltage Vgs can be suppressed, and the malfunction of the switching element Q can be reduced.

  Although the embodiments of the present invention have been described as described above, it should not be understood that the descriptions and drawings constituting a part of this disclosure limit the present invention. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.

1, 2, 3, 4, 5, 6, 7, 8, 9, 10 Drive circuit Q Switching element T1, T2 Transistor (drive element)
C1, C2, C3, C4 Capacitor Cg Parasitic capacitance R1, R2, R3, R4 Gate resistance E1, E2 Drive power supply 11 Signal generator

Claims (10)

A drive circuit system for driving a switching element having a gate electrode, a drain electrode and a source electrode,
A first driving element connected to the gate electrode via a first resistor and driving the switching element from an off state to an on state;
A second driving element connected to the gate electrode via a second resistor and driving the switching element from an on state to an off state;
Driving circuit system comprising: a first capacitor connected between the connection portion between the connecting portion and the second driving element and the second resistor of the first resistor and the first drive element . The at least one capacitor according to claim 1, further comprising at least one capacitor selected from a second capacitor connected in parallel to the first resistor and a third capacitor connected in parallel to the second resistor. Drive circuit system. A drive power supply for applying a voltage to the switching element;
Capacity before Symbol first capacitor, when the output voltage of the driving power source divided by the parasitic capacitance of the capacitor and the switching element of the first capacitor, the voltage between the gate and the source of the switching element of the switching element driving circuit system according to claim 1 or 2, characterized in that it is set such that the gate threshold voltage or more. A drive power supply for applying a voltage to the switching element;
The capacitor includes the second capacitor,
The capacitance of the second capacitor is the gate-source voltage of the switching element when the output voltage of the driving power source is divided by the capacitance of the second capacitor and the parasitic capacitance of the switching element. The drive circuit system according to claim 2 , wherein the drive circuit system is set to be equal to or higher than a threshold voltage. A drive power supply for applying a voltage to the switching element;
The capacitor includes the third capacitor,
The capacitance of the third capacitor is the voltage obtained by dividing the charge stored in the parasitic capacitance of the switching element by the output voltage of the driving power supply by the capacitance of the third capacitor plus the parasitic capacitance. The drive circuit system according to claim 2 , wherein the drive circuit system is set to be equal to or lower than a gate threshold voltage of the element. 3. The apparatus according to claim 2, further comprising at least one resistor selected from the group consisting of a third resistor connected in series to the second capacitor and a fourth resistor connected in series to the third capacitor . The drive circuit system according to any one of 4 and 5 . Driving circuit system according to any one of claims 1 to 6, further comprising a fourth capacitor connected between the source electrode and the gate electrode. A drive power supply for applying a voltage to the switching element;
The capacitance of the first capacitor is the switching voltage when the output voltage of the driving power source is divided by the capacitance obtained by adding the capacitance of the fourth capacitor to the parasitic capacitance of the switching element and the capacitance of the first capacitor. The drive circuit system according to claim 7 , wherein a voltage between a gate and a source of the element is set to be equal to or higher than a gate threshold voltage of the switching element. A driving power source for applying a voltage to the switching element ;
A fourth capacitor connected between the gate electrode and the source electrode;
The capacitor includes the second capacitor,
The capacitance of the second capacitor is the switching voltage when the output voltage of the driving power source is divided by the capacitance obtained by adding the capacitance of the fourth capacitor to the parasitic capacitance of the switching element and the capacitance of the second capacitor. The drive circuit system according to any one of claims 2, 4, and 6, wherein a voltage between a gate and a source of the element is set to be equal to or higher than a gate threshold voltage of the switching element. A driving power source for applying a voltage to the switching element ;
A fourth capacitor connected between the gate electrode and the source electrode;
The capacitor includes the third capacitor,
The capacitance of the third capacitor is the amount of charge stored in the parasitic capacitance of the switching element and the fourth capacitor by the output voltage of the drive power supply, and the capacitance of the third capacitor is the capacitance of the parasitic capacitance and the fourth capacitor. 7. The drive circuit system according to claim 2 , wherein a voltage divided by a capacitance added with the capacitance is set to be equal to or lower than a gate threshold voltage of the switching element. .

Images