JP6292880B2 - Power measuring device - Google Patents

Description

  The present invention relates to a power measurement device, and more particularly to an improvement of a power measurement device having a harmonic measurement function.

  FIG. 5 is a block diagram showing an example of a conventional power measuring apparatus. In FIG. 5, the entire power measuring apparatus is configured by an input unit 10, a calculation unit 20, and a CPU unit 30. The output signal of the input unit 10 is input to the calculation unit 20, and the calculation unit 20 is connected to the CPU unit 30 via a bus.

  The input unit 10 includes a voltage input unit 11, an A / D converter 12 that converts an analog signal output from the voltage input unit 11 into a digital signal, a current input unit 13, and an analog output from the current input unit 13. An A / D converter 14 for converting a signal into a digital signal, a voltage divider 15 connected to the outside of the voltage input terminal when measuring a high voltage, and a shunt connected to the outside of the current input terminal when measuring a large current 16.

  The voltage input unit 11 includes a voltage dividing resistor 11a and an operational amplifier 11b. The voltage divided output of the voltage dividing resistor 11a is normalized by the operational amplifier 11b and input to the A / D converter 12. The voltage divider 15 connected to the outside of the voltage input terminal at the time of measuring a high voltage converts a high voltage exceeding the input allowable range into a voltage within the input allowable range.

  The current input unit 13 includes a shunt resistor 13a and an operational amplifier 13b. The shunt output of the shunt resistor 13a is normalized by the operational amplifier 13b and input to the A / D converter 14. The shunt 16 connected to the outside of the current input terminal at the time of measuring a large current converts a large current exceeding the input allowable range into a current within the input allowable range. The outputs of these A / D converters 12 and 14 are input to the arithmetic unit 20.

  The arithmetic unit 20 is configured by an FPGA (Field Programmable Gate Array), and the outputs of the A / D converters 12 and 14 are input from a plurality of input units 10.

  The computing unit 20 includes a voltage computing unit 21 that computes an instantaneous voltage value based on the output of the A / D converter 12 of each input system, and a current that computes an instantaneous current value based on the output of the A / D converter 14. The calculation unit 22, the power calculation unit 23 that calculates the instantaneous value of power based on the outputs of the A / D converters 12 and 14, the instantaneous value calculated by the voltage calculation unit 21, the current calculation unit 22, and the power calculation unit 23 The instantaneous value storage unit 24 to store, the average value calculation unit 25 to calculate the average value of a predetermined section (for example, 50 msec to 20 sec) for the voltage value, current value, and power value stored in the instantaneous value storage unit 24, and the average An average value storage unit 26 that stores the average value calculated by the value calculation unit 25 is provided. The average value stored in the average value storage unit 26 is transferred and stored in the measurement data storage unit 34 of the CPU unit 30 in response to an interrupt from the CPU 31.

  Further, the calculation unit 20 is provided with an offset storage unit 27 in which the voltage offset value and the current offset value of each input system stored in the voltage offset storage unit 36 and the current offset storage unit 37 of the CPU unit 30 are transferred and stored. It has been. The voltage offset value and the current offset value transferred and stored in the offset storage unit 27 are used for instantaneous value calculation in the voltage calculation unit 21 and the current calculation unit 22.

  Further, the computing unit 20 is also provided with an FFT computing unit 28 that performs an FFT computation on digital signals input from a plurality of systems of input units 10 and divides the digital signal into a real part and an imaginary part.

  By implementing, for example, three systems of the input unit 10 and the calculation unit 20, the three phases can be measured simultaneously in parallel.

  The CPU unit 30 includes a CPU 31, an operation unit 32, a display unit 33, and the like that are connected to each other via a bus. The CPU 31 controls the overall operation of the apparatus. The operation unit 32 sets and inputs measurement conditions, offset processing conditions, and the like. The display unit 33 displays measurement conditions, offset processing conditions, measurement results, and the like.

  Further, the CPU unit 30 is provided with a measurement data storage unit 34, a measurement value calculation unit 35, a voltage offset storage unit 36, a current offset storage unit 37, an offset processing unit 38, and the like.

  As described above, the average value stored in the average value storage unit 26 is transferred and stored in the measurement data storage unit 34 in response to an interrupt from the CPU 31, and the real number unit calculated by the FFT calculation unit 28 is also stored. And imaginary part data, various calculation results in the measurement value calculation unit 35, and the like are also stored.

  The measurement value calculation unit 35 transfers various power, power factor, phase difference, etc. based on the voltage value, current value, average value of power value, data of real part and imaginary part, etc. transferred and stored in the measurement data storage part 34. Various parameters of the load circuit, harmonic content of voltage / current / active power, total harmonic distortion, and the like are calculated, and the calculation results are stored in the measurement data storage unit 34.

  In the voltage offset storage unit 36, when the voltage measurement range is changed according to the change of the voltage input signal, each input system measured in a state where the input terminal of the voltage divider 15 connected to the outside of the voltage input terminal is short-circuited. Stores the voltage offset value.

  In the current offset storage unit 37, when the current measurement range is changed in accordance with the change of the current input signal, each input system measured with the input terminal of the shunt 16 connected to the outside of the current input terminal short-circuited. Stores the current offset value.

  The offset processing unit 38 stores the average value of the voltage value and the current value transferred and stored in the measurement data storage unit 34 in the voltage offset value and current offset storage unit 37 stored in the voltage offset storage unit 36. DC offset compensation calculation processing of the voltage measurement value and the current measurement value based on the current offset value is performed. Specifically, the voltage offset value is subtracted from the average value of the voltage measurement values, and the current offset value is subtracted from the average value of the current measurement values.

The CPU 30 is also provided with a communication unit for transferring various data between the device and an external device, but not shown.

  FIG. 6 is a flowchart for explaining the flow of the harmonic measurement operation in the configuration of FIG. First, prior to the start of harmonic measurement, various parameters including measurement conditions are set (step S1).

  When the setting of various parameters of the measurement system for measuring harmonics is completed, it is determined whether or not a measurement start button (not shown) provided on the operation unit 32 has been pressed (step S2). When the measurement start button is pressed, harmonic measurement for the input signal is started, and the measured data of the harmonics measured is displayed on the display 33 (step S3).

  Each time harmonic measurement data is displayed, it is determined whether or not a measurement stop button (not shown) provided on the operation unit 32 has been pressed (step S4).

  In this way, the harmonic measurement operation is repeatedly executed until a depression of a measurement stop button (not shown) provided in the operation unit 32 is detected.

  When the depression of the measurement stop button is detected, the process returns to step S1 to wait for various parameter settings for performing the next measurement.

  In step S2, the return to step S1 is repeated until the depression of the measurement start button is detected.

  Non-Patent Document 1 describes a configuration of a power measurement device that has harmonic measurement and can measure the efficiency of a three-phase inverter with a single unit.

Hisashi Iwase, Osamu Ito, Katsuya Tachibana, “Precision Power Analyzer WT3000”, Yokogawa Technical Report, Yokogawa Electric Corporation, January 20, 2005, Vol. No. 49 1 (2005) p. 17-20

  By the way, in order to correctly perform harmonic measurement without error, it is necessary to appropriately set a plurality of measurement conditions and measurement data analysis conditions.

That is, in order to obtain a correct harmonic measurement result, for example,
a) Set the acquisition mode to normal or average,
b) Set the time base to internal,
c) Set the time axis to 2 ms / div or higher,
d) The sample rate must be set to 2 MS / s or higher.

  However, if an error occurs in the harmonic measurement result, it is difficult for the user to immediately identify the cause of the error from a number of conditions, and a considerable amount of work is required before obtaining the correct harmonic measurement result. Often costs.

  The present invention solves such a problem, and its purpose is to appropriately check the cause of the harmonic measurement result when an error occurs in the harmonic measurement result and to solve the cause. An object of the present invention is to provide a power measuring apparatus capable of efficiently measuring harmonics by quickly performing change setting.

In order to achieve such a problem, the invention according to claim 1 of the present invention is:
In a power measurement device having a harmonic measurement function,
Set the harmonic measurement management means for managing to display visible on the display means the processing status of definitive prior harmonic measurement processing execution,
The harmonic measurement management means determines whether or not all the setting conditions necessary for executing the harmonic measurement are satisfied before the harmonic measurement, visualizes and displays the result, and if not, the content of the cause Is displayed as a message on the display means,
The setting condition necessary for executing the harmonic measurement includes at least one of a time base setting, a time axis setting, and a sample rate setting.

The invention according to claim 2 is the power measuring device according to claim 1,
The power measuring device has an acquisition memory for storing measurement data,
The setting condition necessary for executing the harmonic measurement includes setting of an acquisition mode.

According to a third aspect of the present invention, in the power measuring apparatus according to the first or second aspect,
The harmonic measurement management means includes
Manage the visualization of the processing status before and after executing harmonic measurement processing on the display means,
After the harmonic measurement, it is determined whether all the setting conditions necessary for executing the harmonic analysis are satisfied, and if not satisfied, the cause is displayed as a message on the display means .
The setting condition necessary for executing the harmonic analysis is a frequency of a PLL source.

  As a result, conditions that are not satisfied with the settings and the cause of analysis errors are clearly indicated to the user as messages when measuring harmonics, so the user can remove the causes one by one, enabling efficient and accurate harmonics in a short time. Wave measurement results are obtained.

It is a block diagram which shows one Example of this invention. It is a display screen example figure of the indicator 33 in the electric power measurement apparatus based on this invention. It is a flowchart explaining the flow of the harmonic measurement operation | movement in the structure of FIG. It is a block diagram which shows the other Example of this invention. It is a block diagram which shows an example of the conventional electric power measurement apparatus. It is a flowchart explaining the flow of the harmonic measurement operation | movement in the structure of FIG.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention, and the same reference numerals are given to portions common to FIG. The difference between FIG. 1 and FIG. 5 is the configuration of the CPU unit 30.

  That is, a harmonic measurement management unit 39 is provided in the CPU unit 30 of FIG. The harmonic measurement management unit 39 has a function of managing the status before and after the execution of the harmonic measurement process so that the status is displayed as a message on the display device 33 and visualized.

  In order to perform harmonic measurement correctly without error, it is necessary to satisfy multiple menu setting conditions and data analysis conditions.

  The harmonic measurement management unit 39 has a pre-measurement function for determining setting conditions after setting parameters related to harmonic measurement, a post-measurement function for determining analysis conditions and setting conditions during measurement, and a harmonic status. It has a display function and changes the harmonic status display according to pre-measurement processing and post-measurement processing.

  FIG. 2 is an example of a display screen of the display device 33 in the power measuring apparatus according to the present invention. In FIG. 2, the display screen includes a measurement result display area a in the center, a measurement condition setting display area b adjacent to the upper part of the measurement result display area a, and waveform acquisition information adjacent to the lower part of the measurement result display area a. A display area c, an input module information display area d adjacent to the upper right side of the measurement result display area a, and a harmonic status display area e adjacent to the lower right side of the measurement result display area a are provided.

  The measurement result display area a is divided into upper and lower areas a1 and a2. The measurement values of a plurality of signals are digitally displayed in the upper area a1, and the plurality of measurement values displayed in the upper area a1 are displayed in the lower area a2. The signal waveform is displayed.

  The measurement condition setting display area b is provided with a left area b1, a right area b2, and a central area b3.

  In the left area b1, various setting information such as a setting channel related to the signal waveform displayed in the measurement result display area a, its measurement range, and vertical position are displayed.

  In the right area b2, the display record length, acquisition mode, and sample rate are displayed, and the harmonic setting status is displayed.

  In the central area b3, a range status indicator for displaying the range status of each measurement channel in a predetermined color such as blue / green / yellow / orange / gray / red, scaling, averaging, line filter, frequency Filter on / off setting information is displayed.

  In the waveform acquisition information display area c, various information relating to waveform acquisition, such as the waveform acquisition state, the number of waveform acquisitions, the waveform measurement start time, and trigger information, are displayed.

  In the input module information display area d, setting information such as a voltage range and a current range set for the connected input module is displayed for each module.

  In the harmonic status display area e, a PLL source and a message indicating the frequency and state of the PLL source are displayed. The display content of the harmonic status display area e is changed between pre-measurement processing and post-measurement processing.

  In the lower center of the display screen, a remote LED 40 and a harmonic enable LED 50 are provided. The remote LED 40 is turned on in the remote state and is turned off in the local state, and the harmonic enable LED 50 is turned on when the setting condition allows harmonic measurement.

The display of harmonic status will be described.
In the setting status, the cause of the setting error of the type that is found before measurement is displayed.
In the analysis status, the cause related to the type of analysis error or setting error that is found after measurement is displayed.

The basic operation of these pre-measurement processing and post-measurement processing will be described.
<Measurement pretreatment>
1) Set parameters related to harmonic measurement.
2) Check whether the measurement conditions are satisfied.
3) When all the conditions are satisfied, the harmonic enable LED 50 is turned on. If even one of the conditions is not satisfied, the harmonic enable LED 50 is turned off and an error message is displayed in the harmonic status display area e.

An example of an error message displayed in the harmonic status display area e when the condition is not satisfied is shown below.
・ When the time range for displaying the waveform is less than 2 ms / div
"Hrm Disabled: T / div ≥ 2ms / div"

<Post-measurement processing>
1) Press the measurement start button.
2) Check whether the analysis condition is satisfied for the data stored in the measurement data storage unit 34.
3) If even one of the conditions is not satisfied, an error message is displayed in the harmonic status display area e. If all the conditions are met, no error message is displayed in the harmonic status display area e.
4) Repeat 2) and 3) until the measurement stop button is pressed.

An example of an error message displayed in the harmonic status display area e when the condition is not satisfied is shown below.
・ When the PLL frequency exceeds the range
"PLL Err: Freq Over" setting error (type found after measurement)
・ Insufficient number of measurement data points from analysis start position “PLL Err: ACQ Points” analysis error

  FIG. 3 is a flowchart for explaining the flow of the harmonic measurement operation in the configuration of FIG. Similar to FIG. 5, prior to the start of harmonic measurement, various parameters including measurement conditions are set (step S1).

  When the setting of various parameters of the measurement system for measuring harmonics is completed, the harmonic measurement conditions similar to the measurement conditions for obtaining the above-mentioned conventional correct harmonic measurement results are established. It is determined whether or not (step S2).

  When it is determined that the measurement condition for measuring the harmonic is satisfied, the harmonic enable LED 50 is turned on (step S3).

  When the harmonic enable LED 50 is turned on, it is determined whether or not a measurement start button (not shown) has been pressed (step S4). When it is confirmed that the measurement start button has been pressed, it is determined whether or not the harmonic measurement analysis condition is satisfied (step S5).

  When the harmonic measurement analysis condition is satisfied, the harmonic measurement analysis operation for the input signal is started and executed, and the harmonic measurement data measured and analyzed is displayed on the display device 33 (step S6).

  Each time harmonic measurement data is displayed, it is determined whether or not a measurement stop button (not shown) provided on the operation unit 32 has been pressed (step S7).

  In this way, the harmonic measurement operation is repeatedly executed until a depression of a measurement stop button (not shown) provided in the operation unit 32 is detected.

  In step S7, when the depression of the measurement stop button is detected, the process returns to step S1 to wait for various parameter settings for performing the next measurement.

  If it is determined in step S2 that the harmonic measurement condition is not satisfied, the harmonic enable LED 50 is turned off, and the setting status of the harmonic measurement condition is displayed on the display 33 (step S8).

  If it is determined in step S4 that the measurement start button has not been depressed, the process returns to step S1 to wait for various parameter settings for performing the next measurement.

  If it is determined in step S5 that the harmonic measurement analysis condition is not satisfied, the analysis status is displayed on the display 33 (step S9).

  If it is determined in step S7 that the measurement stop button is not depressed, the process returns to step S5, and it is determined again whether the harmonic measurement analysis condition is satisfied.

  According to such a configuration, when performing harmonic measurement, conditions and analysis error causes that are not satisfied by the settings are visually displayed as messages on the display device 33, so that the user can identify those causes based on the messages. Therefore, harmonics can be measured reliably in a shorter time than conventional devices.

  Thereby, the user can grasp | ascertain whether a harmonic measurement is possible before performing a harmonic measurement at the time of setting a measurement condition, and can perform a harmonic measurement efficiently by resetting an appropriate measurement condition.

  In addition, if a computation error occurs after performing harmonic measurement, the cause of the error can be accurately grasped based on the displayed message, and the computation error can be shortened by taking appropriate measures to resolve the cause of the error. It can be solved in time.

  FIG. 4 is a block diagram showing another embodiment of the present invention, and the same reference numerals are given to portions common to FIG. The difference between FIG. 1 and FIG. 4 is the presence or absence of an acquisition memory 60 for storing measurement data (sampling data). That is, in FIG. 4, the input unit 10, the calculation unit 20, and the CPU unit 30 are connected to each other via an acquisition memory 60 that stores measurement data (sampling data).

  In the embodiment of FIG. 4, the output signal of each input unit 10 that is sampling data is temporarily stored in the acquisition memory 60. Then, the calculation unit 20 and the CPU unit 30 perform processing such as waveform display processing on the display device 33, various calculation processing, measurement of waveform parameters by setting a cursor at a desired position on the waveform displayed on the display screen, and the like. Various data are exchanged with the acquisition memory 60 according to the purpose.

  As described above, the input unit 10, the calculation unit 20, and the CPU unit 30 are connected to each other via the acquisition memory 60, so that past measurement data (sampling data) stored in the acquisition memory 60 can be used as necessary. You can read out and make harmonic measurements.

  In addition, this invention can be expand | deployed to the whole of the power analyzer which has a harmonic measurement function.

  The present invention can also be applied to harmonic analysis when loading waveform data.

  Furthermore, in the above-described embodiment, the example in which the visualization of the harmonic measurement processing status is performed before and after the execution of the harmonic measurement processing has been described. May be. For example, when the measurement status is stable but the analysis status is often unstable, only the harmonic analysis processing status may be visualized and displayed.

  As described above, according to the present invention, in the harmonic measurement, conditions that are not satisfied by the setting and the cause of the analysis error can be clearly shown to the user as a message, and the cause can be removed by the user one by one. It is possible to realize a power measurement device that can obtain accurate harmonic measurement results efficiently in time.

DESCRIPTION OF SYMBOLS 10 Input part 11 Voltage input part 12, 14 A / D converter 13 Current input part 20 Calculation part (FPGA)
DESCRIPTION OF SYMBOLS 21 Voltage calculating part 22 Current calculating part 23 Power calculating part 24 Instantaneous value storing part 25 Average value calculating part 26 Average value storing part 27 Offset storing part 28 FFT calculating part 30 CPU part 31 CPU
32 Operation unit 33 Display unit 34 Measurement data storage unit 35 Measurement value calculation unit 36 Voltage offset storage unit 37 Current offset storage unit 38 Offset processing unit 39 Harmonic measurement management unit 40 Remote LED
50 Harmonic enable LED
60 Acquisition memory

Claims (3)

In a power measurement device having a harmonic measurement function,
Set the harmonic measurement management means for managing to display visible on the display means the processing status of definitive prior harmonic measurement processing execution,
The harmonic measurement management means determines whether or not all the setting conditions necessary for executing the harmonic measurement are satisfied before the harmonic measurement, visualizes and displays the result, and if not, the content of the cause Is displayed as a message on the display means,
The power measurement apparatus, wherein the setting condition necessary for executing the harmonic measurement includes at least one of a time base setting, a time axis setting, and a sample rate setting. The power measuring device has an acquisition memory for storing measurement data,
The power measurement apparatus according to claim 1, wherein the setting condition necessary for executing the harmonic measurement includes setting of an acquisition mode. The harmonic measurement management means includes
Manage the visualization of the processing status before and after executing harmonic measurement processing on the display means,
After the harmonic measurement, it is determined whether all the setting conditions necessary for executing the harmonic analysis are satisfied, and if not satisfied, the cause is displayed as a message on the display means .
The power measurement apparatus according to claim 1, wherein the setting condition necessary for executing the harmonic analysis is a frequency of a PLL source.