JP6414602B2 - Composite electronic component and DCDC converter module - Google Patents

Description

The present invention relates to a substrate or lead frame, it relates composite electronic component having a plurality of elements including a semiconductor chip, in particular compact, a composite electronic component to facilitate high performance, including D CDC converter the composite electronic component Regarding modules.

  Japanese Patent Application Laid-Open No. 2005-228867 discloses a composite electronic component (hybrid integrated circuit device) configured to fix a semiconductor chip and a chip component on a substrate and connect the electrode of the chip component to the electrode on the substrate by wire bonding. Has been.

  Further, Patent Document 2 discloses an interposer in which a plurality of chip capacitors are provided inside and a plurality of semiconductor chips are mounted on the surface.

JP-A-3-52260 JP 2014-11284 A

  As shown in Patent Document 1, in the structure of connecting by wire bonding, the electrode to be wire bonded needs to be thickly plated with a composition such as Ni / Au. Therefore, a wire cannot be directly connected to a terminal of a general chip component. For example, the structure is as shown in FIG. FIG. 19 is a cross-sectional view of a composite electronic component in which the semiconductor chip 21 and the chip component 30 are die-bonded to the lead frame 11.

  However, the composite electronic component having the structure shown in FIG. 19 has the following problems.

(A) In the structure in which the chip component 30 is die-bonded to the lead frame 11 on which the semiconductor chip (die) 21 is mounted, a wiring pattern is formed by a part of the lead frame 11, so that the shape of the lead frame 11 is It becomes complicated. Therefore, problems such as high cost and a decrease in the non-defective product rate occur.

(B) While the fillet FL for ensuring reliability is preferably formed in a state where the chip component 30 is mounted, this causes a process cost. Further, when the chip component 30 is die-bonded to the lead frame 11, when the connection resistance of the die-bonding conductive material is large, the power efficiency is deteriorated when the chip component 30 is used at a location where a relatively large current flows.

(C) Since it is necessary not only to secure the insulating region S shown in FIG. 19 but also to secure the connection region C of the wire W, the interval between the semiconductor chip 21 and the chip component 30 cannot be shortened, The entire composite electronic component becomes larger.

(D) Since the lead frame terminal on which the chip component 30 is mounted becomes an island-like isolated terminal (non-connectable NC terminal), the heat dissipation on the back surface of the package is inferior. In addition, there is a concern of mounting defects.

  Further, as shown in Patent Document 2, a composite electronic component having an interposer in which a chip component is provided and a semiconductor chip is mounted on the surface requires a very low-profile chip component, resulting in component cost and manufacturing. Cost increases.

An object of the present invention is to include a composite electronic component that can improve the compatibility when a semiconductor chip and other chip components are contained in one package, and can be downsized and improved in electrical characteristics, and the composite electronic component. and to provide a free D CDC converter.

(1) The composite electronic component of the present invention is configured as follows.

A support material;
On the other hand, a semiconductor chip having a connection terminal on the main surface;
A chip component having a first connection terminal in the surface of one main surface and a second connection terminal in the surface of the other main surface;
Have
The support material has a die pad and a terminal different from the die pad,
The semiconductor chip is mounted on the die pad , with the other main surface opposite to the one main surface of the semiconductor chip being the die pad side,
The chip component is mounted so as to straddle the die pad and the terminal of the support material with the first connection terminal on the die pad side and the second connection terminal on the support material terminal side in plan view. ,
The chip component, and the second connection terminal to the terminal side of the support material, is die-bonded onto the terminal of the die pad and said support member, and said second connecting terminal is connected to the terminal of said support member ,
The connection terminal of the semiconductor chip and the first connection terminal of the chip component are directly connected via a wire without the support material,
It is characterized by that.

  With the above configuration, the connection structure of the chip component to the first and second connection terminals becomes rational, the resistance value of the current path becomes smaller, and the power loss can be reduced.

( 2 ) In the composite electronic component according to ( 1 ) above,
The support material is preferably a lead frame. This does not complicate the lead frame pattern. Moreover, the heat dissipation of chip components and semiconductor chips is enhanced.

( 3 ) The DCDC converter module of the present invention includes the composite electronic component according to the above (1) or (2) ,
The composite electronic component has a power input terminal, a power output terminal and a ground terminal,
The semiconductor chip is a switching power supply IC including a switching element and a switching control circuit,
The chip component is an inductance element, and at least a first end of the chip component is connected to the switching element.

  With the above configuration, the resistance value of the current path is reduced, power loss can be reduced, and high power conversion efficiency can be obtained. Further, the distance between the semiconductor chip and the chip component can be shortened, and the whole can be miniaturized. Moreover, since an island-like isolated terminal is unnecessary, high heat dissipation can be maintained.

According to the present invention, a semiconductor chip, is increased compatibility when accommodating the other chip components in one package, high composite electronic component having electrical characteristics compact, including D CDC converter the composite electronic component Is obtained.

FIG. 1 is a cross-sectional view of the main part of a composite electronic component 101 according to the first embodiment. FIG. 2 is a plan view of the composite electronic component 101 without a mold resin. 3A is a perspective view of the chip component 31, FIG. 3B is a cross-sectional view of the chip component 31, and FIG. 3C is a perspective view showing a structure of a conductor portion of the chip component 31. FIG. 4 is a circuit diagram of the composite electronic component 101 of this embodiment. FIG. 5 is a cross-sectional view of the main part of the composite electronic component 102 according to the second embodiment. FIG. 6 is a cross-sectional view of the main part of the composite electronic component 103 according to the third embodiment. FIG. 7 is a plan view of the composite electronic component 103 without a mold resin. FIG. 8A is a perspective view of the chip component 32, and FIG. 8B is a cross-sectional view of the chip component 32. FIG. 9 is a circuit diagram of the composite electronic component 103 of the present embodiment. FIG. 10 is a cross-sectional view of the main part of the composite electronic component 104 according to the fourth embodiment. FIG. 11 is a plan view of the composite electronic component 104 without a mold resin. 12A is a perspective view of the chip component 31, FIG. 12B is a cross-sectional view of the chip component 31, and FIG. 12C is a perspective view showing the structure of the conductor portion of the chip component 31. FIG. 13 is a circuit diagram of the composite electronic component 104 of this embodiment. FIG. 14 is a cross-sectional view of the main part of the composite electronic component 105 according to the fifth embodiment. FIG. 15 is a plan view of the composite electronic component 105 without a mold resin. 16A is a perspective view of the chip component 31, FIG. 16B is a cross-sectional view of the chip component 31, and FIG. 16C is a perspective view showing a structure of a conductor portion of the chip component 31. FIG. 17 is a plan view of the composite electronic component 106 according to the sixth embodiment in the absence of mold resin. FIG. 18 is a circuit diagram of the composite electronic component 106 of this embodiment. FIG. 19 is a cross-sectional view of a composite electronic component in which the semiconductor chip 21 and the chip component 30 are die-bonded to the lead frame 11.

  Hereinafter, several specific examples will be given with reference to the drawings to show a plurality of modes for carrying out the present invention. In the drawings, the same reference numerals are given to the same portions. In the second and subsequent embodiments, description of matters common to the first embodiment is omitted, and different points will be described. In particular, the same operation effect by the same configuration will not be sequentially described for each embodiment.

<< First Embodiment >>
In 1st Embodiment, the example of the composite electronic component which is a DCDC converter module is shown. FIG. 1 is a cross-sectional view of the main part of a composite electronic component 101 according to the first embodiment. FIG. 2 is a plan view of the composite electronic component 101 without a mold resin. FIG. 1 is a schematic cross-sectional view taken along line AA in FIG. This embodiment is a reference example.

  The composite electronic component 101 includes a lead frame (11a to 11f, 11P, etc.), a semiconductor chip 21, and a chip component 31, which are examples of support materials. The semiconductor chip 21 and the chip component 31 are mounted close to each other on the die pad 11P of the lead frame. The chip component 31 has connection terminals (pads) 31P1 and 31P2 on one main surface.

  The semiconductor chip 21 is mounted on the die pad 11P of the lead frame with the connection terminal on the upper surface side, and the chip component 31 is die-bonded on the die pad 11P with the connection terminals 31P1 and 31P2 on the upper surface side.

  As shown in FIG. 2, the lead frame includes terminals 11a, 11b, 11c, 11d, 11e, 11f and a die pad 11P. The semiconductor chip 21 includes a plurality of connection terminals, and predetermined terminals of the semiconductor chip 21 are connected to terminals 11a, 11b, 11d, 11e, and 11f of the lead frame via wires W1, W2, W5, W6, and W7, respectively. . In addition, the predetermined terminal of the semiconductor chip 21 is directly connected to the connection terminals 31P1 and 31P2 of the chip component 31 via the wires W3 and W4 without the support material.

  The connection terminal 31P1 of the chip component 31 is connected to the terminal 11c of the lead frame via a wire W8. Since there are two wires W8, the line resistance between the chip component 31 and the terminal 11c is reduced.

  The upper part of the lead frame is molded with a mold resin 40 such as an epoxy resin. Thus, the composite electronic component 101 is packaged in a QFN (Quad Flat Non-Leaded Package) or SON (Small Outline Non-Leaded Package) type. The composite electronic component 101 is mounted on a printed wiring board as a surface mount type electronic component.

  3A is a perspective view of the chip component 31, FIG. 3B is a cross-sectional view of the chip component 31, and FIG. 3C is a perspective view showing a structure of a conductor portion of the chip component 31. The chip component 31 is a laminate of a plurality of insulator layers including an insulator layer on which a plurality of conductor patterns are formed. The chip component 31 of this embodiment is an inductance element. The chip component 31 includes a coil conductor 31L and via conductors 31V1 and 31V2. The coil conductor 31L is a rectangular helical conductor pattern including a plurality of conductor patterns along the insulator layer and a plurality of interlayer connection conductors. The via conductor 31V2 passes through the coil winding range.

  FIG. 4 is a circuit diagram of the composite electronic component 101 of this embodiment. The composite electronic component 101 of the present embodiment is a DCDC converter module used for a DCDC converter. The composite electronic component 101 includes a semiconductor chip 21 and a chip component 31. The semiconductor chip 21 includes switching elements Q1 and Q2 and a switching control circuit 21C. A series circuit of the switching elements Q1, Q2 is connected between the power input terminal IN of the composite electronic component 101 and the ground terminal GND. One end of the chip component 31 which is an inductance element is connected to the connection point of the switching elements Q1 and Q2, and the other end is connected to the output terminal OUT of the composite electronic component 101. The enable terminal of the switching control circuit 21C is connected to the EN terminal of the composite electronic component 101.

  A power source E and an input capacitor Ci are connected to the power input terminal IN of the composite electronic component 101. An output capacitor Co is connected to the output terminal of the composite electronic component 101. The voltage of the output capacitor Co is supplied to the load. The output voltage is input to the feedback terminal FB of the switching control circuit 21C.

  According to the present embodiment, the following effects can be obtained.

(A) Since the lead frame only includes the terminals 11a to 11f arranged around the package and the die pad 11P at the center, the shape of the lead frame can be simplified.

(B) One end of the chip component 31 which is an inductance element and the connection point of the switching elements Q1 and Q2 are directly connected by a wire W4, and the other end of the chip component 31 and the output terminal OUT are connected by a wire W8. (See FIG. 2). Therefore, the conductor loss in the path with the largest current amount is suppressed.

(C) The distance between the semiconductor chip 21 and the chip component 31 can be shortened, and the entire composite electronic component 101 can be reduced in size.

(D) Since a die pad isolated in an island shape between the semiconductor chip 21 and the chip component 31 is not required, high heat dissipation can be maintained.

(E) Since no interposer is provided, the chip component 31 can be applied as long as it has the same size as the semiconductor chip 21, and the component cost and manufacturing cost are reduced.

<< Second Embodiment >>
In the second embodiment, an example of a composite electronic component packaged in an FBGA (Fine pitch Ball Grid Array) type is shown. This embodiment is a reference example.

  FIG. 5 is a cross-sectional view of the main part of the composite electronic component 102 according to the second embodiment. The composite electronic component 102 includes a laminated substrate 12, a semiconductor chip 21, and a chip component 31. The semiconductor chip 21 and the chip component 31 are mounted in the vicinity of the common electrode 12P formed on the laminated substrate 12. The chip component 31 has connection terminals (pads) 31P1 and 31P2 on one main surface.

  The multilayer substrate 12 is a printed multilayer substrate, and a plurality of connection terminals 12a, 12b and the like are formed on the upper surface. A plurality of lands are formed on the lower surface, and solder balls SB are provided on the lands.

  The semiconductor chip 21 is mounted on the common electrode 12P with the connection terminal on the upper surface side, and the chip component 31 is die-bonded on the common electrode 12P with the connection terminals 31P1 and 31P2 on the upper surface side.

  Wire bonding to the connection terminals 12a, 12b, etc. on the multilayer substrate 12 is the same as that of the lead frame type composite electronic component 101 shown in the first embodiment. In this way, an FBGA type composite electronic component can also be configured.

<< Third Embodiment >>
Unlike the first embodiment, the third embodiment includes not only an inductance element but also a capacitance element. This embodiment is a reference example.

  FIG. 6 is a cross-sectional view of the main part of the composite electronic component 103 according to the third embodiment. FIG. 7 is a plan view of the composite electronic component 103 without a mold resin. 6 is a cross-sectional view taken along line AA in FIG.

  The composite electronic component 103 includes a lead frame (11m, 11d, 11P, etc.) that is an example of a support material, a semiconductor chip 21, and chip components 31, 32. The semiconductor chip 21 and the chip components 31 and 32 are mounted close to each other on the die pad 11P of the lead frame. The chip component 31 has connection terminals 31P1 and 31P2 on one main surface. The chip component 32 has connection terminals 32P1 and 32P2 on one main surface.

  The semiconductor chip 21 is mounted on the die pad 11P of the lead frame with the connection terminal on the upper surface side, and the chip component 31 is die-bonded on the die pad 11P with the connection terminals 31P1 and 31P2 on the upper surface side. Are die-bonded on the die pad 11P with the connection terminals 32P1 and 32P2 on the upper surface side.

  As shown in FIG. 7, the lead frame includes terminals 11a, 11b, 11c, 11d, 11e, 11f, 11g, 11h, 11i, 11j, 11k, 11m and a die pad 11P. The semiconductor chip 21 has a plurality of connection terminals, and predetermined terminals of the semiconductor chip 21 are wires W5, W6, W10, W13, W7, W1 to terminals 11a, 11b, 11c, 11g, 11h, 11i, 11j of the lead frame, respectively. , W2 are connected. The predetermined terminals of the semiconductor chip 21 are directly connected to the connection terminals 31P1 and 31P2 of the chip component 31 via the wires W3 and W4 without using a support material.

  The connection terminals 31P1 and 31P2 of the chip component 31 are connected to the terminals 11d, 11e, and 11f of the lead frame via wires W8, W11, and W12.

  The connection terminals 32P1 and 32P2 of the chip component 32 are connected to the terminals 11m and 11k of the lead frame via wires W14 and W9.

  FIG. 8A is a perspective view of the chip component 32, and FIG. 8B is a cross-sectional view of the chip component 32. The chip component 32 is a laminate of a plurality of insulator layers including an insulator layer on which a plurality of conductor patterns are formed. The chip component 32 of this embodiment is a capacitance element. The chip component 32 includes planar conductors 32E1 and 32E2 and via conductors 32C1 and 32C2. Capacitances are formed in the opposing portions of the planar conductors 32E1 and 32E2, and are commonly connected by the via conductors 32C1 and 32C2.

  FIG. 9 is a circuit diagram of the composite electronic component 103 of the present embodiment. In the present embodiment, the composite electronic component 103 is a DCDC converter module incorporating an input capacitor. The chip component 32 of the composite electronic component 103 functions as an input capacitor connected between the power input terminal IN and the ground terminal GND. Therefore, the input capacitor Ci as shown in FIG. 4 is not required outside the composite electronic component 103. Other configurations are the same as those of the composite electronic component 101 shown in FIG. 4 in the first embodiment.

  In this embodiment, since a plurality of power input terminals IN, output terminals OUT, and ground terminals GND are provided, the line resistance of the path through which a relatively large current flows is low, and the loss is reduced. Further, the path length between the chip component 32, which is an input capacitor, and the semiconductor chip 21 is shortened, the semiconductor chip operates stably, and noise superposition to the input power supply line is effectively suppressed.

<< Fourth Embodiment >>
FIG. 10 is a cross-sectional view of the main part of the composite electronic component 104 according to the fourth embodiment. FIG. 11 is a plan view of the composite electronic component 104 without a mold resin. FIG. 10 is a cross-sectional view taken along line AA in FIG.

  The composite electronic component 104 includes a lead frame (11a to 11m, 11P, etc.) that is an example of a support material, a semiconductor chip 21, and chip components 31 and 32. The semiconductor chip 21 and the chip components 31 and 32 are mounted close to each other on the die pad 11P of the lead frame. The chip component 32 has two connection terminals on the upper surface. The chip component 31 has a connection terminal 31P1 on the upper surface and a connection terminal 31P2 on the lower surface. The center of the connection terminal 31P1 and the center of the connection terminal 31P2 are in positions that do not overlap in plan view.

  As shown in FIG. 11, the lead frame includes terminals 11a, 11b, 11c, 11d, 11e, 11f, 11g, 11h, 11i, 11j, 11k, 11m and a die pad 11P. The semiconductor chip 21 includes a plurality of connection terminals, and the predetermined terminals of the semiconductor chip 21 are connected to the terminals 11a, 11b, 11d, 11g, 11h, 11i, 11j, 11k, and 11m of the lead frame via wires. The predetermined terminal of the semiconductor chip 21 is directly connected to the connection terminal 31P1 of the chip component 31 through the wire W4 without the support material. Since there are two wires W4, the line resistance between the chip component 31 and the terminal of the semiconductor chip 21 is reduced.

  The chip part 32 is connected via a wire between one terminal of the semiconductor chip 21 and the terminal 11c of the lead frame.

  As shown in FIG. 10, the connection terminal 31P2 of the chip component 31 is die bonded to the terminals 11e and 11f of the lead frame.

  12A is a perspective view of the chip component 31, FIG. 12B is a cross-sectional view of the chip component 31, and FIG. 12C is a perspective view showing a structure of a conductor portion of the chip component 31. The chip component 31 is a laminate of a plurality of insulator layers including an insulator layer on which a plurality of conductor patterns are formed. The chip component 31 of this embodiment is an inductance element. The chip component 31 includes a coil conductor 31L and via conductors 31V1 and 31V2. The coil conductor 31L is a rectangular helical conductor pattern including a plurality of conductor patterns along the insulator layer and a plurality of interlayer connection conductors. Unlike the example shown in FIGS. 3A, 3B, and 3C in the first embodiment, the upper end of the rectangular helical conductor pattern is connected to the terminal 31P1 on the upper surface via the via conductor 31V1, and the rectangular helical The lower end of the conductor pattern is connected to the lower terminal 31P2 via the via conductor 31V2. According to this structure, the conductor portion that does not contribute much to the inductance is shortened, and the DCR (Direct Current Resistance) is small. Further, since the die bond connection on the terminal 31P1 side can be eliminated as compared with the conventional example of FIG. 19, the DCR can be reduced correspondingly, and the efficiency of the DCDC converter is improved.

  FIG. 13 is a circuit diagram of the composite electronic component 104 of this embodiment. In the present embodiment, the composite electronic component 104 is a DCDC converter module that incorporates an input capacitor. The basic circuit configuration is the same as that shown in FIG. 9 in the third embodiment. In the present embodiment, since the line resistance of the current path of the chip component 31 that is an inductance element is low, a highly efficient DCDC converter is configured.

<< Fifth Embodiment >>
FIG. 14 is a cross-sectional view of the main part of the composite electronic component 105 according to the fifth embodiment. FIG. 15 is a plan view of the composite electronic component 105 without a mold resin. 14 is a cross-sectional view taken along line AA in FIG. The structure of the chip component 31 is different from that of the fourth embodiment. This embodiment is a reference example.

  16A is a perspective view of the chip component 31, FIG. 16B is a cross-sectional view of the chip component 31, and FIG. 16C is a perspective view showing a structure of a conductor portion of the chip component 31. The chip component 31 is a laminate of a plurality of insulator layers including an insulator layer on which a plurality of conductor patterns are formed. The chip component 31 includes a coil conductor 31L and a via conductor 31V1. The chip component 31 includes a terminal 31P1 on the upper surface and a terminal 31P2 on one end. Unlike the example shown in FIGS. 10 and 12 in the fourth embodiment, the terminal 31P2 is formed on the five surfaces of one end of the laminate. The coil conductor 31L is a rectangular helical conductor pattern including a plurality of conductor patterns along the insulator layer and a plurality of interlayer connection conductors. The upper end of the rectangular helical conductor pattern is connected to the upper terminal 31P1 via the via conductor 31V1, and the lower end of the rectangular helical conductor pattern is connected to the terminal 31P2. According to this structure, the conductor portion that does not contribute much to the inductance is shortened, and the DCR is small. Further, compared to the fourth embodiment, the connection cross-sectional area between the terminal 31P2 and the lead frame is increased, the resistance value of the die bonding portion can be reduced, and the DCR of the die bonding portion can be reduced.

<< Sixth Embodiment >>
In the sixth embodiment, an example of a composite electronic component that is an example of a circuit module including a capacitor element for decoupling is shown. FIG. 17 is a plan view of the composite electronic component 106 according to the sixth embodiment in the absence of mold resin. This embodiment is a reference example.

  The composite electronic component 106 includes a lead frame (11a to 11f, 11P, etc.), a semiconductor chip 21 and a chip component 32, which are examples of support materials. The semiconductor chip 21 and the chip component 32 are mounted close to the die pad 11P of the lead frame. The chip component 32 has connection terminals (pads) 32P1 and 32P2 on one main surface.

  The semiconductor chip 21 is mounted on the die pad 11P of the lead frame with the connection terminal on the upper surface side, and the chip component 31 is die-bonded on the die pad 11P with the connection terminals 32P1 and 32P2 on the upper surface side.

  As shown in FIG. 17, predetermined terminals of the semiconductor chip 21 are connected to terminals 11a, 11b, 11c, 11e, and 11f of the lead frame via wires W1, W2, W3, W6, and W7, respectively. In addition, the predetermined terminal of the semiconductor chip 21 is directly connected to the connection terminal 32P1 of the chip component 32 through the wire W4 without the support material. The connection terminal 32P2 of the chip component 32 is connected to the terminal 11d of the lead frame via a wire W5.

  FIG. 18 is a circuit diagram of the composite electronic component 106 of this embodiment. In the present embodiment, the composite electronic component 106 is a circuit module used for an AD conversion circuit. The semiconductor chip 21 converts the voltage of the signal input terminal SIN into a digital value of a predetermined number of bits, and outputs the AD conversion value to an external circuit via the serial data communication signal lines SCL and SDA.

  The chip component 32 is a capacitance element. One end of the chip component 32 is connected to the power supply line of the semiconductor chip 21 and the other end is a decoupling capacitor connected to the ground.

  According to the present embodiment, since the current path length from the semiconductor chip to the decoupling capacitor element is short, the equivalent series inductance (ESL) is small and the noise reduction effect is high. In addition, the ESL of the capacitor alone need not be so small.

  Finally, the description of the above embodiment is illustrative in all respects and not restrictive. Modifications and changes can be made as appropriate by those skilled in the art. For example, partial replacements or combinations of the configurations shown in the different embodiments are possible. The scope of the present invention is shown not by the above embodiments but by the claims. Furthermore, the scope of the present invention is intended to include all modifications within the meaning and scope equivalent to the scope of the claims.

  For example, in each embodiment, the semiconductor chip and the chip component are disposed adjacent to each other on the support material. However, the semiconductor chip and the chip component to be wire-connected are close to each other and between the semiconductor chip and the chip component. Other chip parts may be arranged on the board.

  For example, although the step-down converter is illustrated in FIGS. 4, 9, and 13, it can be similarly applied to a step-up converter and a step-up / step-down converter.

C ... Connection area Ci ... Input capacitor Co ... Output capacitor E ... Power supply FL ... Fillet GND ... Ground terminal IN ... Power supply input terminal OUT ... Output terminals Q1, Q2 ... Switching element S ... Insulation area SB ... Solder balls SCL, SDA ... Signal Line SIN ... Signal input terminal,
W, W1 to W14 ... wire 11 ... lead frames 11a, 11b, 11c, 11d, 11e, 11f, 11g, 11h, 11i, 11j, 11k, 11m ... terminal 11P ... die pad 12 ... laminated substrate 12a, 12b ... connection terminal 12P ... Common electrode 21 ... Semiconductor chip 21C ... Switching control circuits 30, 31, 32 ... Chip components 31E1, 32E2 ... Planar conductor 31L ... Coil conductors 31P1, 31P2 ... Connection terminals 31V1, 31V2 ... Via conductors 32C1, 32C2 ... Via conductors 32E1, 32E2 ... Planar conductors 32P1, 32P2 ... Connection terminals 40 ... Mold resins 101 to 106 ... Composite electronic components

Claims (3)

A support material;
On the other hand, a semiconductor chip having a connection terminal on the main surface;
A chip component having a first connection terminal in the surface of one main surface and a second connection terminal in the surface of the other main surface;
Have
The support material has a die pad and a terminal different from the die pad,
The semiconductor chip is mounted on the die pad , with the other main surface opposite to the one main surface of the semiconductor chip being the die pad side,
The chip component is mounted so as to straddle the die pad and the terminal of the support material with the first connection terminal on the die pad side and the second connection terminal on the support material terminal side in plan view. ,
The chip component, and the second connection terminal to the terminal side of the support material, is die-bonded onto the terminal of the die pad and said support member, and said second connecting terminal is connected to the terminal of said support member ,
The connection terminal of the semiconductor chip and the first connection terminal of the chip component are directly connected via a wire without the support material,
A composite electronic component characterized by that. It said support member is a lead frame, a composite electronic component according to claim 1. A composite electronic component according to claim 1 or 2 ,
The composite electronic component has a power input terminal, a power output terminal and a ground terminal,
The semiconductor chip is a switching power supply IC including a switching element and a switching control circuit,
The chip component is an inductance element, a first end of the chip component is connected to the switching element, and a second end is connected to the power output terminal.
DCDC converter module.

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