JP6425611B2 - Semiconductor device and method of manufacturing the same - Google Patents

Description

  The present invention relates to a semiconductor device having a termination structure of a semiconductor element and a method of manufacturing the same.

  In recent years, high breakdown voltage is required for semiconductor devices such as IGBTs (Insulated Gate Bipolar Transistors) and diodes for electric railways and the like. In such a flow, a technique is proposed in which these semiconductor elements are provided with a termination structure for achieving a desired breakdown voltage (for example, Patent Document 1).

  Specifically, in order to maintain a desired voltage, a high insulating layer called a depletion layer for maintaining a high voltage is formed inside the semiconductor element. However, since the depletion layer tends to extend from the main junction of the semiconductor element adjacent to the termination structure to the termination structure located in the lateral direction, in order to stably hold a desired voltage, the depletion layer is a semiconductor It needs to be fixed inside the element (chip). Therefore, a structure called a channel stopper for retaining a depletion layer may be provided at the outermost chip end of the termination structure.

JP, 2000-183366, A

  In a semiconductor device having a general termination structure, an insulating film such as polyimide is provided on the uppermost surface between the electrode on the front side and the channel stopper from the viewpoint of stabilization of withstand voltage and improvement of reliability. However, when a high voltage is applied from the back surface with the potential of the front side electrode as the ground potential, the channel stopper disposed on the front side may be substantially the same as the potential on the high voltage side of the back surface. In addition, since the creeping distance between the electrode on the front side and the channel stopper has become shorter due to the recent reduction of the termination structure, there is a problem that a creeping discharge may occur between them through the air. is there.

  In addition, since an actual product is filled with an organic compound such as an insulating gel or resin, creeping discharge is prevented in the actual product. However, for example, at the time of shipping inspection of a single chip before mounting a semiconductor element on a product, there is a problem that it is necessary to take measures against creeping discharge.

  Then, this invention is made in view of the above problems, and an object of this invention is to provide the technique which can suppress generation | occurrence | production of creeping discharge.

A semiconductor device according to the present invention comprises a semiconductor element having an electrode, a termination structure adjacent to the semiconductor element, and a channel stopper disposed apart from the electrode, an aluminum wiring, a base insulating film, and The substrate is made of any of semi-insulating films and is disposed between the electrode and the channel stopper in plan view, and between the electrode and the channel stopper in plan view, The insulating film is provided with an insulating film, and the insulating film is provided with a cut that exposes the base and the upper part is not covered by a metal member, and a part of the upper part of the channel stopper is exposed from the insulating film There is.

  According to the present invention, since the creeping distance can be increased by the cut portion, the occurrence of creeping discharge can be suppressed.

It is sectional drawing which shows the structure of a related semiconductor device. FIG. 1 is a cross-sectional view showing a configuration of a semiconductor device according to a first embodiment. FIG. 7 is a cross-sectional view showing a configuration of a semiconductor device according to Second Embodiment. FIG. 7 is a cross-sectional view showing a configuration of a semiconductor device in accordance with Third Embodiment. FIG. 18 is a cross-sectional view showing the method of manufacturing a semiconductor device in accordance with Fourth Embodiment.

<Related semiconductor device>
First, before describing a semiconductor device according to an embodiment of the present invention, a semiconductor device associated therewith (hereinafter, referred to as “related semiconductor device”) will be described.

  FIG. 1 is a cross-sectional view showing the configuration of a related semiconductor device. The related semiconductor device includes a semiconductor element 1, a termination structure 2, an oxide film 3, and an insulating film 4. The semiconductor element 1, the termination structure 2, the oxide film 3 and the insulating film 4 are disposed on the front side surface of an N-type semiconductor layer 5 made of, for example, silicon or a wide band gap semiconductor (silicon carbide, gallium nitride, diamond). There is.

  The semiconductor element 1 includes a P-type semiconductor layer 11 and an electrode 12. The P-type semiconductor layer 11 is a component constituting the main junction of the semiconductor element 1 and is disposed above the semiconductor layer 5 by implanting, for example, P-type impurities. The electrode 12 is made of, for example, Al or AlSi, and disposed on the P-type semiconductor layer 11. Al is aluminum and Si is silicon.

  For example, a planar type diode, an IGBT, or a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is applied to the above-described semiconductor device 1. Accordingly, for example, an anode region or a base region is applied to the P-type semiconductor layer 11, and an anode electrode or an emitter electrode is applied to the electrode 12. However, the semiconductor element 1 may have the electrode 12, and the semiconductor element 1, the P-type semiconductor layer 11, and the electrode 12 are not limited to the above-described configuration.

  The termination structure 2 is disposed adjacent to the semiconductor element 1 in order to achieve a desired breakdown voltage. The termination structure 2 is disposed, for example, in a region (termination structure region) of length L between the final end of the P-type semiconductor layer 11 and the end (right end in FIG. 1) of the channel stopper 22 of the semiconductor chip. .

  In FIG. 1, such a termination structure 2 includes a P-type semiconductor layer 21 applied to FLR (Field Limiting Ring), a channel stopper 22, a channel stopper electrode 23, and an aluminum wiring 24.

  The P-type semiconductor layer 21 is disposed on the semiconductor layer 5 by implanting P-type impurities. Each of the plurality of P-type semiconductor layers 21 has a ring shape (not shown) surrounding the semiconductor element 1 in plan view, and these are arranged in a nested manner. In FIG. 1, the number of P-type semiconductor layers 21 is five, but the number is not limited to this and is selected according to the breakdown voltage.

  The channel stopper 22 is a component constituting the termination structure 2, and the channel stopper 22 is disposed at the end of the outermost tip separated from the electrode 12. The channel stopper 22 is, for example, an N ++ type semiconductor layer formed by implantation of an N type impurity. In the related semiconductor device provided with this channel stopper 22, it is possible to keep the depletion layer inside the semiconductor element 1, and as a result, it is possible to stably hold a desired voltage.

  The channel stopper electrode 23 is made of, for example, Al, and disposed on the channel stopper 22.

  Oxide film 3 is disposed between electrode 12 and channel stopper electrode 23 in a plan view, and disposed on P-type semiconductor layer 11, P-type semiconductor layer 21 and channel stopper 22 in a cross-sectional view. . In the oxide film 3, a contact hole is provided on the P-type semiconductor layer 21.

  The aluminum wire 24 is a component constituting the termination structure 2. The aluminum wiring 24 is disposed between the electrode 12 and the channel stopper 22 in a plan view, and has the same ring shape as the P-type semiconductor layer 21. The aluminum wire 24 is disposed on the oxide film 3 in a cross sectional view, and is connected to the P-type semiconductor layer 21 through the contact hole of the oxide film 3. Thereby, the potential of the aluminum wiring 24 is the same as the potential of the FLR.

  The insulating film 4 which is a protective film is disposed between the electrode 12 and the channel stopper 22 in plan view, and covers the aluminum wiring 24 which is a base. For example, polyimide or the like is applied to the insulating film 4. In the related semiconductor device, the upper surface of the insulating film 4 is substantially flat.

<Inspection process at the time of manufacture>
A high voltage is applied to the related semiconductor device configured as described above in the inspection process at the time of manufacture. At the time of high voltage application, the channel stopper 22 has a high potential, while the electrode 12 of the semiconductor device 1 has a ground potential. That is, at the time of manufacture, an inspection involving the generation of a voltage is performed between the electrode 12 and the channel stopper 22 with respect to the related semiconductor device.

  In this inspection, as the creeping distance between the channel stopper 22 and the electrode 12 is shorter, creeping discharge through the air is more likely to occur between them. That is, whether creeping discharge occurs depends on the creepage distance between them. The creepage distance L1 of the related semiconductor device is approximately the same as the length L of the termination structure 2. More precisely, the creepage distance L1 is approximately the same as the length of the insulating film 4 between the electrode 12 and the channel stopper 22.

  Here, in recent years, in order to reduce the size of the chip, the length L of the termination structure 2 is shortened, and along with this, the creepage distance L1 is also shortened. As a result, there has been a problem that special measures must be taken such as providing a test jig with a structure for covering the termination structure 2 with silicon rubber, for example, so that creeping discharge does not occur in the inspection step during manufacturing. . On the other hand, as described below, the semiconductor device according to the first embodiment of the present invention can solve the problem.

Embodiment 1
FIG. 2 is a cross-sectional view showing the configuration of the semiconductor device according to the first embodiment. Hereinafter, in the semiconductor device according to the first embodiment, the same or similar components as those described above are denoted by the same reference numerals, and different components will be mainly described.

  In the semiconductor device according to the first embodiment, as in the related semiconductor device, insulating film 4 disposed between electrode 12 and channel stopper 22 in plan view covers aluminum wiring 24 serving as a base. . On the other hand, in the semiconductor device according to the first embodiment, unlike the related semiconductor device, insulating film 4 is selectively removed, whereby insulating film 4 is provided with cut 4a exposing aluminum interconnection 24. ing. Then, the recess 6 is formed by the cut portion 4 a of the insulating film 4 and the aluminum wiring 24 exposed from the cut portion 4 a.

  Here, the depth of the incised portion 4a is α, and the number of incised portions 4a (the number of FLRs and the number of aluminum interconnections 24) is n. In the configuration shown in FIG. 2, n = 5. In this case, in the semiconductor device according to the first embodiment, the creeping distance L2 between the channel stopper 22 and the electrode 12 is L1 + 2 × α × n. That is, according to the semiconductor device according to the first embodiment, the creepage distance can be made longer by 2 × α × n than that of the related semiconductor device. For example, when α is 10 μm and n is 5, the creepage distance L2 of the semiconductor device according to the first embodiment is longer by 100 μm than the creepage distance L1 of the related semiconductor device.

  According to the first embodiment as described above, since the creeping distance can be increased by the incised portion 4a, the generation of creeping discharge can be suppressed. As a result, omission of special measures can be expected at the time of inspection. In addition, improvement in pressure resistance at the time of product use can also be expected.

  In the above description, the insulating film 4 is formed of a single insulating film, but the present invention is not limited to this, and may be formed of a plurality of insulating films.

Second Embodiment
According to the first embodiment, the creepage distance can be increased. However, there are cases where it is not desirable to expose the aluminum wiring 24 from the insulating film 4. In some cases, the creepage distance may be desired to be longer regardless of the number of FLRs and the depth of the incised portion 4a (substantially, the thickness of the insulating film 4). On the other hand, as described below, the semiconductor device according to the second embodiment of the present invention can solve the problem.

  FIG. 3 is a cross-sectional view showing the configuration of the semiconductor device according to the second embodiment. Hereinafter, in the semiconductor device according to the second embodiment, the same or similar components as those described above are denoted by the same reference numerals, and different components will be mainly described.

  The semiconductor device according to the second embodiment is provided with the base insulating film 7. The base insulating film 7 is disposed between the electrode 12 and the channel stopper 22 in plan view, and is disposed as a base of the insulating film 4 in cross section.

  The insulating film 4 disposed between the electrode 12 and the channel stopper 22 in plan view covers a base insulating film 7 which is a base. Then, the insulating film 4 is selectively removed, so that the insulating film 4 is provided with the incised portion 4 a that exposes the underlying insulating film 7, and is exposed from the incised portion 4 a of the insulating film 4 and the incised portion 4 a. The recess 6 is formed by the base insulating film 7.

  Here, the depth of the incised portion 4a is α, and the number of incised portions 4a is n. In the configuration shown in FIG. 3, n = 17. According to the semiconductor device according to the second embodiment, the creepage distance can be made longer by 2 × α × n than that of the related semiconductor device. For example, when α is 10 μm and n is 17, the creeping distance L2 of the semiconductor device according to the second embodiment is longer by 340 μm than the creeping distance L1 of the related semiconductor device.

  According to the second embodiment as described above, since the creeping distance can be increased by the incised portion 4a, the generation of creeping discharge can be suppressed. Also, such an effect can be realized without exposing the aluminum wiring 24 from the insulating film 4. Furthermore, the creepage distance can be increased without being affected by the configuration of the termination structure 2. Specifically, since the number of cut portions 4a can be increased regardless of the number of FLRs, the creepage distance can be longer than in the first embodiment. The present invention can also be applied to a configuration in which the termination structure 2 does not include FLR, for example, a configuration in which the termination structure 2 includes a resurf structure.

  In the above description, the base insulating film 7 is formed of a single layer of insulating film. However, the present invention is not limited to this. The base insulating film 7 may be formed of a plurality of layers of insulating films.

Embodiment 3
FIG. 4 is a cross-sectional view showing the configuration of the semiconductor device according to the third embodiment of the present invention. Hereinafter, in the semiconductor device according to the third embodiment, the same or similar components as those described above are denoted by the same reference numerals, and different components will be mainly described.

  The semiconductor device according to the third embodiment includes the semi-insulating film 8. The semi-insulating film 8 is disposed between the electrode 12 and the channel stopper 22 in a plan view, and is disposed as a base of the insulating film 4 in a cross-sectional view. For the semi-insulating film 8, for example, a film in which a conductive material such as carbon is included in an insulating film such as a silicon nitride film or polyimide is applied.

  The insulating film 4 disposed between the electrode 12 and the channel stopper 22 in plan view covers the underlying semi-insulating film 8. Then, since the insulating film 4 is selectively removed, the insulating film 4 is provided with the incised portion 4 a for exposing the semi-insulating film 8, and the incised portion 4 a of the insulating film 4 and the exposed portion from the incised portion 4 a The recessed portion 6 is formed by the formed semi-insulating film 8.

  According to the third embodiment as described above, the same effect as that of the second embodiment can be obtained. In addition, by using the semi-insulating film 8, the breakdown voltage can be stabilized. In the third embodiment, when the termination structure 2 includes the FLR, the aluminum wiring 24 on the FLR may be omitted.

Fourth Preferred Embodiment
FIG. 5 is a cross-sectional view showing an inspection step of the method of manufacturing a semiconductor device according to the fourth embodiment of the present invention. Hereinafter, among the inspection steps of the semiconductor device according to the fourth embodiment, the same or similar components as or to those of the first embodiment are denoted by the same reference numerals, and different components will be mainly described.

  In the fourth embodiment, the termination structure 2 is irradiated with an electron beam (EB: Electron Beam) in the above-described inspection process. According to the method of manufacturing a semiconductor device according to the fourth embodiment, the interface between the semiconductor layer 5 and the oxide film 3 in the termination structure region can be charged to the positive side, whereby the extension of the depletion layer can be obtained. It can be suppressed. Therefore, it is useful, for example, when the depletion layer extends too much due to the influence of the surface potential or when it is desired to control the carrier lifetime in the termination structure region. Although FIG. 5 shows a state where the manufacturing method according to the fourth embodiment is applied to the semiconductor device according to the first embodiment, the same applies to the semiconductor devices of the second and third embodiments, of course. It can be applied to

  Moreover, in the present invention, within the scope of the invention, each embodiment can be freely combined, or each embodiment can be appropriately modified or omitted.

  DESCRIPTION OF SYMBOLS 1 semiconductor element, 2 termination | terminus structure, 4 insulating film, 4a notch part, 7 base insulating film, 8 semi-insulating film, 12 electrode, 21 P type semiconductor layer, 22 channel stopper, 24 aluminum wiring.

Claims (4)

A semiconductor element having an electrode;
A channel stopper which constitutes a termination structure adjacent to the semiconductor element and is disposed apart from the electrode;
An underlayer made of any of an aluminum wire, an underlying insulating film, and a semi-insulating film, and disposed between the electrode and the channel stopper in plan view;
An insulating film disposed between the electrode and the channel stopper in plan view and covering the base;
The insulating film is provided with a cut which exposes the base and whose upper part is not covered by a metal member ,
The semiconductor device, wherein a part of an upper portion of the channel stopper is exposed from the insulating film. The semiconductor device according to claim 1, wherein
The semiconductor device, wherein the termination structure comprises a field limiting ring (FLR). A method of manufacturing a semiconductor device according to claim 1 or 2,
(A) A method of manufacturing a semiconductor device, comprising the step of inspecting the semiconductor device accompanied by generation of a voltage between the electrode and the channel stopper. The method of manufacturing a semiconductor device according to claim 3,
(B) A method of manufacturing a semiconductor device, further comprising the step of irradiating the termination structure with an electron beam in the step (a).

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