JP6427122B2 - Gaming machine - Google Patents

Description

  The present invention relates to a gaming machine capable of playing a game and capable of controlling an advantageous state for a player.

  As a game machine, a game medium such as a game ball is shot into a game area by a launch device, and when a game medium is prized in a prize area such as a prize hole provided in the game area and a start condition is satisfied, plural types of identification There is a pachinko gaming machine in which information (hereinafter referred to as a display symbol) is variably displayed on a variable display device and it is determined whether or not to impart a predetermined gaming value according to the display result. . In such a pachinko gaming machine, when the stop symbol mode when the variable display of the display symbol in the variable display game is completely stopped becomes a specific display mode, it becomes a specific gaming state (big hit gaming state) advantageous for the player . For example, a pachinko gaming machine that has become a big hit game state keeps a special electric combination called a big winning opening or an attacher in an open state, and keeps the game ball extremely easy to win for a certain period of time. provide.

  In addition, after setting a predetermined number of bets for one game using gaming media such as medals, coins, or gaming balls similar to pachinko gaming machines, the player operates the start lever to display on the variable display device The variable display of symbols is started, and the player operates the stop button provided corresponding to each variable display device to change the display of the display symbols within a predetermined maximum delay time range from the operation timing. A prize is generated according to the display result derived when stopping variable display of all the variable display devices, a predetermined game medium predetermined according to the prize is paid out, and a specific prize is generated. In some cases, there is a slot machine that is configured to give the player a predetermined gaming value to the gaming state.

  Among such gaming machines, there has been proposed one in which a security check is performed to check whether the storage contents of control data used to control the operation of the gaming machine have been altered illegally (for example, Patent Document 1).

Japanese Patent Application Laid-Open No. 11-300010

  In the technology described in Patent Document 1, when the execution time of the security check is constant, the execution start timing of the program for controlling the operation of the gaming machine is analyzed, and shooting based on the analysis result, so-called “ By connecting the “hanging board” and inputting an unauthorized signal, there is a possibility that the process for making the gaming state advantageous to the player is illegally executed.

  The present invention has been made in view of the above situation, and has an object to provide a gaming machine capable of reliably preventing an illegal act such as shooting based on an analysis result of a program for controlling the operation of the gaming machine.

In order to achieve the above object, the gaming machine according to the claims of the present application plays a game and is controlled to an advantageous state (for example, a big hit gaming state or big bonus, regular bonus, AT, CT, RT, ART, etc.) Possible gaming machine (eg pachinko gaming machine 1 or slot machine etc.), and after executing predetermined initialization processing, executing gaming control based on the stored contents of the non-volatile memory , system reset of the gaming machine Predetermined determination using numerical data (for example, random number MR1 for determining special pattern display result or numerical data indicating a random value for internal lottery in a slot machine) extracted from the numerical value updating means capable of changing the initial value every time (For example, in a portion where the CPU 505 executes the processing of step S240 or in a slot machine Security check means for executing security check processing for checking whether or not the stored contents of the non-volatile memory have been changed in the predetermined initial setting processing, and the like. Setting means for setting the period of the security mode for executing (for example, a portion where the CPU 505 executes the processing of steps S1 to S8 or a portion where the processing corresponding to steps S1 to S8 is executed in the slot machine); A first setting for setting whether to add an extension time as the period of the security mode, and setting whether to change the period of the security mode within a predetermined time range each time the predetermined initial setting processing is executed. And a second setting to perform the variable setting.

  According to such a configuration, when power supply is started, a period during which the update operation of numerical data is not started is random using a count value by a predetermined counting means that can be stored even after power supply is stopped. By setting to, it is possible to reliably prevent the shooting based on the analysis result of the game control processing program and the fraudulent act by connecting the so-called “hanging board”.

  Note that the gaming machine according to another aspect of the present invention is capable of identifying each of a plurality of types of identification based on establishment of the start condition (for example, determination of Yes in steps S202 and S205 or determination of No in step S215). A variable display (for example, the first special symbol display device 4A, the second special symbol display device 4B, the image display device 5, etc.) for variably displaying information (for example, a special symbol or a decorative symbol) is provided. A gaming machine (e.g., a big hit gaming state, etc.) that is controlled to a specific gaming state (e.g., a big hit gaming state, etc.) that is advantageous to the player when the result becomes a predetermined specific display result (e.g., big hit symbol, big hit combination final decoration symbol etc) Pachinko gaming machine 1 and the like), and a predetermined initial setting process (for example, security check by security A control CPU (for example, a game control timer interrupt process) for controlling the progress of the game based on control data (for example, data stored in the user program area of the ROM 506) after executing the process For example, a game control microcomputer (for example, a game control microcomputer 100) incorporating a CPU 505) and a non-volatile memory (for example, a ROM 506) for storing the control data, the game control microcomputer Security check means (for example, a portion where the CPU 505 executes the processing of step S9 to step S14) for executing security check processing of checking whether or not stored contents of the non-volatile memory are changed in the predetermined initial setting processing; , Said Variable security time setting means (for example, bit number of security time setting KSES [4-3] for changing the execution time of the security check process by the security check means within a predetermined time range each time the predetermined initial setting process is executed The CPU 505 executes the processing of steps S5 to S8 based on the above, and numerical updating means (for example, the random number generation circuit 553 provided in the random number circuit 509, random number sequence changing circuit 555 and randomness updating circuit for updating numerical data in game control processing). Random number extraction means (for example, the CPU 505 performs step S353 or the like) which extracts the numerical data updated by the numerical value updating means as the numerical value registers 559A, 559B, or the part where the CPU 505 executes the random number updating process in step S94). Step S354, or The variable display result of the identification information derives whether or not to control to the specific gaming state, using the step S357, the portion that executes the process of the step S360, etc., and the random number value extracted by the random number extraction means. Based on the prior determination means (for example, a portion where the CPU 505 executes the process of step S240) to be determined before being displayed, and the determination that the predetermined gaming state is not controlled by the prior determination means, Reach determination means (for example, a portion where the CPU 505 executes the process of steps S265 to S269) for determining whether or not the variable display state of the identification information is to be a predetermined reach state, and the determination result by the prior determination means The variation pattern type of the identification information is set to any one of a plurality of types based on the judgment result by the reach judgment means and the reach judgment means The fluctuation pattern of the identification information from among the fluctuation patterns included in the fluctuation pattern type determined by the fluctuation pattern type determining unit (for example, a portion where the CPU 505 executes the process of step S273) to be determined And a variation pattern determination unit (for example, a portion where the CPU 505 executes the process of step S276).

According to such a configuration, the execution time of the security check process is changed in a predetermined time range each time the initial setting process is performed. As a result, it becomes difficult to specify the execution start timing of the game control process, and it is possible to reliably prevent the shooting based on the analysis result of the game control process program and the fraudulent act by connecting the so-called "hanging board". Can.
Also, based on the determination result by the prior determination means and the reach determination means, the variation pattern type of the identification information is determined to any one of a plurality of types, and the variation of the identification information among the variation patterns included in the determined variation pattern type The pattern is determined. This makes it easy to change the variation pattern type and the variation pattern, and to make random number distribution settings at the time of addition, and it is possible to ease the restriction when setting the appearance rate of the effect corresponding to the variation pattern.

  Alternatively, based on the establishment of the start condition (for example, determination of Yes in step S202 and S205, determination of No in step S215, etc.), plural kinds of identification information (for example, special symbol or decorative symbol etc.) A variable display device (for example, the first special symbol display device 4A, the second special symbol display device 4B, the image display device 5, etc.) for variably displaying is provided, and a specific display result (for example, the variable display result of the identification information is predetermined) It is a gaming machine (for example, pachinko gaming machine 1 or the like) that is controlled to a specific gaming state (for example, a big hit gaming state or the like) advantageous to the player when it becomes a big hit symbol After executing the initial setting process (for example, the security check process by the security check program 506A) A game that incorporates a control CPU (such as CPU 505) that executes game control processing (such as game control timer interrupt processing) that controls the progress of a game based on control data (such as stored data in the user program area of the ROM 506) The control microcomputer (for example, the game control microcomputer 100) and the non-volatile memory (for example, the ROM 506 or the like) for storing the control data, the game control microcomputer performs the predetermined initial setting process Security check means (for example, a portion where the CPU 505 executes the processes of step S9 to step S14) for executing security check processing for checking whether or not stored contents of the non-volatile memory have been changed; Extended security time setting means (for example, based on bit number [2-0 of security time setting KSES] for setting the execution time of the security check process to any of a plurality of selectable extension times in addition to the fixed time Perform the processing of steps S1 to S4) and numerical value updating means (for example, random number generation circuit 553 provided in random number circuit 509, random number sequence changing circuit 555, and random number value register 559A) for updating numerical data in game control processing. , 559B, a portion where the CPU 505 executes the random number updating process in step S94, and the like, and a random number extracting means (e.g., step S353 or step S354 or the like) which extracts numerical data updated by the numerical value updating means as a random number value. , Step S357, step S Before the variable display result of the identification information is derived and displayed whether or not to control to the specific gaming state using a portion to execute the processing of 360 and the random number value extracted by the random number extraction means Of the identification information on the basis of the determination that the specific gaming state is not to be controlled by the prior determination means (for example, a portion where the CPU 505 executes the process of step S240) to be determined. Reach determination means (for example, a portion where the CPU 505 executes the processing of steps S265 to S269) which determines whether or not the variable display state is to be a predetermined reach state, the determination result by the prior determination means, and the reach determination The variation pattern type determination to determine the variation pattern type of the identification information to any one of a plurality of types based on the determination result by the means The variation pattern determination for determining the variation pattern of the identification information from among the stages (for example, a portion where the CPU 505 executes the process of step S273) and the variation pattern included in the variation pattern type determined by the variation pattern type determination means And a unit (eg, a portion where the CPU 505 executes the process of step S276).

According to such a configuration, the execution time of the security check process is set to one of a plurality of selectable extension times in addition to the fixed time. As a result, it becomes difficult to specify the execution start timing of the game control process, and it is possible to reliably prevent the shooting based on the analysis result of the game control process program and the fraudulent act by connecting the so-called "hanging board". Can.
Also, based on the determination result by the prior determination means and the reach determination means, the variation pattern type of the identification information is determined to any one of a plurality of types, and the variation of the identification information among the variation patterns included in the determined variation pattern type The pattern is determined. This makes it easy to change the variation pattern type and the variation pattern, and to make random number distribution settings at the time of addition, and it is possible to ease the restriction when setting the appearance rate of the effect corresponding to the variation pattern.

  Alternatively, it is possible to start the game by setting a predetermined number of bets for one game using game media, and a variable for winning displaying a plurality of types of winning identification information capable of identifying each of them. A game machine (for example, a slot machine or the like) in which one game is ended by the display result being derived on the display unit, and a prize can be generated according to the display result derived on the prize variable display unit, A game control microcomputer (for example, a game mounted on a main board of a slot machine) incorporating a control CPU for executing a game control process for controlling the progress of the game based on the game control data after executing a predetermined initial setting process Control microcomputer and the like, and a non-volatile memory (for example, a game control microco A variable display device for effect (for example, image display included in a slot machine) which variably displays plural types of effect identification information capable of identifying each of the ROM and the like included in the computer and the variable display of the prize identification information. Device and the variable display control means for effect which controls the variable display of the identification information for effect in the variable display device for effect (for example, CPU of microcomputer for effect control mounted on effect control board of slot machine) Security check means (for example, a step in a slot machine) for performing security check processing to check whether the memory contents of the non-volatile memory have been changed in the predetermined initial setting processing. A portion where processing corresponding to S9 to S14 is executed) Variable security time setting means (for example, a process corresponding to steps S5 to S8 in a slot machine) for changing the execution time of the security check process by the security check means within a predetermined time range each time the predetermined initial setting process is executed. Portions to be executed, etc.) and game value updating means for updating numerical data in game control processing (for example, random number generation circuit, random number sequence change circuit and random value included in random number circuit provided in microcomputer for game control of slot machine) A game random number extraction unit (for example, a slot machine that extracts a random number value and a numerical value data updated by the game numerical value updating unit) Step S353 or Step S3 54, or a part where the processing corresponding to steps S357 and S360 is executed), and the random number value extracted by the game random number extraction means, and specifying with the transition to the specific gaming state advantageous to the player It is determined before the variable display result of the prize identification information is derived and displayed whether or not the occurrence of each of a plurality of types of prizes including a prize (for example, big bonus, AT, CT, RT, ART, etc.) is permitted. And a variable display control unit for effect based on a determination result by the preliminary determination unit for winning, (eg, a portion of the slot machine on which a process corresponding to step S240 is executed). The variation pattern type determining means for effect determining the variation pattern type of the identification information for effect into any one of a plurality of types (for example, step S in the slot machine The part for which the processing corresponding to 73 is executed) and the variation pattern included in the variation pattern type determined by the variation pattern type determination means for presentation It may be configured to include fluctuation pattern determination means (for example, a part where processing corresponding to step S 276 is executed in a slot machine, etc.).

According to such a configuration, the execution time of the security check process is changed in a predetermined time range each time the initial setting process is performed. As a result, it becomes difficult to specify the execution start timing of the game control process, and it is possible to reliably prevent the shooting based on the analysis result of the game control process program and the fraudulent act by connecting a so-called "hanging board". Can.
Further, based on the determination result by the winning pre-determination means, the variation pattern type of the production identification information is determined to any one of a plurality of types, and the production identification information from among the variation patterns included in the determined variation pattern type The variation pattern of is determined. This makes it easy to change the variation pattern type and the variation pattern, and to make random number distribution settings at the time of addition, and it is possible to ease the restriction when setting the appearance rate of the effect corresponding to the variation pattern.

  Alternatively, it is possible to start the game by setting a predetermined number of bets for one game using game media, and a variable for winning displaying a plurality of types of winning identification information capable of identifying each of them. A game machine (for example, a slot machine or the like) in which one game is ended by the display result being derived on the display unit, and a prize can be generated according to the display result derived on the prize variable display unit, A game control microcomputer (for example, a game mounted on a main board of a slot machine) incorporating a control CPU for executing a game control process for controlling the progress of the game based on the game control data after executing a predetermined initial setting process Control microcomputer and the like, and a non-volatile memory (for example, a game control microco A variable display device for effect (for example, image display included in a slot machine) which variably displays plural types of effect identification information capable of identifying each of the ROM and the like included in the computer and the variable display of the prize identification information. Device and the variable display control means for effect which controls the variable display of the identification information for effect in the variable display device for effect (for example, CPU of microcomputer for effect control mounted on effect control board of slot machine) Security check means (for example, a step in a slot machine) for performing security check processing to check whether the memory contents of the non-volatile memory have been changed in the predetermined initial setting processing. A portion where processing corresponding to S9 to S14 is executed) Extended security time setting means (for example, the process corresponding to steps S1 to S4 in a slot machine) which sets the execution time of the security check process by the security check means to any of a plurality of selectable extension times in addition to the fixed time Portions to be executed, etc.) and game value updating means for updating numerical data in game control processing (for example, random number generation circuit, random number sequence change circuit and random value included in random number circuit provided in microcomputer for game control of slot machine) A game random number extraction unit (for example, a slot machine that extracts a random number value and a numerical value data updated by the game numerical value updating unit) Step S353 or Step S35 4 or the part where the processing corresponding to steps S357 and S360 is executed) and the random number value extracted by the game random number extraction means, the identification with the transition to the specific gaming state advantageous to the player It is determined before the variable display result of the prize identification information is derived and displayed whether or not the occurrence of each of a plurality of types of prizes including a prize (for example, big bonus, AT, CT, RT, ART, etc.) is permitted. And a variable display control unit for effect based on a determination result by the preliminary determination unit for winning, (eg, a portion of the slot machine on which a process corresponding to step S240 is executed). A variation pattern type determining means for effect determining the variation pattern type of the identification information for effect into any one of a plurality of types (for example, step S2 in the slot machine) For the effect of determining the fluctuation pattern of the identification information for effect from the fluctuation pattern type determined by the effect fluctuation pattern type determining means and the portion corresponding to the process 3) It may be configured to include fluctuation pattern determination means (for example, a part where processing corresponding to step S 276 is executed in a slot machine, etc.).

According to such a configuration, the execution time of the security check process is set to one of a plurality of selectable extension times in addition to the fixed time. As a result, it becomes difficult to specify the execution start timing of the game control process, and it is possible to reliably prevent the shooting based on the analysis result of the game control process program and the fraudulent act by connecting a so-called "hanging board". Can.
Further, based on the determination result by the winning pre-determination means, the variation pattern type of the production identification information is determined to any one of a plurality of types, and the production identification information from among the variation patterns included in the determined variation pattern type The variation pattern of is determined. This makes it easy to change the variation pattern type and the variation pattern, and to make random number distribution settings at the time of addition, and it is possible to ease the restriction when setting the appearance rate of the effect corresponding to the variation pattern.

  Further, the non-volatile memory is incorporated in the game control microcomputer, and the game control microcomputer restricts the external reading of the non-volatile memory other than the control CPU (for example, an internal resource access) Control circuit 501A etc. may be included.

  In such a configuration, the game control microcomputer includes a read restricting circuit that restricts external reading of the non-volatile memory by other than the control CPU. As a result, it becomes difficult to read out and analyze the game control processing program stored in the non-volatile memory from the outside of the game control microcomputer, so that the aim shooting based on the analysis result of the game control processing program or Cheating by connecting the hanging board can be reliably prevented.

  Also, a payout device (for example, a payout) for paying out a gaming control board (for example, the main board 11 etc.) on which the microcomputer for gaming control and the nonvolatile memory is mounted and a gaming medium (for example a gaming ball etc. serving as a winning ball). A payout control board (for example, the payout control board 15 or the like) on which the motor 51 or the like) and a payout control microcomputer (for example, the payout control microcomputer 150 or the like) for controlling the payout operation by the payout device is mounted A rendering device (for example, the image display device 5, the speakers 8L and 8R, the gaming effect lamp 9 and the like) for executing the program, and a microcomputer for presentation control (for example, the microcomputer 120 for the rendering control) for controlling the rendering operation by the rendering device And a game control system (for example, the game control board 12 etc.) The microcomputer includes a serial communication circuit (for example, a serial communication circuit 511 or the like) which performs serial communication with the payout control microcomputer and the effect control microcomputer, and performs serial communication operation by the serial communication circuit. Communication control means to control (for example, a portion where the CPU 505 executes the processing of step S24 and a portion where the main communication control processing is performed in step S98, etc.), the serial communication circuit communicates with the payout control board A first communication circuit (eg, first channel transmission / reception circuit 571A) capable of transmitting / receiving communication data; and a second communication circuit (eg, second channel transmission circuit 571B) capable of only transmitting communication data to the effect control board May be configured to include

  In such a configuration, communication data can be transmitted and received by the first communication circuit between the game control board and the payout control board, while effect control is performed by the second communication circuit between the game control board and the effect control board. Only transmission of communication data to the substrate is possible. Thus, it is possible to prevent a fraudulent act by prohibiting the signal input from the effect control board to the game control board.

  Further, a random number circuit (for example, a random number circuit 509 etc.) which is incorporated in the game control microcomputer and generates numerical data, and a clock signal for random numbers (for example random clock RCLK etc.) outside the game control microcomputer. A random number clock generation circuit (for example, a random number clock generation circuit 112 etc.) for supplying the random number circuit to the random number circuit, and the game control microcomputer is for random number supplied from the random number clock generation circuit. The random number clock abnormality judging means for judging whether or not an abnormality has occurred in the operation state of the random number circuit based on the input state of the clock signal (for example, the CPU 505 executes step S61 based on the setting of the internal information data CIF4 by the frequency monitoring circuit 551). ~ Including the part that executes the process of step S66) It may be made.

  In such a configuration, it is determined based on the input state of the random number clock signal supplied from the random number clock generation circuit whether or not an abnormality has occurred in the operation state of the random number circuit. As a result, it is possible to reliably prevent fraudulent acts by inputting a fraudulent signal as a clock signal for random numbers.

  The game control microcomputer further includes a random number circuit (for example, a random number circuit 509 etc.) that is built in or externally attached to the game control microcomputer to generate numerical data, and the game control microcomputer includes the random number circuit generated by the random number circuit. An operation of the random number circuit based on the presence or absence of bit data which does not change when numerical data is read a plurality of times by monitoring all bits and outputting a latch signal from the control CPU to the random number circuit at power on. It may be configured to include a random value abnormality determination unit (for example, a portion where the CPU 506 executes the processing of step S67 to step S77) that determines whether or not an abnormality has occurred in the state.

  In such a configuration, when all data bits generated by the random number circuit are monitored, and when the power is turned on, the control CPU outputs the latch signal to the random number circuit to read out the numerical data a plurality of times, Based on the presence or absence of bit data that does not change, it is determined whether or not an abnormality has occurred in the operation state of the random number circuit. As a result, it is possible to reliably and easily detect that an abnormality has occurred in the operation state of the random number circuit, and to prevent fraud.

It is a front view of a pachinko game machine in this embodiment. It is a block diagram which shows the various control boards etc. which were mounted in the pachinko game machine. It is a block diagram showing an example of composition of a power supply board. FIG. 7 is a timing chart schematically showing the states of a reset signal and a power-off signal. It is an explanatory view showing an example of contents of an effect control command. It is explanatory drawing which shows the structural example of the command transmitted / received between a main board | substrate and a delivery control board. It is a block diagram showing an example of composition of a microcomputer for game control. It is a figure which shows an example of the address map in the microcomputer for game control. It is a figure which illustrates the program management area and the main part of a built-in register. It is a figure which shows an example of the setting content in a header and a function setting. It is a figure which shows an example of the setting content in 1st random number initialization, 2nd random number initialization, and interruption initialization. It is a figure which shows an example of the setting content in security time setting. It is a figure which shows the structural example of an internal information register, etc. It is explanatory drawing which illustrates the random number value counted by the side of the main board | substrate. It is a block diagram which shows the structural example of a random number circuit. It is a figure which shows the structural example etc. of a random number sequence change register. It is an explanatory view showing change operation of a random number update rule by a random number sequence change circuit. It is an explanatory view showing change operation of a random number update rule by a random number sequence change circuit. It is a figure which shows the structural example of a random value taking-in register, etc. It is a figure which shows the structural example etc. of a random number latch selection register. It is a figure which shows the structural example of a random value register. It is a figure which shows the structural example etc. of a random number latch flag register. It is a figure which shows the structural example of a random-number interruption control register, etc. It is a figure which shows the structural example of an input port register, etc. It is a block diagram showing an example of composition of a serial communication circuit. It is a figure which shows the structural example of a 1st and 2nd channel data register. It is a figure which shows the structural example etc. of a 1st and 2nd channel communication setting register. It is a figure which shows the structural example etc. of a 1st and 2nd channel communication interruption control register. FIG. 6 is a diagram showing a configuration example and the like of first and second channel command registers. It is a figure which shows the structural example etc. of a 1st and 2nd channel status register. It is a figure which illustrates a change pattern. It is a figure which illustrates a change pattern. It is a figure which shows the structural example of a special figure display result determination table. It is a figure which shows the structural example of a big hit classification determination table. It is a figure which shows the structural example of the fluctuation pattern classification determination table for big hit. It is a figure which shows the structural example of the fluctuation pattern classification determination table for big hit. It is a figure which shows the structural example of the fluctuation pattern classification determination table for small hits. It is a figure which shows the structural example of a reach determination table. It is a figure which shows the structural example of the fluctuation pattern classification determination table for reach. It is a figure which shows the structural example of the fluctuation pattern classification determination table for non-reaches. It is a figure which shows the example of a structure of a hit | punching variation pattern determination table. It is a figure which shows the example of a structure of a hit | punching variation pattern determination table. It is a figure which shows the structural example of a loss fluctuation pattern determination table. It is a figure which shows the structural example of a loss fluctuation pattern determination table. It is a block diagram showing an example of composition of a data control area for game control. It is a block diagram showing an example of composition which combined a starting data storage area and a random value storage area. It is a flowchart which shows an example of a security check process. 6 is a flowchart showing an example of game control main processing. It is a flowchart which shows an example of a random number circuit setting process. It is a flowchart which shows an example of a random number circuit abnormality inspection process. It is a flow chart which shows an example of timer interrupt processing for game control. It is a flowchart which shows an example of a random number update process. It is a flow chart which shows an example of special symbol process processing. It is a flow chart which shows an example of start winning a prize judging processing. It is a flow chart which shows an example of start winning a prize judging processing. It is a flowchart which shows an example of a random number setting process. It is explanatory drawing which shows the processing operation of the random value by software. It is a flow chart which shows an example of special symbol normal processing. It is a flow chart which shows an example of change pattern setting processing. It is a flow chart which shows an example of special symbol stop processing. It is a flowchart which shows an example of a big hit end process. It is a flow chart which shows an example of production control main processing. It is a flow chart which shows an example of production control process processing. It is a flow chart which shows an example of payment control main processing. It is a flowchart which shows an example of the timer interrupt processing for payout control. It is a timing chart for explaining the operation in a random number circuit. It is a figure which shows the example of a display operation in the time of the variable display of a decorative design. It is a figure which shows the example of a display operation in the time of the variable display of a decorative design. It is a figure which shows the example of a display operation in the time of the variable display of a decorative design. It is a figure which shows the example of a display operation in the time of the variable display of a decorative design. It is a figure which shows the example of a display operation in the time of the variable display of a decorative design. It is a figure which shows the example of a display operation in the time of the variable display of a decorative design. It is a figure which shows the example of a display operation in the time of the variable display of a decorative design. It is an explanatory view for performing processing based on generation of an interruption demand by starting winning a prize.

  Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 is a front view of a pachinko gaming machine according to the present embodiment, showing an arrangement layout of main members. The pachinko gaming machine (game machine) 1 is roughly divided into a gaming board (gauge board) 2 constituting a gaming board surface and a gaming machine frame (underframe) 3 for supporting and fixing the gaming board 2. In the game board 2, a substantially circular game area surrounded by guide rails is formed. In this game area, a game ball as a game medium is shot and shot by a ball striking device including a shooting motor 61 shown in FIG.

  A first special symbol display device 4A and a second special symbol display device 4B are provided at predetermined positions of the game board 2 (the right side of the game area in the example shown in FIG. 1). Each of the first special symbol display device 4A and the second special symbol display device 4B is constituted of, for example, LEDs (light emitting diodes) of 7 segments, dot matrix, etc., and in the special view game as an example of the variable display game, each is identified A special symbol (also referred to as a "special figure") which is a plurality of possible types of identification information (special identification information) is variably displayed (variable display). For example, the first special symbol display device 4A and the second special symbol display device 4B can variably display a plurality of types of special symbols composed of numbers indicating "0" to "9" and symbols indicating "-", etc. Do. The special symbols displayed on the first special symbol display device 4A and the second special symbol display device 4B are composed of numbers indicating "0" to "9" and symbols indicating "-", etc. For example, a plurality of types of lighting patterns may be set in advance as a plurality of types of special symbols, with different combinations of what is turned on and turned off in the 7-segment LED, for example. A plurality of special symbols are given symbol numbers corresponding to them. As an example, symbol numbers “0” to “9” are attached to the numbers indicating “0” to “9”, and symbol numbers “10” are attached to the symbols indicating “−”. Just do it. Hereinafter, the special symbol variably displayed by the first special symbol display device 4A is also referred to as "the first special view", and the special symbol variably displayed by the second special symbol display device 4B is also referred to as the "second special view" .

  An image display device 5 is provided near the center of the game area on the game board 2. The image display device 5 is configured of, for example, an LCD (liquid crystal display device) or the like, and forms a display area for displaying various effect images. In the display area of the image display device 5, corresponding to the variable display of the first special figure by the first special symbol display device 4A in the special figure game and the variable display of the second special figure by the second special symbol display device 4B. For example, in the decorative symbol display unit serving as a variable display unit divided into a plurality of parts such as three, decorative symbols which are a plurality of types of identification information (decorative identification information) that can be identified are variably displayed. The variable display of this decorative pattern is also included in the variable display game.

  As an example, in the display area of the image display device 5, decorative symbol display portions 5L, 5C, 5R of "left", "middle" and "right" are arranged. Then, in the special figure game, one of the variable display of the first special figure display by the first special symbol display device 4A and the variable display of the second special figure by the second special symbol display device 4B is started. In correspondence with being done, the variable display (for example, the scroll display etc. of the vertical direction or the horizontal direction etc.) of the decorative symbol is displayed in all of the "left", "middle" and "right" decorative symbol display parts 5L, 5C, 5R. It is started. Thereafter, when the finalized special symbol is stop displayed (full stop display) as a variable display result in the special view game, each of the "left", "middle", and "right" decorative symbol display portions 5L on the image display device 5, In 5C and 5R, the finalized decorative symbol (final stop symbol), which is the result of the variable display of the decorative symbol, is stopped and displayed (completely stopped). The "left", "middle" and "right" decorative symbol display portions 5L, 5C and 5R are movable within the display area of the image display device 5, and the decorative symbol is displayed in a reduced or enlarged size. You may be able to When the special symbol or the decorative symbol is completely stopped and displayed, the display result in the variable display of each symbol is definitively displayed, and thereafter, the display state where the player can recognize that the current variable display does not progress. On the other hand, during the variable display from the start of the variable display of the decorative symbol to the final display of the finalized decorative symbol as the variable display result, the variation speed of the decorative symbol is "0", The decorative symbol may be displayed in a stationary manner, for example, in a display state that causes slight shaking or expansion and contraction. Such a display state is also referred to as a temporary stop display, and although the display result in the variable display is not displayed in a definite manner, the player can recognize that the variation of the decorative symbol by the scroll display or the update display is not progressing. It becomes. The temporary stop display may include, for example, complete stop display of the decorative pattern only for a time shorter than a predetermined time (for example, one second) without causing slight shaking or expansion or contraction. As in the complete stop display and the temporary stop display, the stop display of the display symbol to the extent that the player can recognize that the variation of the special symbol or the decorative pattern is not progressing is also referred to as the derivation display.

  For example, eight kinds of symbols (alphanumeric characters “1” to “8” or Chinese characters are displayed on the decorative symbols variably displayed in the “left”, “middle”, and “right” decorative symbol display portions 5L, 5C, 5R. Numerals “I” to “H”, English letters “A” to “H”, effect images showing eight characters related to a predetermined motif, effect images combining a number, letters or symbols and characters, etc. The effect image indicating the character may include, for example, a person or an animal, an object other than these, or a symbol such as a character, or an image indicating any other graphic. In addition to these eight kinds of decorative designs, blank designs (designs that do not constitute a big hit combination) may be included. Corresponding symbol numbers are attached to each of the decorative symbols. For example, symbol numbers “1” to “8” are attached to alphanumeric characters indicating “1” to “8”, respectively. In addition, the number of kinds of decorative symbols to be variably displayed is not limited to eight types, and may be an arbitrary plural decorative symbols.

  During the change of the decorative symbol, for example, in the "left", "middle" and "right" decorative symbol display parts 5L, 5C, 5R, for example, from the one with the small symbol number to the one with the large symbol number Or, from the right side to the left side, a fluid scroll display is performed. Then, when the decorative symbol having the largest symbol number (for example, "8") is displayed, subsequently, the decorative symbol having the smallest symbol number (for example, "1") is displayed. Alternatively, in at least one of the decorative symbol display portions 5L, 5C, 5R (for example, the decorative symbol display portion 5L of "left", etc.), scroll display is performed from the one with the large symbol number to the one with the small symbol number. When the decorative symbol having the smallest number is displayed, the decorative symbol having the largest symbol number may be displayed subsequently.

  In the display area of the image display device 5, a start winning storage display unit 5H is also arranged. In the start winning storage display portion 5H, a holding storage display for specifying the number of holdings of the variable display (the number of special map holding storages) is performed. Here, the suspension of the variable display occurs when the game ball enters the first start winning opening formed by the normal winning ball device 6A or the second starting winning opening formed by the normal variable winning ball device 6B (start winning). Do. That is, although a start condition (also referred to as "execution condition") for executing a variable display game such as a special view game or variable display of a decorative symbol is satisfied, a variable display game based on the start condition established earlier is being executed. When the start condition for starting the variable display game is not satisfied due to the fact that the pachinko gaming machine 1 is controlled to the big hit gaming state or the like, the hold of the variable display corresponding to the satisfied start condition is To be done.

  As an example, the start winning memory storage display unit 5H is provided with a plurality of display parts whose display colors are changed from left to right in order from the variable display game in which the start condition is satisfied first based on the occurrence of the start winning. There is. Then, when the start condition (first start condition) of the special figure game using the first special figure in the first special symbol display device 4A is satisfied based on the fact that the game ball has entered the first start winning opening, normally non- One of the display parts which are displayed (transparent color) (for example, the display part at the left end of the display parts which are not displayed) is changed to blue display. In addition, when the starting condition (second starting condition) of the special figure game using the second special figure in the second special symbol display device 4B is satisfied based on the game ball having entered the second starting winning opening, normally non- One of the displayed parts is changed to red. Thereafter, for example, when one of the start condition (first start condition) of the special view game using the first special view and the start condition (second start condition) of the special view game using the second special view is satisfied, The display on the left display area is removed, and the display on each display area is moved leftward one by one. At this time, one of the display portions which has been changed to blue display or red display (for example, the display portion at the right end of the display portions whose display color has been changed) returns to non-display. Here, when the reserve storage display is performed, although the number of special view reserve storages based on the establishment of the start condition of the variable display game can be specified, whether the start condition is the first start condition or the second start condition If it is not possible to specify whether there is any, the display mode of the number of special view reservations may be changed to a predetermined display mode, for example, by changing the number of display sites corresponding to the number of special views suspension storage to gray. .

  The start winning storage display portion 5H may allow the player or the like to recognize the number of special drawing reservations by displaying a number indicating the number of special drawings storage, for example. Along with or in place of the start winning storage display portion 5H, a display for displaying the number of to-be-stored special maps may be provided. In the example shown in FIG. 1, together with the start winning storage display portion 5H, a first holding for displaying the number of special drawing holding memories in an identifiable manner on the first special symbol display device 4A and the second special symbol display device 4B. A display 25A and a second hold display 25B are provided. The first suspension display 25A displays the first suspension storage number as the number of valid starting winning balls that has entered the first starting winning opening formed by the normal winning ball device 6A in a distinguishable manner. The second suspension display 25B displays the second suspension storage number as the number of valid starting winning balls having entered the second starting winning opening formed by the normally variable winning ball device 6B in a distinguishable manner. The first hold indicator 25A and the second hold indicator 25B are, for example, LEDs (eg, 4) corresponding to upper limit values (eg, “4”) in the first hold memory number and the second hold memory number. Is composed including.

  The display area of the image display device 5 may be provided with a color symbol display unit for variably displaying a color symbol as identification information different from the decorative symbol. As an example, when the special symbol game using the first special figure by the first special symbol display device 4A is started in the color symbol display unit, the fluctuation of the color symbol (for example, the update display of the display color) is started When the special pattern game using the second special symbol display device by the second special symbol display device 4B is started, the “right” color symbol is started where the variation of the color symbol is started It is sufficient if the display unit is included. Then, when the finalized special symbol as the variable display result is completely stopped and displayed in the special view game, the variation of the color symbol is finished, and the finalized color symbol as the variable display result of the color symbol is completely displayed. The color symbols variably displayed in the “left” and “right” color symbol display portions include, for example, a plurality of types of symbols such as four types (“yellow”, “green”, “red”, “blue”, etc.) It only needs to include the color pattern of. Corresponding symbol numbers are given to each of the color symbols. As an example, symbol numbers “1” to “4” may be attached to the color symbols “yellow”, “green”, “red”, and “blue”, respectively.

  Under the image display device 5, a normal winning ball device 6A and a normal variable winning ball device 6B are provided. The regular winning ball device 6A forms, for example, a first start winning opening that is always kept in a constant open state by a predetermined ball receiving member. The normally variable winning ball device 6B is an electric tulip type having a pair of movable wing pieces that changes between a normally open state in a vertical position and an enlarged open state in a tilting position by a solenoid 81 for a common electric symbol shown in FIG. It has a character (normally a motorized character) and forms a second start winning opening. As an example, in the case of the normally variable winning ball device 6B, when the movable wing piece is in the vertical position when the solenoid 81 for the ordinary electric character is in the off state, the gaming ball hardly enters the second starting winning hole It will be open. On the other hand, in the case of the normally variable winning ball device 6B, the game ball can easily enter the second starting winning opening by the movable wing piece being in the tilting position when the solenoid 81 for the ordinary electric character is on. It will be in the enlarged open state. In addition, although the game ball can enter the second start winning opening even when the normally variable winning ball device 6B is in the normal opening state, the gaming ball may enter more than in the enlarged opening state. It may be configured to be low. Alternatively, the normally variable winning ball device 6B may be configured such that the game ball does not enter the second starting winning opening by, for example, closing the second starting winning opening in the normally open state.

  The game ball entering the first starting winning opening formed in the normal winning ball device 6A is detected by, for example, a first starting opening switch 22A shown in FIG. The game ball entering the second starting winning opening formed on the normally variable winning ball device 6B is detected by, for example, a second starting opening switch 22B shown in FIG. A predetermined number (for example, three) of game balls are paid out as a prize ball based on the detection of the game ball by the first starting opening switch 22A, and the first pending storage number is a predetermined upper limit value (for example, "4") If not, the first start condition is satisfied. A predetermined number (for example, three) of game balls are paid out as a prize ball based on the detection of the game ball by the second start opening switch 22B, and the second hold storage number is equal to or less than a predetermined upper limit value. The second start condition is satisfied. The number of winning balls to be paid out based on the detection of the gaming ball by the first starting opening switch 22A and the number of the winning balls to be paid out based on the detection of the gaming ball by the second starting opening switch 22B. The numbers may be the same or different from each other.

  A special variable winning ball device 7 is provided below the normal winning ball device 6A and the normal variable winning ball device 6B. The special variable winning prize ball device 7 includes a special winning opening door driven to open and close by a solenoid 82 for a special winning opening door shown in FIG. 2, and the opening state (first state) and the closing state (first 2) form a big winning opening that changes with. As an example, in the special variable winning prize ball device 7, when the solenoid 82 for the special winning opening door is in the OFF state, the special winning opening door closes the special winning opening. On the other hand, in the special variable winning prize ball device 7, when the solenoid 82 for the special winning opening door is in the on state, the special winning opening door opens the special winning opening. The game ball entering the special winning opening formed on the special variable winning ball device 7 is detected by, for example, the count switch 23 shown in FIG. Based on the detection of the game ball by the count switch 23, a predetermined number (for example, 13) of game balls are paid out as a winning ball.

  An ordinary symbol display 20 is provided at a predetermined position of the game board 2 (in the example shown in FIG. 1, on the left side of the game area). As an example, the normal symbol display 20 is composed of LEDs of 7 segments, dot matrix, etc. like the first special symbol display device 4A and the second special symbol display device 4B, and plural kinds of identification information different from the special symbol The symbol which is normally displayed (also referred to as "common figure" or "ordinary figure") is variably displayed (variable display). Such variable display of ordinary symbols is referred to as a common-play game (also referred to as a "normal-figure game"). The normal symbol display 20 variably displays, for example, a plurality of types of normal symbols composed of numbers indicating "0" to "9", symbols indicating "-", and the like. The symbol numbers corresponding to each are attached to a plurality of kinds of ordinary symbols. As an example, symbol numbers “0” to “9” are attached to the numbers indicating “0” to “9”, and symbol numbers “10” are attached to the symbols indicating “−”. Just do it. In addition, the normal symbol display 20 is not limited to what variably displays the number which shows "0"-"9", the symbol which shows "-", etc. as an ordinary symbol, For example, "(circle)" and "x" Normal symbols are variably displayed by alternately turning on the decorative lamps (or LEDs) to be shown, or by lighting a plurality of decorative lamps (or LEDs) such as "left", "middle" and "right" in a predetermined order It may be one. Above the normal symbol display 20, a general drawing reserve display 25C is provided. The general drawing retention indicator 25C is configured to include, for example, four LEDs, and displays the general drawing retention memory number as the number of effective passing balls passed through the passing gate 41.

  On the surface of the game board 2, besides the above-described configuration, a windmill and a large number of obstacle nails for changing the flow direction and speed of the game ball are provided. In addition, as a winning opening different from the first starting winning opening, the second starting winning opening and the large winning opening, for example, one or more general winning opening is provided which is always kept in a constant open state by a predetermined ball receiving member May be In this case, a predetermined number (for example, 10) of game balls may be paid out as winning balls based on the fact that a game ball entering one of the general winning openings is detected by a predetermined general winning ball switch. At the lowermost position of the game area, an out port is provided where game balls that have not entered any winning port are captured. At the upper left and right positions of the gaming machine frame 3, speakers 8L and 8R for reproducing and outputting sound effects and the like are provided, and further, a gaming effect lamp 9 is provided at the periphery of the gaming area. A decorative LED may be arranged around each structure (for example, the normal winning ball device 6A, the normal variable winning ball device 6B, the special variable winning ball device 7 and the like) in the game area of the pachinko gaming machine 1.

  At the lower right position of the gaming machine frame 3, an operation knob 30 is provided which serves as a hitting operation handle operated by a player or the like in order to shoot a game ball as a game medium toward the game area. For example, the resilience of the gaming ball is adjusted in accordance with the amount of operation (the amount of rotation) by the player or the like. The hitting control handle may be provided with a single-shot release switch for stopping the drive of the firing motor provided in the hit shooting device or a touch ring (touch sensor). At a predetermined position of the gaming machine frame 3 below the gaming area, a game ball paid out as a prize ball and a game ball lent out by a predetermined ball lending machine are held so as to be able to be supplied to the ball striking device (stored ) Is provided to provide a hitting ball supply plate (upper plate). For example, at a predetermined position in the gaming machine frame 3 of the pachinko gaming machine 1, such as a central position on the front side of the top surface of the ball hitting supply tray, operation buttons operable by the player by pressing operation may be installed. Further, a surplus ball tray (lower plate) for holding (storing) gaming balls that can not be accommodated in the hit ball supply tray is provided below the hit ball supply tray.

  Further, at a predetermined position adjacent to the pachinko gaming machine 1, a prepaid card unit (card unit) may be installed in which processing for enabling a ball loan using a prepaid card or the like is executed. The card unit may not only take in a prepaid card to execute a ball lending process but also may take in a membership card or cash to execute a ball lending process.

  In the ordinary game with the normal symbol display 20, the game ball having passed through the passing gate 41 provided in the game area is detected by the gate switch 21 shown in FIG. After the common drawing start condition for executing the variable display is established, for example, based on the common drawing start condition for starting the variable display of the normal symbol being satisfied, for example, that the previous common drawing game is ended, It is started. In this common-play game, after starting the fluctuation of the normal symbol, when a predetermined variable display time has elapsed, the determined normal symbol as the variable display result of the normal symbol is completely stopped and displayed. The variable display time of the normal symbol may be determined to be any one of a plurality of types of variable display time, for example, by extracting numerical data indicating a predetermined random number value at the start of each regular game. . For example, if a specific normal symbol (symbol per common figure) is stopped and displayed as a fixed normal symbol that becomes the variable display result of the normal symbol in the common-play game, for example, the variable display result of the normal symbol is displayed. It becomes "per commonplace map". On the other hand, if the normal symbol other than the symbol per symbol is stopped and displayed, for example, a number or symbol other than the number indicating “7” as the determined normal symbol, the variable display result of the normal symbol is “general symbol lost” Become. In response to the variable display result of the normal symbol being "per common figure", the expansion and release control is performed such that the movable wing piece of the electrically-driven tulip that constitutes the normally variable winning ball device 6B is tilted. The normal release control is performed to return to the vertical position when.

  The special drawing game by the first special symbol display device 4A is such that the game ball entering the first start winning opening formed on the normal winning ball device 6A is detected by the first start opening switch 22A shown in FIG. The operation is started based on the satisfaction of the first start condition after the satisfaction of the first start condition. The first start condition is satisfied, for example, when the current special drawing game using the first special drawing can be started when the previous special drawing game or the big hit gaming state or the small hitting gaming state ends. In the special drawing game by the second special symbol display device 4B, the game ball entering the second starting winning opening formed in the normally variable winning ball device 6B is detected by the second starting opening switch 22B shown in FIG. 2, etc. Thus, the second start condition is established after the second start condition is established. The second start condition is satisfied, for example, when the current special drawing game using the second special drawing can be started when, for example, the previous special drawing game, the big hit gaming state, or the small hit gaming state ends.

  In the special figure game by the first special symbol display device 4A and the second special symbol display device 4B, after starting the variable display of the special symbol, when a predetermined variable display time elapses, the finalized variable display result of the special symbol is determined Display special symbol completely stopped. The variable display time of the special symbol is, for example, numerical data indicating the random number value MR4 for determining the variation pattern type as shown in FIG. 14 or numerical data indicating the random value MR5 for determining the variation pattern as shown in FIG. Or the like, among the plurality of types of variable display time, one of them is determined corresponding to the fluctuation pattern determined based on the above. If a specific special symbol (big hit symbol) is stopped and displayed as a confirmed special symbol that is a variable display result of the special symbol in the special drawing game, it becomes a "big hit" as a specific display result, and a predetermined special different from the big hit symbol If the symbol (small hit symbol) is stopped and displayed, it becomes "small hit" as the predetermined display result, and if the special symbol (losing symbol) other than the big hit symbol and the small hit symbol is stopped and displayed, it is as the nonspecific display result It will be a "loss" of After the variable display result in the special view game becomes "big hit", it is controlled to the big hit gaming state as the specific gaming state. In addition, after the variable display result in the special view game becomes "small hit", the small hit gaming state different from the big hit gaming state is controlled. In the pachinko gaming machine 1 in this embodiment, as an example, the numbers indicating "1", "3" and "7" are used as a big hit symbol, the number showing "5" as a small hit symbol, and "-" is shown. The symbol is a lost design. In addition, each symbol such as big hit symbol or small hit symbol in special figure game by the first special symbol display device 4A, such as lost symbol, is a special symbol different from each symbol in the special figure game by the second special symbol display device 4B The special symbol common to both of the special figure games may be a big hit symbol, a small hit symbol, or a lost symbol.

  In this embodiment, among the special symbols indicating the numbers “1”, “3” and “7” that are the big hit symbols, the special symbols indicating the numbers “3” and “7” are 15 round big hit symbols, A special symbol showing the number of "1" will be a two round big hit symbol. In the big hit gaming state (15 round big hit state) as the first specific gaming state controlled after the 15 round big hit symbol is stopped and displayed as the finalized special symbol in the special figure game, the opening and closing plate of the special variable winning ball device 7 The special variable winning prize ball device 7 is played by opening the big winning prize opening in a predetermined period (for example, 29 seconds) which is a first period or a period until a predetermined number (for example, nine) of winning balls are generated. A round of changing to the first state advantageous to the person is performed. In this way, the opening and closing board which made the big winning opening open in the round receives the game ball which falls on the surface of the game board 2, and then the special winning prize opening is closed, thereby playing the special variable winning ball device 7 Change to a second state that is detrimental to the person and complete one round. In the 15 round big hit state, the number of times of execution of the round which is an open cycle of the big winning opening becomes the first number (for example, “15”). The game in the 15-round jackpot state in which the number of rounds executed is “15” is also referred to as the 15-time open game.

  In the big hit gaming state (2 round big hit state) as the second specific gaming state controlled after the 2 round big hit symbol is stopped and displayed as the final special symbol in the special figure game, the special variable winning ball device 7 is played in each round The period to change to the first state that is advantageous to the person (period in which the big winning opening is opened by the opening and closing plate) is the second period (for example, 0.5 seconds) shorter than the first period in the 15 round jackpot state . Further, in the two round big hit state, the number of times of execution of the round becomes the second number (for example, “2”) smaller than the first number in the fifteen round big hit state. In the second round big hit state, at least one of the period in which the big winning opening is opened in each round is the second period, and the number of times of execution of the round is the second number is performed. The other control may be performed in the same way as the 15 round big hit state. The game in the two-round jackpot state in which the number of rounds executed is "2" is also referred to as an open game twice. In the second round jackpot state, the predetermined winning ball device provided separately from the special variable winning ball device 7 in each round is changed from the second state which is disadvantageous for the player to the first state which is advantageous for the player. It may be made to return to the 2nd state, after a predetermined period (the 1st period or the 2nd period) passes.

  In addition, among the special symbols indicating the numbers of "3" and "7" that are 15 round big hit symbols, the special symbol indicating the number of "3" is displayed based on the stop display as the determined special symbol in the special figure game. After the round jackpot state ends, one of the special game states is controlled to a short time state in which the variation time (special figure fluctuation time) of the special symbol in the special figure game is shortened as compared to the normal state. Here, the normal state is a gaming state other than a special gaming state such as a specific gaming state such as a big hit gaming state or a time saving state, and an initial setting state of the pachinko gaming machine 1 (for example, when a system reset is performed) The same control as in the state where initialization processing is performed after power on is performed. The time saving state ends if either of a predetermined number of times (for example, 100 times) of the special figure game is executed and the variable display result is a "big hit" when either condition is met first. Good. In addition, after the 15 round jackpot state is finished based on the special symbol showing the number of "3" among the 15 round big hit symbols being stopped and displayed as a final special symbol in the special figure game, it will not be a time saving state It may be in a normal state. Like the special symbol showing the number "3" like this, the 15 round jackpot symbol controlled to the time saving state or the normal state after the big hit gaming state based on being stopped and displayed as the special symbol in the special figure game is displayed Usually, it is called a jackpot symbol (also referred to as "non-probability jackpot symbol"). The variable display mode of the special symbol or decorative symbol when the finalized special symbol in the special figure game is usually a big hit symbol, the variable display mode of the special symbol or the decorative symbol is variable in “normal” (also referred to as “normal big hit”) It is called a display mode (also referred to as "big hit type").

  Of the special symbols showing the numbers of "3" and "7" that will be the 15 round big hit symbols, the 15 round big hit based on that the special symbol showing the number of "7" is stopped and displayed as the confirmed special symbol in the special figure game After the state is over, or after the two round big hit state is finished based on the special symbol showing the number of "1" which becomes the two round big hit symbol being stopped and displayed as the final special symbol in the special figure game, As one of the special gaming states different from the special state, for example, the special figure fluctuation time is shortened as compared with the normal state, and the probability change control (probability change control) is continuously performed and controlled to the probability change state (high probability game state) Be done. In this definite change state, the variable display result is “big hit” and the probability of being controlled to the big hit game state is improved to be higher than that in the normal state in each of the special drawing games and the variable display of the decorative symbol. Such a definite change state may continue until the next variable display result is "big hit" regardless of the number of times the special drawing game is executed. On the other hand, one of the conditions is that the special figure game is executed a predetermined number of times (for example, 100 times) after becoming a definite change state, and that the variable display result is "big hit" first. When established, the process may be ended. In addition, even if the special figure game is executed a predetermined number of times in the definite change state, or even before the variable display result becomes a "big hit", the definite change state ends at a predetermined ratio when the special figure game is started. There may be

  The 15 round jackpot symbol controlled to a definite change state after the big hit gaming state based on being stopped and displayed as a fixed special symbol in the special figure game like a special symbol showing the number of "7" is a definite change big hit symbol It is called. The variable display mode of the special symbol or the decorative symbol when the finalized special symbol in the special figure game becomes the definite variation big hit symbol, the variable of the "probability variation" (also referred to as "the positive variation big hit") when the variable display result is the "big hit" It is called a display mode (also referred to as "big hit type"). The 2 round jackpot symbol controlled to a definite change state after the big hit gaming state based on being displayed as a stop special symbol in the special figure game as a special symbol showing a number of "1" is a big hit jackpot symbol It is called. The variable display mode of the special symbol or the decorative symbol when the finalized special symbol in the special figure game becomes the sudden big hit symbol, the “probable” (“the sudden big hit” or “the sudden definite big hit” when the variable display result is the “big hit” (Also referred to as “big hit type”).

  In the definite change state or time reduction state, the control to shorten the variable display time of the normal symbol in the regular drawing game by the normal symbol display 20 than in the normal state or the variable display result of the normal symbol in each common drawing game Control to improve the probability of being “per-figure” compared to that in the normal state, the tilting time of the movable wing piece in the normally variable winning ball device 6B based on the variable display result becoming “per-flat” The player is more likely to establish the second starting condition by increasing the possibility of the game ball entering the second starting winning opening, such as control to make the length longer than that and control to increase the number of tilting times more than in the normal state. Control that is advantageous to the It should be noted that, in the definite variation state or the short time state, any one of these controls may be performed, or a plurality of controls may be combined and performed. The control to be performed may be different between the definite variation state and the time saving state, or the combination of the control to be performed (the same control may or may not be included) may be different.

  After the small hit symbol is stopped and displayed as the determined special symbol in the special view game, the small hit gaming state different from the big hit gaming state is controlled. In this small hit gaming state, a variable winning operation is performed to change the special variable winning device 7 to a first state advantageous to the player as in the two round big hit state. That is, in the small hit gaming state, for example, an operation of opening the big winning opening for the second period by the opening and closing plate of the special variable winning prize ball device 7 is repeatedly executed until the second number is reached. In the small hit gaming state, as in the 2 round big hit state, the period in which the big winning opening is in the open state is the second period, and the number of times the execution of the operation in which the big winning opening is in the opening state is the second At least one of the above may be controlled to be performed. After the small hit gaming state ends, the change of the gaming state is not performed, and the control is continued to the previous gaming state before the variable display result becomes "small hit". However, if it is determined that the time saving state is ended in response to the variable display game in which the variable display result is "small hit", control to the normal state is performed after the small hit gaming state is ended. It will be. The game in the small hit gaming state in which the number of times the big winning opening is opened by the variable winning operation is “2” is also referred to as a twice open game, similarly to the game in the two round big hit state. In the case of changing the winning ball device provided separately from the special variable winning prize ball device 7 to the first state in each round in the two round big hit state, even in the small hitting gaming state, it is the same as the two round big hitting state In a mode, the winning ball device may be changed to the first state.

  On the display screen of the image display device 5, the variable display of the decorative symbol is performed corresponding to the variable display of the special symbol by the first special symbol display device 4A or the second special symbol display device 4B. That is, on the display screen of the image display device 5, for example, the "left", "middle" and "right" decorative symbol display portions 5L are displayed based on that either the first start condition or the second start condition is satisfied. , 5C, 5R in all the acceleration display (all symbol acceleration display) of the decoration pattern is performed, if it reaches a predetermined speed, the constant speed display (all symbol constant speed display) of the decoration symbol is performed. Such all symbol acceleration display and all symbol constant speed display are included in the all symbol variation that variably displays the decoration symbols in all of the "left", "middle" and "right" decorative symbol display portions 5L, 5C, 5R. . After all such symbol variations, for example, the decelerating display (each symbol decelerating display) of the decorative symbols is performed in a predetermined order such as "left" → "right" → "middle", and if the fluctuation speed becomes "0", the decorative symbols are displayed. While the display is stopped and displayed, a temporary stop display that causes, for example, slight shaking or expansion and contraction is performed. Then, when the elapsed time from the start of the variable display of the decorative symbol reaches the variable display time determined based on the fluctuation pattern or the like, the finalized display of the finalized decorative symbol as the variable display result is performed. In addition, as a procedure which carries out stop display of the finalized decorative symbol, it is not limited to what decelerates and displays the decorative symbol in a predetermined order in the decorative symbol display parts 5L, 5C, 5R of "left", "middle" and "right". A display that decelerates (displays all symbols decelerating) a decorative symbol to be a decorative symbol simultaneously determined in each of the decorative symbols display portions 5L, 5C, 5R of "left", "middle", and "right" may be included.

  After all symbol variation is started, the decorative symbol is displayed on the left or in the right or in the decorative symbol display portion 5L, 5C, 5R of the left, in the middle, or in the right portion. It may be derived and displayed in the state. Here, with the reach display state, a decorative symbol ("reach variation symbol that has not been derived and displayed when the decorative symbol derived and displayed on the display screen of the image display device 5 constitutes a part of the big hit combination The display state in which the fluctuation continues, or the display state in which all or a part of the decorative pattern fluctuates synchronously while constituting all or a part of the jackpot combination. Specifically, in "left", "middle" and "right" decorative symbol display portions 5L, 5C and 5R (for example, "left" and "right" decorative symbol display portions 5L and 5R) in advance When the decorative pattern (for example, the decorative pattern showing the alphanumeric characters of "7") constituting the determined big hit combination is derived and displayed, the remaining decorative symbol display portion (for example, "middle") not displayed yet In the symbol display section 5C, etc., the display condition in which the decorative symbol is fluctuating, or the decorative symbol is a big hit in all or part of the decorative symbol display sections 5L, 5C, 5R of "left", "middle", "right" It is a display state fluctuating in synchronization while constituting all or part of the combination. Also, in response to the reach display state, effect images such as animation images and real-shot images different from the decorative pattern are displayed on the display screen of the image display device 5, and the display mode of the background image is changed, The variation pattern of the decorative design may be changed. Such display of effect images, changes in the display mode of background images, and changes in the variation patterns of decorative patterns are referred to as reach effect displays (or simply reach effects). Among the reach effects, when they appear, there are those set so that a big hit is likely to occur (become a big hit with high probability) as compared to normal reach effect (normal reach). Such special reach production is also referred to as super reach production (or simply "super reach"). As an example, for reach effect to be a super reach, after performing reach effect similar to normal reach until a predetermined time has passed, for example, a display pattern of a background image, a character to be displayed, a decorative pattern such as a fluctuation direction of a decorative pattern Of the variation modes, the presentation mode is changed (so-called "development") by becoming different from before or at the time of normal reach when at least one of them becomes reach display state, and reach presentation specific to super reach What should be included if the introductory part in. In addition, in the reach effect that becomes the super reach, when the decorative pattern is derived and displayed in the reach display state, the introductory portion in the reach effect specific to the super reach is started without performing the reach effect similar to the normal reach Things may be included.

  In addition, unlike the reach effect, the decorative symbol may be derived and displayed in the reach state, and the variable display result may be a "big hit" during the variable display of the decorative symbol, There are cases where a specific effect for notifying the player by the variable display mode of the decorative symbol etc. is executed. In this embodiment, specific effects such as “slip”, “simulated link”, “intro”, “development opportunity eye”, “development opportunity eye end” are set to be executable. In addition, the specific effect in this embodiment should just change the special figure fluctuation time according to whether or not the corresponding effect operation is executed. For example, when a specific effect is performed, the special figure fluctuation time may be longer than when the specific effect is not performed.

  In the specific effect of "slip", after performing all the symbol variation to change the decoration symbol in all in the "left", "middle", "right" decorative symbol display parts 5L, 5C, 5R, two or more After the decorative symbol is displayed temporarily on the decorative symbol display (for example, "left" and "right" decorative symbol display 5L, 5R, etc.), a predetermined number (for example, The decorative symbol is changed again in the decorative symbol display portion of “1” or “2” (for example, either or both of the decorative symbol display portion 5L of “left” and the decorative symbol display portion 5R of “right”) By effecting stop display later, effect display is performed to change the decorative pattern to be stop displayed. In the temporary stop display of the decorative symbol in the specific effect, while the decorative symbol is displayed by being stopped, for example, by performing the swing fluctuation display or immediately re-changing the decorative symbol only by stopping for a short time, etc. It is sufficient to notify the player that the decorative symbol stopped and displayed is not determined. Alternatively, even in the temporary stop display, the decorative symbol may be re-varied after the decorative symbol is kept to such an extent that the player recognizes that the decorative symbol stopped and displayed is determined.

  In the specific rendition of "pseudo ream", after all symbol variation is started corresponding to the first start condition or the second start condition for starting variable display of special symbols and decorative symbols being met once. , "Left", "middle", "right" decorative symbol display portions 5L, 5C, 5R all or sequentially after displaying the decorative symbols temporarily stop at the same time, "left", "middle", "right" The re-variable display operation (re-variation) for changing the decorative symbol again in all of the decorative symbol display portions 5L, 5C, 5R is executed a predetermined number of times (for example, up to three times). As an example, in the specific rendition of "pseudo ream", "left", "middle", "right" decorative symbol display parts 5L, 5C, 5R, a plurality of types of festoon designs predetermined as pseudo ream chance One of the combinations of is displayed temporarily. Then, as the number of re-variations increases, the rate at which the variable display result is “big hit” may be set to be high. As a result, the player can recognize that a specific effect of "pseudo run" is performed by temporarily displaying any one of the run chances, and as the number of re-variations increases, the variable display result becomes " Expectations to be a big hit are enhanced. In this embodiment, the re-variation is performed 1 to 3 times in the specific rendition of the “pseudo ream”, so that the decorative symbol is variable based on the first start condition or the second start condition being satisfied once. The display can appear as if it had been started 2 to 4 times in succession.

  During the variable display of the decorative design in which the specific effect of “pseudo series” is executed, an effect image showing, for example, a character prepared in advance at a predetermined position on the display screen of the image display device 5 as the pseudo continuous variation progresses. To display a predetermined sound (special sound) from the speakers 8L and 8R, to turn on the game effect lamp 9 in a predetermined lighting pattern, for effect provided within the game area or outside the game area A predetermined rendering operation may be performed, such as operating a plurality of movable members included in a character. As an example, after displaying the decorative symbols temporarily on all the decorative symbol display parts 5L, 5C, 5R, when displaying the decorative symbols in all the decorative symbol display parts 5L, 5C, 5R again, the character is displayed. The pseudo continuous variation is performed by performing the rendering operation combining any one or a plurality of operations among the display of the effect image to be shown, the output of the special sound, the lighting of the lamp, and the operation of the movable member. May be notified in a recognizable manner.

  In the specific effect of "Intro", it is associated in advance with the reach effect such as the introductory portion of the effect display performed in the reach effect, for example, before the decorative pattern is derived and displayed in the reach display state The predetermined effect display is performed. As an example, in the specific effect of "intro", effect display corresponding to the introductory part of the effect display performed in the super reach effect is performed. By executing the specific effect of such "intro", the player can prevent the super reach effect of becoming a "big hit" with a higher probability than the normal reach after the decorative symbol is derived and displayed in the reach display state. Expectations are enhanced.

  In the specific effect of the "Development Opportunity Eye", after the start of all symbol variation, all decorative symbol display parts 5L, 5C, 5R temporarily display a decorative symbol that constitutes a predetermined development chance eye Then, the decorative symbol is derived and displayed in the reach display state, and a predetermined reach effect is started. As an example, in the specific effects of the "development opportunity eyes", a plurality of types of decoration symbols predetermined as development opportunity eyes in the "left", "middle", and "right" decorative symbol display portions 5L, 5C, 5R. One of the combinations of is displayed temporarily. As a result, the player may have the possibility that the decorative symbol is derived and displayed in the reach display state when one of the plurality of development chances is temporarily stopped and the variable display result is "big hit". It is possible to recognize that there is a possibility of becoming, and the sense of expectation that the decorative symbol is derived and displayed in the reach display state, and the sense of expectation that the variable display result becomes “big hit” are enhanced.

  In the specific effect of "Development chance eyes end", after changing the decoration pattern in all in the decoration design display parts 5L, 5C, 5R of "left", "middle" and "right", all decoration design display In the sections 5L, 5C, 5R, effect display is performed in which the decoration pattern of the combination determined in advance as the development opportunity is displayed as the finalized decoration symbol (stop display). As an example, in the specific rendition of "Development chance eye end", any of the development chance eyes that are temporarily stopped by the specific rendition of "Development chance eye" is stopped and displayed as the fixed decoration pattern, and the variable display of the decoration pattern finish. In this way, when one of the development chance eyes is derived and displayed, the decorative symbol may be derived and displayed in the reach display state by the specific effect of the "development chance eye", or by the specific effect of the "development chance eye end" The variable display of the decorative design may end. As a result, when any of the development chances is displayed (provisional stop display), the expectation for the display of the decorative pattern in the reach display state is enhanced, and the decoration effect is made by the specific effect of the “development opportunity eyes”. When the symbol is derived and displayed in the reach display state, the variable display result may be "big hit" while the variable display of the decorative symbol is continued, so that the player's feeling of joy can be enhanced.

  Furthermore, unlike the reach effect or the specific effect during the variable display of the decorative symbol, for example, the display of the decorative symbol by a display mode other than the variable display mode of the decorative symbol, such as displaying a predetermined character image or a message image A notice effect may be performed to notify the player that the variable display state may be a reach state or that the variable display result may be a "big hit". For example, advance notice effects such as “character display”, “step-up image”, and “change background” may be set to be executable. In addition, advance notice production should just be a thing which does not produce change in special figure fluctuation time by whether corresponding corresponding production operation is performed. In the notice effect of "character display", after the decorative pattern is varied in all of the left, middle, and right decorative symbol display portions 5L, 5C, 5R, two or more decorative symbol displays are displayed. A character image prepared in advance at a predetermined position in the display area of the image display device 5 is displayed before the decorative pattern is derived and displayed by a unit (for example, the "left" and "right" decorative symbol display portions 5L, 5R, etc.) An effect display is performed. In the notice effect of "step-up image", two or more decorative symbols are displayed after the decorative symbols are changed in all of "left", "middle" and "right" decorative symbol display parts 5L, 5C, 5R. Before displaying the decorative pattern on the display unit, effect display may be performed to switch and display a plurality of types of effect images prepared in advance in a predetermined order in the display area of the image display device 5. In the preview effect of the "step-up image", one of a plurality of types of effect images prepared in advance (for example, an effect image to be displayed first in a predetermined order) is displayed, and then the effect image is displayed. In some cases, the effect display in the advance effect may be ended without being switched. In the notice effect of “change background”, effect display for changing the display of the background image in the display area of the image display device 5 to any of a plurality of types is performed.

  When a special symbol to be a lost symbol is stopped and displayed as a finalized special symbol in the special drawing game, the variable symbol display of the decorative symbol does not reach the predetermined state after the variable symbol display of the decorative symbol is started. There are cases where a finalized display design that is a combination of non-reach and a finalized display design that is one of a plurality of development opportunities may be stopped. Such a variable display mode of a decorative symbol is referred to as a "non-reach" (also referred to as a "normal loss") variable display mode when the variable display result is "loss".

  When the special symbol to be the lost symbol is displayed as a stop as a final symbol in the special figure game, the variable symbol display of the decorative symbol is started after the variable symbol display of the decorative symbol is started. Then, after the reach effect is performed, or the reach effect is not performed, the finalized decoration pattern to be a predetermined reach loss combination may be stopped and displayed. Such a variable display result of a decorative symbol is referred to as a variable display mode of "reach" (also referred to as "reach loss") when the variable display result is "loss".

  When the special symbol showing the number of "3" which is usually the big hit symbol among the special symbols to be 15 round big hit symbols is displayed as stop as a fixed special symbol in the special figure game, the variable display state of the decorative symbol is reach In response to the state being reached, after the predetermined reach effect is performed, the finalized decorative symbol that is the predetermined normal big hit combination is stopped and displayed. Here, as for the finalized decoration pattern which usually becomes a big hit combination, the symbol number which is variably displayed in each decoration pattern display section 5L, 5C and 5R in “left”, “middle” and “right” in the image display device 5, for example Among the decorative symbols of "1" to "8", any one of the decorative symbols whose symbol numbers are "2", "4", "6" and "8" is "left", "middle", What is necessary is just to be displayed on the predetermined effective line by each of the decorative symbol display parts 5L, 5C, 5R on the "right" and to be stopped and displayed. A decorative symbol having a symbol number of even "2", "4", "6", "8" which usually constitutes a big hit combination in this way is usually referred to as a symbol (also referred to as "non-probable variation symbol"). And after the predetermined reach effect is executed corresponding to the finalized special symbol in the special figure game becoming the big hit symbol normally, the variable display mode of the decorative symbol in which the fixed decorative symbol of the big hit combination is stopped and displayed is A variable display mode (also referred to as a jackpot type) of “normal” (also referred to as a “normal jackpot”) when the variable display result is a “big hit”. Thus, after the variable display result becomes "big hit" by the "normal" variable display mode, it is controlled to 15 round big hit gaming state, and when the 15 round big hit state ends, it is controlled to time saving state or normal state become.

  When the special symbol showing the number of "7" which is the probability variation big hit symbol among the special symbols to be 15 round big hit symbols is stopped and displayed as the finalized special symbol in the special figure game, the variable display state of the decorative symbol is reach In response to the state being reached, after the same reach effect as when the jackpot type is “normal” is performed, a finalized decoration symbol that is a predetermined probability variation jackpot combination may be stopped and displayed. Here, the finalized symbol pattern to be a probability variation big hit combination is, for example, symbol numbers which are variably displayed in the respective symbol display portions 5L, 5C, 5R of "left", "middle" and "right" in the image display device 5. Among the decorative symbols “1” to “8”, any one of the decorative symbols whose symbol numbers are odd “1”, “3”, “5” and “7” is “left”, “middle”, What is necessary is just to be displayed on the predetermined effective line by each of the decorative symbol display parts 5L, 5C, 5R on the "right" and to be stopped and displayed. A decorative symbol whose symbol number constituting the probability variation big hit combination is an odd number “1”, “3”, “5”, “7” in this way is called a probability variation symbol. Then, in response to the finalized special symbol in the special figure game becoming the probability variation big hit symbol, after the reach production is executed, the variable display mode of the decorative symbol in which the decision decoration symbol of the probability variation big hit combination is stopped and displayed is variable It is referred to as a variable display mode (also referred to as a jackpot type) of the "first certainty variation" when the display result is a "big hit". Thus, after the variable display result becomes "big hit" by the variable display mode of "the first definite variation", it is controlled to 15 round big hit state, and when the 15 round big hit state ends, it is controlled to positive variation state .

  When the special symbol showing the number of "7" which is the probability variation big hit symbol among the special symbols to be 15 round big hit symbols is stopped and displayed as the finalized special symbol in the special figure game, the variable display state of the decorative symbol is reach After the reach effect different from that in the case where the variable display mode is “normal” is performed in response to the state being entered, a finalized decoration symbol to be a predetermined probability variation big hit combination may be stopped and displayed. As described above, in response to the determined special symbol in the special figure game becoming the probability variation big hit symbol, after the reach effect different from the case where the variable display mode of the decorative symbol is "normal" is executed, the probability variation big hit combination The variable display mode of the decorative symbol in which the finalized decorative symbol is stopped and displayed is referred to as a variable display mode (also referred to as a jackpot type) of the "second definite variation" when the variable display result is a "big hit". In this way, after the variable display result becomes "big hit" by the variable display mode of "second definite change", it is controlled to 15 round big hit state, and when the 15 round big hit state ends, it is controlled to positive change state .

  When the special symbol showing the number of "7" which is the probability variation big hit symbol among the special symbols to be 15 round big hit symbols is stopped and displayed as the finalized special symbol in the special figure game, the variable display state of the decorative symbol is reach In response to being in the state, after the reach effect similar to the case where the variable display mode of the decorative symbol is "normal" is executed, the finalized decorative symbol of the big hit combination may be stopped and displayed. As described above, in response to the determined special symbol in the special figure game becoming the probability variation big hit symbol, after the reach effect similar to the case where the variable display mode of the decorative symbol is "normal" is executed, the combination of the normal big hit is performed. The variable display mode of the decorative symbol in which the finalized decorative symbol is stopped and displayed is referred to as a variable display mode (also referred to as a "big hit type") of the "third definite variation" when the variable display result is a "big hit". Thus, after the variable display result becomes "big hit" by the variable display mode of "3rd definite variation", it is controlled to 15 round big hit state, and when the 15 round big hit state ends, it will be controlled to positive variation state .

  As described above, when the big hit type when the variable display result is "big hit" is "first definite change" or "second definite change", the fixed display of the big change combination with the definite change big hit in the variable display of the decoration pattern By being stopped and displayed, it is decided that it becomes a definite change state after being controlled to the 15 round big hit state. On the other hand, when the big hit type when the variable display result is "big hit" is "3rd probability change", as in the case where the big hit type is "normal", it is usually in the variable display of the decorative symbol The finalized decoration design that will be a big hit combination is stopped and displayed. Therefore, when the jackpot type is "third positive variation", the player can not recognize from the variable display result of the decorative symbol whether or not the positive variation state is to be made. In other words, the finalized decorative symbol that is a combination of probability change big hit is included in the specific display result that is determined to be controlled to the big hit gaming state, and is included in the special display result that is determined to be controlled to the probability change state. On the other hand, a definite decorative symbol which is usually a big hit combination is included in a specific display result (non-special display result) other than the special display result which is not determined to be controlled in the probability change state.

  When the special symbol indicating the number of “1” which becomes the two round big hit symbol is stopped and displayed as the finalized special symbol in the special figure game, the variable display state of the decorative symbol does not reach the reach state, but a predetermined non-display state The final display of the finalized decorative design which is a reach combination, the final display of the finalized decorative design which is one of a plurality of development chance eyes, or the decorative design predetermined as a plurality of types of probability chance eyes The finalized decoration pattern which is one of the combinations of may be stopped and displayed. In addition, when the special symbol showing the number of "1" which becomes the 2 round big hit symbol is stopped and displayed as the finalized special symbol in the special figure game, it corresponds to the variable display state of the decorative symbol becoming the reach state Then, after the predetermined reach effect is executed, the finalized decoration pattern to be the predetermined reach loss combination may be stopped and displayed. As described above, in response to the finalized special symbol in the special figure game becoming a special symbol indicating the number of "1" which is the two round big hit symbol, the variable display mode of the decorative symbol in which various finalized decorative symbols are stopped and displayed. Is referred to as a variable display mode (also referred to as a jackpot type) of "stump" (also referred to as "stumped jackpot" or "sudden probability change big hit") when the variable display result is "big hit". In this way, after the variable display result becomes "big hit" by the variable display mode of "probable", it is controlled to a big hit state for two rounds, and when the big hit state for two rounds is finished, it is controlled to a positive change state.

  When the special symbol indicating the number of "5", which is a small hit symbol, is stopped and displayed as the determined special symbol in the special drawing game, the decoration is performed in the same manner as in the case where the variable display mode of the decorative symbol is "probable" After the variable display of the symbols is performed, the determined decorative symbol that is a predetermined non-reach combination is stopped and displayed, or the determined decorative symbol that is any of a plurality of development opportunities is displayed and stopped, or The finalized decoration pattern which is a predetermined reach loss combination may be stopped and displayed. As described above, in response to the finalized special symbol in the special figure game becoming a special symbol indicating the number “5” which is a small hit symbol, the variable display mode of the decorative symbol in which various finalized decorative symbols are stopped is displayed. , And a "small hit" variable display mode (also referred to as a small hit type). Here, the finalized decorative design which is one of a plurality of types of probability chance eyes is stopped and displayed only when the variable display mode of the decorative design is "probable", and the variable display mode is "small hit", etc. Is not displayed as a fixed decoration pattern. That is, when the finalized decorative symbol which is the probability chance eye is stopped and displayed on the variable symbol display of the decorative symbol, it is determined that the variable display result is the "big hit" by the variable display mode of "probability". After the variable display result becomes "small hit", it is controlled to a small hit gaming state in which a variable winning operation similar to the two round big hit state is performed, and the gaming state is not changed when the small hit gaming state ends. Thus, the game state before the variable display result is "small hit" continues. If it is determined that the probability change state or the time saving state is to be ended in response to the variable display game in which the variable display result is "small hit", the normal state is entered after the small hit gaming state is ended. It will be controlled.

  When the jackpot type when the variable display result is "big hit" is any of "normal", "first definite change", and "third definite change", as the specific change indication during the variable display of the decorative symbol Promotional effects may be executed during fluctuations of the. In the promotion promotion stage during fluctuation, the decorative symbols that would normally be a big hit combination are displayed temporarily on the effective lines of the "left", "middle" and "right" decorative symbol display parts 5L, 5C and 5R in the image display device 5 After that, for example, the "left", "middle" and "right" decorative symbol display parts 5L, 5C, 5R are again changed in a state where the same decorative symbol is aligned, and a decorative symbol to be a combination of probability variation big hit A stop display (final stop display) is made as a finalized decoration pattern, of any of the decoration patterns that are usually a big hit combination. Here, in the case where the during-reward promotion effect is executed corresponding to the variable display mode of the decorative symbol being "normal" or "third probability change", temporary stop display is performed as the during-reward promotion effect. After re-variation of the decorative design, the promotion failure production during the change is performed in which the fixed decorative design, which is usually a big hit combination, is stopped and displayed. On the other hand, when the promotion during change promotion effect is executed in response to the variable display mode being the "first definite change", the decorative symbol displayed on temporary stop is re-changed as the promotion effect during the change. After being let go, there is a promotion promotion success during change that stops and displays a finalized decorative symbol that will be a combination of probability variation big hit.

  When the big hit type when the variable display result is "big hit" is either "normal" or "3rd probability change", the variable display result is stopped and then controlled to 15 round big hit status After that, in the period until the end of the 15 round jackpot state, jackpot during the jackpot promotion effect as a notification effect of whether or not to control to a probability change state is executed. Here, the timing when the jackpot promotion promotion is executed may be a period before the first round in the 15 round jackpot state is started after the variable display result is stopped and displayed, or the 15 round jackpot state The period may be the period during which any round is in progress, or the period from the end of any round in the 15 round jackpot state to the start of the next round. It may be a period from the end of the final round in the jackpot state to the start of the next variable display game. Alternatively, during the variation of the first special symbol or decorative pattern after the end of the 15 round jackpot state, a rendering operation corresponding to a jackpot promotion promotion may be performed. The jackpot promotion promotion that is executed after the last round is finished in the 15 round jackpot state may be called "ending promotion promotion instruction".

  In the jackpot promotion promotion, there is no jackpot promotion promotion production that announces that there is a promotion where the gaming state becomes a definite change state despite the fixed decoration pattern being usually a big hit combination, and that there is no promotion that becomes a definite change state There is a jackpot promotion failure production to notify. As an example, in the jackpot promotion promotion effect, the decorative symbol is variably displayed in the display area of the image display device 5, and either the normal symbol or the probability variation symbol is stopped and displayed as the effect display result. At this time, it is sufficient to stop and display the normal symbol as the effect display result in the jackpot during promotion failure rendering, and to stop and display the probable variation symbol as the effect display result in the jackpot during the promotion success effect. As another example, in the jackpot middle promotion effect, a predetermined effect image different from the decorative pattern may be displayed in the display area of the image display device 5. For example, an effect image indicating a roulette game is displayed as a jackpot promotion effect. At this time, the ball thrown into the spinning roulette in the jackpot promotion failure production enters the "even" and displays the effect image "Sorry!", While it is thrown into the spinning roulette in the jackpot promotion promotion production The ball enters the "odd" and displays the effect image of "permanent change!" In response to the special symbol showing the number "7" being stopped and displayed as the finalized special symbol in the special figure game, after the variable display result becomes "big hit" by the big hit type of "third definite change", By executing the jackpot promotion success production, it is informed that there is a promotion that becomes a definite change state. In response to the special symbol showing the number "3" being stopped and displayed as a confirmed special symbol in the special figure game, for example, after the variable display result becomes "big hit" by the "normal" big hit, for example, a big hit While the promotion failure rendering is performed, the jackpot promotion success rendering is not performed, and no notification that there is a promotion that is a definite change state is not performed.

  The pachinko gaming machine 1 includes, for example, various types such as a power supply substrate 10, a main substrate 11, an effect control substrate 12, a voice control substrate 13, a lamp control substrate 14, a payout control substrate 15, and a launch control substrate 17 as shown in FIG. A control board is mounted. The pachinko gaming machine 1 also includes a relay board 18 for relaying various control signals transmitted between the main board 11 and the effect control board 12. The sound control board 13 and the lamp control board 14 may be configured by an independent board separate from the effect control board 12, or may be integrated into the effect control board 12 and configured as one board. In addition, on the back of the pachinko gaming machine 1, various control boards such as an information terminal board and an interface board are disposed. The interface board is a control board interposed between the payout control board 15 and the card unit when the card unit is installed adjacent to the pachinko gaming machine 1.

  The power supply substrate 10 is installed independently of the control substrates such as the main substrate 11, the effect control substrate 12, the payout control substrate 15, etc., and generates voltages used by the control substrates and mechanical components in the pachinko gaming machine 1. For example, in the power supply substrate 10, as shown in FIG. 3, AC 24 V, VLP (DC +24 V), VSL (DC +30 V), VDD (DC +12 V), VCC (DC +5 V) and VBB (DC +5 V) are generated. For example, as shown in FIG. 3, the power supply substrate 10 is configured to include a transformer circuit 301, a DC voltage generation circuit 302, a power supply monitoring circuit 303, and a clear switch 304. The power supply substrate 10 may be provided with a capacitor serving as a backup power supply. The capacitor may be, for example, one charged from a power supply line of VBB (DC +5 V). In addition, the power supply substrate 10 may be provided with a power switch for performing or interrupting the power supply to each control substrate and the mechanical component in the pachinko gaming machine 1. Alternatively, the power switch may be provided outside the power supply substrate 10 in the pachinko gaming machine 1.

  The transformer circuit 301 may be configured to include, for example, a transformer to which a commercial power supply is applied on the input side (primary side), a varistor as an overvoltage protection circuit provided on the input side of the transformer, and the like. Here, the transformer included in the transformer circuit 301 may be any transformer for electrically insulating the commercial power supply and the inside of the power supply substrate 10. The transformer circuit 301 generates AC 24 V as its output voltage. The DC voltage generation circuit 302 includes, for example, a rectifying and smoothing circuit that generates VSL by rectifying and boosting AC 24 V with a rectifying element. VSL is used as a power supply voltage for driving a solenoid. Further, the DC voltage generation circuit 302 includes, for example, a rectification circuit that generates VLP by rectifying 24 V AC with a rectification element. The VLP is used as a power supply voltage for lighting a light emitter such as the game effect lamp 9 or the like. In addition, the DC voltage generation circuit 302 includes a DC-DC converter that generates VDD and VCC based on, for example, VSL. The DC-DC converter includes, for example, one or more switching regulators and a relatively large capacity capacitor connected to the input side of the switching regulator, and the power supply to the pachinko gaming machine 1 from the outside is stopped. At this time, it is sufficient if the DC voltages such as VSL, VDD, and VBB are configured to decrease relatively gently. VDD is supplied to various switches for detecting game media, such as the gate switch 21 shown in FIG. 2, the first and second start opening switches 22A and 22B, and the count switch 23, and is used to operate these switches. .

  As shown in FIG. 3, AC 24 V output from the transformer circuit 301 is transmitted to the payout control board 15 via, for example, a predetermined connector or a power supply line. The VLP is transmitted to the lamp control board 14 via, for example, a predetermined connector or a power supply line. VSL, VDD and VCC are transmitted to the main substrate 11, the lamp control substrate 14 and the payout control substrate 15 via, for example, predetermined connectors and power supply lines. The VBB is transmitted to the main substrate 11 and the payout control substrate 15 via, for example, a predetermined connector or a power supply line. Note that each voltage may be supplied to the effect control board 12 and the sound control board 13 via the lamp control board 14. Alternatively, each voltage may be supplied to the effect control board 12 and the sound control board 13 directly from the power supply board 10 without passing through the lamp control board 14.

  The power supply monitoring circuit 303 is a circuit that is configured using, for example, a power failure monitoring and resetting module IC, and implements a power supply monitoring unit that outputs a power supply disconnection signal. For example, in the power supply monitoring circuit 303, the time when the predetermined voltage (VLP as an example) used in the pachinko gaming machine 1 becomes a predetermined value (+20 V as an example) or less is previously determined (56 milliseconds as an example) When the above continues, the power off signal is output. Alternatively, the power supply monitoring circuit 303 may output a power-off signal immediately when the predetermined voltage used in the pachinko gaming machine 1 becomes equal to or less than a predetermined value. The power-off signal may be, for example, an electrical signal that is turned on by being low level. The power-off signal output from the power supply monitoring circuit 303 is amplified by, for example, an output driver circuit mounted on the power supply substrate 10, and then transmitted to the payout control substrate 15 through a predetermined connector or signal line, It is transmitted from the substrate 15 to the main substrate 11. In addition, as conditions for detecting the supply stop of the electric power supplied to the pachinko gaming machine 1 from the outside, it is not restricted that the predetermined voltage used in the pachinko gaming machine 1 becomes below in predetermined value, but the electric power from the outside The condition may be any condition that can detect that the For example, an AC 24 V or other AC wave itself may be monitored to detect that the AC wave is interrupted as a detection condition, or a signal obtained by digitizing the AC wave may be monitored to confirm that the digital signal becomes flat. It may be used as a detection condition of interruption.

  The power supply monitoring circuit 303 may output a reset signal, for example, when the predetermined voltage (VCC as an example) becomes lower than a predetermined value (+5 V as an example). The reset signal may be, for example, an electrical signal that is turned on by being low level. The reset signal output from the power supply monitoring circuit 303 is amplified by, for example, an output driver circuit mounted on the power supply substrate 10, and then is amplified by the output driver circuit via the main substrate 11, the lamp control substrate 14 and the payout control substrate It is transmitted to 15. A reset signal may be transmitted to the effect control board 12 via the lamp control board 14. Furthermore, the circuit that outputs the reset signal may be configured using a watchdog timer built-in IC provided separately from the power supply monitoring circuit 303, a system reset IC, or the like.

  When the power supply to the pachinko gaming machine 1 is stopped, the power supply monitoring circuit 303 outputs a reset signal (set to a low level) when a predetermined period elapses after the power-off signal is output (set to a low level). ). For a predetermined period here, for example, the microcomputer for gaming control 100 mounted on the main substrate 11 shown in FIG. 2 and the microcomputer for payout control 150 mounted on the payout control substrate 15 perform a predetermined power-off process. It may be sufficient time to execute. That is, after the power supply monitoring circuit 303 outputs the power supply disconnection signal as the power failure signal, the game control microcomputer 100 and the payout control microcomputer 150 complete the execution of the predetermined power supply disconnection processing, and then as the operation stop signal. Output the reset signal of (set to low level). The game control microcomputer 100 and the payout control microcomputer 150 that have received the reset signal output from the power supply monitoring circuit 303 are put in the operation stop state, and execution of various control processes is stopped. Also, when the power supply to the pachinko gaming machine 1 is started, for example, when the predetermined voltage (for example, VCC) exceeds a predetermined value (for example, +5 V or more), the power supply monitoring circuit 303 stops outputting the reset signal (high Set to the level).

  FIG. 4 is a timing chart schematically showing the states of 24 V AC, VLP, VCC, the reset signal and the power-off signal when power supply to the pachinko gaming machine 1 is started and when the power supply is stopped. is there. As shown in FIG. 4, when power supply to the pachinko gaming machine 1 is started, VLP and VCC gradually reach prescribed values (DC +24 V and DC +5 V). At this time, when the VLP exceeds the first predetermined value, the power supply monitoring circuit 303 stops the output of the power-off signal (set to a high level) to be turned off. In addition, when VCC exceeds the second predetermined value, the power supply monitoring circuit 303 stops the output of the reset signal (set to the high level) to turn it off. On the other hand, when the power supply to the pachinko gaming machine 1 is stopped, VLP and VCC gradually decrease. At this time, when the VLP falls to a first predetermined value, the power supply monitoring circuit 303 turns on the power supply disconnection signal and outputs it (set to a low level). In addition, when VCC falls to the second predetermined value, the power supply monitoring circuit 303 turns on the reset signal and outputs it (set it to low level).

  The clear switch 304 provided in the power supply substrate 10 shown in FIG. 3 has, for example, a push button structure, and outputs a clear signal in response to an operation such as pressing. The clear signal may be, for example, an electrical signal that is turned on when the level is low. The clear signal output from the clear switch 304 is transmitted to the main substrate 11 via, for example, a predetermined connector or signal line, and transmitted from the main substrate 11 to the payout control substrate 15. When the clear switch 304 is not operated, the output of the clear signal is stopped (set to high level). The clear switch 304 may have another configuration (for example, a slide switch structure, a toggle switch structure, a dial switch structure, etc.) other than the push button structure.

  The main board 11 is a control board on the main side, and various circuits for controlling the progress of the game in the pachinko gaming machine 1 are mounted. The main board 11 mainly has a setting function of random numbers used in the special view game, a function of inputting a signal from a switch or the like disposed at a predetermined position, and a sub side consisting of the effect control board 12 and the payout control board 15 It has a function of outputting a control command as an example of command information as a control signal and transmitting it to a control board, a function of outputting various information to a management computer of a hall, and the like. Further, the main board 11 performs lighting / extinguishing control of each LED (for example, segment LED) constituting the first special symbol display device 4A and the second special symbol display device 4B, and the first special figure or the second special figure The variable display of a predetermined display pattern, such as controlling the variable display of the normal symbol display 20 or performing the on / off / coloring control of the normal symbol display 20 to control the variable display of the normal symbol by the normal symbol display 20 It also has a function to control. For example, as shown in FIG. 2, the main board 11 includes a gaming control microcomputer 100, a control clock generation circuit 111, a random number clock generation circuit 112, a switch circuit 114, and a solenoid circuit 115. . Further, on the main substrate 11, a game start switch 31 is installed.

  Here, the control clock generation circuit 111 generates a control clock CCLK which is an oscillation signal of a predetermined frequency outside the gaming control microcomputer 100. The control clock CCLK generated by the control clock generation circuit 111 is supplied to the clock circuit 502 via the control external clock terminal EXC of the game control microcomputer 100 as shown in FIG. 7, for example. The random number clock generation circuit 112 generates a random number clock RCLK that is an oscillation signal of a predetermined frequency different from the oscillation frequency of the control clock CCLK outside the gaming control microcomputer 100. The random number clock RCLK generated by the random number clock generation circuit 112 is supplied to the random number circuit 509 via the random number external clock terminal ERC of the gaming control microcomputer 100 as shown in FIG. 7, for example. As an example, the oscillation frequency of the random number clock RCLK generated by the random number clock generation circuit 112 may be equal to or less than the oscillation frequency of the control clock CCLK generated by the control clock generation circuit 111.

  The switch circuit 114 takes in detection signals from various switches for game ball detection and transmits the signals to the game control microcomputer 100. The solenoid circuit 115 transmits a solenoid drive signal from the game control microcomputer 100 to the solenoids 81 and 82. The game start switch 31 has, for example, a push button structure, and closes the gaming machine frame 3 in the pachinko gaming machine 1 to a predetermined location which can not be touched from the outside of the pachinko gaming machine 1 in a state where the player performs normal gaming. It should just be arrange | positioned. Then, for example, when the pachinko gaming machine 1 is powered on or when the system is reset, the pachinko gaming machine 1 is initially set and then instructed to start the game. The game start switch 31 may have another configuration (for example, a slide switch structure, a toggle switch structure, a dial switch structure, etc.) other than the push button structure.

  As shown in FIG. 2, the main substrate 11 is connected to a wire for transmitting detection signals from the gate switch 21, the first start port switch 22 </ b> A, the second start port switch 22 </ b> B and the count switch 23. The gate switch 21, the first start opening switch 22A, the second start opening switch 22B, and the count switch 23 have any configuration capable of detecting a game ball as a game medium, such as one called a sensor. It is sufficient if it has. In addition, the main substrate 11 includes the first special symbol display device 4A and the second special symbol display device 4B, the normal symbol display device 20, the first hold indicator 25A, the second hold indicator 25B, and the common view hold indicator 25C. Wiring for transmitting a command signal for performing display control such as is connected. Furthermore, the main board 11 is connected with a wire for transmitting a command signal for performing drive control of the solenoid 81 for the normal motor vehicle and the solenoid 82 for the big winning opening door.

  Various control commands are transmitted between the main board 11 and the effect control board 12 by performing serial communication only in a single direction from the main board 11 to the effect control board 12 via the relay board 18, for example. Ru. The effect control board 12 is a sub-side control board independent of the main board 11, receives the control command transmitted from the main board 11 via the relay board 18, and receives the image display device 5, the speakers 8L, 8R. And various circuits for controlling electric components (rendering device) for effects such as light emitters such as game effect lamps 9 are mounted. That is, the effect control board 12 has functions to control the display operation in the image display device 5, the sound output operation from the speakers 8L and 8R, and the lighting operation and extinguishing operation in the light emitting body such as the game effect lamp 9 . The effect control board 12 is connected with wiring for transmitting control signals to the sound control board 13 and the lamp control board 14, and wiring for transmitting image data signals to the image display device 5.

  For example, the main board 11 may be provided with a main board connector corresponding to the relay board 18, and an output buffer circuit may be connected between the main board connector and the game control microcomputer 100. . The output buffer circuit can pass control signals only in the direction from the main board 11 to the effect control board 12 via the relay board 18, for example, and blocks the input of signals from the relay board 18 to the main board 11. . Therefore, there is no room for a signal to be transmitted from the side of the effect control board 12 or the relay board 18 to the side of the main board 11. The relay board 18 may not be provided between the main board 11 and the effect control board 12. As a result, the degree of freedom of wiring between the main substrate 11 and the effect control substrate 12 can be enhanced.

  For example, a transmission direction restriction circuit may be provided on the wiring for transmitting the control signal from the main substrate 11 to the effect control substrate 12 in the relay substrate 18. In the transmission direction control circuit, the anode is connected to the main substrate connector corresponding to the main substrate 11, and the diode whose cathode is connected to the effect control substrate connector corresponding to the effect control substrate 12 and one end is connected to the cathode of the diode And the other end of the resistor is connected to ground (GND). With this configuration, the transmission direction control circuit can block the input of the signal from the effect control board 12 to the relay board 18 and allow the signal to pass only in the direction from the main board 11 toward the effect control board 12. Therefore, there is no room for a signal to be transmitted from the side of the effect control board 12 to the main board 11 side. In this embodiment, a transmission direction control circuit is provided in the wiring for transmitting a control signal in the relay substrate 18, and an output buffer circuit is provided between the game control microcomputer 100 and the main substrate side connector in the main substrate 11. By providing the input signal, it is possible to prevent an unauthorized input of the signal to the main substrate 11 from the outside.

  Various control commands and notification signals are transmitted between the main substrate 11 and the payout control substrate 15 by performing serial communication in both directions, for example. The payout control board 15 is a sub-side control board independent of the main board 11, receives control commands and notification signals transmitted from the main board 11, and controls the payout operation of the game ball by the payout motor 51. The various circuits for this are mounted. That is, the payout control board 15 has a function of controlling the payout operation of the winning balls by the payout motor 51. In addition, the payout control board 15 may have a function of controlling the ball lending operation by controlling the drive of the payout motor 51 according to the result of communication with the card unit via the interface board, for example. The payout control board 15 receives the detection signals from the payout motor position sensor 71, the payout count switch 72, and the error release switch 73, and the wiring for receiving the detection signals from the full tank switch 26 and the ball out switch 27. Wiring is connected. In addition, wiring for transmitting a command signal for performing the payout control of the gaming ball in the payout motor 51, and a command signal for performing the display control in the error display LED 74 are sent to the payout control board 15 Wirings for communication with the card unit via the interface substrate are connected.

  Here, the full tank switch 26 is installed, for example, on the side wall of the surplus ball passage connecting the ball supply tray and the surplus ball tray at the lower back of the game board 2 and detects the full tank of the surplus ball tray. It is a thing. When a large number of gaming balls are paid out based on the winning balls or the ball lending request and the ball supply tray becomes full and the gaming balls reach the contact opening, if the gaming balls are further paid out, the gaming balls pass through the surplus ball passage It is led to the surplus ball saucer. Further, when the game ball is paid out, for example, a predetermined sensing lever presses the full switch 26 to be turned on.

  Also, the ball out switch 27 is installed, for example, on the back of the game board 2 downstream of the guide rail that guides the gaming ball to the payout device in which the payout motor 51 is installed, and via the curved rod downstream of the guide rail. It is for detecting the presence or absence of the game ball in the two rows of ball passages which are communicated. As an example, the ball breakage switch 27 is locked by a locking piece at a position where it can detect that there are 27 to 28 gaming balls in the ball passage, and the maximum payout number (for example, 100) of one unit of ball rental Make it possible to confirm that 25 or more, equivalent to yen, are secured. The guide rail guides the gaming ball from the storage tank storing the gaming ball as the refilling ball to the payout device at the upper side of the back surface of the gaming board 2 to the lower part of the ball passage. The dispensing device installed is fixed.

  The error release switch 73 is a switch for releasing the error state by software reset when the payout control microcomputer 150 is controlled to a predetermined error state. The error display LED 74 is, for example, a 7-segment LED, and displays error codes corresponding to various errors based on an error flag or the like set by the payout control microcomputer 150.

  The launch control board 17 shown in FIG. 2 is for controlling the launch operation of the gaming ball by a predetermined launch device in accordance with the amount of operation of the operation knob 30. For example, a wire for transmitting a drive signal from the power supply substrate 10 or the main substrate 11, a wire for transmitting a connection signal from the card unit via the payout control substrate 15 and the interface substrate, and the operation knob 30 in the emission control substrate 17. As well as the wiring from the above is connected, the wiring to the launch motor 61 is connected. The connection signal from the card unit may be branched by the payout control substrate 15 and transmitted to the firing control substrate 17. Alternatively, the firing control may be performed from the card unit via the interface substrate without passing through the payout control substrate 15. It may be transmitted to the substrate 17. The launch control board 17 adjusts the drive power of the launch motor 61 in accordance with the amount of operation of the operation knob 30. The launch motor 61 elastically deforms the launch spring by, for example, the driving force adjusted by the launch control board 17 and transmits the biasing force of the launch spring to the striking hammer to strike the gaming ball, thereby operating the game ball 30. Fire at the speed corresponding to the amount of operation of the game area.

  The control command transmitted from the main board 11 to the effect control board 12 via the relay board 18 is, for example, an effect control command transmitted as an electric signal. In this embodiment, the effect control command is transmitted and set by the CPU 505 (see FIG. 7) included in the game control microcomputer 100 mounted on the main substrate 11, and the game control microcomputer 100 is based on the setting. The second channel transmission circuit 571B (see FIG. 25) of the serial communication circuit 511 (see FIG. 7) included in the control signal is transmitted to the effect control board 12. In the following description, the transmission operation of the effect control command from the main substrate 11 to the effect control substrate 12 includes a series of operations by the CPU 505 and the serial communication circuit 511 provided in the game control microcomputer 100. Do. In this case, on the side of the effect control board 12, for example, interrupt processing based on a reception interrupt request generated when the CPU of the effect control microcomputer 120 receives the communication data in the serial signal format transmitted from the main board 11 is used. By executing the effect control command, the effect control command may be fetched and stored in a predetermined buffer (for example, a reception command buffer for effect). The effect control command may be transmitted from the main board 11 to the effect control board 12 via the relay board 18 by a plurality of signal lines (for example, eight effect control signal lines). In this case, in addition to the signal line for transmitting the effect control command, a signal line for transmitting an acquisition signal (effect control INT signal) requesting acquisition of the effect control command may be wired.

  In the effect control command, for example, a display control command used to control an image display operation in the image display device 5, a voice control command used to control an audio output from the speakers 8L and 8R, a game effect lamp 9 And a lamp control command used to control the lighting operation of the light emitter. FIG. 5A is an explanatory view showing an example of the content of the display control command used in this embodiment. The display control command has, for example, a 2-byte configuration, the first byte indicates MODE (classification of command), and the second byte indicates EXT (type of command). The first bit (bit number [7]) of the MODE data is always "1", and the first bit of the EXT data is "0". The form of the display control command shown in FIG. 5A is an example, and another form of command may be used. Further, in this example, the display control command has a 2-byte configuration, but the number of bytes constituting the display control command may be one, or may be three or more.

  In the example shown in FIG. 5 (A), the command 8001H is a first change start command for specifying the start of change of the first special figure in the special figure game by the first special symbol display device 4A. The command 8002H is a second change start command for specifying the start of change of the second special view in the special view game by the second special symbol display device 4B. Command 81XXH is an ornament that is variably displayed on "left", "middle", and "right" decorative symbol display portions 5L, 5C, 5R corresponding to the variable display of the special symbol in the special figure game. It is a change pattern specification command which specifies a change pattern such as a symbol. Here, XXH represents an unspecified hexadecimal number, and may be a value arbitrarily set in accordance with the content of an instruction by the effect control command. In the fluctuation pattern designation command, different EXT data is set according to the fluctuation pattern to be designated.

  In this embodiment, the first and second fluctuation start commands and the fluctuation pattern designation command are prepared as separate effect control commands. On the other hand, it is configured so that specification contents of which one of the first special drawing and the second special drawing is to start fluctuation and specification contents of fluctuation pattern can be specified by one effect control command. It is also good. As an example, an effect control command is prepared in which the EXT data is set corresponding to the combination of the special symbol (first special figure or the second special figure) that starts the change and the change pattern, and the effect control command It is possible to be able to specify the special symbol and the fluctuation pattern that are the start of fluctuation. Here, when it is configured such that the special symbol that is the start of fluctuation and the fluctuation pattern can be identified by one effect control command, the special symbol (the first special character that is the start of fluctuation for one fluctuation pattern) There are cases where it is necessary to prepare two types of effect control commands according to the figure or the second special figure). On the other hand, if the effect control command for designating the special symbol to start fluctuation and the effect control command for designating the fluctuation pattern are separately prepared, two types of effect control commands corresponding to the special symbol to start fluctuation And the number of effect control commands corresponding to the number of types of fluctuation patterns may be prepared, and the types of commands prepared in advance, the storage capacity of the command table, and the like can be reduced.

  The command 8CXXH is a variable display result notification command for specifying a variable display result such as a special symbol or a decorative symbol. For example, as shown in FIG. 5 (B), in the variable display result notification command, the variable display result is a predetermination result as to whether it is “losing”, “big hit”, or “small hit”, and the variable display result is Different EXT data is set according to the jackpot type determination result that the jackpot type in the "big hit" will be "normal", "first definite variation"-"third definite variation", or "probable". Ru. More specifically, the command 8C00H is a first variable display result notification command indicating a result of prior determination that the variable display result is "loss". The command 8C01H is a second variable display result notification command indicating a preliminary determination result that the jackpot type will be "normal" when the variable display result is "big hit", and a jackpot type determination result. The command 8C02H is a third variable display result notification command indicating an a priori determination result that the jackpot type is "first definite variation" when the variable display result is "big hit" and a jackpot type determination result. The command 8C03H is a fourth variable display result notification command indicating the preliminary determination result that the jackpot type will be the "second definite variation" when the variable display result is "big hit", and the jackpot type determination result. The command 8C04H is a fifth variable display result notification command indicating an a priori determination result that the big hit type becomes "3rd definite variation" when the variable display result is "big hit" and a big hit type determination result. The command 8C05H is a sixth variable display result notification command indicating a determination result indicating that the jackpot type is “probable” when the variable display result is “big hit”. The command 8C06H is a seventh variable display result notification command indicating the determination result that the variable display result is "small hit".

  In this embodiment, the variation pattern designation command and the variable display result notification command are prepared as separate effect control commands. On the other hand, the variation pattern indicated by the variation pattern designation command and the variable display result indicated by the variable display result notification command may be configured to be identifiable by one effect control command. As an example, a presentation in which the EXT data is set corresponding to the combination of the variation pattern and the variable display result ("losing", "big hit" or "small hit" and the big hit type in the case of "big hit") A control command may be prepared, and information capable of specifying the variation pattern and the variable display result may be transmitted by the effect control command. Alternatively, the fluctuation pattern and the variable display result may be specified by three or more effect control commands. Here, when the variation pattern and the variable display result are configured to be specified by one effect control command, a plurality of types of effects corresponding to a plurality of types of variable display results with respect to one fluctuation pattern. You may need to prepare control commands. On the other hand, if the effect control command for specifying the variation pattern and the effect control command for notifying the variable display result are separately prepared, the number of effect control commands corresponding to the number of types of fluctuation pattern, and the variable display result The number of effect control commands corresponding to the number of types may be prepared, and the types of commands prepared in advance, the storage capacity of the command table, and the like can be reduced.

  The command 8F00H is a decorative symbol stop command for designating stop of the variable display of the decorative symbol on the “left”, “middle” and “right” decorative symbol display portions 5L, 5C and 5R in the image display device 5. The decorative symbol stop command may not be transmitted from the main substrate 11 to the effect control substrate 12. In this case, the variable display time corresponding to the fluctuation pattern designated by the fluctuation pattern designation command is specified on the side of the effect control board 12, and the elapsed time from the start of the variable display of the decorative pattern is the variable display time When it does not receive the effect control command from the main substrate 11, the finalized display of the finalized decorative symbol may be displayed, and the variable display result may be finalized.

  A0XXH is a hit start designation command (also referred to as “fanfare command”) for designating the display of the effect image indicating the start of the big hit gaming state or the small hit gaming state. In the hit start designation command, for example, the same EXT data as the variable display result notification command is set, etc., so that different EXT data is set according to the prior determination result or the big hit type determination result. Alternatively, in the hit start designation command, the correspondence between the preliminary determination result and the jackpot type determination result and the EXT data to be set may be made different from the correspondence in the variable display result notification command.

  Command A1XXH is a large winning opening open specification command that specifies the display of the effect image in the period in which the large winning opening is open in each round or variable winning operation, corresponding to the big hit gaming state or the small hit gaming state. It is. The command A2XXH corresponds to the big hit gaming state or the small hit gaming state, the effect image in the period when the big winning opening changes from the open state to the closed state by the end of each round or variable winning operation (for example, the effect in the interval between rounds It is a designation command after the big winning opening opening which designates the display of the image). In the special winning opening open designated command or after the special winning opening open designated command, for example, the number of rounds executed in the 15 round big hit state (for example, “1” to “15”) or the round or small hit gaming state in the 2 round big hit state Different EXT data are set corresponding to the number of times of execution of the variable winning operation (for example, “1” or “2”) in. In addition, depending on whether it is 15 round big hit state, 2 round big hit state or small hit gaming state, it is possible to prepare separately the designated command during large winning a prize opening and the designated command after big winning a prize opening. On the other hand, the number of types of effect control commands can be reduced by using the common large winning opening open designated command and the large winning opening open designated command in the 15 round big hit state and 2 round big hit state, small hit gaming state can do. In the big hit gaming state or small hit gaming state, it is a period during which the big winning opening is open in each round or variable winning operation, or the big winning opening is opened from the end of each round or variable winning operation. A continuous rendering operation may be executed from the start time point to the end time point of the big hit gaming state or the small hit gaming state regardless of whether it is a period changed to the closed state. Furthermore, in the small hit gaming state, the transmission of the special winning opening open designated command or the special winning opening open designated command may not be performed.

  The command A3XXH is a hit end designation command which designates the display of the effect image at the end of the big hit gaming state or the small hit gaming state. In the hit end specification command, different EXT data is set according to the prior determination result or the jackpot type determination result, for example, by setting the same EXT data as the variable display result notification command or the hit start specification command. Alternatively, in the hit end designation command, the correspondence between the preliminary determination result and the jackpot type decision result and the EXT data to be set may be made different from the correspondence in the variable display result notification command or the hit start designation command. .

  The command B 001 H is for executing the special figure game using the first special figure by the first special symbol display device 4 A based on the fact that the gaming ball has won in the first starting winning opening formed by the normal winning ball device 6 A. This is a first starting opening winning combination designation command for notifying that the first starting condition is established. The command B 002 H is for executing a special drawing game using the second special drawing by the second special symbol display device 4 B based on the fact that the gaming ball has won the second starting winning opening formed by the normally variable winning ball device 6 B. It is a 2nd starting opening winning a prize specified command which notifies that the 2nd starting conditions of were satisfied.

  The command C0XXH displays the first number of pending storages and the second number of pending storages so that the number of special views pending storage can be specified in an identifiable manner by the start prize storing display portion 5H or the like provided in the display area of the image display device 5. It is a pending storage number notification command for reporting the total pending storage number which is the total value of. In the pending storage count notification command, for example, either the first starting opening winning combination designation command or the second starting opening winning combination designation command is transmitted in response to either the first starting condition or the second starting condition being satisfied. Subsequently, the main substrate 11 transmits to the effect control substrate 12. In the pending storage number notification command, for example, the total storage number (for example, “1” to “8”) of the pending data in the first special view pending storage unit 591A and the second special view pending storage unit 591B shown in FIG. Alternatively, different EXT data is set corresponding to the total storage number of start data (for example, “1” to “8”) in start data storage unit 591C. Thereby, on the side of the effect control board 12, when either the first start condition or the second start condition is satisfied, the pending memory number notification command transmitted from the main board 11 is received, and the first special figure is displayed. It is possible to specify the total storage number of pending data in the pending storage unit 591A and the second special view pending storage unit 591B.

  In this embodiment, the first and second starting opening winning combination designation commands and the number-of-held-memory designation commands are prepared as separate effect control commands. On the other hand, the notification content of which of the first start condition and the second start condition is satisfied and the notification content of the total number of pending storages can be specified by one effect control command. It is also good. As an example, an effect control command is prepared in which the EXT data is set corresponding to the combination of the satisfied start condition (the first start condition or the second start condition) and the total number of pending storages. The established start condition and the total pending storage number may be specified. Here, in the case where it is possible to specify which of the first start condition and the second start condition is satisfied with one effect control command together with the total pending memory number, for example, the upper limit value of the total pending memory number is “8 In the case of “1”, it is necessary to prepare a total of 16 types of effect control commands corresponding to the case where each of the first start condition and the second start condition is satisfied. On the other hand, if the effect control command capable of specifying which of the first start condition and the second start condition is established and the effect control command capable of specifying the total pending storage number are separately prepared, the first A total of 10 types of effect control commands of 2 types of effect control commands that can specify each of the start condition and the second start condition and 8 types of effect control commands that make it possible to specify the total number of pending storage The type of command prepared in advance, the storage capacity of the command table, etc. can be reduced.

  The control command transmitted from the main substrate 11 to the payout control substrate 15 is, for example, a payout control command transmitted as an electric signal. The payout control command is set for transmitting the payout control command by the CPU 505 (see FIG. 7) provided in the game control microcomputer 100 mounted on the main substrate 11, and based on the setting, it is for game control. It is transmitted to the payout control board 15 by the first channel transmission / reception circuit 571A (see FIG. 25) of the serial communication circuit 511 (see FIG. 7) included in the microcomputer 100. In the following description, the transmission operation of the payout control command from the main substrate 11 to the payout control substrate 15 includes a series of operations by the CPU 505 and the serial communication circuit 511 provided in the game control microcomputer 100. Do. Further, for example, a payout notification command as an electric signal is transmitted from the payout control substrate 15 to the main substrate 11. The payout notification command is set by the CPU of the payout control microcomputer 150 mounted on the payout control board 15 to transmit a payout notification command, and based on the setting, the payout control microcomputer 150 It is transmitted to the main substrate 11 by the provided serial communication circuit. In the following description, it is assumed that the transmission operation of the payout notification command from the payout control substrate 15 to the main substrate 11 includes a series of operations by the CPU and the serial communication circuit provided in the payout control microcomputer 150. . In addition, in the following description, not only a command of a predetermined operation from one of the main board 11 and the payout control board 15 to the other but also a notification signal for notifying the other of the operation state of one of the main board 11 and the payout control board 15 It shall be included in the notification command.

  FIG. 6 is an explanatory view showing an example of a command configuration transmitted and received between the main substrate 11 and the payout control substrate 15. As shown in FIG. 6A, the payout control command transmitted from the main substrate 11 to the payout control substrate 15 and the payout notification command transmitted from the payout control substrate 15 to the main substrate 11 are both It has a 2-byte configuration, and is configured to be the second byte by inverting the first byte. The first bit and the second byte can be distinguished by making the header different with the first bit (bit number [7]) of each byte as the header. For example, the header in the first byte is set to a fixed value of "0", while the header in the second byte is set to a fixed value of "1".

  The payout control command transmitted from the main substrate 11 to the payout control substrate 15 includes a payout amount designation command and an ACK feedback command. The number-of-payouts designation command is a command indicating the number of prize balls to be paid out, and is composed of, for example, bit values as shown in FIG. 6 (B). Here, the bit numbers [3-0] of the first byte and the second byte in the number-of-payouts designation command may be values set according to the number of prize balls to be paid out. In FIG. 6C, the payout amount designation command used in this embodiment is shown in hexadecimal notation. The command E31CH shown in FIG. 6C is a first payout amount designation command indicating that the number of prize balls to be paid out is thirteen. The command ED12H is a second payout amount designation command indicating that the number of prize balls to be paid out is three. In this embodiment, three gaming balls are paid out when the gaming ball is detected by any of the first starting opening switch 22A and the second starting opening switch 22B, and the gaming ball is detected by the count switch Make 13 prize balls.

  The command F 00 FH shown in FIG. 6C is an ACK feedback command serving as a reception confirmation acceptance signal indicating that the main board 11 has received the award ball ACK command transmitted from the payout control board 15 to the main board 11. It is.

  FIG. 6D is an explanatory view showing a configuration example of a payout notification command transmitted from the payout control substrate 15 to the main substrate 11. The payout notification command includes a prize ball ACK command, a payout error notification command, and a payout error cancellation command. The command A0F5H shown in FIG. 6D is a prize ball ACK serving as a reception confirmation signal indicating that the payout control substrate 15 has received the number-of-payouts designation command transmitted from the main substrate 11 to the payout control substrate 15. It is a command. The command B0F4H is a payout error notification command for notifying the main substrate 11 that an abnormality related to the payout of the gaming ball has occurred on the payout control substrate 15 side. The command B1E4H is a payout error cancellation command for notifying the main substrate 11 that the error generated on the payout control substrate 15 has been canceled.

  The main substrate 11 and the payout control substrate 15 are not limited to those that transmit and receive commands by serial communication, but may transmit and receive commands by parallel communication using a plurality of signal lines. Further, the payout control command and the payout notification command are not limited to the 2-byte configuration, and may be, for example, a 1-byte configuration. In this case, in the number-of-payouts designation command, the point that the bit number [3-0] is used as the number-of-payouts designation signal indicating the number of winning balls is the same as the configuration of FIG. On the other hand, any one bit of the bit number [7-4] is used as the number-of-payouts acquisition signal instructing acquisition of the number-of-payouts designation signal, or the prize ball REQ signal requesting the payout of the prize balls. Instead of the payout error notification command and the payout error cancellation command transmitted from the payout control substrate 15 to the main substrate 11, a payout error state signal indicating the occurrence of an error in the payout control substrate 15 is provided to the main substrate 11 May be input to one of the input ports. For example, the payout error state signal is turned on when an error occurs in the payout control board 15, and turned off when no error occurs or when the error is canceled. In this case, on the side of the main substrate 11, a payout error state signal is fetched every time a timer interrupt occurs, and the fetch result is stored. Then, the payout error state signal is changed from the off state to the on state by taking the exclusive OR of the signal state fetched by the current timer interrupt and the signal state fetched and stored by the previous timer interrupt. Or (indicating when an error occurs), it may be possible to detect that the on state has been changed to an off state (indicating the time of error cancellation). When an error occurs or the error is canceled in the dispensing control substrate 15, an error occurs in the dispensing operation by transmitting effect control commands prepared corresponding to each from the main substrate 11 to the effect control substrate 12, etc. The start or end of the notification operation of notifying the user may be instructed. It is not limited to what is inputted into one of the input ports provided on the main substrate 11 as a payout error state signal, for example, a payout control substrate 15 such as a full tank signal, a ball out signal, a winning ball case error signal, a door open signal. The signal input to the signal may be input to the main substrate 11 so that an error occurrence or an error release may be detected as in the case of the dispensing error state signal. Then, by transmitting a presentation control command according to the type of the detected error from the main board 11 to the presentation control board 12 or the like, the start or end of the notification operation according to the detected error may be instructed. You may

  FIG. 7 shows a configuration example of the game control microcomputer 100 mounted on the main substrate 11. The game control microcomputer 100 shown in FIG. 7 is, for example, a one-chip microcomputer, and has an external bus interface 501, a clock circuit 502, a unique information storage circuit 503, a reset / interrupt controller 504, and a CPU (Central Processing Unit). ), ROM (Read Only Memory) 506, RAM (Random Access Memory) 507, CTC (Counter / Timer Circuit) 508, random number circuit 509, PIP (Parallel Input Port) 510, and serial communication circuit 511. And an address decode circuit 512.

  FIG. 8 shows an example of an address map in the gaming control microcomputer 100. As shown in FIG. 8, the area from address 0000H to address 1FFFH is allocated to the ROM 506 and includes a user program area and a program management area. FIG. 9A shows an example of application and contents of the main part of the program management area in the ROM 506. The area from address 2000H to address 20FFH is a built-in register area assigned to the built-in register of the game control microcomputer 100. FIG. 9B shows an example of application and contents of the main part of the built-in register area. An area of address 7E00H to address 7FFFH is a work area allocated to the RAM 507, and can be allocated to an I / O map or a memory map. The area from the address FDD0H to the address FDFBH is an XCS decode area assigned to the address decode circuit 512.

  The program management area is a storage area for storing information necessary for the CPU 505 to execute a user program. As shown in FIG. 9A, the program management area includes the header KHDR, function setting KFCS, first random number initial setting KRS1, second random number initial setting KRS2, interrupt initial setting KIIS, security time setting KSES, etc. It is done.

  The header KHDR stored in the program management area indicates the reading setting of internal data in the gaming control microcomputer 100. FIG. 10A illustrates the correspondence between setting data and an operation in the header KHDR. Here, in the game control microcomputer 100, the ROM read preventing function and the bus output mask function can be set. The ROM read preventing function is a function for permitting or prohibiting the reading operation of the storage data of the ROM 506 provided in the game control microcomputer 100, and the storage data of the ROM 506 can not be read in the state where the reading is prohibited. When the external device connected to the external bus interface 501 makes a read request to read internal data of the game control microcomputer 100, the bus output mask function outputs the address bus output, data bus output and control signal in the external bus interface 501. This function is to disable reading of internal data from an external device by masking the output. As shown in FIG. 10A, the operation combination of the ROM read preventing function and the bus output masking function is set to be different corresponding to the setting data of the header KHDR. Among the setting data shown in FIG. 10A, the setting data for which ROM reading is permitted and for which the bus output mask is valid is also referred to as bus output mask valid data. Further, setting data (all “00H”) in which the ROM read is inhibited and the bus output mask becomes valid are also referred to as ROM read inhibit data. The setting data for which ROM reading is permitted and for which the bus output mask is invalidated is also referred to as bus output mask invalidated data.

  The function setting KFCS stored in the program management area indicates the operation setting of the watchdog timer (WDT; Watch Dog Timet) in the gaming control microcomputer 100 and the use setting of various function common terminals. FIG. 10B shows an example of setting contents in the function setting KFCS.

  The bit number [7-5] of the function setting KFCS indicates, for example, the operation permission / prohibition of the watchdog timer that can be set as an interrupt factor in the reset / interrupt controller 504, and the cycle when it is permitted. The bit number [4] of the function setting KFCS sets the predetermined function shared terminal (first shared terminal) in the gaming control microcomputer 100 to the second channel transmission terminal TXB used by the serial communication circuit 511 or the address decoding The TXB terminal setting is used to specify whether the circuit 512 is to be used as the chip select output terminal XCS13. In the example shown in FIG. 10B, if the bit value in bit number [4] of function setting KFCS is “0”, the first shared terminal is used for the second channel transmission in serial communication circuit 511. It becomes setting of 2 channel transmission terminal TXB. On the other hand, if the bit value is "1", the first shared terminal becomes the setting of the chip select output terminal XCS13 used in the address decoding circuit 512. In this embodiment, serial communication with the effect control board 12 is performed by setting the bit number [4] of the function setting KFCS to “0” and setting the first shared terminal to the second channel transmission terminal TXB. to enable.

  The bit number [3] of the function setting KFCS sets the predetermined function shared terminal (second shared terminal) in the gaming control microcomputer 100 to the first channel transmission terminal TXA used by the serial communication circuit 511 or the address decoding The TXA terminal setting indicates whether the circuit 512 is to be used as the chip select output terminal XCS12. In the example shown in FIG. 10B, if the bit value in bit number [3] of function setting KFCS is “0”, the second shared terminal is used for the first channel transmission in serial communication circuit 511. It becomes setting of 1 channel transmission terminal TXA. On the other hand, if the bit value is "1", the second shared terminal becomes the setting of the chip select output terminal XCS12 used in the address decode circuit 512. In this embodiment, serial communication with the payout control board 15 is performed by setting the bit number [3] of the function setting KFCS to “0” and setting the second shared terminal to the first channel transmission terminal TXA. to enable.

  The bit number [2] of the function setting KFCS sets the predetermined function shared terminal (third shared terminal) in the game control microcomputer 100 to the first channel reception terminal RXA used by the serial communication circuit 511 or the PIP 510 This RXA terminal setting indicates whether to use the input port P5. In the example shown in FIG. 10B, if the bit value in bit number [2] of function setting KFCS is “0”, the third shared terminal is used for the first channel reception in serial communication circuit 511. It becomes setting of 1 channel reception terminal RXA. On the other hand, if the bit value is "1", the third shared terminal becomes the setting of the input port P5 used by the PIP 510. In this embodiment, serial communication with the payout control board 15 is performed by setting the bit number [2] of the function setting KFCS to “0” and setting the third shared terminal to the first channel reception terminal RXA. to enable.

  The bit number [1] of the function setting KFCS is used as the external non-maskable interrupt terminal XNMI connected to the CPU 505 or the like, or the PIP 510 is used as the predetermined function shared terminal (fourth shared terminal) in the gaming control microcomputer 100. This is an NMI connection setting indicating whether to set the input port P4. In the example shown in FIG. 10B, when the bit value in bit number [1] of function setting KFCS is "0", the setting of external non-maskable interrupt terminal XNMI in which the fourth shared terminal is connected to CPU 505 etc. (CPU connection). On the other hand, if the bit value is "1", the fourth shared terminal becomes the setting of the input port P4 used by the PIP 510 (CPU not connected).

  The bit number [0] of the function setting KFCS is used by setting the predetermined function shared terminal (fifth shared terminal) in the gaming control microcomputer 100 as the external maskable interrupt terminal XINT connected to the CPU 505 or the like, or by using the PIP 510. This is an XINT connection setting indicating whether to set the input port P3. In the example shown in FIG. 10B, when the bit value in the bit number [0] of the function setting KFCS is “0”, the fifth shared terminal becomes the setting of the external maskable interrupt terminal XINT connected to the CPU 505 or the like. (CPU connection). On the other hand, if the bit value is "1", the fifth shared terminal becomes the setting of the input port P3 used by the PIP 510 (CPU not connected).

  The first random number initial setting KRS1 and the second random number initial setting KRS2 stored in the program management area indicate the initial setting of the random number circuit 509. FIG. 11A illustrates an example of setting contents in the first random number initial setting KRS1. FIG. 11B shows an example of setting contents in the second random number initial setting KRS2.

  The bit number [3] of the first random number initial setting KRS1 is a random number circuit usage setting indicating whether or not the random number circuit 509 is used. In the example shown in FIG. 11A, if the bit value in the bit number [3] of the first random number initial setting KRS1 is “0”, the random number circuit 509 is not used (one not used), “1” If “”, the random number circuit 509 is set to be used (use). In this embodiment, the bit number [3] of the first random number initial setting KRS1 is set to “1”, and the random number circuit 509 is set to be usable.

  The bit number [2] of the first random number initial setting KRS1 indicates whether the random number update clock RGK (see FIG. 15) used for updating numerical data to be random numbers in the random number circuit 509 is the internal system clock SCLK or It is a random number update clock setting indicating whether to divide the clock RCLK by two. In the example shown in FIG. 11A, when the bit value in the bit number [2] of the first random number initial setting KRS1 is “0”, the internal system clock SCLK is set to be used for the random number update clock RGK. If it is 1 ′ ′, the random number clock RCLK is divided by two to be used as the random number update clock RGK. In this embodiment, the bit number [2] of the first random number initial setting KRS1 is set to “1”, and the random number clock RCLK is divided by two to be used as the random number update clock RGK.

  The bit number [1-0] of the first random number initial setting KRS1 is a random number update rule setting indicating whether or not to change the random number update rule in the random number circuit 509, and a changing method in the case of changing. In the example shown in FIG. 11A, if the bit value in the bit number [1-0] of the first random number initial setting KRS1 is "00", the random number update rule is not changed, and if it is "01". After the second round, the random number update rule is set to be changed by software. If "10", the random number update rule is automatically set to be changed after the second round.

  A fixed bit value "00" is set to the bit number [3-2] of the second random number initial setting KRS2. In addition, "B" of "00B" in FIG. 11 (B) shows that it is a binary number display. The bit number [1-0] of the second random number initial setting KRS2 indicates the setting regarding the start value in the numerical data to be the random number value in the random number circuit 509. In the example shown in FIG. 11B, when the bit value in the bit number [1] of the second random number initial setting KRS2 is “0”, the start value is set to a predetermined default value 0001H, “1”. When this is the case, a value based on the ID number, which is unique identification information given to each of the gaming control microcomputers 100, is set as the start value. Further, in the example shown in FIG. 11B, if the bit value in the bit number [0] of the second random number initial setting KRS2 is “0”, the start value is not changed at each system reset, while “ When it is "1", it is set to change the start value at each system reset. When the start value is set to a value based on an ID number, part or all of operations such as addition / subtraction / multiplication / division using ID number for performing predetermined scramble processing on the ID number It is sufficient to execute and use the calculated value as the start value. When the start value is changed every system reset, for example, the count value of the free run counter built in the game control microcomputer 100 is a predetermined built-in that the game control microcomputer 100 has when the system reset occurs. Store in a register (random number start value register). Then, the start value can be obtained by using the stored value of the random number start value register as it is at the time of initialization, or by using a value obtained by substituting the stored value into a predetermined arithmetic function (for example, a hash function). It may be determined randomly. The free run counter may be backed up using a backup power source common to the backup portion on the main substrate 11, such as a backup area in the RAM 507 of the microcomputer 100 for game control, for example. Alternatively, the free run counter may be backed up by a power supply provided separately from a backup power supply used for a backup area or the like in the RAM 507. In this manner, the free run counter is backed up by the pack-up power supply, so that the count value of the free run counter is stored for a predetermined period even when the power supply is stopped.

  When two circuits (corresponding to the first and second channels) are provided in the random number circuit 509 for generating numerical data to be random numbers, the first circuit shown in FIGS. 11A and 11B is provided. The bit number [3-0] of the random number initial setting KRS1 and the bit number [3-0] of the second random number initial setting KRS2 are used to indicate the initial setting in the first channel. On the other hand, the bit number [7-4] of the first random number initial setting KRS1 and the bit number [7-4] of the second random number initial setting KRS2 (not shown in FIGS. 11A and 11B), It may be used as an indication of the initial settings in the channel.

  The interrupt initialization setting KIIS stored in the program management area indicates the initialization regarding the handling of the maskable interrupt generated in the game control microcomputer 100. FIG. 11C shows an example of setting contents in the interrupt initialization setting KIIS.

  In the bit number [7-4] of the interrupt initial setting KIIS, the upper 4 bits of the interrupt vector are set. The bit number [3-0] of the interrupt initialization KIIS sets the combination of the priorities of the maskable interrupt factors. In the example shown in FIG. 11C, if any of “00H” to “02H” and “06H” is specified by the bit number [3-0] of the interrupt initial setting KIIS, the maskable interrupt factor from the CTC 508 is selected. The combination of priority to be the highest priority is set. On the other hand, if "03H" or "07H" is specified, a combination of priorities is given which gives the maskable interrupt factor from the random number circuit 509 the highest priority. Also, if either "04H" or "05H" is specified, a combination of priorities is given which gives the maskable interrupt factor from the serial communication circuit 511 the highest priority. Note that even if the combination of priorities in which the maskable interrupt factor from the same circuit is given the top priority is different when the designated value is different, the type of the maskable interrupt factor to be the top priority and the combination of the priorities in the second or lower rank are different ing.

  The security time setting KSES stored in the program management area is a frequency at which an abnormality is detected when monitoring the frequency of the random number clock RCLK, and a time of a security mode which is transitioned to when the operation of the game control microcomputer 100 starts. Indicates settings related to security time). Here, when the operation mode of the game control microcomputer 100 is the security mode, a predetermined security check process is executed to check whether the storage content of the ROM 506 has been changed. FIG. 12A shows an example of setting contents in the security time setting KSES.

  The bit number [7-6] of the security time setting KSES is a random number clock abnormality detection setting indicating a frequency at which an abnormality is detected when the frequency of the random number clock RCLK is monitored. FIG. 12B shows an example of setting contents in bit number [7-6] of security time setting KSES. The bit number [7-6] of the security time setting KSES designates a reference value (determination value) by which the frequency of the random number clock RCLK is detected as abnormal based on the frequency of the internal system clock SCLK. A fixed bit value "0" is set to the bit number "5" of the security time setting KSES.

  The bit number [4-3] of the security time setting KSES indicates the time setting when the security time is extended by a random time for each system reset. FIG. 12C shows an example of setting contents in bit number [4-3] of security time setting KSES. In the example shown in FIG. 12C, when the bit value in the bit number [4-3] of the security time setting KSES is "00", random time extension is not performed. On the other hand, if the bit value is "01", the short mode is set. If the bit value is "10", the long mode is set. Here, when the short mode or the long mode is designated, for example, the count value of the free run counter built in the game control microcomputer 100 is a predetermined value provided to the game control microcomputer 100 when the system reset occurs. Store in built-in register (variable security time register). Then, the security time is used by using the stored value of the variable security time register as it is at the time of initialization, or by using a value obtained by substituting the stored value into a predetermined operation function (for example, a hash function). The extension time for extension may be determined randomly. As an example, when the frequency of internal system clock SCLK is 6.0 MHz, the extension time is randomly determined in the range of 0 to 680 μs (microseconds) in the short mode, and in the range of 0 to 348, 160 μs in the long mode The extension time is randomly determined. As another example, when the frequency of the internal system clock SCLK is 10.0 MHz, the extension time is randomly determined in the range of 0 to 408 μs in the short mode, and in the range of 0 to 208, 896 μs in the long mode. The extension time is randomly determined. The free run counter used to randomly determine the extension time for extending the security time for each system reset randomly determines the start value of the random number generated by the random number circuit 509 for each system reset. The free run counter used for the purpose may be the same counter or a separately provided counter.

  The bit number [2-0] of the security time setting KSES indicates the time setting in the case where the security time is added to the fixed time to be one of a plurality of extension times that can be selected in advance. FIG. 12D shows an example of setting contents in bit number [2-0] of security time setting KSES. In the example shown in FIG. 12D, if the bit value in the bit number [2-0] of the security time setting KSES is “000”, there is no extension time to be added to the fixed time, and the extension is not set. On the other hand, if the bit value is a value other than "000", it is set to any of a plurality of extension times determined using the cycle TSCLK of the internal system clock SCLK. In this case, different extension times are set according to the designated bit value. As an example, when the frequency of internal system clock SCLK is 6.0 MHz, if the bit value in bit number [2-0] of security time setting KSES is "001", about 699.1 ms in addition to fixed time The extension time of (milliseconds) is set. As another example, if the bit value in bit number [2-0] of security time setting KSES is “001” when the frequency of internal system clock SCLK is 10.0 MHz, in addition to the fixed time An extension time of about 419.4 ms is set.

  Further, the short mode or the long mode is set by the bit value in bit number [4-3] of security time setting KSES, and the bit value in bit number [2-0] of security time setting KSES is set to other than "000". It is also possible to set an extension time to be added to the fixed time. In this case, both the extension time corresponding to the bit value in bit number [2-0] and the extension time randomly determined based on the bit value in bit number [4-3] are fixed times. In addition, the security time in which the game control microcomputer 100 is in the security mode is determined.

  An external bus interface 501 included in the game control microcomputer 100 shown in FIG. It is a bus interface having a direction control function and the like. For example, the external bus interface 501 is connected to an external memory or an external input / output device externally attached to the game control microcomputer 100, etc. As long as it sends and receives In this embodiment, the external bus interface 501 includes an internal resource access control circuit 501A.

  The internal resource access control circuit 501A controls the access to the internal data of the game control microcomputer 100 from the external device through the external bus interface 501, for example, the game control program and fixed data stored in the ROM 506. It is a circuit for limiting improper external reading of data. Here, a circuit analysis device such as, for example, an in-circuit emulator (ICE) may be connected to the external bus interface 501 as an external device.

  As an example, depending on the contents of the header KHDR stored in the program management area of the ROM 506, it is possible to switch whether to prohibit or permit reading of storage data in the ROM 506. For example, when the header KHDR is bus output mask invalid data, reading of the ROM 506 by the external device is enabled, and external reading of internal data is permitted. On the other hand, when the header KHDR is bus output mask valid data, the external device ROM 509 is used by masking the address bus output, data bus output and control signal output in the external bus interface 501, for example. To disable external reading of internal data. In this case, when reading of internal data is requested from an external device connected to the external bus interface 501, the internal data can not be read from the external device by outputting a predetermined fixed value. . In addition, when the header KHDR is ROM read prohibition data, the ROM 506 itself may not be read, and reading of stored data in the ROM 506 may be prevented. Then, for example, in the ROM at the manufacturing stage, by setting the header KHDR as the ROM read prohibition data, the ROM itself is made unreadable, and if it is the development ROM, the bus output mask invalid data is written in the header KHDR, Allows external devices to verify internal data. On the other hand, if the ROM for mass production is used, by writing the bus output mask valid data in the header KHDR, reading of the ROM 506 in the inside of the game control microcomputer 100 by the CPU 505 or the like becomes possible while the external device It is preferable that the ROM 506 can not read out the data.

  As another example, the internal resource access control circuit 501A is required to read out internal data of the game control microcomputer 100, such as all or part of stored data in the ROM 506, from an external device connected to the external bus interface 501. To detect When the read request is detected, the internal resource access control circuit 501A determines whether to permit reading of internal data of the game control microcomputer 100 or not. For example, it is assumed that the encryption processing is performed on all or part of the storage data in the ROM 506. In this case, if the read request from the external device is a read request for the encryption processing program or key data stored in the ROM 506, the internal resource access control circuit 501A rejects the read request and the game control micro computer Reading out internal data of the computer 100 is prohibited. In external bus interface 501, a switch element is provided between the internal bus and an output port from which stored data in ROM 506 is output, and the internal resource access control circuit 501A prohibits reading of internal data. Is controlled to be in the off state. As described above, the internal resource access control circuit 501A reads the internal data according to whether the read request from the external device requests reading of predetermined internal data (for example, a predetermined area of the ROM 506). It may be determined whether to prohibit or permit.

  Alternatively, when the internal resource access control circuit 501A detects a read request for internal data, it may determine whether a predetermined authentication code is input from an external device. In this case, for example, a predetermined code pattern to be an authentication code may be stored in advance in the internal resource access control circuit 501A or in a predetermined area of the ROM 506. Then, when the authentication code is input from the external device, the authentication code is compared with the internally stored authentication code, and if it matches, the read request is accepted to read the internal data of the game control microcomputer 100. To give permission. On the other hand, when the authentication code input from the external device does not match the authentication code stored internally, the read request is rejected, and the reading of the internal data of the game control microcomputer 100 is prohibited. As described above, the internal resource access control circuit 501A determines whether to prohibit or permit internal data reading according to whether the authentication code input from the external device matches the authentication code stored internally. You may do it. In this way, it is possible to read out the internal data of the gaming control microcomputer 100 without damaging the internal data of the game control microcomputer 100 using the correct authentication code obtained in advance by an inspection organization or the like. become.

  As still another example, a read prohibition flag is provided in the internal resource access control circuit 501A, and if the read prohibition flag is in the on state, the reading of the ROM 506 by the external device is prohibited. On the other hand, when the read prohibition flag is in the OFF state, the reading of the ROM 506 by the external device is permitted. Here, the read prohibition flag is in the off state in the initial state, but after the read prohibition flag is once turned on, the read prohibition flag can not be cleared to return to the off state. Just do it. That is, the read prohibition flag can be irreversibly changed from the off state to the on state. For example, internal resource access control circuit 501A is not provided with the function of clearing the read inhibit flag and turning it off, and is set so that the read inhibit flag can not be cleared by any instruction. Just do it. Then, when the external resource access control circuit 501A requests reading of internal data of the game control microcomputer 100 such as stored data in the ROM 506 from the external device, the internal resource access control circuit 501A determines whether the read prohibition flag is on. At this time, if the read prohibition flag is on, the read request from the external device is rejected, and the reading of the internal data of the game control microcomputer 100 is prohibited. On the other hand, if the reading prohibition flag is off, the reading request from the external device is accepted, and reading of internal data of the game control microcomputer 100 is permitted. With such a configuration, the provider who creates a program for game control and stores it in the ROM 506 reads the program for which debugging has been completed from the ROM 506 to the external device while the read prohibition flag is off. Can. Then, when shipping after completion of the debugging operation, the external reading of the ROM 506 can be restricted thereafter by setting the read prohibition flag to the ON state, and the user of the pachinko gaming machine 1 or the like can Reading of the ROM 506 can be prevented. As described above, the internal resource access control circuit 501A may decide whether to prohibit or permit the reading of the internal data according to whether the internal flag such as the read prohibition flag is off or on. .

  The read prohibition flag can be changed from the on state to the off state instead of being set irreversibly, while the read prohibition flag is changed from the on state to the off state to permit reading of internal data. At this time, external reading of the ROM 506 may be limited by erasing (for example, flash erasing) stored data of the ROM 506.

  The clock circuit 502 included in the game control microcomputer 100 is a circuit that generates an internal system clock SCLK by, for example, dividing an oscillation signal input to the control external clock terminal EXC into two. In this embodiment, the control clock CCLK generated by the control clock generation circuit 111 is input to the control external clock terminal EXC. The internal system clock SCLK generated by the clock circuit 502 is supplied to various circuits for controlling the progress of the game in the game control microcomputer 100, such as the CPU 505, for example. The internal system clock SCLK is also supplied to the random number circuit 509 and used to monitor the frequency of the random number clock RCLK supplied from the random number clock generation circuit 112. Furthermore, the internal system clock SCLK may be output from the system clock output terminal CLKO connected to the clock circuit 502 to the outside of the game control microcomputer 100. Preferably, the internal system clock SCLK is not output to the outside of the game control microcomputer 100. As described above, by limiting the external output of the internal system clock SCLK, it becomes difficult to specify the operation cycle of the internal circuit (such as the CPU 505) of the game control microcomputer 100 from the outside, and numerical data that becomes a random value Can be prevented from being specified from the outside when updating the random numbers by software.

  The unique information storage circuit 503 provided in the game control microcomputer 100 is a circuit for storing a plurality of types of unique information which is internal information of the game control microcomputer 100, for example. As an example, the unique information storage circuit 503 stores three types of unique information such as a ROM code, a chip individual number, and an ID number. The ROM 506 code is a 4-byte numerical value generated from storage data in a predetermined area of the ROM 506, and four numerical values different in generation method may be prepared. The chip individual number is a 4-byte number given at the time of manufacture of the microcomputer 100 for game control, and shows a different numerical value for each chip constituting the microcomputer 100 for game control. The ID number is an 8-byte number given when the gaming control microcomputer 100 is manufactured, and indicates a numerical value different for each chip constituting the gaming control microcomputer 100. Here, the chip individual number may be read from the user program, while the ID number may be set so as not to be read from the user program. The unique information storage circuit 503 may be included in the ROM 506 by using a predetermined area of the ROM 506, for example. Alternatively, the unique information storage circuit 503 may be included in the CPU 505 by using a built-in register of the CPU 505, for example.

  A reset / interrupt controller 504 provided in the game control microcomputer 100 is for controlling various reset and interrupt requests generated inside and outside the game control microcomputer 100. The reset controlled by the reset / interrupt controller 504 includes a system reset and a user reset. The system reset is a reset that occurs when a low level signal is input to the external system reset terminal XSRST for a fixed period. The user reset is a reset that occurs due to a predetermined factor such as occurrence of a time-out signal of the watchdog timer (WDT), occurrence of travel outside the designated area (IAT), and the like.

  The interrupts controlled by the reset / interrupt controller 504 include a non-maskable interrupt NMI and a maskable interrupt INT. A non-maskable interrupt NMI is an interrupt that can be unconditionally accepted even when the CPU 505 interrupt is disabled, and is an interrupt that occurs when a low level signal is input to the external non-maskable interrupt terminal XNMI (shared with input port P4) for a fixed period. is there. The maskable interrupt INT is an interrupt that can permit / prohibit acceptance of an interrupt request according to a setting instruction of the CPU 505, and can execute multiple interrupts with priority setting. The cause of the maskable interrupt INT is that the low level signal has been input to the external maskable interrupt terminal XINT (also used as the input port P3) for a certain period, and that a timer circuit included in the CTC 508 has timed out. A plurality of interrupt factors are predetermined, such as occurrence of an interrupt factor due to data reception or data transmission in the serial communication circuit 511, occurrence of an interrupt factor due to capturing of numerical data to be random numbers in the random number circuit 509 It should be done.

  Among the built-in registers provided in the game control microcomputer 100 as shown in FIG. 9B, the reset / interrupt controller 504 is interrupt mask register IMR (address 2028H), interrupt waiting monitor register IRR (address 2029H), interrupting Interrupt control and reset management are performed using the monitor register ISR (address 202AH), the internal information register CIF (address 208CH), and the like. The interrupt mask register IMR is a register for setting which of the maskable interrupts INT due to a plurality of factors different from each other is used and which is not used. The interrupt waiting monitor register IRR is a register for confirming the generation state of the maskable interrupt request signal for each of the maskable interrupt factors set by the interrupt initialization setting KIIS. The during-interrupt monitor register ISR is a register for confirming the processing state of the maskable interrupt request signal for each of the maskable interrupt factors set by the interrupt initialization setting KIIS. The internal information register CIF is a register for managing a reset factor that has occurred immediately before and recording a frequency abnormality of the random number clock RCLK.

  FIG. 13A shows a configuration example of the internal information register CIF. FIG. 13B shows an example of setting contents of each bit of the internal information data stored in the internal information register CIF. The internal information data CIF4 stored in the bit number [4] of the internal information register CIF is a random number clock abnormality indication that indicates the presence or absence of a frequency abnormality in the random number clock RCLK. In the example shown in FIG. 13B, when the frequency abnormality of the random number clock RCLK is not detected, while the bit value of the internal information data CIF4 is "0", when the frequency abnormality is detected, the bit value is It will be "1". The internal information data CIF2 stored in the bit number [2] of the internal information register CIF is a system reset instruction indicating whether or not the reset factor generated immediately before is a system reset. In the example shown in FIG. 13B, when the immediately preceding reset cause is not a system reset (system reset not generated), while the bit value of the internal information data CIF2 is "0", while the system reset (system Reset occurs), the bit value becomes “1”. As a first example of the operation using the internal information data CIF2, the CPU 505 of the game control microcomputer 100 or the like checks the bit value of the internal information data CIF2 when the power is turned on, and the bit value is "1" (set). If not, it is determined that the normal power-on is not performed. At this time, for example, by transmitting a predetermined effect control command to the effect control board 12, an unauthorized signal input action aimed to be brought into the big hit gaming state immediately after the power is turned on in the pachinko gaming machine 1 is performed. The effect apparatus may notify that there is a possibility. In addition, as a second example of the operation using internal information data CIF2, microcomputer Pa100 for gaming control when the power is turned on, when pachinko gaming machine 1 reports the definite change state only when the power is turned on and not notifying the positive change state normally. The CPU 505 or the like checks the bit value of the internal information data CIF2, and if the bit value is not "1" (set), notification of the gaming state may not be performed.

  Internal information data CIF1 stored in bit number [1] of internal information register CIF is a WDT time-out instruction indicating whether or not the reset cause generated immediately before is a user reset due to a watchdog timer (WDT) time-out. . In the example shown in FIG. 13B, when the immediately preceding reset factor is not a user reset due to a timeout of the watchdog timer (a timeout has not occurred), the bit value of the internal information data CIF1 becomes "0", while the watchdog When the user is reset due to the timer timeout (timeout occurs), the bit value becomes “1”. Internal information data CIF0 stored in bit number [0] of internal information register CIF is an IAT generation instruction indicating whether or not the reset factor generated immediately before is a user reset due to travel outside the designated area (IAT) . In the example shown in FIG. 13B, when the previous reset cause is not the user reset due to the occurrence of traveling outside the designated area (IAT does not occur), the bit value of the internal information data CIF0 becomes “0”, but the designation When the user is reset due to the occurrence of traveling outside the area (with IAT occurrence), the bit value becomes “1”.

  The CPU 505 of the game control microcomputer 100 executes a program read from the ROM 506 to execute processing for controlling the progress of the game in the pachinko gaming machine 1 or the like. At this time, a fixed data reading operation in which the CPU 505 reads fixed data from the ROM 506, a variation data writing operation in which the CPU 505 writes various variation data to the RAM 507 and temporarily stores it, and various variation data temporarily stored in the RAM 507 by the CPU 505 Variable data reading operation to read out the data, reception operation in which the CPU 505 receives input of various signals from the outside of the gaming control microcomputer 100 via the external bus interface 501, the PIP 510, the serial communication circuit 511, etc. A transmission operation or the like for outputting various signals to the outside of the game control microcomputer 100 via the communication circuit 511 or the like is also performed.

  As described above, in the microcomputer 100 for game control, the CPU 505 executes control according to the program stored in the ROM 506, and hence the microcomputer 100 (or CPU 505) for game control executes (or performs) Specifically, the CPU 505 executes control in accordance with a program. The same applies to a microcomputer mounted on another substrate other than the main substrate 11.

  The ROM 506 of the microcomputer 100 for game control stores a user program for game control, fixed data, and the like. The ROM 506 also stores a security check program 506A. The CPU 505 reads the security check program 506A stored in the ROM 506 when the gaming control microcomputer 100 shifts to the security mode in response to the power-on of the pachinko gaming machine 1 or the occurrence of a system reset, and the stored content of the ROM 506 is Execute security check processing to check if it has been changed. The security check program 506A may be stored in an internal memory different from the ROM 506. Also, the security check program 506A may correspond to a security check process of inspecting the storage content of an external memory externally attached to the game control microcomputer 100 via the external bus interface 501, for example.

  A RAM 507 provided in the game control microcomputer 100 provides a work area for game control. Here, at least a part of the RAM 507 may be a backup RAM backed up by a backup power supply created in the power supply substrate 10. That is, even if the power supply to the pachinko gaming machine 1 is stopped, the content of at least a part of the RAM 507 is stored for a predetermined period.

  The CTC 508 included in the gaming control microcomputer 100 is configured to include, for example, three channels (PTC0 to PTC2) of 8-bit programmable timers, and includes a timer circuit that enables real-time interrupt generation and time measurement. Each of the programmable timers PTC0 to PTC2 has its timer value updated in response to a signal change of the count clock generated based on the internal system clock SCLK (for example, a falling timing at which it changes from high level to low level) If it is Further, the CTC 508 may incorporate, for example, four channels (PCC0 to PCC3) of 8-bit programmable counters. Each of the programmable counters PCC0 to PCC3 may have a count value updated in response to a change in the signal of the internal system clock SCLK or occurrence of a timeout in any of the programmable counters PCC0 to PCC3. The CTC 508 resets the start value of the random number generated by the free run counter used to randomly determine the extension time (variable set time) in extending the security time at each system reset, and resets the start value of the random number generated by the random number circuit 509. A free run counter or the like may be included which is used to randomly determine each time. Alternatively, these free run counters may be included in the internal circuit of the game control microcomputer 100 different from the CTC 508, for example, the backup area of the RAM 507.

  The random number circuit 509 included in the game control microcomputer 100 is a circuit that generates numerical data that is a random value having a predetermined update range, such as a 16-bit random number. In this embodiment, on the side of the main substrate 11, for example, a random number MR1 for special image display result determination as shown in FIG. 14, a random number MR2 for big hit type determination, a random value MR3 for reach determination, a variation pattern Numerical data representing each of the random number value MR4 for type determination, the random number value MR5 for variable pattern determination, and the random value MR6 for additional value determination is countably controlled. Note that other random values may be used to enhance the gaming effect. The CPU 505 uses a random counter different from the random number circuit 509, such as a random counter provided in the game control counter setting unit 594 shown in FIG. 45, based on the numerical data extracted from the random number circuit 509. The data may be processed or updated to count numerical data indicating all or part of the random values MR1 to MR6. Alternatively, without using the random number circuit 509, the CPU 505 counts (updates) the numerical data indicating the random number values MR1 to MR6 by software using only the random counter provided in the game control counter setting unit 594, for example. May be In the following, as an example, the CPU 505 extracts, from the random number circuit 509 serving as hardware, numeric data indicating a random number value MR1 for determining the special view display result and numeric data indicating a random number value MR6 for determining the additional value. The numerical data is updated by processing by software, and the numerical data indicating the other random number values MR2 to MR5 is updated by the CPU 505 using software such as a random counter. The random number circuit 509 may be built in the game control microcomputer 100 or externally attached to the game control microcomputer 100 as a random number circuit chip different from the game control microcomputer 100. It may be one.

  Among the random number values MR1 to MR6 shown in FIG. 14, the addition value, the addition determination value, and the maximum determination value are set for the random number values MR3 to MR5. The addition value is a value to be added to each random number value corresponding to one timer interrupt or the like, and the value can be changed each time the random number updating process for updating the random number value is executed. For example, the addition value is obtained based on the random value MR6 or the like for determining the addition value, and an area for storing the addition value as a temporary variable may be provided in the RAM 507 or the like. The addition determination value is a value used to obtain an addition value corresponding to each random value by comparison with the random value MR6 for addition value determination. More specifically, after the random number value MR6 for determination of the additional value is read as the initial value of the additional value corresponding to each random value, it is determined that the current additional value is smaller than the additional determination value. A value obtained by subtracting the addition determination value from the current addition value is updated as a new addition value. The random number determination value is a value used to determine whether each updated random value after adding the finally obtained addition value is within the range of possible values. Then, when each updated random number value exceeds the corresponding random number determination value, a value obtained by subtracting the random number determination value from the updated random value is set as a new random value. In this embodiment, numerical data indicating the random number value MR2 is updated so as to be incremented by one each time a timer interrupt occurs in the game control microcomputer 100.

  The random number value MR1 for special figure display result judgment determines whether or not the variable display result such as a special symbol in the special figure game is controlled as a "big hit" or not and is controlled to a big hit gaming state. It is a random value used to determine whether or not to control the gaming state. For example, the random number value MR1 for the special view display result determination takes a value in the range of “0” to “65535”. The jackpot type determination random number value MR2 is a random number value used to determine the jackpot type as any one of a plurality of types when the variable display result is set as the "big hit". For example, the random number value MR2 for determining the jackpot type takes a value in the range of "0" to "99".

  The random number value MR3 for reach determination is used to determine whether or not to use the variable display mode of "reach" in which the decorative symbol is derived and displayed in the reach display state, when the variable display result is "loss". It is a random value. For example, the random value MR3 for reach determination takes a value in the range of “0” to “239”. Further, in correspondence with the random number value MR3 for reach determination, the range of the addition value is defined as "0" to "7", the addition determination value is "8", and the maximum determination value is "240".

  The random number value MR4 for determining the variation pattern type is a random value used to determine the variation pattern type of the decorative pattern as any one of a plurality of types prepared in advance. For example, the random value MR4 for determining the variation pattern type takes a value in the range of "0" to "241". Here, each variation pattern type may be configured to include, for example, one or a plurality of variation patterns classified based on a rendering operation or the like performed during variable display of a decorative symbol. Among the plurality of variation pattern types, there may be a configuration in which a common variation pattern is partially included, and all of the variation patterns included in one variation pattern type are the variation patterns of the other. Some types may be configured to be included. As an example, each fluctuation pattern type may be constituted by the fluctuation pattern classified according to the presence or absence of reach production, the production mode when there is reach production, or the like. In addition, the reach change pattern and the big hit change pattern were classified according to whether or not the specific effect of “pseudo series” is executed, the number of times of execution of the pseudo continuous change in the case of execution (except the first change), etc. You may comprise by a fluctuation pattern. Corresponding to the random number value MR4 for determining the variation pattern type, the range of the addition value is set to "0" to "7", the addition determination value is "8", and the maximum determination value is "242".

  The random number value MR5 for determining the variation pattern is a random number used to determine the variation pattern of the decorative pattern to any one of a plurality of types prepared in advance. For example, the random value MR5 for determining the variation pattern takes a value in the range of "0" to "255". Further, in correspondence with the random number value MR5 for determining the fluctuation pattern, the range of the addition value is set to "0" to "7", the addition determination value is "8", and the maximum determination value is "256".

  The random value MR6 for determining the addition value is a value used to acquire an addition value corresponding to each random value by being compared with the addition determination value corresponding to each random value. For example, the random number value MR6 for determining the addition value takes a value in the range of “0” to “7”.

  FIG. 15 is a block diagram showing a configuration example of the random number circuit 509. As shown in FIG. 15, the random number circuit 509 includes a frequency monitoring circuit 551, a clock flip flop 552, a random number generation circuit 553, a start value setting circuit 554, a random number sequence changing circuit 555, a random number sequence changing setting circuit 556, and a latch flipping circuit. , 557B, random number latch selectors 558A and 558B, and random number value registers 559A and 559B. The random number value register 559A and the random number value register 559B are respectively included in a random number value register R1D (addresses 2038H to 2039H) and a random number value register R2D included in the built-in registers of the game control microcomputer 100 as shown in FIG. (Address 203AH-203BH).

  The frequency monitoring circuit 551 is a circuit for monitoring the frequency of the random number clock RCLK generated by the random number clock generation circuit 112 and detecting occurrence of an abnormality. The frequency monitoring circuit 551 monitors, for example, the oscillation signal input to the external clock terminal ERC for random numbers, and based on the internal system clock SCLK, the setting content in bit number [7-6] of security time setting KSES (FIG. When the frequency abnormality according to (see) is detected, the bit number [4] of the internal information register CIF is set to “1”. In this embodiment, the random number clock RCLK generated by the random number clock generation circuit 112 is input to the random number external clock terminal ERC.

  The clock flip flop 552 is configured using, for example, a D-type flip flop, and the random number clock RCLK from the random number external clock terminal ERC is input to the clock terminal CK. Further, in the clock flip-flop 552, the negative phase output terminal (inverted output terminal) Q-bar is connected to the D input terminal. Then, the random number update clock RGK is output from the positive phase output terminal (non-inverted output terminal) Q, while the latch clock RC0 is output from the negative phase output terminal (inverted output terminal) Q-bar. In this case, when the signal state of the random number clock RCLK input to the clock terminal CK changes in a predetermined manner, the clock flip flop 552 outputs the positive phase output terminal (non-inverted output terminal) Q and the negative phase output terminal Inverted output terminal) Change the signal state of the output signal from Q bar. For example, the clock flip flop 552 is a rising timing when the signal state of the random number clock RCLK changes from low level to high level, or a rising edge when the signal state of the random number clock RCLK changes from high level to low level. The input signal at the D input terminal is taken in at one of the falling timings. At this time, the non-inverted output terminal (non-inverted output terminal) Q outputs the input signal taken in at the D input terminal without being inverted, while the inverted phase output terminal (inverted output terminal) Q bar The input signal taken in at the D input terminal is inverted and output. Thus, from the positive phase output terminal (non-inverted output terminal) Q of the clock flip flop 552, the random number update clock RGK having the oscillation frequency (for example 10 MHz) which is half the oscillation frequency (for example 20 MHz) of the random number clock RCLK. Is output, while the reverse phase signal (reverse signal) of the random number update clock RGK from the negative phase output terminal (inverted output terminal) Q bar, that is, the same frequency as the random number update clock RGK and the random number update clock RGK has a phase π A latch clock RC0 different by (= 180 °) is output.

  The random number update clock RGK output from the clock flip flop 552 is input to the clock terminal of the random number generation circuit 553 and used for incrementing the count value in the random number generation circuit 553. The latch clock RC0 output from the clock flip flop 552 is branched into a latch clock RC1 and a latch clock RC2 at a branch point BR1. Therefore, the latch clock RC1 and the latch clock RC2 have the same oscillation frequency, and the signal states change in a common cycle. Here, as the change of the signal state in the latch clock RC1 and the latch clock RC2, for example, there is a rising that changes from low level to high level, a falling that changes from high level to low level, and the like. The latch clock RC1 is input to the clock terminal CK of the latch flip flop 557A and becomes a random number acquisition clock used to generate the start winning combination latch signal SL1. The latch clock RC2 is input to the clock terminal CK of the latch flip flop 557B and becomes a random number acquisition clock used to generate the start winning combination latch signal SL2.

  Here, the oscillation frequency of the random number clock RCLK and the oscillation frequency of the control clock CCLK generated by the control clock generation circuit 111 are different from each other, and one of the oscillation frequencies is the other. It does not become an integral multiple of the oscillation frequency of. As an example, while the oscillation frequency of the control clock CCLK is 11.0 MHz, the oscillation frequency of the random number clock RCLK may be 9.7 MHz. Therefore, the random number update clock RGK and the latch clocks RC1 and RC2 are all oscillation signals whose signal state changes at a cycle different from that of the control clock CCLK supplied to the CPU 505. That is, the clock flip flop 552 is a random number update clock RGK for updating the count value based on the random number clock RCLK generated by the random number clock generation circuit 112, and a latch clock serving as a plurality of random number acquisition clocks. As RC1 and RC2, an oscillation signal whose signal state changes at a cycle different from that of the control clock CCLK or the internal system clock SCLK (one obtained by dividing the control clock CCLK by 2) is generated.

  The random number generation circuit 553 is formed of, for example, a 16-bit counter, and based on an input such as the random number update clock RGK output from the clock flip-flop 552, the random number generation circuit 553 It is a circuit that cyclically updates to a predetermined final value. For example, the random number generation circuit 553 responds to the rising edge of the random number update clock RGK, which is an input signal to a predetermined clock terminal, from an initial value set within the range of "0" to "65535" to "65535". We count up numerical data so that we add 1 at a time. Then, after counting up to “65535”, numerical data is cyclically updated by counting up to increment one by one from “0” to a final value that is smaller by one than the initial value.

  The start value setting circuit 554 sets the start value in the count value generated by the random number generation circuit 553 according to the bit value (see FIG. 11B) in the bit number [1-0] of the second random number initial setting KRS2. Set For example, if the bit number [1-0] of the second random number initial setting KRS2 is "00", the start value setting circuit 554 sets the start value to "0000H" which is the default value, and if it is "10" It is set to a value based on the ID number, and if it is "01", it is set to a value that is changed at each system reset.

  The random number sequence changing circuit 555 is a circuit that can change the permutation that is the update order of the numerical data into a permutation according to a predetermined random number update rule, when the numerical data generated by the random number generation circuit 553 makes a round. For example, the random number sequence changing circuit 555 executes bit scrambling processing such as replacement or transposition of bits in numerical data output from the random number generation circuit 553. Further, the random number sequence changing circuit 555 can change the order of updating the numerical data, for example, by changing the bit scramble key or the bit scramble table used for the bit scramble process.

  The random number sequence change setting circuit 556 sets the numerical data update order in the random number sequence change circuit 555 according to the bit value (see FIG. 11A) etc. of the bit number [1-0] of the first random number initial setting KRS1. It is a circuit for setting to change. For example, if the bit number [1-0] of the first random number initial setting KRS1 is "00", the random number sequence change setting circuit 556 does not change the random number update rule for the second and subsequent rounds, while "01". In the case of the second cycle and thereafter, the random number update rule is changed in response to a change request in software, and when it is "10", the random number update rule is automatically changed.

  The random number sequence changing circuit 556 is shown in FIG. 9B when changing the random number update rule by software in response to the bit number [1-0] of the first random number initial setting KRS1 being “01”. Among the built-in registers included in the game control microcomputer 100 as shown, the random number sequence change register RDSC (address 2034H) is used to control the change of the random number update rule. FIG. 16A shows a configuration example of the random number sequence change register RDSC. FIG. 16B shows an example of setting contents in each bit of the random number sequence change request data stored in the random number sequence change register RDSC. The random number sequence change request data RDSC0 stored in the bit number [0] of the random number sequence change register RDSC indicates the presence or absence of a random number sequence change request when the random number update rule is changed by software. In the example shown in FIG. 16B, when there is no change request for the random number sequence by software, the bit value of the random number sequence change request data RDSC0 becomes “0”, while when there is the change request for the random number sequence The bit value is "1".

  FIG. 17 shows an operation example in the case where the random number update rule is changed by software. In this case, when the count value permutation RCN output from the random number generation circuit 553 is cyclically updated from a predetermined initial value to a predetermined final value, it responds that the random number sequence change request data RDSC0 is "1". And change the random number update rule. In the operation example shown in FIG. 17, the random number sequence RSN initially output from the random number sequence changing circuit 555 is “0 → 1 →... → 65535”. Thereafter, when the CPU 505 executes the user program stored in the ROM 506, it is assumed that "1" is written to the bit number [0] of the random number sequence change register RDSC at a predetermined timing.

  Then, in response to the bit number [1-0] of the first random number initial setting KRS1 being "01", the random number sequence change setting circuit 556 reads the random number sequence change request data RDSC0, and the bit value is "1". In response to being ", make settings for changing the random number update rule. At this time, in response to the count value permutation RCN output from the random number generation circuit 553 reaching a predetermined final value, the random number sequence change setting circuit 556 selects, for example, any of a plurality of types of random number update rules prepared in advance. Change the random number update rule by selecting. In the operation example shown in FIG. 17, the random number sequence changing circuit 555 outputs numerical data “65535” corresponding to the final value in the count value permutation RCN output from the random number generation circuit 553 and then responds to the random number sequence change request data RDSC0. Change the random number update rule. Thereafter, the random number sequence changing circuit 555 outputs “65535 → 65534 →... → 0” as the random number sequence RSN according to the changed random number update rule. The random number sequence change register RDSC is initialized when the random number sequence change request data RDSC0 is read by the random number sequence change setting circuit 556. Therefore, the random number sequence RSN output from the random number sequence changing circuit 555 is "65535 → 65534 → ... → 0" until the bit value "1" is written again to the bit number [0] of the random number sequence changing register RDSC. Become.

  When the CPU 505 executes the user program stored in the ROM 506 to write the bit value “1” again to the bit number [0] of the random number sequence modification register RDSC, the random number update rule is changed again. In the operation example shown in FIG. 17, when the random number sequence changing circuit 555 outputs numerical data "0" corresponding to the final value in the random number sequence RSN, the bit value "1" is written as random number sequence change request data RDSC0. Change the random number update rule accordingly. After that, the random number sequence changing circuit 555 outputs “0 → 2 →... → 65534 → 1 →... → 65535” as the random number sequence RSN according to the changed random number update rule.

  FIG. 18 shows an operation example when the random number update rule is automatically changed. In this case, in response to the count value permutation RCN output from the random number generation circuit 553 being cyclically updated from a predetermined initial value to a predetermined final value, the random number sequence change setting circuit 556 automatically changes the random number update rule. Change In the operation example shown in FIG. 18, the random number sequence RSN initially output from the random number sequence changing circuit 555 is “0 → 1 →... → 65535”.

  Then, when the random number sequence RSN output from the random number change circuit 555 reaches a predetermined final value, the random number sequence change setting circuit 556 follows a predetermined order among a plurality of types of update rules prepared in advance. The update rule may be changed by selecting the update rule. Alternatively, the random number sequence change setting circuit 556 may change the update rule by selecting an arbitrary update rule from among a plurality of types of update rules. In the operation example shown in FIG. 18, the random number sequence RSN output from the random number sequence changing circuit 555 becomes “65535 → 65534 →... → 0” by changing the first random number update rule. After that, the random number sequence RSN output from the random number sequence changing circuit 555 becomes “0 → 2 →... → 65534 → 1 →... → 65535” by the second change of the random number update rule. In the operation example shown in FIG. 18, the random number sequence RSN output from the random number sequence changing circuit 555 becomes “65534 → 0 →... → 32768” by the change of the random number update rule for the third time. When the fourth change of the random number update rule is performed, the random number sequence RSN output from the random number sequence change circuit 555 is “16383 → 49151 →... →→ 49150”. When the fifth change of the random number update rule is performed, the random number sequence RSN output from the random number sequence change circuit 555 is “4 → 3 →... → 465531”.

  The latch flip-flops 557A and 557B are each configured using, for example, a D-type flip-flop. In the latch flip-flop 557A, the wiring from the input port P0 included in the PIP 510 is connected to the D input terminal, and the wiring for transmitting the latch clock RC1 is connected to the clock terminal CK. In this embodiment, the first start winning signal SS1 from the first start port switch 22A is input to the input port P0. In response to a rising edge or the like of the latch clock RC1, the latch flip-flop 557A takes in the first start winning combination signal SS1 and outputs it as a start winning combination latch signal SL1. As a result, in the latch flip-flop 557A, the first start winning combination signal SS1 is output as the start winning combination latch signal SL1 in synchronization with the rising edge of the latch clock RC1. In the latch flip-flop 557B, the wiring from the input port P1 included in the PIP 510 is connected to the D input terminal, and the wiring for transmitting the latch clock RC2 is connected to the clock terminal CK. In this embodiment, the second start winning signal SS2 from the second start port switch 22B is input to the input port P1. In response to the rising edge or the like of the latch clock RC2, the latch flip-flop 557B takes in the second start winning combination signal SS2 and outputs it as a start winning combination latch signal SL2. As a result, in the latch flip-flop 557B, the second start winning combination signal SS2 is outputted as the start winning combination latch signal SL2 in synchronization with the rising edge of the latch clock RC2.

  The first start winning signal SS1 and the second start winning signal SS2 are not limited to those directly transmitted from the first start port switch 22A and the second start port switch 22B. As an example, the time during which the output signal from the first start port switch 22A and the output signal from the second start port switch 22B are in the on state is measured, and the measured time has become a predetermined time (for example, 3 ms) At the same time, a timer circuit may be provided to output the first start winning signal SS1 and the second start winning signal SS2.

  The random number latch selector 558A is a circuit that takes in the start-up winning-time latch signal SL1 transmitted from the latch flip-flop 557A and the random number latch request signal by software, and selectively outputs either as the random number latch signal LL1. The random number latch selector 558B is a circuit that takes in the start winning game time latch signal SL2 transmitted from the latch flip-flop 557B and the random number latch request signal by software, and selectively outputs either as the random number latch signal LL1. The random number latch selector 558A and the random number latch selector 558B are, among the built-in registers provided in the game control microcomputer 100 as shown in FIG. 9B, a random value take-in register RDLT (address 2032H) and a random number latch selection register RDLS. The output of the random number latch signal LL1 and the random number latch signal LL2 is controlled using (address 2030H). The random value take-in register RDLT is a register used for taking in numerical data in the random number sequence RSN output from the random number sequence changing circuit 555 into the random value register 559A or the random value register 559B by software. The random number latch selection register RDLS loads the numerical data in the random number sequence RSN output from the random number sequence changing circuit 555 into the random value register 559A or the random value register 559B by software or by signal input to the input ports P0 and P1. It is a register which shows the taking-in method of taking in.

  FIG. 19A shows a configuration example of the random value fetch register RDLT. FIG. 19B shows an example of setting contents in each bit of the random number value fetching designation data stored in the random number value fetching register RDLT. The random value take-in designation data RDLT1 stored in the bit number [1] of the random value take-in register RDLT indicates the presence / absence of the random value take-in designation for the random value register 559B to be the random value register R2D. In the example shown in FIG. 19B, when the random number value register R2D does not have a random number value import specification by software, while the bit value of the random number value import specification data RDLT1 becomes “0”, random number value acquisition is performed. When the import specification is made, the bit value becomes "1". The random value take-in designation data RDLT0 stored in the bit number [0] of the random value take-in register RDLT indicates the presence / absence of the random value take-in designation for the random value register 559A to be the random value register R1D. In the example shown in FIG. 19B, when the random number value fetching designation data RDLT0 is not specified by software when the random number value fetching instruction is not given to the random number value register R1D, the bit value of the random number value fetching designation data RDLT0 becomes “0”. When the import specification is made, the bit value becomes "1".

  FIG. 20A shows a configuration example of the random number latch selection register RDLS. FIG. 20B shows an example of setting contents in each bit of the random number latch selection data stored in the random number latch selection register RDLS. The random number latch selection data RDLS1 stored in the bit number [1] of the random number latch selection register RDLS indicates a method of taking in the random number register 559B to be the random number register R2D. In the example shown in FIG. 20B, when the numerical value data to be a random value is taken into the random value register R2D in response to the writing of the random value take-in designation data RDLT1 by the software, It will be 0 ". On the other hand, when the numerical value data which becomes a random number according to the signal input to the input port P1 is taken into the random number value register R2D, the bit value of the random number latch selection data RDLS1 is set to "1". The random number latch selection data RDLS0 stored in the bit number [0] of the random number latch selection register RDLS indicates a method of taking in the random number value register 559A to be the random number value register R1D. In the example shown in FIG. 20 (B), when numerical value data to be a random value is taken into random number value register R1D in response to writing of random value taking specification data RDLT0 by software, the bit value of random number latch selection data RDLS0 It will be 0 ". On the other hand, when the numerical value data which becomes a random number according to the signal input to the input port P0 is taken into the random number value register R1D, the bit value of the random number latch selection data RDLS0 is set to "1".

  The random number value registers 559A and 559B are registers for storing numerical data in the random number sequence RSN output from the random number sequence changing circuit 555 as random number values. FIGS. 21A and 21B show a configuration example of the random value register 559A to be the random value register R1D. FIG. 21A shows the lower byte R1D (L) of the random value register R1D, and FIG. 21B shows the upper byte R1D (H) of the random value register R1D. 21C and 21D show configuration examples of the random value register 559B which becomes the random value register R2D. FIG. 21C shows the lower byte R2D (L) of the random value register R2D, and FIG. 21D shows the upper byte R2D (H) of the random value register R2D. The random value registers 559A and 559B are both 16-bit (2-byte) registers, and can store 16-bit random values.

  In response to the random number latch signal LL1 supplied from the random number latch selector 558A being turned on, the random value register 559A takes in numerical data in the random number sequence RSN output from the random number sequence changing circuit 555 as a random number value. Store in The random number value register 559A becomes readable (enabled) when the register read signal RRS1 supplied from the CPU 505 is turned on, and outputs stored numerical data to an internal bus or the like. On the other hand, when the register read signal RRS1 is in the off state, the same value (for example, "65535 H" or the like) may be output at all times to be in the unreadable (disabled) state. In addition, the random number value register 559A may be in a state where it can not receive the register read signal RRS1 when the random number latch signal LL1 is in the on state. Furthermore, even when the register read signal RRS1 is in the on state before the random number latch signal LL1 is in the on state, the random value register 559A can not receive the random number latch signal LL1. Good.

  In response to the random number latch signal LL2 supplied from the random number latch selector 558B being turned on, the random value register 559B takes in numerical data in the random number sequence RSN output from the random number sequence changing circuit 555 as a random value. Store in When the register read signal RRS2 supplied from the CPU 505 is turned on, the random value register 559B becomes readable (enabled) and outputs the stored numerical data to an internal bus or the like. On the other hand, when the register read signal RRS2 is in the off state, the same value (for example, "65535 H" or the like) may be output at all times to be in the unreadable (disabled) state. Further, the random number value register 559B may be in a state where it can not receive the register read signal RRS2 when the random number latch signal LL2 is in the on state. Furthermore, even if the register read signal RRS2 is turned on before the random number latch signal LL2 is turned on, the random value register 559B can not receive the random number latch signal LL2. Good.

  The random number value register 559A and the random number value register 559B are the random number latch flag register RDFM (address 2033H) and the random number interrupt control register RDIC (among the built-in registers included in the gaming control microcomputer 100 as shown in FIG. By using the address 2031 H), it is possible to perform operation management and interrupt control at the time of random number latch. The random number latch flag register RDFM is a register that stores a random number latch flag indicating whether or not numerical data to be a random value is latched corresponding to each of the random value register 559A and the random value register 559B. The random number interrupt control register RDIC is a register for setting permission / prohibition of an interrupt generated when numerical value data to be a random number value is latched in the random number value register 559A or the random number value register 559B.

  FIG. 22A shows a configuration example of the random number latch flag register RDFM. FIG. 22B shows an example of setting contents in each bit of the random number latch flag data stored in the random number latch flag register RDFM. The random number latch flag data RDFM1 stored in the bit number [1] of the random number latch flag register RDFM is a random number latch flag indicating whether numerical data is fetched into the random value register 559B to be the random value register R2D. In the example shown in FIG. 22 (B), when the random number value register R2D does not acquire numerical data (no random number value acquisition), the bit value of the random number latch flag data RDFM1 becomes "0" while the numerical data is Is taken in (with random number value taken in), the bit value becomes “1”. The random number latch flag data RDFM0 stored in the bit number [0] of the random number latch flag register RDFM is a random number latch flag indicating whether numerical data is taken into the random value register 559A to be the random value register R1D. In the example shown in FIG. 22 (B), when the random number value register R1D does not acquire numerical data (no random number value acquisition), the bit value of the random number latch flag data RDFM0 becomes "0" while the numerical data is Is taken in (with random number value taken in), the bit value becomes “1”.

  FIG. 23A shows a configuration example of the random number interrupt control register RDIC. FIG. 22B shows an example of setting contents in each bit of the random number interrupt control data stored in the random number interrupt control register RDIC. The random number interrupt control data RDIC1 stored in the bit number [1] of the random number interrupt control register RDIC permits or prohibits an interrupt generated when numerical data is fetched into the random number value register 559B which becomes the random number value register R2D. Shows the interrupt control setting. In the example shown in FIG. 22 (B), when the interrupt at the time of loading into the random number value register R2D is inhibited (interrupt disabled), the bit value of the random number interrupt control data RDIC1 is set to "0" while this interrupt If it is permitted (interrupt enabled), its bit value is set to "1". The random number interrupt control data RDIC0 stored in the bit number [0] of the random number interrupt control register RDIC permits or prohibits an interrupt generated when numerical data is taken into the random value register 559A which becomes the random value register R1D. Shows the interrupt control setting. In the example shown in FIG. 22 (B), when interrupting at the time of loading into the random number value register R1D is inhibited (interrupt disabled), the bit value of the random number interrupt control data RDIC0 is set to "0" while this interrupt If it is permitted (interrupt enabled), its bit value is set to "1".

  The PIP 510 included in the gaming control microcomputer 100 is, for example, a 6-bit wide input-only port, and includes an input port P0 to an input port P2 serving as a dedicated terminal and an input port P3 to an input port P5 serving as a function shared terminal. It is. The input port P3 is also used as an external maskable interrupt terminal XINT connected to the CPU 505 or the like. The input port P4 is also used as an external non-maskable interrupt terminal XNMI connected to the CPU 505 or the like. The input port P5 is also used as a first channel reception terminal RXA used by the serial communication circuit 511. The use setting of the input port P3 to the input port P5 is instructed by the function setting KFCS stored in the program management area.

  The PIP 510 uses the input port register PI (address 2090H) and the like among the built-in registers included in the game control microcomputer 100 as shown in FIG. 9B to manage the state management and the like of the input port P0 to input port P5. Do. The input port register PI is a register in which a bit value indicating the input state of an external signal is stored corresponding to each of the input port P0 to the input port P5.

  FIG. 24A shows a configuration example of the input port register PI. FIG. 24B shows an example of setting contents of each bit of the input port data stored in the input port register PI. The input port data PI5 stored in the bit number [5] of the input port register PI indicates the terminal state (on / off) of the input port P5 which is also used as the first channel reception terminal RXA. The input port data PI4 stored in the bit number [4] of the input port register PI indicates the terminal state (on / off) of the input port P4 which is also used as the external non-maskable interrupt terminal XNMI. The input port data PI3 stored in the bit number [3] of the input port register PI indicates the terminal state (on / off) of the input port P3 which is also used as the external maskable interrupt terminal XINT. The input port data PI2 stored in the bit number [2] of the input port register PI indicates the terminal state (on / off) of the input port P2. The input port data PI1 stored in the bit number [1] of the input port register PI indicates the terminal state (on / off) of the input port P1. The input port data PI0 stored in the bit number [0] of the input port register PI indicates the terminal state (on / off) of the input port P0.

  The serial communication circuit 511 included in the game control microcomputer 100 is a circuit that handles communication data in, for example, full-duplex, asynchronous, non-return to zero (NRZ) format. FIG. 25 shows a configuration example of the serial communication circuit 511. The serial communication circuit 511 shown in FIG. 25 only transmits serial data in a single direction between the external circuit and the first channel transmission / reception circuit 571A capable of transmitting and receiving serial data in both directions with the external circuit. And a second channel transmission circuit 571 B capable of In this embodiment, bidirectional serial communication is performed with the payout control microcomputer 150 mounted on the payout control board 15 using the first channel transmission / reception circuit 571A, while the second channel transmission circuit 571B is used. Serial communication in a single direction (transmission only) is performed with the effect control microcomputer 120 mounted on the effect control board 12.

  The first channel transmission / reception circuit 571A includes a transmission shift register 581A, a transmission data register 582A, an interrupt control circuit 583A, a reception data register 584A, and a reception shift register 585A. The second channel transmission circuit 571B includes a transmission shift register 581B, a transmission data register 582B, and an interrupt control circuit 583B.

  The first channel transmission / reception circuit 571A is a first channel data register SADT (address 201FH) among the built-in registers included in the gaming control microcomputer 100 as shown in FIG. 9B and a first channel communication setting register SAFM ( Operation management of serial communication using address 201AH), first channel interrupt control register SAIC (address 201BH), first channel command register SACM (address 201CH), and first channel status register SAST (address 201EH) And enables operation control and so on. The second channel transmission circuit 571B includes a second channel data register SBDT (address 2027H) and a second channel communication setting register SBFM (of the built-in registers included in the game control microcomputer 100 as shown in FIG. 9B). Operation management of serial communication using address 2022H), second channel interrupt control register SBIC (address 2023H), second channel command register SBCM (address 2024H), and second channel status register SBST (address 2026H) And enables operation control and so on.

  The first channel data register SADT is a register for storing communication data (transmission data or reception data) transmitted / received by serial communication by the first channel transmission / reception circuit 571A. The second channel data register SBDT is a register for storing communication data (transmission data) transmitted by serial communication by the second channel transmission circuit 571B. FIG. 26A shows a configuration example of the first channel data register SADT. FIG. 26B shows a configuration example of the second channel data register SBDT. When communication data is transmitted by the first channel transmission / reception circuit 571A, for example, data written to the first channel data register SADT by the CPU 505 or the like is read by the first channel transmission / reception circuit 571A and supplied to the transmission data register 582A. Ru. When communication data is received by the first channel transmission / reception circuit 571A, for example, the data read from the reception data register 584A by the first channel transmission / reception circuit 571A is written to the first channel data register SADT, whereby It becomes possible to offer. When communication data is transmitted by the second channel transmission circuit 571B, for example, data written to the second channel data register SBDT by the CPU 505 or the like is read by the second channel transmission circuit 571B and supplied to the transmission data register 582B. Ru.

  The first channel communication setting register SAFM is a register for setting the communication format and the like of the first channel transmission / reception circuit 571A. The second channel communication setting register SBFM is a register for setting the communication format and the like of the second channel transmission circuit 571B. FIG. 27A shows a configuration example of the first channel communication setting register SAFM. FIG. 27B shows a configuration example of the second channel communication setting register SBFM. FIG. 27C shows an example of setting contents in each bit of communication setting data stored in the first channel communication setting register SAFM and the second channel communication setting register SBFM. The communication setting data SAFM7 stored in the bit number [7] of the first channel communication setting register SAFM and the communication setting data SBFM7 stored in the bit number [7] of the second channel communication setting register SBFM use the transmission function. Indicates / stop. For example, when temporarily disabling the transmission function of the first channel transmission / reception circuit 571A, the bit value of the communication setting data SAFM7 is set to "1". When the transmission function of the second channel transmission circuit 571 B is temporarily prohibited, the bit value of the communication setting data SBFM 7 is set to “1”. Communication setting data SAFM6 stored in bit number [6] of the first channel communication setting register SAFM indicates use / stop of the reception function. For example, when temporarily disabling the reception function of the first channel transmission / reception circuit 571A, the bit value of the communication setting data SAFM6 is set to "1".

  Communication setting data SAFM3 stored in bit number [3] of first channel communication setting register SAFM and communication setting data SBFM3 stored in bit number [3] of second channel communication setting register SBFM are selected from the operation mode. It shows the setting. For example, when the operation mode of the first channel transmission / reception circuit 571A is set to the normal mode, the bit value of the communication setting data SAFM3 is set to "0" while the FIFO (First In First Out) mode is set. Set the bit value to "1". When the operation mode in second channel transmission circuit 571 B is set to the normal mode, the bit value of communication setting data SBFM 3 is set to “0”, and to set the FIFO mode, the bit value is set to “1”. I assume. In this embodiment, the operation mode in both the first channel transmission / reception circuit 571A and the second channel transmission circuit 571B is set to the normal mode. Communication setting data SAFM2 stored in bit number [2] of first channel communication setting register SAFM and communication setting data SBFM2 stored in bit number [2] of second channel communication setting register SBFM are data length selected It shows the setting. For example, when the data length in the transmission / reception operation of the first channel transmission / reception circuit 571A is the first data length (1 start bit, 8 data bits, 1 stop bit), the bit value of the communication setting data SAFM2 is "0". On the other hand, when the second data length (one start bit, nine data bits, one stop bit) is to be set, the bit value is set to "1". When the data length in the transmission operation of the second channel transmission circuit 571B is set to the first data length, the bit value of the communication setting data SBFM2 is set to "0" while the second data length is set. , Its bit value to "1".

  Communication setting data SAFM1 stored in bit number [1] of first channel communication setting register SAFM and communication setting data SBFM1 stored in bit number [1] of second channel communication setting register SBFM use the parity function / Indicates unused. For example, when the parity function in the first channel transmission / reception circuit 571A is not used (parity not used), the bit value of the communication setting data SAFM1 is set to "0" while the parity function is used (parity used) , Its bit value to "1". Also, when the parity function in the second channel transmission circuit 571B is not used (parity not used), the bit value of the communication setting data SBFM1 is set to "0", while when the parity function is used (parity used) , Its bit value to "1". Communication setting data SAFM0 stored in bit number [0] of first channel communication setting register SAFM and communication setting data SBFM0 stored in bit number [0] of second channel communication setting register SBFM use the parity function Shows the selection setting of the parity function in the case of For example, when the parity function in the first channel transmission / reception circuit 571A is to be even parity, the bit value of the communication setting data SAFM0 is set to "0", while to set the parity value to odd parity, the bit value is "1". I assume. When the parity function in second channel transmission circuit 571 B is to be even parity, the bit value of communication setting data SBFM 0 is set to “0”, and to set the parity to odd parity, the bit value is “1”. I assume.

  The first channel interrupt control register SAIC is a register for setting permission / prohibition etc. of an interrupt request in the first channel transmission / reception circuit 571A. The second channel interrupt control register SBIC is a register for setting permission / prohibition etc. of the interrupt request in the second channel transmission circuit 571B. FIG. 28A shows a configuration example of the first channel interrupt control register SAIC. FIG. 28B shows a configuration example of the second channel control register SBIC. FIG. 28C shows an example of setting contents in each bit of communication interrupt control data stored in the first channel interrupt control register SAIC and the second channel interrupt control register SBIC. Communication interrupt control data SAIC7 stored in bit number [7] of the first channel interrupt control register SAIC and communication interrupt control data SBIC7 stored in bit number [7] of the second channel interrupt control register SBIC are transmission interrupts. For the interrupt request due to transmission completion, which is one of the generation factors, the setting of permission / prohibition is shown. For example, an interrupt request due to transmission completion occurs when transmission of communication data stored in the transmission shift register 581A or the transmission shift register 581B is completed. Then, when the interrupt request upon completion of transmission in the first channel transmission / reception circuit 571A is prohibited (interrupt request is prohibited), the bit value of the communication interrupt control data SAIC7 is set to "0" while the interrupt request is permitted. And (interrupt request permission), the bit value thereof is set to "1". Further, in the case where the interrupt request upon completion of transmission in the second channel transmission circuit 571B is prohibited (interrupt request is prohibited), the bit value of the communication interrupt control data SBIC7 is set to "0", while this interrupt request is permitted. And (interrupt request permission), the bit value thereof is set to "1".

  Communication interrupt control data SAIC6 stored in bit number [6] of the first channel interrupt control data SAIC and communication interrupt control data SBIC6 stored in bit number [6] of the second channel interrupt control register SBIC are transmission interrupts. For the interrupt request by the transmission data empty which is one of the generation factors, the setting of permission / prohibition is shown. For example, an interrupt request due to transmission data empty occurs when communication data is transferred from the transmission data register 582A to the transmission shift register 581A or when communication data is transferred from the transmission data register 582B to the transmission shift register 581B. Occur. Then, when the interrupt request during transmission data empty in the first channel transmission / reception circuit 571A is inhibited (interrupt request inhibition), the bit value of the communication interrupt control data SAIC6 is set to "0" while this interrupt request is permitted. In the case (interrupt request permission), the bit value is set to "1". Further, when interrupt request at the time of transmission data empty in the second channel transmission circuit 571B is prohibited (interrupt request is prohibited), the bit value of the communication interrupt control data SBIC6 is set to "0" while this interrupt request is permitted. In the case (interrupt request permission), the bit value is set to "1".

  Communication interrupt control data SAIC5 stored in bit number [5] of the first channel interrupt control register SAIC indicates the setting of permission / prohibition for the interrupt request due to the reception data being one of the reception interrupt generation factors. . For example, an interrupt request due to receive data full occurs when communication data is transferred from the receive shift register 585A to the receive data register 584A. Then, when the interrupt request at the time of reception data full in the first channel transmission / reception circuit 571A is prohibited (interrupt request is prohibited), the bit value of the communication interrupt control data SAIC5 is set to "0" while this interrupt request is permitted. In the case (interrupt request permission), the bit value is set to "1".

  The first channel command register SACM is a register used for clearing by the software of the first channel transmission / reception circuit 571A and transmitting a break code (“0” of one or more frames). The second channel command register SBCM is a register used for clearing by the software of the second channel transmission circuit 571 B and transmitting a break code. FIG. 29A shows a configuration example of the first channel command register SACM. FIG. 29B shows a configuration example of the second channel command register SBCM. FIG. 29C shows an example of setting contents in each bit of communication command setting data stored in the first channel command register SACM and the second channel command register SBCM. Communication command setting data SACM7 stored in bit number [7] of first channel command register SACM and communication command setting data SBCM7 stored in bit number [7] of second channel command register SBCM are transmission data register 582A. And whether to execute the clear related to the transmission function such as clearing of the transmission buffer included in the transmission data register 582B, clearing of the transmission completion flag and transmission data empty flag included in the first channel status register SAST and the second channel status register SBST Show what. For example, when the transmission buffer and transmission completion flag in the first channel transmission / reception circuit 571A and the transmission data empty flag are not cleared (NOP), the bit value of the communication command setting data SACM7 is set to "0" while these are cleared. In the case, the bit value is set to "1". When the transmission buffer and transmission completion flag in the second channel transmission circuit 571B and the transmission data empty flag are not cleared (NOP), the bit value of the communication command setting data SBCM7 is set to "0" while these are cleared. In the case, the bit value is set to "1".

  The communication command setting data SACM6 stored in bit number [6] of the first channel command register SACM clears the reception buffer included in the reception data register 584A, various reception flags included in the first channel status register SAST (for example, reception It indicates whether or not to execute the clear related to the reception function such as the clear of the data full flag, the noise flag, the overrun flag, the break code detection flag, the framing error flag, the parity error flag and the like. For example, when the reception buffer or various reception flags in the first channel transmission / reception circuit 571A are not cleared (NOP), the bit value of the communication command setting data SACM6 is set to "0", while when these are cleared, Set the bit value to "1".

  Communication command setting data SACM0 stored in bit number [0] of first channel command register SACM and communication command setting data SBCM0 stored in bit number [0] of second channel command register SBCM are transmission of break codes. / Indicates not sent. For example, when the break code is not transmitted by the first channel transmission / reception circuit 571A (break code not transmitted), while the bit value of the communication command setting data SACM0 is set to "0", the break code is transmitted (break Code transmission), the bit value thereof is set to "1". When the second channel transmission circuit 571 B does not transmit a break code (break code not transmitted), the bit value of communication command setting data SBCM 0 is set to “0”, while when a break code is transmitted (break Code transmission), the bit value thereof is set to "1".

  The first channel status register SAST is a register for confirming the transmission state and the reception state of the first channel transmission / reception circuit 571A. The second channel status register SBST is a register for confirming the transmission state of the second channel transmission circuit 571B. FIG. 30A shows a configuration example of the first channel status register SAST. FIG. 30B shows a configuration example of the second channel status register SBST. FIG. 30C shows an example of setting contents in each bit of communication status data stored in the first channel status register SAST and the second channel status register SBST.

  The communication status data SAST7 stored in the bit number [7] of the first channel status register SAST, and the communication status data SBST7 stored in the bit number [7] of the second channel status register SBST are the transmission shift register 581A and It is a transmission completion flag indicating whether data transfer from the transmission shift register 581B is completed. For example, when communication data is being transmitted by the first channel transmission / reception circuit 571A (during transmission), the bit value of the communication status data SAST7 becomes "0" while transmission of communication data is completed (transmission completion) , Its bit value becomes "1". When communication data is being transmitted by the second channel transmission circuit 571 B (during transmission), the bit value of the communication status data SBST 7 becomes “0”, while transmission of communication data is completed (transmission completed). , Its bit value becomes "1". The change of the transmission completion flag from the off state "0" to the on state "1" is one of transmission interrupt generation factors.

  Communication status data SAST6 stored in bit number [6] of first channel status register SAST and communication status data SBST6 stored in bit number [6] of second channel status register SBST are transmitted from transmission data register 582A. The transmission data empty flag indicates whether data transfer to the credit shift register 581A or data transfer from the transmission data register 582B to the transmission shift register 581B is completed. For example, when data transfer to the transmission shift register 581A is not completed in the first channel transmission / reception circuit 571A (transmission shift register not transferred), the bit value of the communication status data SAST6 becomes "0", but When the data transfer is completed (transmission shift register transfer completed), the bit value becomes “1”. When the second channel transmission circuit 571B does not complete the data transfer to the transmission shift register 581B (transmission shift register not transferred), the bit value of the communication status data SBST6 becomes "0", but When the data transfer is completed (transmission shift register transfer completed), the bit value becomes “1”. The change of the transmission data empty flag from the off state “0” to the on state “1” is one of transmission interrupt generation factors.

  Communication status data SAST5 stored in bit number [5] of first channel status register SAST serves as a reception data full flag indicating whether data transfer from reception shift register 585A to reception data register 584A has been executed. . For example, when there is no data stored in the reception data register 584A because the data transfer from the reception shift register 585A to the reception data register 584A is not executed in the first channel transmission / reception circuit 571A (data in the reception data register None), the bit value of the communication status data SAST5 becomes "0". On the other hand, when data transfer from receive shift register 585A to receive data register 584A is executed and there is stored data in receive data register 584A (data in receive data register), communication status data The bit value of SAST5 becomes "1". The change of the reception data full flag from the off state "0" to the on state "1" is one of the reception interrupt generation factors.

  The communication status data SAST4 stored in the bit number [4] of the first channel status register SAST serves as a noise flag indicating whether noise is detected in the reception circuit included in the first channel transmission / reception circuit 571A. For example, when noise is not detected in communication data received by the first channel transmission / reception circuit 571A (noise is not detected), while the bit value of the communication status data SAST4 is "0", noise is detected. The value is "1". Further, when the noise of the reception data is detected, the communication status data SAST5 which becomes the reception data full flag becomes "1".

  Communication status data SAST3 stored in bit number [3] of first channel status register SAST serves as an overrun flag indicating whether an overrun has been detected in the reception circuit included in first channel transmission / reception circuit 571A. . Note that overrun is an error that occurs when the next communication data is received before the received communication data is read by the user program. For example, when an overrun is not detected during reception of communication data by the first channel transmission / reception circuit 571A (overrun not detected), the bit value of the communication status data SAST3 becomes "0" while the overrun is detected. When it is detected (overrun detection), the value becomes "1". Also, when overrun is detected, the communication status data SAST5, which is a reception data full flag, is "1". Then, if the communication interrupt control data SAIC5 stored in the bit number [5] of the first channel interrupt control register SAIC is “1”, reception is performed when an error (overrun error) occurs due to overrun detection. An interrupt can be generated. That is, the change of the overrun flag from the off state "0" to the on state "1" is one of the reception interrupt generation factors.

  Communication status data SAST2 stored in bit number [2] of first channel status register SAST has a break code detection flag indicating whether or not a break code is detected by the reception circuit included in first channel transmission / reception circuit 571A. Become. For example, when a break code is not detected during reception of communication data by the first channel transmission / reception circuit 571A (break code not detected), while the bit value of the communication status data SAST2 is "0", the break code is detected. When it is detected (break code detection), the value becomes "1". Also, when a break code is detected, the bit value of the communication status data SAST5 that is the reception data full flag becomes "1". Then, if the communication interrupt control data SAIC5 stored in bit number [5] of the first channel interrupt control register SAIC is “1”, reception is performed when an error (break code error) occurs due to the detection of a break code. An interrupt can be generated. That is, the change of the break code detection flag from the off state "0" to the on state "1" is one of the reception interrupt generation factors.

  Communication status data SAST1 stored in bit number [1] of first channel status register SAST serves as a framing error flag indicating whether or not a framing error is detected in the receiving circuit included in first channel transmission / reception circuit 571A. . The framing error is an error that occurs when the stop bit in the received communication data is "0". For example, when the framing error is not detected in the first channel transmission / reception circuit 571A (the framing error is not detected), while the bit value of the communication status data SAST1 is "0", the framing error is detected (the framing error Detection), its value becomes "1". Also, when a framing error is detected, the bit value of the communication status data SAST5 that becomes the reception data full flag becomes "1". If the communication interrupt control data SAIC5 stored in the bit number [5] of the first channel interrupt control register SAIC is “1”, a reception interrupt can be generated when a framing error occurs. That is, changing the framing error flag from the off state "0" to the on state "1" is one of the reception interrupt generation factors.

  Communication status data SAST0 stored in bit number [0] of first channel status register SAST serves as a parity error flag indicating whether or not a parity error is detected by the receiving circuit included in first channel transmission / reception circuit 571A. . The parity error is set to use the parity function according to communication setting data SAFM1 stored in bit number [1] of first channel communication setting register SAFM and communication setting data SAFM0 stored in bit number [0]. This is an error that occurs when the parity of the received communication data does not match the parity specified by the communication setting data SAFM0. For example, when a parity error is not detected during reception of communication data in the first channel transmission / reception circuit 571A (a parity error is not detected), while the bit value of the communication status data SAST0 is "0", a parity error is detected. When it is detected (parity error detection), the bit value becomes "1". Also, when a parity error is detected, the bit value of the communication status data SAST5 that becomes the reception data full flag becomes "1". If the communication interrupt control data SAIC5 stored in the bit number [5] of the first channel interrupt control register SAIC is "1", a reception interrupt can be generated when a parity error occurs. That is, the change of the parity error flag from the off state "0" to the on state "1" is one of the reception interrupt generation factors.

  As described above, in the serial communication circuit 511, four types of errors may occur when receiving communication data: an overrun error, a break code error, a framing error, and a parity error, and one of the errors occurs. , Receive interrupts can be generated.

  The transmission shift register 581A and the transmission shift register 581B included in the serial communication circuit 511 shown in FIG. 26 are circuits for converting transmission data from parallel signal format to serial signal format. The communication data stored in the transmission data register 582A is transferred to the transmission shift register 581A. The communication data stored in the transmission data register 582B is transferred to the transmission data register 581B. The transmission data converted to serial signal format by the conversion in the transmission shift register 581A is output to the outside of the game control microcomputer 100 by sequentially transmitting each bit data to the first channel transmission terminal TXA. Be done. The transmission data converted into serial signal format by conversion in the transmission shift register 581B is output to the outside of the game control microcomputer 100 by sequentially transmitting each bit data to the second channel transmission terminal TXB. Be done.

  The transmission data register 582A stores the communication data acquired from the first channel data register SADT. The transmission data register 582 B stores the communication data acquired from the second channel data register SBDT. Further, in the transmission data register 582A or the transmission data register 582B, conversion to a transmission data format, generation of parity, or the like may be performed.

  The interrupt control circuit 583A manages an interrupt generation factor in the first channel transmission / reception circuit 571A to control a communication interrupt request. The interrupts controlled by the interrupt control circuit 583A include a first channel transmission interrupt and a first channel reception interrupt. The first channel transmission interrupt includes an interrupt due to transmission completion and an interrupt due to transmission data empty. The first channel reception interrupt includes an interrupt due to reception data full, and an interrupt due to occurrence of reception error such as a break code error, an overrun error, a framing error, and a parity error. The interrupt control circuit 583B is a circuit for managing an interrupt generation factor in the second channel transmission circuit 571B and controlling a communication interrupt request. The interrupt controlled by the interrupt control circuit 583B is a second channel transmission interrupt. The second channel transmission interrupt includes an interrupt due to transmission completion and an interrupt due to transmission data empty.

  The reception data register 584A of the first channel transmission / reception circuit 571A stores the communication data acquired from the reception shift register 585A, and transfers the data to the first channel data register SADT. Further, in the reception data register 584A, data extraction from the reception data format, parity check, etc. may be performed.

  The reception shift register 585A is a circuit for converting received data from serial signal format into parallel signal format. In the reception shift register 585A, reception data supplied from the outside of the gaming control microcomputer 100 to the first channel reception terminal RXA is sequentially stored in units of bit data. The reception data stored in the reception shift register 585A is transferred to the reception data register 584A.

  The address decode circuit 512 included in the game control microcomputer 100 shown in FIG. 7 decodes each functional block in the game control microcomputer 100 and decodes a chip select signal which is a decode signal for an external device. Is the circuit of By the chip select signal, the internal circuit of the game control microcomputer 100 or an external device serving as a peripheral device is selectively enabled to allow access from the CPU 505.

  In addition to the user program for game control and the security check program 506A, the ROM 506 of the microcomputer 100 for game control stores various selection data, table data, etc. used to control the progress of the game. . For example, the ROM 506 stores data constituting a plurality of determination tables, determination tables, setting tables, and the like prepared for the CPU 505 to make various determinations, determinations, and settings. In addition, the ROM 506 stores table data constituting a plurality of command tables used by the CPU 505 to transmit control signals serving as various control commands from the main board 11, and variation patterns in which a plurality of variation patterns of decorative symbols are stored. The table data etc. which comprise a table are memorize | stored.

  FIG. 31 shows variations in the decorative design prepared in advance corresponding to the cases where the variable display mode of the decorative design is “non-reach” and “reach” when the variable display result is “loss” It is explanatory drawing which illustrates a pattern. As shown in FIG. 31, in this embodiment, non-reach PA 1-1 to non-reach PA 1-7, non-reach PB 1-1 as fluctuation patterns corresponding to the case where the variable display mode of the decorative symbol is “non-reach”. The fluctuation pattern of 1 and non-reach PB1-2, non-reach PC1-1, and non-reach PC1-2 is prepared. In addition, as a variation pattern corresponding to the variable display mode of the decorative symbol being "reach", normal PA2-1 to normal PA2-4, super PA3-1 to super PA3-8, and super PB3-1 to super PB3- 5. Variation patterns of super PC3-1 to super PC3-4 are prepared.

  FIG. 32 is an explanatory view exemplifying a variation pattern of a decorative symbol prepared in advance corresponding to the case where the variable display result is "big hit" or "small hit". As shown in FIG. 32, in this embodiment, normal PA2-5 to normal PA2-8, super PA4 as a variation pattern corresponding to the case where the variable display result of the decorative symbol is "big hit" or "small hit". -1 to Super PA 4-8, Super PA 5-1 to Super PA 5-4, Super PB 4-1 to Super PB 4-4, Super PB 5-1 to Super PB 5-4, Super PC 4-1 and Super PC 4-2, Super PD 1 -1 and Super PD 1-2, Super PE 1-1 and Super PE 1-2, Super PF 1-1 to Super PF 1-3, Special PG 1-1 to Special PG 1-4, Special PG 2-1 to Special PG 2-3, Special PG 3 -1-Special PG 3-3 variation patterns are prepared.

  FIG. 33 shows a configuration example of the special view display result determination table stored in the ROM 506. In this embodiment, as the special view display result determination table, the first special view display result determination table 130A shown in FIG. 33 (A) and the second special view display result determination table 130B shown in FIG. 33 (B) are used. , Are prepared in advance. In the first special figure display result determination table 130A, before the finalized special symbol to be the variable display result is derived and displayed in the special figure game using the first special figure by the first special symbol display device 4A, the variable display result Based on the random number value MR1 for determining the special figure display result, whether or not to control the big hit gaming state with the "big hit" or to control the small hit gaming state with the variable display result as the "small hit". It is a table referred to for determination. In the second special figure display result determination table 130B, before the finalized special symbol to be the variable display result is derived and displayed in the special figure game using the second special figure by the second special symbol display device 4B, the variable display result Based on the random number value MR1 for determining the special figure display result, whether or not to control the big hit gaming state with the "big hit" or to control the small hit gaming state with the variable display result as the "small hit". It is a table referred to for determination.

  In the first special view display result determination table 130A, a random number value MR1 for special view display result determination according to whether the probability change flag provided in the game control flag setting unit 592 shown in FIG. 45 is off or on. Are allocated so as to be associated with the big hit determination value data, the small hit determination value data, and the loss determination value data. In the second special view display result determination table 130B, the special view display result determination random number value MR1 is associated with the big hit determination value data or the loss determination value data according to whether the probability change flag is off or on. Are allocated to be able to In the first special view display result determination table 130A and the second special symbol display result determination table 130B, the table data indicating the random number value MR1 for special view display result determination is allocated to the determination result whether to control to the big hit gaming state Data for judgment. Then, in each of the first special view display result determination table 130A and the second special view display result determination table 130B, when the probability change flag is on, more random number values MR1 are compared to when the probability change flag is off, It is allocated to the jackpot decision value data. Here, when the gaming state in the pachinko gaming machine 1 is a definite change state, the positive change flag is turned on. On the other hand, when the gaming state in the pachinko gaming machine 1 is the normal state or the time saving state, the probability change flag is turned off. As a result, when the gaming state in the pachinko gaming machine 1 is a definite change state, the probability that it is determined that the variable display result is controlled to a big hit gaming state as a "big hit" is higher than when it is a normal state or a time saving state. . That is, in each of the first special view display result determination table 130A and the second special view display result determination table 130B, when the gaming state in the pachinko gaming machine 1 is the definite variation state, it is compared with the normal state or the time saving state. The determination data is allocated to the determination result as to whether or not to control to the big hit gaming state so that the probability to be determined to control to the big hit gaming state becomes high.

  Further, in the setting example of the first special display display result determination table 130A shown in FIG. 33A, the values (“30000” to “30099”) in the predetermined range are random numbers MR1 for special display display determination. It is allocated so as to be associated with the small hit judgment value data. On the other hand, in the setting example of the second special figure display result determination table 130B shown in FIG. 33B, the special figure display result determination random number value MR1 is not associated with the small hit determination value data. It is allocated. In the case where the variable display result is determined based on such a setting that the first start condition for starting the special figure game using the first special figure by the first special symbol display device 4A is satisfied, In the case where the variable display result is determined based on the establishment of the second start condition for starting the special drawing game using the second special figure by the second special symbol display device 4B, the variable display result is The proportion determined to control to the small hit gaming state as "small hit" can be made different. Also in the second special view display result determination table 130B, among the random number value MR1 for special view display result determination, the value of the predetermined range different from the setting in the first special view display result determination table 130A is small hit determination It may be allocated to be associated with value data. Alternatively, regardless of which of the first start condition and the second start condition is met, determination of the variable display result may be performed with reference to the common special-image display result determination table.

  FIG. 34 shows a configuration example of the big hit type determination table 131 stored in the ROM 506. The jackpot type determination table 131 determines the jackpot type to any one of a plurality of types based on the random number value MR2 for jackpot type determination when it is determined that the variable display result is controlled to the jackpot gaming state as "big hit". Is a table referred to by In the jackpot type determination table 131, whether the value of the variation special figure designation buffer (variation special figure designation buffer value) provided in the game control buffer setting unit 595 shown in FIG. 45 is “1” or “2” Accordingly, the random number value MR2 for determining the jackpot type is allocated so as to be associated with a plurality of jackpot types such as “normal”, “first definite variation” to “third definite variation”, and “probability”. Here, the variation special figure designation buffer value is set to “1” when the special figure game using the first special figure is started on the first special symbol display device 4A when the first start condition is met. Then, when the second special symbol display device 4B starts the special figure game using the second special figure in response to the establishment of the second start condition, "2" is set. The jackpot type determination table 131 corresponds to the jackpot type determined in the game control buffer setting unit 595 based on the value (jackpot type buffer value) of the jackpot type buffer determined based on the random number value MR2 for jackpot type determination. Then, table data (setting data) for setting any of “0” to “4” is included.

  In the setting example of the jackpot type determination table 131 shown in FIG. 34, the fluctuation for determining the jackpot type for the jackpot type of “probable” depending on whether the fluctuation special view designation buffer value is “1” or “2”. Allocation of numerical value MR2 is different. That is, when the variation special figure designation buffer value is “1”, values of “82” to “99” in the random number value MR2 for determining the big hit type are allocated to the big hit type of “probable”. In the case where the variation special-designated buffer value is “2”, the random number value MR2 for determining the big hit type is not allocated to the big hit type of “probable”. With such a setting, the jackpot type is determined to be any of a plurality of types based on the establishment of the first start condition for starting the special drawing game using the first special figure by the first special symbol display device 4A. And if the jackpot type is determined to be any of a plurality of types based on the establishment of the second start condition for starting the special figure game using the second special figure by the second special symbol display device 4B. The rate at which the jackpot type is determined to be "probable" can be made different. Even when the variation special figure designation buffer value is “2”, the value of the predetermined range different from the case where the variation special figure designation buffer value is “1” in the random number value MR2 for determining the big hit type is , And may be allocated to the jackpot type of "probable". As an example, when the variation special figure designation buffer value is “2”, a smaller number of values among the random value MR2 for determining the big hit type than the case where the variation special figure designation buffer value is “1” Is set to be allocated to the jackpot type of “probable”, when the second start condition is satisfied, the proportion determined as the jackpot type of “probable” compared to when the first start condition is satisfied. Can be reduced.

  35A to 35 F and 36 A to 36 C show configuration examples of the jackpot variation pattern type determination table stored in the ROM 506. In this embodiment, the jackpot fluctuation pattern type determination tables 132A to 132F shown in FIGS. 35 (A) to 35 (F) and the jackpots shown in FIGS. Fluctuation pattern type determination tables 132G to 132I are prepared in advance. When it is determined that the variable display result is controlled to the big hit gaming state with the variable display result as the "big hit", the change pattern type is determined based on the random number value MR4 for determining the change pattern type. It is a table that is referenced to make decisions. Each of the jackpot variation pattern type determination tables 132A to 132I, according to the table selection setting as shown in FIG. According to the determination result of the jackpot type, it is selected as the use table. In each of the jackpot variation pattern type determination tables 132A to 132I, a variation pattern type depending on whether the determination result of the jackpot type is “normal”, “first definite variation” to “third definite variation”, or “probability”. The random number value MR4 for determination is normal CA3-1, super CA3-2 to super CA3-8, super CB3-1 to super CB3-5, special CA4-1, special CA4-2, special CB4-1, special CB4. It is allocated so as to be associated with one of a plurality of types of variation pattern types such as −2, special CC 4-1, and special CC 4-2.

  Here, as an example, if attention is paid to the case where the gaming state in the pachinko gaming machine 1 is the normal state, the big hit shown in FIG. 35 (A) used when the big hit type is “normal” or “third probability variation”. The variation pattern type determination table 132A for the main hit and the variation pattern type determination table 132B for the big hit shown in FIG. 35 (B) used when the big hit type is "first probability variation", the normal CA 3-1 and the super CA 3-2 Allocation of the random value MR4 for determining the variation pattern type with respect to the variation pattern type of is different. In the big hit variation pattern type decision table 132A, the random pattern value determination random number MR4 is assigned to the variation pattern type of the super CA3-3, while the big hit variation pattern type decision table 132B is super CA3. The random number value MR4 for determining the variation pattern type is not allocated to the variation pattern type of -3. On the other hand, while the random pattern MR3 for determining the variation pattern type is not allocated to the variation pattern type of the super CA 3-4 in the big hit variation pattern type determination table 132A, the super CA 3 is used in the big hit variation pattern type determination table 132B. A random value MR4 for determining the variation pattern type is assigned to the variation pattern type of -4. In this manner, focusing on the case where the gaming state in the pachinko gaming machine 1 is any of the normal state, the probability changing state, and the time saving state, the big hit variation pattern type determination table selected according to the big hit type in the playing state. 132A to 132D (selected in the normal state), a variation pattern type determination table for big hit 132E to 132H (selected in the positive change state), a variation pattern type determination table for big hit 132A to 132C, 132I (in the time saving state When selection is compared with each other, allocation of the random value MR4 for determining the variation pattern type to each variation pattern type differs depending on the big hit type, and variation pattern types for different variation pattern types according to the big hit type A random value MR4 for determination is allocated. This makes it possible to determine different fluctuation pattern types according to the determination result as to which of the plural types the jackpot type is to be made, and it is possible to make the ratio determined to be the same fluctuation pattern type different.

  In particular, in the jackpot variation pattern type determination tables 132D, 132H and 132I used when the jackpot type is "probable", for example, special CA4-1, special CA4-2, special CB4-1, special CB4-2, special When the jackpot type is other than "probable" such as CC4-1 and special CC4-2, the random number value for the fluctuation pattern type determination with respect to the fluctuation pattern type to which the random value MR4 for the fluctuation pattern type determination is not allocated MR4 is allocated. As a result, when the variable display result is controlled to "big hit" and the big hit type is "probable", the variable pattern type is controlled to a different variation pattern type than when controlled to 15 round big hit status when controlled to 2 round big hit status. can do.

  In addition, as another example, if focusing on the case where the big hit type is determined to be “normal”, the big hit shown in FIG. 35A used when the gaming state in the pachinko gaming machine 1 is the normal state or the time saving state. In the variation pattern type determination table 132A for the main character and the big hit variation pattern type determination table 132E shown in FIG. 35 (E) used when the gaming state is the probability variation state, the variation patterns of the normal CA 3-1 and the super CA 3-2. Allocation of the random value MR4 for determining the variation pattern type to the type is different. In the big hit variation pattern type determination table 132A, the random pattern value determination random number MR4 is assigned to the variation pattern type of the super CA3-3, while the big hit variation pattern type determination table 132E is super CA3. The random number value MR4 for determining the variation pattern type is not allocated to the variation pattern type of -3. As described above, it is selected according to the gaming state in the pachinko gaming machine 1 paying attention to the case where the jackpot type is determined to be "normal", "first definite variation"-"third definite variation", or "probable". Jackpot variation pattern type determination tables 132A and 132E (selected when “normal” or “third probability variation”), jackpot variation pattern type determination tables 132B and 132F (selected when “first probability variation”), The jackpot variation pattern type determination tables 132C and 132G (selected for “second probability change”), the jackpot variation pattern type determination tables 132D, 132H and 132I (selected for “probable”) are compared with each other, pachinko game For the fluctuation pattern type decision for each fluctuation pattern type according to whether the gaming state in the machine 1 is the normal state or the short time state or the definite change state etc. Have different allocation of the random number values MR4, also sometimes random value MR4 for variation pattern type determination for different variation pattern type according to the playing state is allocated. As a result, it becomes possible to determine different fluctuation pattern types according to whether the gaming state in the pachinko gaming machine 1 is a normal state or a short time state or a definite change state, etc., and the same fluctuation pattern type is determined. The proportions can be different.

  FIGS. 37A to 37C show configuration examples of the small hitting variation pattern type determination table stored in the ROM 506. FIG. In this embodiment, small hit variation pattern type decision tables 133A to 133C shown in FIGS. 37A to 37C are prepared in advance as a small hit variation pattern type decision table. When it is determined that the small hit variation pattern type determination tables 133A to 133C respectively control the variable display result to be a small hit gaming state with "small hit", the variation pattern type is a random number value MR4 for determining a variation pattern type. Is a table referenced to make a decision based on In each small hitting variation pattern type determination table 133A to 133C, according to the table selection setting as shown in FIG. 37 (D), for example, the gaming state in the pachinko gaming machine 1 is either the normal state, the probability change state or the time reduction state In accordance with, it is selected as a use table. In each small hit variation pattern type determination table 133A to 133C, the random value MR4 for variation pattern type determination corresponds to any of a plurality of variation pattern types such as special CA4-1, special CB4-1, and special CC4-1. It is allocated to be attached.

  Here, in the variation pattern type of the special CA 4-1 to which the random value MR4 for determination of the variation pattern type is assigned in the variation pattern type determination table 133A for small hit shown in FIG. 37A, FIG. Also in the jackpot variation pattern type determination table 132D shown in, the random value MR4 for determination of the variation pattern type is allocated. In the variation pattern type of the special CB 4-1 to which the random value MR4 for determination of the variation pattern type is assigned in the variation pattern type determination table 133B for small hit shown in FIG. 37B, the big hit shown in FIG. Also in the variation pattern type determination table 132H, a random value MR4 for determination of a variation pattern type is allocated. In the variation pattern type of the special CC 4-1 to which the random value MR4 for determination of the variation pattern type is assigned in the variation pattern type determination table 133C for small hit shown in FIG. 37C, the big hit shown in FIG. Also in the variation pattern type determination table 132I, the random value MR4 for determination of the variation pattern type is allocated. As described above, the variation patterns of the special CA4-1, the special CB4-1, and the special CC4-1 have the same variation when the big hit type is "probable" and when the variable display result is "small hit". It is a pattern type. That is, the big hit variation pattern type determination table 132D shown in FIG. 35D used when the big hit type is “probable”, the big hit variation pattern type determination table 132H shown in FIG. 37C, the small hit variation pattern type decision table 133A shown in FIG. 37A used when the variable display result is “small hit”, and FIG. The small hit variation pattern type determination table 133B shown in Fig. 37 and the small hit variation pattern type decision table 133C shown in Fig. 37C are set to include common change pattern types.

  FIGS. 38A to 38C show configuration examples of the reach determination table stored in the ROM 506. FIG. In this embodiment, reach determination tables 134A to 134C shown in FIGS. 38 (A) to 38 (C) are prepared in advance as reach determination tables. Each of the reach determination tables 134A to 134C determines whether or not the decorative symbol is derived and displayed in the reach display state, when it is determined that the variable display result is not controlled to the big hit gaming state or the small hit gaming state as "loss". It is a table referred to in order to make a decision based on the random value MR3 for reach determination. Each reach determination table 134A to 134C is used according to whether the gaming state in the pachinko gaming machine 1 is a normal state, a probability change state, or a time saving state, for example, according to the table selection setting as shown in FIG. Selected as a table. In each reach determination table 134A to 134C, the random number value MR3 for reach determination is non-reach HA1-1 to non-reach HA1-5, non-reach HB1-1, non-reach HB1-2, non-reach HC1-1, non-reach Judgment result indicating that the variable display mode such as HC1-2 is "non-reach", and that the variable display mode such as reach HA2-1 to reach HA2-3, reach HB2-1, and reach HC2-1 are "reach" It is allocated so as to be associated with any of the determination results of.

  Here, for example, in the setting of the reach determination table 134A shown in FIG. 38A, “1” to “204” among the random numbers MR3 for reach determination corresponding to the case where the total number of pending storages is “0”. While the value of the range of "is allocated to the determination result of non-reach HA1-1, the value of the range of" 205 "to" 239 "is allocated to the determination result of reach HA2-1. In addition, corresponding to the case where the total number of pending storages is “1”, “1” to “217” of the random numbers MR3 for reach determination are larger than the number of random numbers assigned to the non-reach HA1-1. The range value is assigned to the determination result of the non-reach HA 1-2. Furthermore, corresponding to the case where the total number of pending storages is “2”, “1” is larger than the number of random numbers assigned to non-reach HA1-1 or non-reach HA1-2 among random values MR3 for reach determination. The value in the range of “to“ 220 ”is allocated to the determination result of the non-reach HA 1-3. Corresponding to the case where the total number of pending storages is “3” or “4”, “1” to “230” more than the number of decision values allocated to each of non-reach HA1-1 to non-reach HA1-3 The judgment value of the range of is assigned to the judgment result of the non-reach HA 1-4. Corresponding to the case where the total number of pending storages is any of “5” to “8”, “1” to “1” which is larger than the number of decision values allocated to each of non-reach HA1-1 to non-reach HA1-4 The judgment value of the range of "233" is allocated to the judgment result of non-reach HA 1-5. By such setting, when the total number of pending storages is equal to or more than a predetermined number (for example, “3”), a ratio at which it is determined that the variable display mode is “reach” as compared to the case of less than the predetermined number. Becomes lower. And if the average feature map fluctuation time in the variation pattern corresponding to "non reach" is set to be shorter than the average feature map fluctuation time in the variation pattern corresponding to "reach", the total When the number of pending storages is equal to or greater than the predetermined number, the average feature map fluctuation time can be shortened compared to when it is less than the predetermined number.

  39A to 39C show configuration examples of the reach variation pattern type determination table stored in the ROM 506. FIG. In this embodiment, the reach fluctuation pattern type determination tables 135A to 135C shown in FIGS. 39A to 39C are prepared in advance as the reach fluctuation pattern type determination table. When it is determined that the variable display result is “loss” and the variable display mode is “reach”, each of the fluctuation pattern type determination tables 135A to 135C for reach has a fluctuation pattern type, and is used to determine the fluctuation pattern type. It is a table referred to for determination based on the random value MR4. The fluctuation pattern type determination tables 135A to 135C for reach are based on the judgment result indicating that the variable display modes such as reach HA2-1 to reach HA2-3, reach HB2-1, and reach HC2-1 are "reach". It is selected as a use table. That is, the fluctuation pattern type determination table for reach 135A is selected as the use table according to the judgment result of reach HA2-1 to reach HA2-3, and the fluctuation pattern type judgment table for reach 135B according to the judgment result of reach HB2-1. Is selected as the use table, and the reach fluctuation pattern type determination table 135C is selected as the use table according to the determination result of the reach HC 2-1. In each of the reach variation pattern type determination tables 135A to 135C, the determination result indicating that the variable display mode is "reach" is any of reach HA2-1 to reach HA2-3, reach HB2-1, and reach HC2-1. Depending on whether the variation pattern type determination random number value MR4 is any of a plurality of variation pattern types such as normal CA2-1, super CA2-2, super CA2-3, super CB2-1, and super CB2-2. It is allocated to be associated.

  Here, for example, in the setting example of the reach fluctuation pattern type determination table 135A shown in FIG. 39A, "0" among the random value MR4 for the fluctuation pattern type determination corresponding to the judgment result of the reach HA 2-1. While values in the range of “128” are assigned to the variation pattern type of normal CA 2-1, random number values other than that are assigned to the variation pattern types of super CA 2-2 and super CA 2-3. Further, in accordance with the determination result of the reach HA 2-2, values in the range of “0” to “170” of the random value MR 4 for determining the variation pattern type are allocated to the variation pattern type of the normal CA 2-1. Further, in accordance with the determination result of reach HA 2-3, values in the range of “0” to “182” among the random value MR 4 for determining the variation pattern type are allocated to the variation pattern type of normal CA 2-1. The determination result of reach HA 2-1 is allocated random number value MR3 for reach determination corresponding to the case where the total number of pending storages is “0” by setting of reach determination table 134A shown in FIG. 38 (A). ing. As the determination result of the reach HA 2-2, a random value MR 3 for reach determination is allocated corresponding to the case where the total number of pending storages is “1” or “2”. The determination result of reach HA2-3 corresponds to the case where the total number of pending storages is "3" or "4" or "5" to "8". A random value MR3 is assigned. By these settings, when the total number of pending storages is equal to or more than a predetermined number (for example, “1”), reach effect (normal reach) of “normal” is executed as compared with the case of being less than the predetermined number. The proportion determined for the fluctuation pattern type of Then, the average feature map variation time in the variation pattern for executing the "normal" reach effect is set shorter than the average feature map variation time in the change pattern for performing the reach effect other than "normal" If the total number of pending storages is equal to or greater than the predetermined number, the average feature map fluctuation time can be shortened compared to when the total number of pending storages is less than the predetermined number.

  FIGS. 40A to 40C show configuration examples of the non-reach variation pattern type determination table stored in the ROM 506. FIG. In this embodiment, non-reach variation pattern type determination tables 136A to 136C shown in FIGS. 40A to 40C are prepared in advance as non-reach variation pattern type determination tables. When it is determined that the variable display result is "loss" and the variable display mode is "non-reach", the fluctuation pattern type is determined as the fluctuation pattern type. Is a table referred to for determination based on the random number value MR4. The variation pattern type determination tables 136A to 136C for non-reach, such as non-reach HA1-1 to non-reach HA1-5, non-reach HB1-1, non-reach HB1-2, non-reach HC1-1, non-reach HC1-2 It is selected as a use table according to the determination result to the effect that the variable display mode is "non-reach". That is, according to the determination result of non-reach HA1-1 to non-reach HA1-5, the non-reach variation pattern type determination table 136A is selected as the use table, and the determination results of non-reach HB1-1 and non-reach HB1-2 Accordingly, the non-reach variation pattern type determination table 136B is selected as the use table, and the non-reach variation pattern type determination table 136C is selected as the use table according to the determination results of non-reach HC1-1 and non-reach HC1-2. Ru. In each non-reach variation pattern type determination table 136A to 136C, the determination result that the variable display mode is set to "non-reach" is non-reach HA1-1 to non-reach HA1-5, non-reach HB1-1, non-reach HB1 2. The random number value MR4 for determination of the variation pattern type is non-reach CA1-1 to non-reach CA1-4, non-reach CB1-, depending on which of non-reach HC1-1 and non-reach HC1-2. It is allocated so that it may be matched with one of a plurality of change pattern types such as 1 to non-reach CB1-3 and non-reach CC1-1 to non-reach CC1-3.

  FIGS. 41, 42A and 42B show examples of the structure of the hit variation pattern determination table stored in the ROM 506. FIG. In this embodiment, as the hit variation pattern determination table, the hit variation pattern determination table 137A shown in FIG. 41, the hit variation pattern determination table 137B shown in FIG. 42A, and the hit variation pattern shown in FIG. 42B. A decision table 137C is prepared in advance. When it is determined that the variable display result is to be "big hit" or "small hit", the hit variation pattern determination tables 137A to 137C respectively change the variation pattern according to the determination result of the big hit type and the variation pattern type. , A table referred to in order to make a determination based on the random value MR5 for determining the variation pattern. Each of the variation pattern determination tables 137A to 137C is selected as a use table according to the determination result of the variation pattern type. That is, according to the determination result that the variation pattern type is set to one of normal CA3-1 and super CA3-2 to super CA3-8, hit variation pattern determination table 137A is selected as the use table, and the variation pattern type is super CB3. In accordance with the determination result to be any of -1 to super CB3-5, the hit variation pattern determination table 137B is selected as the use table, and the variation pattern type is special CA4-1, special CA4-2, special CB4-1, The hit variation pattern determination table 137C is selected as the use table according to the determination result indicating that one of the special CB4-2, the special CC4-1, and the special CC4-2 is selected. In each of the fluctuation pattern determination tables 137A to 137C, a plurality of random number MR5 for fluctuation pattern determination correspond to the case where the variable display result of the decorative pattern is "big hit" or "small hit" according to the fluctuation pattern type It is assigned to be associated with any of the variation patterns of the type.

  FIGS. 43 and 44 show examples of the configuration of the lost fluctuation pattern determination table stored in the ROM 506. FIG. In this embodiment, as a loss variation pattern determination table, a loss variation pattern determination table 138A shown in FIG. 43 and a loss variation pattern determination table 138B shown in FIG. 44 are prepared in advance. Loss variation pattern determination tables 138A and 138B each determine a variation pattern according to the reach determination result and the variation pattern type determination result when it is determined that the variable display result is to be "loss". Is a table referred to for determination based on the random number value MR5. Each lost fluctuation pattern determination table 138A, 138B is selected as a use table according to the determination result of the fluctuation pattern type. That is, according to the determination result that the variation pattern type is to be any of non-reach CA1-1 to non-reach CA1-4, non-reach CB1-1 to non-reach CB1-3, and non-reach CC1-1 to non-reach CC1-3. Accordingly, the loss change pattern determination table 138A is selected as the use table, and the change pattern type is determined to be any of normal CA2-1, super CA2-2, super CA2-3, super CB2-1, and super CB2-2. According to the result, the lost fluctuation pattern determination table 138B is selected as the use table. In the lost fluctuation pattern determination table 138A, according to the fluctuation pattern type, the random number value MR5 for fluctuation pattern determination corresponds to the case where the variable display result of the decorative pattern is "loss" and the variable display mode is "non-reach" It is allocated so as to be associated with any of a plurality of types of fluctuation patterns. In the lost fluctuation pattern determination table 138B, according to the fluctuation pattern type, plural corresponding to the case where the variable display result of the decorative pattern is “loss” and the variable display mode is “reach” according to the fluctuation pattern type It is assigned to be associated with any of the variation patterns of the type.

  Here, in the setting example of the lost fluctuation pattern determination table 138A shown in FIG. 44, the non-reach PA1-4 to the non-reach fluctuation pattern types such as non-reach CA1-4 and non-reach CC1-2 A random value MR5 for determining a fluctuation pattern is allocated to a fluctuation pattern for executing a specific effect such as non-reach PA1-7. Also, in response to the fluctuation pattern type of non-reach CB1-3, the value range of “0” to “100” in the fluctuation value determination random number value MR5 executes the specific effect of “development opportunity eye end” Is assigned to the variation pattern of non-reach PA1-7. With such a setting, the variation pattern is not reached in response to the determination result indicating that the variable display result is to be “losing” and the determination result indicating that the variable display state of the decorative symbol is to be “non reach”. -It can be determined to be any one of 4 to non-reach PA 1-7, and a rendering operation as a specific rendering can be executed.

  Then, with respect to the variation pattern type of non-reach CA1-4, in 136A of the non-reach variation pattern type variation pattern shown in FIG. 40A, non-reach HA1 of random value MR4 for determination of variation pattern type. A value in the range of "217" to "241" is allocated corresponding to the determination result of -1, and a value in the range of "230" to "241" is allocated corresponding to the determination result of non-reach HA1-2. , Values in the range of "231" to "241" are assigned corresponding to the determination results of non-reach HA1-3, and correspond to the determination results of non-reach HA1-4 and the determination results of non-reach HA1-5, respectively. A value in the range of "237" to "241" is assigned. Here, with respect to the determination result of non-reach HA1-1, in the reach determination table 134A shown in FIG. Of the numerical value MR3, values in the range of "0" to "204" are assigned. For the determination result of the non-reach HA1-2, in the reach determination table 134A, the total number of pending storages corresponds to "1", and the range of "0" to "217" in the random value MR3 for reach determination The value of is assigned. For the determination result of the non-reach HA1-3, in the reach determination table 134A, the total number of pending storages corresponds to "2", and the range of "0" to "220" in the random value MR3 for reach determination The value of is assigned. For the determination result of the non-reach HA1-4, in the reach determination table 134A, “0” to “0” among the random numbers MR3 for reach determination corresponding to “3” and “4” of the total number of pending storages. A value in the range of 230 "is assigned. With respect to the determination result of non-reach HA1-5, in reach determination table 134A, the total number of pending storages corresponds to “5” to “8”, and “0” to “0” of random values MR3 for reach determination. A value in the range 233 "is assigned. Therefore, when the total number of pending storages is “1” or “2”, the ratio determined as the variation pattern type of non-reach CA 1-4 is smaller than when the total number of pending storages is “0”. It gets lower. When the total number of pending storages is "3", "4" or "5" to "8", the total number of pending storages is "0" or "1" or "2". As compared with the case where “is”, the ratio determined to the variation pattern type of non-reach CA 1-4 becomes lower.

  In the example of the variation pattern shown in FIG. 31, the special figure variation time in the variation pattern of non-reach PA1-1 for which the specific effect is not executed is 5.75 seconds, and the special figure variation time in the variation pattern of non-reach PA1-2 is It is 3.75 seconds, and the special figure fluctuation time in the fluctuation pattern of non-reach PA1-3 is 1.50 seconds. On the other hand, the special figure fluctuation time in the fluctuation pattern of non-reach PA1-4 in which the specific effect of "slip" is executed is 8.25 seconds, and the non-reach PA1 in which the specific effect of "pseudo reunion" is executed. The special figure fluctuation time in the fluctuation pattern of −5 is 16.70 seconds, and the special figure fluctuation time in the fluctuation pattern of non-reach PA1-6 where the specific effect of “intro” is executed is 7.75 seconds, “ The special figure fluctuation time in the fluctuation pattern of non-reach PA 1-7 in which the specific effect of “development opportunity eye end” is executed is 9.25 seconds. That is, the special figure fluctuation time in the fluctuation pattern in which the specific effect is executed corresponding to the "non reach" is longer than the special figure fluctuation time in the fluctuation pattern in which the specific effect is not executed. And, when the total number of pending storages is “1” or more, the ratio determined as the variation pattern type of non-reach CA 1-4 that executes the specific effect is lower than in the case of “0”. In addition, when the total number of pending storages is “3” or more, the ratio determined as the variation pattern type of non-reach CA 1-4 is lower than that in the case where it is less than “3”. In this manner, when the total number of pending storages is equal to or greater than the predetermined number, the average feature map fluctuation time can be shortened compared to when the total number of pending storages is less than the predetermined number.

  As an area for holding various data used to control the progress of the game in the pachinko gaming machine 1 in the RAM 507 of the microcomputer 100 for game control, for example, a game control data holding area as shown in FIG. 590 is provided. The game control data holding area 590 shown in FIG. 45 includes a first special view reserve storage unit 591A, a second special view reserve storage unit 591B, a start data storage unit 591C, a game control flag setting unit 592, and game control A timer setting unit 593, a game control counter setting unit 594, and a game control buffer setting unit 595 are provided. Also, as the RAM 507, for example, a DRAM (Dynamic RAM) is used, and a refresh operation for maintaining the stored data contents is required. The CPU 505 incorporates a refresh register for performing this refresh operation. For example, the refresh register consists of 8 bits, of which the lower 7 bits are automatically incremented each time the CPU 505 fetches an instruction from the ROM 506. Therefore, updating of the stored value in the refresh register is performed every execution time of one instruction in the CPU 505.

  The first special view reserve storage unit 591A is a special view game in which the game ball is won in the first starting winning opening formed by the normal winning ball device 6A and the first starting condition is established but the first starting condition is not established. The reserved data of (the special drawing game using the first special drawing by the first special symbol display device 4A) is stored. As an example, first special view reserve storage unit 591A associates the reserve number with the order of winning on the first start winning opening, and determines the special view display result acquired by CPU 505 based on the establishment of the first startup condition due to the winning. Numerical data indicating the random number MR1 for the purpose and numerical data indicating the random number MR2 for determining the jackpot type are regarded as reserved data, and are stored until the number reaches a predetermined upper limit (for example, "4").

  The second special drawing reserve storage unit 591B is a special drawing in which the game ball is won in the second starting winning opening formed by the normally variable winning ball device 6B and the second starting condition is established but the second starting condition is not established. Hold data of the game (special drawing game using the second special drawing by the second special symbol display device 4B) is stored. As an example, second special view reserve storage unit 591B associates the reserve number with the order of winning on the second start winning opening, and determines the special view display result acquired by CPU 505 based on the establishment of the second start condition due to the winning. Numerical data indicating the random number MR1 for the purpose and numerical data indicating the random number MR2 for determining the jackpot type are regarded as reserved data, and are stored until the number reaches a predetermined upper limit (for example, "4").

  The start data storage unit 591C stores start data indicating which of the first start winning opening and the second start winning opening the game ball has won, as it is possible to specify the winning order of each game ball. As an example, in start data storage unit 591C, an area corresponding to the upper limit value (for example, "8") of the total number of pending storages is secured, and "first" start data corresponding to winning on the first start winning opening. Alternatively, the "second" start data corresponding to the winning on the second start winning opening is stored in association with the hold number in accordance with the winning order of each gaming ball.

  Note that the first special view reserve storage unit 591A, the second special view reserve storage unit 591B, and the start data storage unit 591C may be provided separately, or a storage area combining these may be provided. . As an example, as shown in FIG. 46, a storage area including eight areas in which the start data storage area and the random value storage area are combined may be provided. In the configuration shown in FIG. 46, continuous addresses in the RAM 507 may be allocated to the start data storage area and each area of the random value storage area.

  In the configuration shown in FIG. 46, for example, the start data is set in the start data storage area at the top of the free space by updating the value of the pointer specifying the address of the data storage destination based on the total pending storage number. At this time, in order to specify the beginning of the free area, for example, a value obtained by adding 1 to the value obtained by multiplying the total number of pending storages by the number of data in one pending data (numerical data indicating starting data and random numbers) The value obtained by adding one area is specified as the address offset value. The value of the pointer may be updated according to the offset value thus specified. In the configuration shown in FIG. 46, a total of two data storage areas, one for the start data storage area and one for the random value storage area, are provided corresponding to one pending data. Therefore, a value obtained by adding 1 to a value obtained by doubling the total number of pending storages is specified as the address offset value. As an example, if the total number of pending storages is "3", "+7" (the value obtained by doubling the total number of pending storages "3" and then adding 1) is specified as the offset value, and this offset value is supported. The start data is set in the start data storage area. When a total of three data storage areas, one start data storage area and two random number storage areas, are provided corresponding to one pending data, the total pending storage number is tripled. A value obtained by adding 1 (a value obtained by adding one start data storage area) may be specified as the address offset value.

  When the initial position of the pointer specifying the address of the data storage destination is to be the start data storage area corresponding to the hold number "1" shown in FIG. 46, the number of data in one hold data is the total number of hold storages. The multiplied value may be specified as the offset value of the address. For example, in the configuration shown in FIG. 46, a value obtained by doubling the total number of pending storages may be specified as the address offset value. In addition, when a total of three data storage areas of one start data storage area and two random number storage areas are provided corresponding to one pending data, a value obtained by multiplying the total number of pending storages by three is , And may be specified as an offset value of the address. After setting the start data in the start data storage area in this way, add 1 to the value of the pointer specifying the address, and store the numerical data indicating the random value in the random number storage area of the address pointed by the added pointer. Just do it.

  The game control flag setting unit 592 is provided with a plurality of types of flags capable of updating the state according to the progress of the game in the pachinko gaming machine 1 or the like. For example, the game control flag setting unit 592 stores, for each of a plurality of types of flags, data indicating the value of the flag and data indicating the on state or the off state. In this embodiment, the game control flag setting unit 592 is provided with a special drawing process flag, a general drawing process flag, a big hit flag, a small hit flag, a positive change flag, a short time flag, and the like.

  The special drawing process flag indicates the progress of the special drawing game using the first special drawing by the first special symbol display device 4A, the progress of the special drawing game using the second special drawing by the second special symbol display device 4B, etc. In the special symbol process processing shown in step S95 of FIG. 51 and FIG. 53 executed for control, it is instructed which processing should be selected and executed. The common pattern process flag is selected and executed in the normal symbol process process shown in step S96 of FIG. 51 which is executed to control the progress of the common pattern game using the normal symbol by the normal symbol display 20. Indicate what to do.

  The big hit flag is set to the on state in response to the determination result indicating that the variable display result is to be "big hit" when the special figure game is started. On the other hand, it is cleared and it will be in an OFF state corresponding to the big hit symbol being stop-displayed etc. as a definite special symbol in a special figure game. The small hit flag is set to the on state in response to the determination result indicating that the variable display result is to be “small hit” when the special figure game is started. On the other hand, in response to the small hit symbol being stopped and displayed as a determined special symbol in the special figure game, it is cleared and turned off. The probability change flag is set to the on state in response to the gaming state in the pachinko gaming machine 1 being controlled to the probability change state, while it is cleared in response to the termination of the probability change state or the like to be in the off state . The time saving flag is set to the on state in response to the gaming state in the pachinko gaming machine 1 being controlled to the time saving state, while it is cleared in response to the end of the time saving state etc. .

  The game control timer setting unit 593 is provided with various timers used to control the progress of the game in the pachinko gaming machine 1. For example, the game control timer setting unit 593 stores data indicating timer values in each of a plurality of types of timers. In this embodiment, the game control timer setting unit 593 is provided with a game control process timer, a special figure fluctuation timer, a common drawing fluctuation timer, and the like.

  The game control process timer is for measuring the time to control the progress of the big hit gaming state or the small hit gaming state, for example, on the main substrate 11 side. As a specific example, the game control process timer stores, as a game control process timer value, data indicating a timer value corresponding to a time measured to control the progress of the big hit gaming state or the small hit gaming state. It is used as a down counter that counts down. Alternatively, the game control process timer is used as an up-counter that stores data indicating a timer value corresponding to an elapsed time from a predetermined point in time, such as a big hit gaming state or a small hit gaming state start time point, and periodically counts up. May be

  The special figure fluctuation timer is for measuring the time to control the progress of the special figure game, such as the special figure fluctuation time, which is the execution time of the special figure game, on the main substrate 11 side. As a specific example, the special figure fluctuation timer stores data indicating a timer value corresponding to the time to be measured to control the progress of the special figure game as a special figure fluctuation timer value, and counts down periodically. It is used as a counter. Alternatively, the special view fluctuation timer may be used as an up-counter which stores data indicating a timer value corresponding to an elapsed time from the start time of the special view game and counts up periodically.

  The common drawing fluctuation timer is for measuring the time for controlling the progression of the common drawing game, such as the common drawing fluctuation time which is the execution time of the common drawing game, on the main substrate 11 side. As a specific example, the common drawing fluctuation timer stores data indicating a timer value corresponding to the time to be measured to control the progression of the common drawing game, as the common drawing fluctuation timer value, and counts down periodically. It is used as a counter. Alternatively, the common drawing fluctuation timer may be used as an up-counter that stores data indicating a timer value corresponding to an elapsed time from the start time of the common drawing game and counts up periodically.

  The game control counter setting unit 594 is provided with a plurality of types of counters for counting count values used to control the progress of the game in the pachinko gaming machine 1. For example, the game control counter setting unit 594 stores data indicating the count value of each of a plurality of types of counters. In this embodiment, the game control counter setting unit 594 includes a random counter, a first hold memory number counter, a second hold memory number counter, a total hold memory number counter, a round number counter, a first start winning determination counter, A start winning determination counter and the like are provided.

  The random counter of the game control counter setting unit 594 counts a part of numerical data indicating a random number used to control the progress of the game, separately from the random number circuit 509, by the CPU 505 so as to be able to be updated by software. belongs to. For example, in the random counter of the game control counter setting unit 594, numerical data indicating random number values MR1 to MR6 are stored as random count values. Then, with regard to the random number values MR2 to MR5, numerical data indicating each random number value is updated periodically or irregularly according to the execution of the software by the CPU 505.

  The round number counter is for counting the number of rounds executed in the big hit gaming state and the like. For example, in the round number counter, data indicating the count initial value “1” at the start of the big hit gaming state is set as the round number count value. Then, when one round ends and the next round starts, the round number count value is incremented by one and updated. The round number counter may also count the number of times the variable winning operation is performed in the small hit gaming state.

  The first start winning determination counter counts each time a timer interrupt for game control occurs when the first start winning signal SS1 as a detection signal transmitted from the first start port switch 22A is in the on state. It is used as an up counter. Then, when the first starting winning determination count value, which is the value of the first starting winning determination counter, reaches a predetermined winning determination value (for example, "2"), the gaming ball having entered the first starting winning opening is made effective. It is determined that it has been detected.

  The second start winning determination counter counts each time a timer interrupt for game control occurs while the second start winning signal SS2 as a detection signal transmitted from the second start port switch 22B is in the on state. It is used as an up counter. Then, when the second starting winning determination count value, which is the value of the second starting winning determination counter, reaches a predetermined winning determination value (for example, "2"), the gaming ball having entered the second starting winning opening is made effective. It is determined that it has been detected.

  The game control buffer setting unit 595 is provided with various buffers for temporarily storing data used to control the progress of the game in the pachinko gaming machine 1. For example, the game control buffer setting unit 595 stores data indicating buffer values in each of a plurality of types of buffers. In this embodiment, the game control buffer setting unit 595 is provided with a transmission command buffer, a variation special feature designation buffer, a big hit type buffer, a starting opening buffer and the like.

  The transmission command buffer is used to temporarily store setting data for transmitting a control command from the main board 11 to the control board on the sub side. For example, the transmission command buffer is configured to include a plurality of (for example, “12”) buffer areas, and setting data indicating a storage address in the ROM 506 of the command table corresponding to the control command to be transmitted is stored in each buffer area. Ru. Further, in the transmission command buffer, a buffer area for writing and reading setting data may be designated by a transmission command pointer or the like so that a plurality of buffer areas can be used as a ring buffer.

  The variation special figure designation buffer is either a special figure game using the first special figure by the first special symbol display device 4A or a special figure game using the second special figure by the second special symbol display device 4B. A buffer value is stored that indicates whether the special view game is to be executed. As an example, the value of the variation special figure designation buffer (variation special figure designation buffer value) is "1" corresponding to the special figure game using the first special figure by the first special symbol display device 4A being executed. Set to Further, in response to the execution of the special drawing game using the second special drawing by the second special symbol display device 4B, the variation special drawing designation buffer value is set to "2". Then, in response to the end of the special figure game, etc., the variation special figure designation buffer value is set to "0".

  In the big hit type buffer, there are multiple types of big hit types such as "Normal", "1st probability change"-"3rd probability change", and "Rapidity" as the variable display mode of the decorative design when the variable display result is "big hit" A buffer value corresponding to the decision result of either is stored. As an example, based on the settings in the jackpot type determination table 131 as shown in FIG. 34, when the jackpot type is "normal", the value of the jackpot type buffer (big hit type buffer value) is set to "0", If the type is "first definite variation", the big hit type buffer value is set to "1", and if the big hit type is "second definite variation", the big hit type buffer value is set to "2", and the big hit type is In the case of “third definite variation”, the big hit type buffer value is set to “3”, and when the big hit type is “probable”, the big hit type buffer value is set to “4”.

  In the starting opening buffer, the game ball entering into any starting winning opening of the first starting winning opening formed by the normal winning winning ball device 6A and the second starting winning opening formed by the normal variable winning winning ball device 6B is effective The buffer value corresponding to whether or not detected is stored as the start port buffer value. As an example, when the gaming ball entering the first start winning opening is detected effectively by the first starting opening switch 22A, the starting opening buffer value is set to "1", and the gaming ball entering the second starting winning opening Is detected effectively by the second start port switch 22B, the start port buffer value is set to "2".

  As shown in FIG. 2, the effect control board 12 is mounted with a microcomputer 120 for effect control. The effect control board 12 also includes a VDP (Video Display Processor) 121 for generating image data according to a drawing command from the effect control microcomputer 120, an image display device 5, speakers 8L and 8R, and a game effect lamp 9 The effect data memory 122 etc. which memorize | store various data used in order to control the rendering operation by a rendering apparatus, such as a light-emitting body etc., are also mounted. The effect control microcomputer 120 is, for example, a one-chip microcomputer having the same configuration as the game control microcomputer 100, and has an external bus interface, a clock circuit, a unique information storage circuit, a reset / interrupt controller, a CPU, a ROM, and a RAM. , CTC, random number circuit, PIP, serial communication circuit, address decoding circuit, and the like. Further, all or part of the configuration of the effect control microcomputer 120 may be different from the configuration of the game control microcomputer 100. As an example, when all numerical value data to be random numbers used on the side of the effect control board 12 are updated by software, the effect control microcomputer 120 may not be provided with the random number circuit. In addition, in the serial communication circuit, a receiving circuit capable of receiving at least the effect control command transmitted from the main substrate 11 may be provided, and data and instructions for the image display device 5, the audio control substrate 13 and the lamp control substrate 14 may be provided. Signal transmission may be performed using an external bus interface or an address decoding circuit.

  In the effect control microcomputer 120, the CPU executes a program for effect control read out from the ROM to execute processing for controlling the effect operation by the electric component for effect (effect device). At this time, a fixed data reading operation in which the CPU reads fixed data from the ROM, a variation data writing operation in which the CPU writes various variation data in the RAM and temporarily stores it, and various variation data temporarily stored in the RAM by the CPU Variable data read operation to read out, reception operation to receive input of various signals from the outside of the effect control microcomputer 120 through the CPU via external bus interface, PIP, serial communication circuit etc., CPU external bus interface or serial communication circuit etc Also, a transmission operation for outputting various signals to the outside of the effect control microcomputer 120 is performed. In addition to the CPU, at least a RAM may be incorporated in the one-chip microcomputer constituting the effect control microcomputer 120, and the ROM, the random number circuit, the PIP, etc. may be externally incorporated. It may be

  In this embodiment, a control signal to be an effect control command transmitted from the main substrate 11 via the relay substrate 18 is supplied to a predetermined serial reception terminal provided in the effect control microcomputer 120, and the effect control microcomputer It is received by the serial communication circuit built in 120.

  A scaler circuit for converting the resolution of the image data may be provided between the effect control board 12 and the image display device 5. In this case, the image data generated by the VDP 121 mounted on the effect control board 12 in accordance with the drawing command from the effect control microcomputer 120 is supplied to the image display device 5 after the resolution is converted by the scaler circuit. . As a specific example, the scaler circuit inputs the image data of the first resolution generated by the VDP, and performs the following processing on either or both of the vertical direction and the horizontal direction. Converted image data to a second resolution different from the first resolution.

  For example, in the case of converting the resolution in the vertical direction, after performing upsampling at the first sample rate along the vertical direction of the input image data, filtering processing by a filter (for example, FIR filter) prepared in advance Apply. Thereafter, downsampling may be performed at a second sample rate corresponding to a predetermined scaling factor along the vertical direction. Further, in the case of converting the resolution in the horizontal direction, upsampling, filtering processing and downsampling may be performed in the same manner as in the vertical direction along the horizontal direction of the input image data. As a specific example, when image data in VGA mode (640 × 480 pixels) is generated by VDP, the image data is converted to SXGA mode (1280 × 1024 pixels) or another mode by conversion processing in the scaler circuit. Can be converted to

  The voice control board 13 is equipped with, for example, an input / output driver, a voice synthesis IC, a voice data ROM, an amplification circuit, a volume, and the like. As an example, in the voice control board 13, sound number data indicated by the sound effect signal transmitted from the effect control board 12 is input to the voice synthesis IC via the input / output driver. The speech synthesis IC generates speech and sound effects according to the sound number data and outputs the speech and the sound to the amplification circuit. The amplification circuit outputs an audio signal obtained by amplifying the output level of the speech synthesis IC to a level according to the volume set by the volume to the speakers 8L and 8R. The voice data ROM stores control data corresponding to the sound number data, and the voice synthesis IC reads the control data according to the sound number data to generate voice and sound effects. The storage data of the voice data ROM may be constituted of data indicating the output mode of voice and sound effects in a predetermined period in time series.

  For example, an input / output driver and a lamp driver are mounted on the lamp control board 14. As an example, in the lamp control board 14, the electric decoration signal transmitted from the effect control board 12 is input to the lamp driver via the input / output driver. The lamp driver amplifies the electric decoration signal and supplies it to the game effect lamp 9 or the like.

  The payout control board 15 is mounted with a payout control microcomputer 150, a switch circuit 151, and the like. The switch circuit 151 receives detection signals from various switches and sensors such as the full tank switch 26, the out-of-ball switch 27, the payout motor position sensor 71, the payout count switch 72, and the error release switch 73. The switch circuit 151 takes in these detection signals and transmits them to the payout control microcomputer 150. The payout control microcomputer 150 is, for example, a one-chip microcomputer similar to the game control microcomputer 100, and has an external bus interface, a clock circuit, a unique information storage circuit, a reset / interrupt controller, a CPU, a ROM, a RAM, a CTC, A random number circuit, a PIP, a serial communication circuit, an address decoding circuit, etc. may be provided. Further, all or part of the configuration of the payout control microcomputer 150 may be different from the configuration of the game control microcomputer 100. As an example, in the case where the numerical value data to be a random value is not used on the side of the payout control board 15, the payout control microcomputer 150 may not have the random number circuit. Further, in the serial communication circuit, at least one transmission / reception circuit capable of performing bidirectional serial communication with at least the main substrate 11 may be provided, and data for the payout motor 51, the error display LED 74, and the emission control substrate 17 The transmission of the command signal may be performed using an external bus interface or an address decoding circuit.

  In the payout control microcomputer 150, processing for controlling a payout operation and the like by the payout device including the payout motor 51 is executed by the CPU executing a program for payout control read out from the ROM. At this time, a fixed data reading operation in which the CPU reads fixed data from the ROM, a variation data writing operation in which the CPU writes various variation data in the RAM and temporarily stores it, and various variation data temporarily stored in the RAM by the CPU Data reading operation to read out the data, reception operation in which the CPU receives input of various signals from the outside of the payout control microcomputer 150 via the external bus interface, PIP, serial communication circuit etc., the CPU external bus interface or serial communication circuit etc Also, a transmission operation of outputting various signals to the outside of the payout control microcomputer 150 is performed. In addition to the CPU, at least a RAM may be incorporated in the one-chip microcomputer constituting the payout control microcomputer 150, and the ROM, the PIP, etc. may be external or internal. Good.

  Next, the operation (action) of the pachinko gaming machine 1 in the present embodiment will be described. In the main board 11, the game control microcomputer 100 is activated in response to the power supply from the power supply board 10 being started and the reset signal to the game control microcomputer 100 becoming high level (off state), Based on the security check program 506A read out from the ROM 506 by the CPU 505, security check processing as shown in the flowchart of FIG. 47 is executed. At this time, the game control microcomputer 100 is in the security mode, and the game control user program stored in the ROM 506 is not yet executed.

  When the security check process shown in FIG. 47 is started, the CPU 505 first executes a process for determining a time (security time) in which the game control microcomputer 100 is in the security mode by executing the security check process. . At this time, the CPU 505 reads the bit value in the bit number [2-0] of the security time setting KSES stored in the program management area of the ROM 506 (step S1). Then, it is determined whether the read value is "000" (step S2).

  If it is determined in step S2 that the read value is "000" (step S2; Yes), the steady setting time is set to a predetermined fixed time (step S3). Here, the steady setting time is constant regardless of the number of times the security check process is executed based on the occurrence of the system reset in the pachinko gaming machine 1 or the like (the number of times the microcomputer 100 for game control enters the security mode). It is a time component that becomes The fixed time is an invariable time component predetermined based on the specification of the game control microcomputer 100 among the security time, and may be, for example, a minimum value that can be set as the security time.

  If it is determined in step S2 that the read value is other than "000" (step S2; No), corresponding to the read value, it is selected by the setting contents shown in FIG. 12D in addition to the fixed time. Extension time is set to the steady set time (step S4). Thus, when the bit value in bit number [2-0] of security time setting KSES is a value other than "000", the security time which is the execution time of the security check process can be added in advance to the fixed time and can be selected in advance. Can be set to any of several extension times.

  After one of the processes in steps S3 and S4 is executed, the bit value in the bit number [4-3] of the security time setting KSES is read (step S5). Then, it is determined whether the read value is "00" (step S6).

  If it is determined in step S6 that the read value is "00" (step S6; Yes), the steady setting time is set as the security time (step S7). On the other hand, when the read value is determined to be other than "00" (step S6; No), the variable set time determined corresponding to the read value is added to the steady set time to obtain the security time (Step S8). Here, the variable setting time is a time component of the security time that changes each time the security check process is executed, and the bit value in the bit number [4-3] of the security time setting KSES is “01” (short It changes in a different predetermined time range depending on whether it is the mode) or "10" (long mode). For example, when the count value of a predetermined free run counter is stored in the variable security time register built in the gaming control microcomputer 100 at the time of system reset, for the variable security time in the process of step S8. By using the stored value of the register as it is or by using the value obtained by substituting the stored value into a predetermined operation function (for example, a hash function), etc., the variable set time is within a predetermined time range at each system reset. It may be decided to change at random. Thus, when the bit value in bit number [4-3] of security time setting KSES is a value other than "00", the security time which is the execution time of the security check process, the security based on the occurrence of a system reset, etc. It can be changed in a predetermined time range each time the check process is performed.

  Here, the bit value in bit number [2-0] of security time setting KSES is a value other than "000", and the bit value in bit number [4-3] of security time setting KSES is other than "00". In the case where the security time is determined, the extension time set in step S4 and the variable set time set in step S8 are added to the fixed time to determine the security time. .

  After one of the processes in steps S7 and S8 is performed, the security code stored in the predetermined area of the ROM 506 is read (step S9). Here, in a predetermined area of the ROM 506, a security code of a calculation result obtained by calculating data of stored contents by a predetermined calculation formula is stored in advance. The security code may be generated in advance, for example, by using a hash function to generate a hash value, using an error detection code (CRC code), or using an error correction code (ECC code). The generation method may be used. Further, in a predetermined area different from the security code storage area of the ROM 506, an arithmetic expression for specifying the security code by arithmetic operation is encrypted and stored in advance.

  Following the process of step S9, the encrypted arithmetic expression is decrypted and restored (step S10). Thereafter, the storage data in the predetermined area of the ROM 506 is calculated by the arithmetic expression decrypted in step S10 to specify the security code (step S11). At this time, the storage data used for the operation for specifying the security code is, for example, program data corresponding to all or part of a user program different from the security check program 506A among storage data of the ROM 506, or predetermined table data All or part of the fixed data constituting the Then, the security code read out in step S9 is compared with the security code specified in step S11 (step S12). At this time, it is determined whether the security code matches in the comparison result (step S13).

  If the security codes do not match in step S13 (step S13; No), it is determined that an unauthorized change has been made to the ROM 506, and the operation of the CPU 505 is shifted to the halt state (HALT). On the other hand, if the security code matches in step S13 (step S13; Yes), it is determined whether the security time set in the process of step S7 or step S8 has elapsed (step S14) . At this time, if the security time has not elapsed (step S14; No), the process of step S14 is repeatedly executed, and the process waits until the security time elapses. When it is determined in step S14 that the security time has elapsed (step S14; Yes), for example, the value of the program counter built in CPU 505 is set to the start address (address 0000H) of the user program in ROM 506. Start the execution of the game control main process. In this way, when the execution of the game control main process is started, the operation state of the game control microcomputer 100 shifts from the security mode to the user mode, and the execution of the user program stored in the ROM 506 is started. Become.

  FIG. 48 is a flow chart showing an example of the game control main process executed by the CPU 505 of the game control microcomputer 100. In addition, each process demonstrated below shall be performed by CPU505 with which the microcomputer 100 for game control is provided. Further, interrupt requests based on various interrupt factors generated by the CTC 508, the random number circuit 509, the serial communication circuit 511, etc. included in the game control microcomputer 100 are for causing the CPU 505 to execute predetermined interrupt processing. The concept including the CPU 505 and various circuits other than the CPU 505 may be referred to as a game control microcomputer 100. When the game control main process shown in FIG. 48 is started, the CPU 505 first sets interrupt prohibition (step S21), and sets an interrupt mode (step S22). For example, in step S22, the value (1 byte) of the specific register (I register) of the gaming control microcomputer 100 is combined with the interrupt vector (1 byte: the least significant bit is "0") output by the built-in device This sets the interrupt mode [2] of the maskable interrupt for which an interrupt address is generated. When a maskable interrupt occurs, the CPU 505 may automatically make the interrupt disabled state and save the contents of the program counter on the stack.

  Subsequently, settings relating to the stack pointer, such as setting of a stack pointer specification address, are performed (step S23). Further, the setting (initialization) of the built-in register as shown in FIG. 9B is performed (step S24). As an example, in the process of step S24, the operation setting in the serial communication circuit 511 may be performed by setting the first channel communication setting register SAFM, the second channel communication setting register SBFM, and the like. Following the process of step S24, settings of CTC 508 and PIP 510 are performed (step S25). After the process of step S25 is performed, it may be determined whether or not the power-off signal is in the OFF state, for example, by checking the terminal state of a predetermined input port included in the PIP 510 or the like.

  Thereafter, the RAM 507 is set to be accessible (step S26). Subsequently, based on the signal state of the switch signal (clear signal) transmitted from the clear switch 304 installed on the power supply substrate 10, it is determined whether the clear switch 304 is turned on (step S27). In the process of step S27, the clear signal transmitted from the clear switch 304 may be checked a plurality of times, and when it is continuously turned on, it may be determined that the clear switch 304 has been turned on. For example, if it is confirmed once that the state of the clear signal is in the off state, the state of the clear signal is confirmed once again after a predetermined time (for example, 0.1 second) has elapsed. At this time, if the clear signal is in the off state, it is determined that the clear signal is in the off state. On the other hand, if the state of the clear signal is an on state at this time, the state of the clear signal may be confirmed again after a predetermined time has elapsed. The number of times to reconfirm the state of the clear signal may be one or more than one. In addition, it is possible to check again and check again if the check results do not match.

  When the clear switch 304 is off in step S27 (step S27; No), it is determined whether the backup flag provided in the game control flag setting unit 592 or the like is on (step S28). The state of the backup flag is set in the game control flag setting unit 592 or the like when the power supply to the game control microcomputer 100 is stopped. Then, the backup flag setting state is backed up by the backup power supply, so that the state of the backup flag is saved even when the power supply is stopped. In step S28, if "55H" is set in the game control flag setting unit 592 as the value of the backup flag, for example, it is determined that backup is available (on state). On the other hand, if a value other than "55H" is set, it is determined that there is no backup (off state).

  When the backup flag is on at step S28 (step S28; Yes), the data check of the RAM 507 is performed to determine whether the check result is normal or not (step S29). In the process of step S29, for example, a checksum is calculated using storage data in a specific area of the RAM 507, and the calculated checksum is compared with the checksum stored in the main checksum buffer. Here, in the main checksum buffer, a checksum calculated by the same process is stored at the time of the previous power supply stop. Then, if the comparison result does not match, it is determined that the check result is not normal because the data in the specific area of the RAM 507 is different from the data at the time of the power supply stop.

  When the check result in step S29 is normal (step S29; Yes), for example, the control state of the main board 11 such as the internal state of the game control microcomputer 100 or the sub control board (for example, the effect control board 12) The setting at the time of restoration for returning the control state or the like to the state at the time when the power supply is stopped is performed, and the gaming state before power interruption is restored (step S30). As a specific example, in the process of step S30, the top address of the backup setting table stored in the ROM 506 is set as a pointer, and the contents of the backup setting table are sequentially set in the work area in the RAM 507. Here, the work area of the RAM 507 is backed up by a backup power supply, and initialization data for an area that may be initialized in the work area may be set in the backup setting table.

  When the clear switch 304 is on at step S27 (step S27; Yes), or when the backup flag is off at step S28 (step S28; No), or the check result is not normal at step S29. Occasionally (step S29; No), initialization processing corresponding to power-on or system reset which is not at the time of power failure recovery is executed. In this initialization process, the RAM 507 is cleared (initialized) (step S31), and a work area to be a work area is set (step S32). In the process of step S31, predetermined data (for example, stored data in a random counter provided in the game control counter setting unit 594) may be set to an arbitrary value or a predetermined initial value. Further, the entire area of the RAM 507 may be initialized, or a part of the area may be initialized while the predetermined data may be left as it is. When the process of step S31 is executed, the operation state of the random number circuit 509 may also be initialized. By the process of step S32, initial values may be set in the game control flag setting unit 592, the game control timer setting unit 593, the game control counter setting unit 594, the game control buffer setting unit 595, and the like. At this time, a control command (initialization designation command) for initializing each sub-side control board such as the effect control board 12 may be transmitted. For example, in the effect control board 12, in response to the reception of the initialization designation command, an image for notifying that control in the pachinko gaming machine 1 has been initialized is displayed on the display screen of the image display device 5, etc. The initialization notification may be executed.

  After restoring the gaming state before power interruption in step S30 or after executing the process of step S32, various circuits incorporated in the game control microcomputer 100 based on the stored data in the program management area of the ROM 506. Operation setting is performed (step S33). As an example, in the process of step S33, the first random number initial setting KRS1 and the second random number initial setting KRS2 stored in the program management area are read out, and the random number circuit setting process as shown in the flowchart of FIG. Ru. The process of step S33 may be performed when the process of step S24 or the process of step S25 is performed.

  In the random number circuit setting process shown in FIG. 49, first, the CPU 505 performs setting for using the random number circuit 509 based on the bit value in the bit number [3] of the first random number initial setting KRS1 (step S51). In this embodiment, the bit value in the bit number [3] of the first random number initial setting KRS1 is previously set to “1”, and the setting using the random number circuit 509 is performed corresponding to the bit value. Subsequently, the random number updating clock RGK is set in the random number circuit 509 based on the bit value of the bit number [2] of the first random number initial setting KRS1 (step S52). For example, the random number clock RCLK generated by the random number clock generation circuit 112 is divided by 2 in response to the bit value in the bit number [2] of the first random number initial setting KRS1 being previously set to "1". The random number update clock RGK is set.

  After the setting in step S52, the random number updating rule is set in the random number circuit 509 based on the bit value in the bit number [1-0] of the first random number initial setting KRS1 (step S53). For example, when the bit value in the bit number [1-0] of the first random number initial setting KRS1 is previously set to "00", the random number update specifying the update order of the numerical data to be the random value in the random number sequence RSN It is set not to change the rule after the second round. Moreover, when the bit value in the bit number [1-0] of the first random number initial setting KRS1 is previously set to “01”, the setting of changing the random number update rule in the random number sequence RSN by software after the second round Is done. Furthermore, when the bit value in the bit number [1-0] of the first random number initial setting KRS1 is previously set to “10”, the random number update rule in the random number sequence RSN is automatically changed from the second round onwards. Is done.

  Subsequently, based on the bit value in the bit number [1] of the second random number initial setting KRS2, the start-up start value in the numerical data to be the random number is determined (step S54). For example, when the bit value in the bit number [1] of the second random number initial setting KRS2 is previously set to “0”, the start value of the random number is set to be the default value “0001H”. When the bit value in the bit number [1] of the second random number initial setting KRS2 is previously set to “1”, the start value of the random number is set to a value based on the ID number.

  Further, based on the bit value in the bit number [0] of the second random number initial setting KRS2, it is set whether or not to change the start value of the numerical data to be the random value every system reset (step S55). For example, when the bit value in the bit number [0] of the second random number initial setting KRS2 is set to “0” in advance, this is a start at the time of power on of pachinko gaming machine 1 (start after backup invalid). The start value at start-up set in step S54 may be used as the start value in the random number circuit 509 regardless of whether it is restart by system reset or not. When the bit value in the bit number [0] of the second random number initial setting KRS2 is previously set to "1", the start value of the random number is set to be changed at each system reset. For example, when the count value of a predetermined free run counter is stored in the random number start value register built in the gaming control microcomputer 100 at the time of system reset, for the random number start value in the process of step S55. By using the stored value of the register as it is or by using the value obtained by substituting the stored value into a predetermined operation function (for example, a hash function), the start value of the random number is a predetermined value every system reset. It may be determined so as to change randomly within a range (for example, a range including all or part of numerical data included in count value permutation RCN generated by random number generation circuit 553). When the setting in the process of step S55 is completed, the random number circuit 509 may start an operation of generating a random number value.

  The setting by the random number circuit setting process may be performed autonomously based on the storage data of the program management area without the intervention of the process of the CPU 505. In this case, the random number circuit 509 may not perform the initial setting when the gaming control microcomputer 100 is in the security mode, and may not perform a random value generation operation. Then, when the CPU 505 reads out the user program stored in the ROM 506 in the game control microcomputer 100 and execution of the game control main process is started, for example, the CPU 505 instructs the random number circuit 509 to perform initial setting. The random number circuit 509 may perform the initial setting in response to the signal transmission and the like, and then the random number value generation operation may be started. Alternatively, especially when the random number circuit 509 is externally attached to the game control microcomputer 100, the random number circuit 509 is independent of the processing in the CPU 505 even when the game control microcomputer 100 is in the security mode. The random number value generation operation may be started after the initial setting based on the storage data of the program management area. Further, the process of step S33 shown in FIG. 48 includes a process of reading out the interrupt initial setting KIIS stored in the program management area and performing setting relating to priority control of the maskable interrupt factor in the reset / interrupt controller 504. May be When setting the priority of maskable interrupt factors, the setting of the highest priority interrupt is performed corresponding to the bit value in the bit number [3-0] of the interrupt initial setting KIIS. For example, by setting the bit value of the bit number [3-0] of the interrupt initialization setting KIIS in advance to either “04H” or “05H”, the interrupt processing due to the interrupt cause generated in the serial communication circuit 511 has top priority. It can be done. Thus, the priority of the interrupt processing can be arbitrarily set by performing priority control of the maskable interrupt factor according to the bit value in the bit number [3-0] of the interrupt initial setting KIIS, and design freedom is increased. be able to.

  After the setting in step S33, the random number circuit abnormality inspection process for inspecting the presence or absence of operation abnormality in the random number circuit 509 is executed (step S34). FIG. 50 is a flowchart showing an example of the random number circuit abnormality inspection process executed in step S34.

  In the random number circuit abnormality inspection process shown in FIG. 50, the CPU 505 first clears, for example, the random number clock abnormality determination counter provided in the game control counter setting unit 594 or the like, and the random number clock abnormality determination count which is the count value. The value is initialized to "0" (step S61). Subsequently, the internal information data CIF4 stored in the bit number [4] of the internal information register CIF is read (step S62). Then, it is determined whether the read value in step S62 is "1" (step S63). At this time, when the frequency monitoring circuit 551 included in the random number circuit 509 detects a frequency abnormality in the random number clock RCLK from the random number external clock terminal ERC, the bit value "1" is written as the internal information data CIF4. .

  Therefore, if it is determined in step S63 that the read value is "1" (step S63; Yes), the random number clock abnormality determination count value is updated so as to be incremented by one (step S64). At this time, it is determined whether the count value after the update in step S64 has reached a predetermined clock abnormality determination value (step S65). Here, the clock abnormality determination value may be a numerical value previously determined in order to determine that the clock abnormality is present when the frequency abnormality of the random number clock RCLK is continuously detected by the frequency monitoring circuit 551. If it is determined in step S65 that the clock abnormality determination value has not been reached, the process returns to step S62, and determination based on the bit value of the internal information data CIF4 is performed again.

  If the clock abnormality determination value is reached in step S65 (step S65; Yes), a predetermined random number clock error error process is executed (step S66), and the random number circuit abnormality inspection process is ended. In the random number clock error process, for example, a setting for transmitting a predetermined effect control command to the effect control board 12 is performed to notify that the effect device detects an abnormal frequency of the random number clock RCLK. It is also possible not to proceed to the subsequent processing until a predetermined error release procedure (for example, system reset or operation of an error release switch) is taken. Further, the operation of the CPU 505 may be shifted to the halt state (HALT) without executing the process for random number clock error.

  If it is determined in step S63 that the read value is "0" (step S63; No), for example, the random value abnormality determination counter provided in the game control counter setting unit 594 or the like is cleared and the count value is used. A certain random value abnormality judgment count value is initialized to "0" (step S67). In the process of step S63, the read value is "0" when the bit value of the internal information data CIF 4 read in step S62 becomes "0" continuously a plurality of times (for example, twice). It may be determined that

  Following the process of step S67, a check value used to check the presence or absence of abnormality in the random number value is set to an initial value "0000H" (step S68). Then, numerical value data to be stored random number values is read out from the random number value register 559A to be the random number value register R1D included in the random number circuit 509 and the random number value register 559B to be the random number value register R2D (step S69). For example, in the process of step S69, the bit value of random number latch selection data RDLS1 or random number latch selection data RDLS0 stored in bit number [1] or bit number [0] of random number latch selection register RDLS is set to “0”. Specify import of random value by. Subsequently, the bit value of random number value fetching specification data RDLT1 or random number value fetching specification data RDLT0 stored in bit number [1] or bit number [0] of random number value fetching specification register RDLT is set to “1”. Designate loading into the random value register R2D or the random value register R1D. Note that setting the bit value of bit number [1] or bit number [0] of random number value fetch specification register RDLT to “1” instructs CPU 505 to fetch (latch) numerical data to random number circuit 509. Equivalent to outputting a latch signal. Thereafter, numerical data to be stored random number values is obtained by turning on the register read signal RRS2 supplied to the random number value register R2D or turning on the register read signal RRS1 supplied to the random number value register R1D. Should be read out. The numerical data stored in each of the random number value register R2D and the random number value register R1D may be read simultaneously to check the presence or absence of an abnormality in the random number value, or after checking the presence or absence of an abnormality in one of the registers. The other register may be checked for the presence or absence of an abnormality.

  After the numerical data is read out in step S69, the read value is set to the random number inspection reference value (step S70). Subsequently, numerical data to be a random value is read out from the random value register 559A or the random value register 559B (step S71). The read operation in step S71 may be performed in the same procedure as the read operation in step S69. In addition, between the reading operation in step S69 and the reading operation in step S71, it is preferable to provide a delay time sufficient for the numerical data in the random number sequence RSN generated by the random number circuit 509 to change. After reading out the numerical data in step S71, an exclusive OR operation is performed on the random number inspection reference value and the read value in step S71 (step S72). Further, the logical sum operation of the operation result in step S72 and the check value is executed, and the operation result is updated to be a new check value (step S73). For example, the check value may be stored in a predetermined area of the RAM 507, and the calculation result obtained in the process may be saved as a new check value each time the process of step S73 is executed. Thereby, changes of all bits in the numerical data read out from the random number value register 559A or the random number value register 559B are recorded, and in the case of a bit whose value has changed at least once in multiple readings, the corresponding check value The bit value is "1".

  Therefore, it is determined whether or not the check value has become "FFFFH" (step S74), and if it is (step S74; Yes), the change of the bit value is recognized for all bits, so the random value is normal. It is judged that the random number circuit abnormality inspection process is ended. When it is confirmed that the random number value is properly updated, random number latch selection data RDLS1 or random number latch selection stored in bit number [1] or bit number [0] of random number latch selection register RDLS Assuming that the bit value of data RDLS0 is "1", random number value loading to random number value register R2D according to the signal input to input port P1 and random number value register R1D according to the signal input to input port P0. It is also possible to indicate numerical value acquisition. In this embodiment, a wire for transmitting the first start winning signal SS1 from the first start port switch 22A is connected to the input port P0, and the second start winning signal SS2 from the second start port switch 22B is connected to the input port P1. Are connected to transmit signals. Thus, when the first start winning signal SS1 is turned on, the random number value is taken into the random number value register R1D, while when the second start winning signal SS2 is turned on, the random number value register R2D is entered. Random number value capture can be performed.

  If it is determined in step S74 that the check value is other than "FFFFH" (step S74; No), the random value abnormality determination count value is updated so as to be incremented by 1 (step S75). At this time, it is determined whether the count value after the update in step S75 has reached a predetermined random number value abnormality determination value (step S76). Here, the random number value abnormality determination value is determined such that all bits of the numerical data read from the random number value register 559A or the random number value register 559B change at least once if the random number circuit 509 operates normally. The value may be a predetermined value so as to be the number of times. If the random number value abnormality determination value is not reached in step S76, the process returns to step S71, the numerical data to be the random number value is read again from the random number circuit 509, and determination for checking the presence or absence of abnormality is performed.

  When the random number value abnormality judgment value is reached in step S76 (step S76; Yes), after the predetermined random number value error process is executed (step S77), the random number circuit abnormality inspection process is ended. In the random number value error process, for example, a setting for transmitting a predetermined effect control command to the effect control board 12 is performed to notify that the abnormality of the random value is detected by the effect device, and Until the error cancellation procedure (for example, system reset or operation of the error cancellation switch) is taken, the process may not proceed. Further, the operation of the CPU 505 may be shifted to the halt state (HALT) without executing the process on random number value error.

  The random number circuit abnormality inspection process in step S34 is not limited to one executed by the CPU 505, and the random number circuit abnormality inspection process may be executed by a built-in circuit in the gaming control microcomputer 100 other than the CPU 505. As an example, the random number circuit 509 has a function of executing a random number circuit abnormality inspection process, and when the frequency abnormality of the random number clock RCLK is detected or when an abnormality of the random number value is detected, the CPU 505 generates an error. May be notified. Further, the random number circuit abnormality inspection process is not limited to the one executed in step S34 alone, and for example, the game control timer interrupt process (described later) each time a timer interrupt occurs in the game control microcomputer 100 A part or all of the random number circuit abnormality inspection process may be performed at step 51).

  After the random number circuit abnormality inspection process as described above is performed in step S34 shown in FIG. 48, based on the signal state of the switch signal transmitted from the game start switch 31 installed on the main board 11, the game start switch It is determined whether 31 is turned on (step S35). In the process of step S35, the switch signal transmitted from the game start switch 35 may be checked a plurality of times, and when it is continuously turned on, it may be determined that the game start switch 31 has been turned on. Also, the process of step S35 is performed only at the start (cold start) from the initial state without recovery as in the case where the processes of step S31 and step S32 are performed, for example, the process of step S30 As in the case of execution, when starting to restore the gaming state before power interruption (at the time of hot start), regardless of the operation of the game start switch 31, control the progress of the game such as timer interrupt processing for game control You may proceed to the processing to be performed. Here, when the area serving as a random counter provided in the game control counter setting unit 594 is backed up by the backup power supply in the RAM 507 provided in the game control microcomputer 100, it is before power failure if it is a hot start. Since updating of numerical data that is a random number is started using stored data in the random counter, it becomes difficult to specify the random number stored in the random counter from the operation start timing of the pachinko gaming machine 1. On the other hand, at the time of cold start, for example, the random counter is cleared (initialized) in the process of step S31, etc., and updating of the random number is started from a fixed initial value (for example, "0"). The random number value stored in the random counter may be identified from the operation start timing of the pachinko gaming machine 1. Therefore, at the time of cold start, the process of step S35 is executed and it waits until the game start switch 31 is turned on, and it is difficult to specify the random number stored in the random counter from the operation start timing of the pachinko gaming machine 1 Make it Thus, when updating the jackpot determination random number value (for example, the special view display result determination random number value MR1) with only software, a so-called "hanging board" is connected to start the operation of the pachinko gaming machine 1 Even if an unauthorized signal is input at a timing when a predetermined time has elapsed from the timing, the occurrence of an unauthorized big hit gaming state can be prevented. When it is determined in step S35 that the game start switch 31 has not been turned on, the random number update process is executed before the process returns to step S35, and the random number value stored in the random counter is updated by software. You may do it. Thus, in addition to the elapsed time from the timing at which the game start switch 31 is turned on, it is also possible to specify the elapsed time from the operation start timing of the pachinko gaming machine 1 until the game start switch 31 is turned on. Even if it is cold start, it becomes difficult to specify the random value stored in the random counter, and it is possible to reliably prevent actions such as generating a big hit gaming state illegally by shooting or inputting an illegal signal. it can.

  If it is determined in step S35 that the game start switch 31 is off (step S35; No), the process of step S35 is repeatedly executed, and the process waits until the game start switch 31 is turned on. Thereby, even after the predetermined initialization processing is executed in the game control microcomputer 100, the progress of the game, such as the game control timer interrupt process, is controlled until the game start switch 31 is turned on. Execution of processing does not start. In the initial setting process executed by the game control microcomputer 100, for example, the whole of the security check process shown in FIG. 47, the process of steps S21 to S35 in the game control main process shown in FIG. 48, etc. And should be included.

  If it is determined in step S35 that the game start switch 31 is on (step S35; Yes), or if the process of step S35 is not performed, the interrupt permission state is set (step S36) to request various interruptions. Wait for the occurrence of Note that the process of step S36 may also be included in the initial setting process executed by the game control microcomputer 100. After execution of the process of step S36, for example, based on the setting of the CTC 508 in step S25, a timer interrupt for game control may be generated every two milliseconds. After the process of step S36 is performed, the random number update process is repeatedly performed (step S37).

  After the processing in step S25 is executed to enter the interrupt enabled state, for example, when a plurality of maskable interrupt factors occur simultaneously in part or all of CTC 508, random number circuit 509, serial communication circuit 511, etc. Based on the designation by the bit value in the bit number [3-0] of the initial setting KIIS, the reset / interrupt controller 504 accepts an interrupt source with a high priority. When the reset / interrupt controller 504 receives an interrupt factor, for example, an interrupt request signal in an on state is output to an I class interrupt (IRQ) terminal or the like included in the CPU 505. When an interrupt request signal in the on state is input to the IRQ terminal in the CPU 505, the generated interrupt cause is identified based on, for example, the result of checking stored data in the internal register, and a vector address corresponding to the identified interrupt cause. By executing a program having the first address as the start address, interrupt processing based on each interrupt factor can be started.

  As a specific example, when the bit value in the bit number [3-0] of the interrupt initial setting KIIS indicates "04H", first, the bit number [5] or the bit number [4] of the first channel status register SAST. Through bit number [0] to determine whether at least one bit value is “1”. At this time, if there is a portion where the bit value is “1”, it is determined that the interrupt processing corresponding to the interrupt cause of the first channel reception interrupt generated in the serial communication circuit 511 is to be executed. The vector address in the interrupt vector is set based on the bit value in the bit number [7-4] of the initial setting KIIS, and the program having the vector address as the start address is executed. Also, when the bit values in bit number [5] and bit number [4] to bit number [0] of first channel status register SAST are all “0”, the bit number “7” of first channel status register SAST is set. And a bit number “6”, and it is determined whether or not any bit value is “1”. At this time, if there is a portion where the bit value is “1”, the interrupt processing corresponding to the interrupt cause of the first channel transmission interrupt generated in the serial communication circuit 511 is executed. On the other hand, if any bit value is "0", read out bit number [7] and bit number [6] of the second channel status register SAST, and whether any bit value is "1"? It is determined whether or not. At this time, if there is a portion where the bit value is “1”, the interrupt processing corresponding to the interrupt cause of the second channel transmission interrupt generated in the serial communication circuit 511 is executed. Furthermore, when the interrupt factor is not in the serial communication circuit 511, the interrupt factor is generated in a predetermined priority order such as the interrupt factor in the random number circuit 509, the interrupt factor in CTC 508, and the external interrupt factor in the external maskable interrupt terminal XINT. The presence or absence is determined, and interrupt processing corresponding to the interrupt source whose occurrence has been identified is executed. Thus, when the bit value in the bit number [3-0] of the interrupt initial setting KIIS is "04H", the first channel reception interrupt in the serial communication circuit 511, the first channel transmission interrupt, the second channel transmission interrupt, Identify the presence or absence of interrupt cause generation by the priority order of the interrupt from the random number circuit 509, the interrupt from the CTC 508, and the interrupt from the external maskable interrupt terminal XINT, and execute the interrupt processing corresponding to the identified interrupt cause. Can.

  If any of four types of errors such as an overrun error, a break code error, a framing error, and a parity error occur during reception of communication data by the first channel transmission / reception circuit 571A included in the serial communication circuit 511, A 1 channel receive interrupt occurs. At this time, the CPU 505 may execute predetermined serial communication error interrupt processing. In this serial communication error interrupt processing, for example, the bit values of bit number [7] and bit number [6] of first channel communication setting register SAFM and bit number [7] of second channel communication setting register SBFM are either Also, the transmission function and the reception function in the serial communication circuit 511 may be set as not using either by setting “0” or the like. In addition, when an error occurs during reception of communication data by the first channel transmission / reception circuit 571A, control may be performed to prohibit the payout of gaming balls by the payout device including the payout motor 51. Thus, when an abnormality occurs due to a reception error of communication data or the like, it is possible to prevent an excessive payout of the game ball which will be the winning ball.

  In the game control microcomputer 100, for example, the CPU 505 executes a game control timer interrupt process shown in the flowchart of FIG. 51 based on, for example, that the reset / interrupt controller 504 receives an interrupt request from the CTC 508. In the game control timer interrupt process shown in FIG. 51, the CPU 505 first performs a predetermined switch process after being put in the interrupt prohibition state, whereby each switch 21, 22A, for detecting the game ball via the switch circuit 114 The state of the detection signal (winning detection signal) input from 22B, 23 or the like is determined (step S91). Subsequently, by executing predetermined main side error processing, abnormality diagnosis of the pachinko gaming machine 1 is performed, and a warning can be generated if necessary according to the diagnosis result (step S92). For example, in the main-side error processing, settings may be made to notify occurrence of an abnormal operation in response to occurrence of an excessive number of balls, insufficient balls, or other operation errors. Thereafter, by executing predetermined information output processing, data such as big hit information, start information, probability fluctuation information and the like supplied to the hole management computer installed outside the pachinko gaming machine 1 is output (step S93).

  Following the information output process, a random number update process is executed (step S94). Thereafter, the CPU 505 executes special symbol process processing (step S95). In the special symbol process processing, the value of the special drawing process flag provided in the game control flag setting unit 592 is updated according to the progress of the game in the pachinko gaming machine 1, and the first special symbol display device 4A or the second special symbol Various processes are selected and executed in order to perform control of display operation in the display device 4B and opening / closing operation setting of the special winning opening in the special variable winning prize ball device 7 in a predetermined procedure.

  Following the special symbol process processing, a normal symbol process processing is executed (step S96). The CPU 505 controls the display operation (for example, lighting and extinguishing of the segment LED, etc.) in the normal symbol display 20 by executing the normal symbol process processing, and the variable display of the normal symbol and the movable in the normal variable winning ball device 6B. Allows setting of tilting movement of winglet etc. After executing the normal symbol process processing, the CPU 505 executes an award ball processing for setting the number of award balls, etc. in accordance with the input of the prize detection signal based on, for example, the execution result of the switch processing in step S91. ). After the prize ball processing, by executing the main side communication control processing, the control command is transmitted from the main substrate 11 to the sub-side control substrate such as the effect control substrate 12 or the payout control substrate 15, or the payout control Communication control is performed to receive a control command transmitted from the substrate 15.

  As an example, in the main side communication control processing, serial communication is performed corresponding to the setting in the command transmission table designated by the storage data of the payout transmission command buffer included in the transmission command buffer provided in the game control buffer setting unit 595. Transmission of a payout control command is enabled by, for example, sending a transmission operation instruction to the first channel transmission / reception circuit 571A included in the circuit 511. More specifically, when the bit value in the communication status data SAST7 stored in the bit number [7] of the first channel status register SAST becomes "1" to indicate the completion of transmission, or the first channel status When the bit value in the communication data status data SAST6 stored in the bit number [6] of the register SAST becomes “1” to indicate the completion of the transmission shift register transfer, all or one of the table data of the command transmission table Unit to the first channel data register SADT. As a result, the communication status data SAST7 is cleared and the bit value becomes "0", and data transfer from the first channel data register SADT to the transmission data register 582A included in the first channel transmission / reception circuit 571A is started. When the transfer to the transmission data register 582A is completed, the communication status data SAST6 is cleared, the bit value becomes "0", and the data transfer from the transmission data register 582A to the transmission shift register 581A is started. When the transfer to the transmission shift register 581A is completed, the bit value of the communication status data SAST6 is set to "1", and each bit data is transmitted sequentially from the transmission shift register 581A to the first channel transmission terminal TXA. Be done. As a result, using the first channel transmission / reception circuit 571A of the serial communication circuit 511, the payout control command is transmitted to the payout control board 15 in the form of a serial signal.

  Further, the storage content of the payout reception command buffer provided in the game control buffer setting unit 595 or the like is checked to determine whether or not the reception command is stored, and when the reception command is stored, the reception command is read. The storage of the reception command in the payout reception command buffer is based on the first channel reception interrupt generated in response to the communication data as the payment notification command being received by the first channel transmission / reception circuit 571A in the serial communication circuit 511. It may be performed by an interrupt process that is executed. In this case, in the serial communication circuit 511, when communication data sequentially stored from the first channel reception terminal RXA to the reception shift register 585A is transferred to the reception data register 584A, a bit of the first channel status register The bit value in the communication status data SAST5 stored in the number [5] is set to "1". At this time, when the communication interrupt control data SAIC5 stored in the bit number [5] of the first channel interrupt control register SAIC is "1", the interrupt request by the first channel reception interrupt is permitted. Then, in response to the first channel reception interrupt, the CPU 505 may execute predetermined interrupt processing to read out the communication data stored in the reception data register 584A and store it in the payout reception command buffer. When communication data is read out from the reception data register 584A, the communication status data SAIC5 is cleared and the bit value becomes "0". Thus, the communication data to be the payment notification command received by the first channel transmission / reception circuit 571A of the serial communication circuit 511 can be captured and stored in the payment reception command buffer. When the receiving command stored in the receiving command buffer for payout is read out in the main side communication control process, for example, processing corresponding to the process of setting or clearing a flag corresponding to the type of the read receiving command read, etc. corresponds to the type of receiving command. Execute the process When the reception command is read from the payout reception command buffer, the exclusive OR of the first byte and the second byte in the reception command is calculated, and it is determined whether the calculated result is a normal value or not It may be checked whether the received command is a proper command or not by determining. In this embodiment, since the command transmitted from the payout control board 15 to the main board 11 is configured to be the second byte by inverting the first byte, one byte of the reception command is obtained. As a result of calculating the exclusive OR of the second and third bytes, if all bit values become “1”, it can be determined that the received command is an appropriate command. Alternatively, after serial communication error interrupt processing is executed based on the occurrence of an error in serial communication circuit 511, processing for sending a payout control command and processing for receiving a payout notification command are not executed. You may In this case, when an error occurs during the reception operation in the serial communication circuit 511, control is made to stop transmission of the payout control command to the payout control board 15 and reception of the payout notification command from the payout control board 15. be able to.

  As another example, in the main side communication control processing, the second channel transmission included in the serial communication circuit 511 corresponding to the setting in the command transmission table designated by the storage data of the effect transmission command buffer included in the transmission command buffer. Transmission of the effect control command is enabled by sending a transmission operation instruction to the circuit 571B or the like. More specifically, when the bit value in the communication status data SBST7 stored in the bit number [7] of the second channel status register SBST becomes "1" to indicate the completion of transmission, or the second channel status When the bit value in the communication data status data SBST6 stored in the bit number [6] of the register SBST becomes “1” to indicate the completion of the transmission shift register transfer, all or one of the table data of the command transmission table Unit to the second channel data register SBDT. As a result, the communication status data SBST7 is cleared and the bit value becomes "0", and data transfer from the second channel data register SBDT to the transmission data register 582B included in the second channel transmission circuit 571B is started. When the transfer to the transmission data register 582B is completed, the communication status data SBST6 is cleared, the bit value becomes "0", and the data transfer from the transmission data register 582B to the transmission shift register 581B is started. When transfer to transmission shift register 581B is completed, the bit value of communication status data SBST6 is set to "1", and each bit data is transmitted sequentially from transmission shift register 581B to the second channel transmission terminal TXB. Be done. As a result, using the second channel transmission circuit 571B of the serial communication circuit 511, the effect control command is transmitted to the effect control board 12 in serial signal format. As described above, the register (for example, the second channel data register SBDT, the transmission data register 582B, etc.) used to transmit the effect control command to the effect control board 12 directs the payout control board 15 to the payout control command. And a register (eg, reception data register 584A) used to receive a payout notification command transmitted from the payout control board 15 (eg, the first channel data register SADT or the transmission data register 582A). Are different registers.

  When such main side communication control processing is completed, the game control timer interruption processing is ended after being in the interruption permitted state.

  FIG. 52 is a flowchart showing an example of the process executed in step S37 shown in FIG. 48 or step S94 shown in FIG. 51 as the random number update process. In the random number update process shown in FIG. 52, the CPU 505 first sets the interrupt disabled state (step S501). When the game control microcomputer 100 is automatically disabled in response to the start of the random number update process, the process of step S501 may not be performed. Subsequently, for example, by updating stored data in a predetermined area of the random counter included in the game control counter setting unit 594, the random number value MR2 for determining the jackpot type is incremented by one (step S502). Thus, in this embodiment, the random number value MR2 for determining the jackpot type is updated so as to be incremented by one each time a timer interrupt occurs. After execution of the process of step S502, the random number value MR3 for reach determination is set as a random value to be updated (step S503).

  Then, the CPU 505 reads numerical value data indicating a random number value MR6 for determining the addition value from, for example, a random counter provided in the game control counter 594 (step S504). At this time, it is determined whether the read value in step S504 is less than the addition determination value determined for each random number to be updated (step S505). Here, as shown in FIG. 14, addition determination values are determined in advance corresponding to the random number values MR3 to MR5. If the read value is less than the addition determination value in step S505 (step S505; Yes), the random number MR6 read in step S504 is set as the addition value (step S506). On the other hand, if the read value is greater than or equal to the addition determination value in step S505 (step S505; No), a value obtained by subtracting the addition determination value from the random value MR6 read in step S504 is set as the addition value. (Step S507).

  After one of the processes in steps S506 and S507 is performed, the addition value is added to the random number value to be subjected to the update process to obtain an added random value (step S508). At this time, it is determined whether the post-addition random number value obtained in step S508 is less than the maximum determination value determined for each random number value to be updated (step S509). Here, as shown in FIG. 14, the maximum judgment value is previously determined corresponding to each of random number values MR3 to MR5. If the post-addition random number value is smaller than the maximum judgment value in step S509 (step S509; Yes), the post-addition random number value obtained in step S508 is set as the post-update random number value (step S510). On the other hand, if the post-addition random number value is equal to or greater than the maximum judgment value in step S509 (step S509; No), the value obtained by subtracting the maximum judgment value from the post-addition random number value obtained in step S508 is updated The post-random number value is set (step S511).

  After one of the processes in steps S510 and S511 is performed, the post-update random number value is set in a predetermined area storing the random number value to be subjected to the update process by the random counter (step S512). In this way, the update of the random value to be updated is completed. Following the process of step S512, it is determined whether there is an unprocessed random value (step S513). In this embodiment, by sequentially setting random number values MR3 to MR5 as random number values to be subjected to update processing, all the random number values MR3 to MR5 are updated each time the random number update processing is executed once. To be done. If there is an unprocessed random number value in step S513 (step S513; Yes), the next random number value is set to the random number value to be updated (step S514), and the process returns to step S504. . On the other hand, when there is no unprocessed random number value in step S513 (step S513; No), the interruption is permitted (step S515), and the random number updating process is ended.

  FIG. 53 is a flowchart showing an example of the process executed in step S95 shown in FIG. 51 as the special symbol process process. In the special symbol process process, the CPU 505 first executes a start winning determination process (step S101). 54 and 55 are flowcharts showing an example of the start winning determination process executed in step S101.

  In the start winning determination process shown in FIGS. 54 and 55, the CPU 505 first reads input port data stored in the input port register PI (step S201). The input port data read at this time may be stored in, for example, a start winning buffer provided in the game control buffer setting unit 595 or the like. Then, it is determined whether the bit value in the bit number [1] of the input port data read in step S201 is "1" (step S202). In this embodiment, a wire for transmitting the second start winning signal SS2 from the second start port switch 22B is connected to the input port P1 of the PIP 510, and the bit value in the bit number [1] of the input port data is By confirming, it is possible to specify the presence or absence of the game ball detection by the second starting opening switch 22B. Then, when the second start winning signal SS2 is in the on state, the bit value in the bit number [1] of the input port data becomes “1”.

  Therefore, if it is determined in step S202 that it is "1" (step S202; Yes), the second start winning determination is the value of the second start winning determination counter provided in the game control counter setting unit 594. The count value is updated so as to count up, for example, by adding 1 (step S203). On the other hand, when it is determined in step S202 that it is "0" (step S202; No), the second start winning determination counter is cleared and its count value is initialized to "0". (Step S204).

  After one of the processes in steps S203 and S204 is executed, it is determined whether the bit value in the bit number [0] of the input port data read in step S201 is "1" (step S205). In this embodiment, a wire for transmitting the first start winning signal SS1 from the first start port switch 22A is connected to the input port P0 of the PIP 510, and the bit value in the bit number [0] of the input port data is By checking, it is possible to specify the presence or absence of the game ball detection by the first starting opening switch 22A. When the first start winning signal SS1 is in the on state, the bit value in the bit number [0] of the input port data becomes “1”.

  Therefore, when it is determined in step S205 that the value is "1" (step S205; Yes), the first start winning determination is the value of the first start winning determination counter provided in the game control counter setting unit 594. The count value is updated so as to count up, for example, by adding 1 (step S206). On the other hand, when it is determined in step S205 that it is "0" (step S205; No), the first start winning determination counter is cleared and the count value is initialized to "0". (Step S207).

  After executing any of the processes of steps S206 and S207, it is determined whether the first start winning determination count value has reached a predetermined determination value (for example, "2") predetermined as a winning determination value. (Step S208). At this time, if the first start winning determination count value has reached the winning determination value (step S208; Yes), the value (starting opening buffer value) of the starting opening buffer provided in the game control buffer setting unit 595 It is set to "1" (step S209). Also, the first start winning determination counter is cleared, and its count value is initialized to "0" (step S210).

  If the first start winning determination count value has not reached the winning determination value in step S208 (step S208; No), it is determined whether the second start winning determination count value has reached the winning determination value (step S211) ). At this time, if the second start winning determination count value has not reached the winning determination value (step S211; No), the start winning determination process is ended. On the other hand, if the second start-up winning determination count value has reached the winning determination value (step S211; Yes), the starting opening buffer value is set to "2" (step S212). Also, the second start winning determination counter is cleared, and its count value is initialized to "0" (step S213).

  After executing any of the processes of steps S210 and S213, the CPU 505 reads out the pending storage number count value according to the starting opening buffer value (step S214). For example, when the starting opening buffer value is "1", the value of the first holding storage number counter (first holding storage number count value) provided in the game control counter setting unit 594 is read out, and the starting opening buffer value is " If it is "2", the value of the second hold memory number counter (second hold memory number count value) provided in the game control counter setting unit 594 is read out. Then, it is determined whether the read value in step S214 has reached a predetermined upper limit (for example, "4") (step S215 in FIG. 55). At this time, if the read value in step S214 does not reach the upper limit value, the start condition for starting variable display of the special symbol or the decorative symbol is effectively established. For example, after it is determined in step S208 shown in FIG. 54 that the first start winning determination number has reached the determination number, if it is determined in step S215 that the read value has not reached the upper limit, 1) A special drawing game using the first special drawing by the special symbol display device 4A, and a first start condition for performing variable display of a decorative symbol are satisfied. When it is determined in step S215 that the read value has not reached the upper limit value after it is determined in step S211 shown in FIG. 54 that the second start winning determination count value has reached the winning determination value, 2) A special drawing game using a second special drawing by the special symbol display device 4B and a second start condition for executing variable display of a decorative symbol are satisfied.

  As described above, when the read value does not reach the upper limit value in step S215 (step S215; No), the pending storage number count value corresponding to the starting opening buffer value is incremented by 1 (step S216). For example, when the starting opening buffer value is “1”, the first pending storage number count value is incremented by one, and when the starting opening buffer value is “2”, the second pending storage number count value is incremented by one. Then, the CPU 505 adds 1 to the value of the total pending storage number counter (total pending storage number count value) indicating the total pending storage number, which is the sum of the first pending storage number and the second pending storage number (step S217). ).

  Following the process of step S217, the CPU 505 sets and stores start data corresponding to the start opening buffer value at the top of the free space in the start data storage unit 591C (step S218). For example, when the start port buffer value is "1", start data indicating "first" is set, and when the start port buffer value is "2," start data indicating "second" is set. Then, the CPU 505 executes a random number setting process (step S219). After the random number setting process is performed in step S219, setting for transmitting a starting opening winning combination designation command corresponding to the starting opening buffer value is performed (step S220). For example, when the starting opening buffer value is “1”, the storage address (head address) of the first starting opening winning specified command table in the ROM 506 is stored in the transmission command buffer in the buffer area specified by the transmission command pointer. On the other hand, when the starting opening buffer value is “2”, the storage address (head address) of the second starting opening winning specified command table in the ROM 506 is stored in the transmission command buffer in the buffer area specified by the transmission command pointer. The start opening winning combination designation command thus set is transmitted from the main board 11 to the effect control board 12 by executing the main side communication control process of step S98 shown in FIG. 51 after the special symbol process process is completed, for example. Is transmitted.

  The CPU 505 also sends a hold storage number notification command to the effect control board 12 by, for example, storing the storage address of the hold storage number notification command table in the ROM 506 in the buffer area designated by the transmission command pointer in the transmission command buffer. Setting for transmitting (step S221). The first starting opening winning combination designation command table is configured to include setting data for transmitting the first starting opening winning combination designation command and setting data for transmitting the pending storage number notification command. When the second starting opening winning combination designation command table is configured to include setting data for transmitting the second starting opening winning combination designation command and setting data for transmitting the pending storage number notification command In the processing of steps S220 and S221, only the storage address of the command table corresponding to the starting opening buffer value out of the first starting opening winning combination specifying command table and the second starting opening winning specification command table is stored in the buffer area of the transmission command buffer do it. For example, the main storage communication notification process of step S98 shown in FIG. 51 is executed after the special symbol process process is finished, and the first start opening winning combination designating command or the first start opening prize notification command is thus set. Subsequently to the start opening winning combination designation command, the main substrate 11 transmits the command to the effect control substrate 12.

  If the read value has reached the upper limit value in step S215 (step S215; Yes) or after the processing in step S221, it is determined whether the start port buffer value is "1" or "2". It determines (step S222). At this time, if the start port buffer value is "1" (step S222; "1"), the start port buffer is cleared and the buffer value is initialized to "0" (step S223), as shown in FIG. The process proceeds to step S211 shown in FIG. On the other hand, when the starting port buffer value is "2" (step S222; "2"), the starting port buffer is cleared and the buffer value is initialized to "0" (step S224), The start winning determination process ends.

  In this embodiment, when both of the first starting opening switch 22A and the second starting opening switch 22B simultaneously detect the start winning combination of the effective gaming ball, both processing can be performed within 2 milliseconds. A process is executed based on the fact that the switch has detected a start winning for a valid game ball. That is, when it is determined in step S208 shown in FIG. 54 that the first start winning determination count value has reached the winning determination value, the processing in steps S209, S210, and S214 shown in FIG. After executing the process of steps S215 to S221 shown in FIG. 54, the process of step S223 is performed in response to the start port buffer value being "1" in step S222, and then the process of step S211 shown in FIG. Proceed to processing. When it is determined in step S211 that the second start winning determination count value has reached the winning determination value, the processing of steps S212 to S214 shown in FIG. 54 is performed, and then steps S215 to S221 shown in FIG. After executing the process of step S224, the process of step S224 is performed in response to the value of the starting opening buffer value being "2" in step S222, and the start winning determination process is then ended. As a result, even when both the first starting opening switch 22A and the second starting opening switch 22B simultaneously detect a starting winning combination of valid gaming balls, it is possible to surely complete the processing based on the detection of both starting starting winning combinations.

  FIG. 56 is a flowchart showing an example of the random number setting process executed in step S219 of FIG. In the random number setting process, the CPU 505 executes a process for processing numerical value data indicating a random number value extracted from the random number circuit 509 by software. 57, the CPU 505 determines, by software, the numerical data representing the random number value extracted from the random number value register 559A to be the random number value register R1D included in the random number circuit 509 and the random number value register 559B to be the random number value register R2D. It is explanatory drawing for demonstrating the operation | movement until it processes into the random number value MR1 for 1st, and the random number value MR6 for addition value determination.

  In the random number setting process shown in FIG. 56, the CPU 505 first sets the interrupt disabled state (step S 351), and then determines whether the starting opening buffer value is “1” or “2” (step S 352) . When the gaming control microcomputer 100 automatically enters the interrupt prohibition state in response to the start of the random number setting process, the process of step S351 may not be executed. Then, if the starting opening buffer value is "1" in step S352 (step S352; "1"), numerical data is read out from the random value register 559A as the random value register R1D provided in the random number circuit 509 shown in FIG. Extraction (step S353). At this time, the CPU 505 may supply the register read signal RRS1 to the random number value register 559A of the random number circuit 509 to read out the numerical value data to be the random number value stored in the random number value register 559A. Also, when the starting opening buffer value is "2" at step S352 (step S352; "2"), numerical data is read out and extracted from the random value register 559A as the random value register R2D included in the random number circuit 509. (Step S354). The numerical data thus extracted from the random number circuit 509 is stored in a 16-bit general purpose register or the like that the CPU 505 has. For example, as shown in FIG. 57, among the numerical data extracted from the random number circuit 505, the upper byte of the numerical data extracted from the random value register 559A and the upper byte of the numerical data extracted from the random value register 559B. The part corresponding to the upper byte of the numerical data is stored as the upper byte GR1-1 in the general purpose register of the CPU 505. Also, among the numerical data extracted from the random number circuit 509, the lower byte of the numerical data, such as the lower byte of the numerical data extracted from the random value register 559A and the lower byte of the numerical data extracted from the random value register 559B. The part corresponding to the is stored in the general purpose register of the CPU 505 as the lower byte GR1-2. The numerical data extracted from the random number circuit 509 is not limited to that stored in the general-purpose register of the CPU 505, and may be stored, for example, in a predetermined area of the RAM 507.

  Subsequently, the CPU 505 reads out the stored value (refresh register value) of the built-in refresh register RR1 as numerical data to be a random number for processing (step S355). The CPU 505 adds the refresh register value read in step S 355 to the upper byte GR 1-1 in the general purpose register (step S 356). At this time, the lower bytes GR1-2 in the general purpose register are left as they are. After that, the CPU 505 executes numerical value data indicating a random number value MR1 for the special view display result determination based on the stored value of the general purpose register, that is, the value obtained by adding the refresh register value as a random number for processing to the upper byte GR1-1. It sets (step S357). As an example, when the random number value MR1 for special view display result determination takes a value in the range of "0" to "65535", the stored value of the general purpose register and "FFFFH" are ANDed or The stored value of the general-purpose register is output as it is and stored in a predetermined area of the RAM 507 or the like to set numerical data representing a 16-bit random number MR1. As another example, when the random number value MR1 for special view display result determination takes a value in the range of "0" to "16383", the stored value of the general purpose register and "7F7FH" are ANDed with each other, By storing in a predetermined area of the RAM 507 or the like, numerical data indicating a 14-bit random number MR1 is set. When the random number value MR1 for special image display result determination takes a value in the range of "0" to "16383", an arbitrary 14-bit value among the stored values of the general purpose register is extracted as the random value MR1. As described above, an AND operation with a predetermined logical value may be performed. Also, instead of the AND operation, an OR operation may be performed. At this time, the area of the RAM 507 in which numerical data indicating the random value MR1 is stored may be included in, for example, a random counter provided in the game control counter setting unit 594. Alternatively, depending on whether the starting opening buffer value is “1” or “2”, CPU 505 sets the free space in either one of first special view storage unit 591A and second special view storage unit 591B. The random value MR1 may be set by storing numerical data indicating the random value MR1 as pending data at the beginning.

  Following the process of step S357, the CPU 505 sets numerical data indicating a random value MR6 for addition value determination based on the stored value of the general purpose register (step S358). As an example, when the numerical value data indicating the random number value MR6 for addition value determination takes a value in the range of "0" to "7", the stored value of the general purpose register and "C0C0H" are logically ANDed with By storing it in a predetermined area of the RAM 507 or the like, numerical data indicating a 4-bit random number MR6 is set. A logical AND operation with a predetermined logical value may be performed so that an arbitrary 4-bit value among the stored values of the general purpose register is extracted as the random value MR6. Also, instead of the AND operation, an OR operation may be performed. At this time, the area of the RAM 507 in which the numerical data indicating the random number MR6 is stored may be included in, for example, a random counter provided in the game control counter setting unit 594.

  Following the process of step S358, numerical data indicating a random number MR2 for determining the jackpot type is extracted from the random counter provided in the game control counter setting unit 594 (step S359). Then, numerical data indicating the random number value MR2 extracted in step S359, etc. is held at the top of the free space in the first special view reserve storage unit 591A or the second special view reserve storage unit 591B according to the starting port buffer value. By being set, the extracted random value is stored (step S360). It should be noted that when numerical data indicating the random number MR1 is stored in the random counter provided in the game control counter setting unit 594 in step S357, the numerical data indicating the random value MR1 extracted from the random counter is the big hit type It may be set as the reserve data at the head of the free space in the first special view reserve storage unit 591A or the second special view reserve storage unit 591B together with numerical data indicating the random number value MR2 for determination. Thereafter, the CPU 505 permits the interrupt (step S361), and ends the random number setting process. The process for setting the random number value MR6 for addition value determination may be executed each time the random number value MR6 is read in the process of step S504 shown in FIG. In this case, when the process of step S504 is executed, the process of steps S355, S356, and S358 shown in FIG. 56 is performed to add an additional value without extracting new numerical data from the random number circuit 509. The numerical data indicating the random number MR6 for determination may be updated. Alternatively, every time the process of step S504 is executed, numerical data may be extracted from the random number circuit 509, and the numerical data indicating the random value MR6 for addition value determination may be updated. At this time, the numerical value data extracted from the random number circuit 509 may be numerical value data stored in a certain random number value register such as storage data in the random number value register 559A or a random number value every time the process of step S504 is executed. The storage data of the register 559A and the storage data of the random value register 559B may be extracted alternately.

  Further, the process of step S356 is not limited to adding the refresh register value to the upper byte GR1-1 in the general-purpose register, but the value obtained by executing an arbitrary operation is the numerical data representing the random value MR1. Just do it. As one example, the random number updating process is executed in step S37 shown in FIG. 48 and step S94 shown in FIG. 51, to prepare a 16-bit soft random number updated by software as in the random number MR2 to MR5. Then, in the process of step S356, first, the soft random value is added to the upper byte GR1-1 and the lower byte GR1-2 in the general-purpose register. Subsequently, for example, the operation result of addition is divided by “10000H (65536)”, and a portion where carryover occurs in the addition operation is excluded (ignored) by operation (modulo operation) for obtaining the remainder. The value obtained as a result of such operation may be numerical data representing the random value MR1.

  After the start winning determination process is executed in step S101 shown in FIG. 53, one of the processes in steps S110 to S120 is selected and executed according to the value of the special process process flag.

  The special symbol normal processing of step S110 is executed when the value of the special drawing process flag is "0". In this special symbol normal processing, the first special symbol display device 4A or the second special symbol is based on the presence / absence of the pending data stored in the first special view pending storage 591A or the second special view pending storage 591B. A determination is made as to whether or not the special figure game is to be started by the display device 4B. Also, in the special symbol normal processing, whether the variable display result such as the special symbol, the decorative symbol, or the color symbol is "big hit" or "small hit" based on the numerical data indicating the random number value MR1 for special image display result determination It is determined whether or not it is not. Furthermore, in the special symbol normal processing, in response to the variable display result of the special symbol in the special figure game, the finalized special symbol (big hit symbol, in the special figure game by the first special symbol display device 4A or the second special symbol display device 4B Either a small hit symbol or a lost symbol) is set.

  The variation pattern setting process of step S111 is executed when the value of the special drawing process flag is "1". In this variation pattern setting process, the result of predetermination of whether or not the variable display result is "big hit" or "small hit", the result of reach determination of whether or not the variable display state of the decorative symbol is in reach state, etc. And the process of determining the variation pattern type to any one of a plurality of types, and the process of determining the variation pattern to any one of a plurality of types according to the determination result of the variation pattern type.

  The special symbol variation process of step S112 is executed when the value of the special drawing process flag is "2". In this special symbol variation process, a process to make settings for varying the special symbol in the first special symbol display device 4A or the second special symbol display device 4B, and an elapsed time from the start of the variation of the special symbol Processing etc. is included. For example, every time the special symbol variation process of step S112 is executed, the value (special figure variation timer value) in the special figure variation timer provided in the game control timer setting unit 593 is decremented or incremented by one. 1 Regardless of whether it is a special figure game using the first special figure in the special symbol display device 4A or a special figure game using the second special figure in the second special symbol display device 4B, a common timer Measurement of elapsed time is performed. Further, it is also determined whether the measured elapsed time has reached the special figure fluctuation time corresponding to the fluctuation pattern. Thus, the special symbol variation process of step S112 is the variation of the special symbol in the special figure game using the first special figure in the first special symbol display device 4A, and the second special figure in the second special symbol display device 4B. The variation of the special symbol in the special figure game using is controlled by a common processing routine. Then, when the elapsed time from the start of the variation of the special symbol reaches the special figure variation time, the value of the special figure process flag is updated to "3".

  The special symbol stopping process of step S113 is executed when the value of the special drawing process flag is "3". In this special symbol stop process, the variation of the special symbol is stopped by the first special symbol display device 4A or the second special symbol display device 4B, and the finalized special symbol as the variable display result of the special symbol is stopped and displayed. It includes the process of setting. Then, it is determined whether or not one of the big hit flag and the small hit flag provided in the game control flag setting unit 592 is turned on, and if the big hit flag is on, the special figure process flag The value is updated to "4", and when the small hit flag is on, the value of the special process process flag is updated to "8". Also, when the big hit flag and the small hit flag are both off, the value of the special processing process flag is updated to “0”.

  The special winning opening open processing of step S114 is executed when the value of the special processing process flag is "4". In this big winning opening opening pre-processing, based on the variable display result becoming "big hit", etc., a process to start the execution of the round in the big hit gaming state and set to open the big winning opening Etc. are included. At this time, for example, the upper limit of the period in which the special winning opening is opened may be set corresponding to the setting of the special winning opening open frequency maximum value. As an example, when the large winning a prize opening opening frequency maximum value is set to 15 corresponding to the 15 round big hit state, the upper limit of the period which makes the big winning a prize opening state is set to 29 seconds. On the other hand, when the large winning a prize opening frequency maximum value is set to 2 which corresponds to 2 round big hit states, the upper limit of the period which makes the big winning a prize open state is 0.5 second Set to

  The special winning opening open processing of step S115 is executed when the value of the special processing process flag is "5". In the process of opening the special winning opening, the process of measuring the elapsed time after the opening of the special winning opening, the measured elapsed time, the number of gaming balls detected by the count switch 23, etc. A process of determining whether it is time to return the winning opening from the open state to the closed state is included. Then, when returning the special winning opening to the closed state, a process of stopping the supply of the solenoid drive signal to the solenoid for the special winning opening door may be executed.

  The special winning opening open post-processing of step S116 is executed when the value of the special processing process flag is "6". In this special winning opening post-processing, it is determined whether the number of times the execution number of the round with the special winning opening has reached the maximum winning opening opening number maximum value, or the special winning opening opening number maximum value. It includes a process of setting for sending a hit end designation command when it has reached.

  The big hit end processing of step S117 is executed when the value of the special processing process flag is "7". In this big hit end process, ending effect is performed as a rendering operation to notify the end of the big hit gaming state by the electronic components (rendering device) for presentation such as the image display device 5 and the speakers 8L and 8R and the gaming effect lamp 9. Processing for waiting until the waiting time corresponding to the time period has elapsed, and processing for performing various settings corresponding to the end of the jackpot gaming state.

  The small hit opening pre-processing of step S118 is executed when the value of the special processing process flag is "8". In this small hit opening pre-processing, setting for starting the execution of the variable winning operation in the small hit gaming state and opening the big winning opening based on the variable display result becoming “small hit” etc. Processing etc. are included. At this time, for example, the upper limit of the period during which the special winning opening is in the open state is “0. It may be set to 5 seconds.

  The small hit open processing in step S119 is executed when the value of the special processing process flag is "9". In this small hit opening process, it is the timing to return the big winning opening from the open state to the closing state based on the process of measuring the elapsed time from opening the big winning opening and the measured elapsed time, etc. Processing for determining whether or not it is included is included. When returning the special winning opening to the closed state, processing for stopping supply of a solenoid drive signal to the solenoid for the special winning opening door may be executed.

  The small hitting end process of step S120 is executed when the value of the special process process flag is "10". In this small hitting end process, a period during which a rendering operation informing the end of the small hitting gaming state is executed by the electronic components for presentation (rendering device) such as the image display device 5, the speakers 8L and 8R, and the gaming effect lamp 9. Includes a process of waiting until a waiting time corresponding to. Here, when the small hit gaming state ends, the state of the probability change flag or the time saving flag is not changed, and the gaming state in the pachinko gaming machine 1 before the small hit gaming state is continued.

  FIG. 58 is a flow chart showing an example of the special symbol normal processing executed in step S110 of FIG. In the special symbol normal processing shown in FIG. 58, CPU 505 first determines, for example, whether or not the total pending storage number count value stored in game control counter setting unit 594 is “0”, that is, the first pending storage number It is determined whether the total pending storage number, which is the sum of the second pending storage number, is "0" (step S231). At this time, if the total suspension storage number count value is other than "0" (step S231; No), the start data is read from the start data storage unit 591C (step S232). Here, the start data stored in the start data storage unit 591C in association with the hold number “1” may be read.

  In this embodiment, the first start condition and the second start condition will be described as being sequentially executed from the special view game corresponding to the start condition established first, without distinction between the first start condition and the second start condition. On the other hand, on the condition that the second reserved memory number is not "0", for example, the special figure game using the second special figure is preferentially executed over the special figure game using the first special figure. You may do so. In this case, for example, if the total pending storage number count value is other than “0” in step S231, it is determined whether the second pending storage number count value is “0”. Then, if the second pending storage count value is “0”, the same process as when starting data indicating “first” is read out from the starting data storage unit 591 C is executed, while the second holding is performed. If the stored number count value is other than “0”, processing similar to that in the case where the start data indicating “second” is read out from the start data storage unit 591 C may be executed. Alternatively, it is determined which one of the first number of pending storages and the second number of pending storages is larger, and the special figure game using the special symbol corresponding to the larger number of pending storages is given priority. It may be performed. In this case, for example, if the total pending storage number count value is other than “0” in step S231, the first pending storage number count value is compared with the second pending storage number count value. Then, if the first pending storage number count value is larger, the same process as when starting data indicating “first” is read out from the starting data storage unit 591 C is executed, while the second holding is performed. If the stored number count value is larger, the same process as in the case where the start data indicating “second” is read out from the start data storage unit 591 C may be executed. At this time, when the first reserved memory number count value and the second reserved memory number count value match, the special figure game using the first special figure may be preferentially executed, or the second special figure You may give priority to the special figure game using. As described above, by giving priority to and executing the special drawing game using the special symbol corresponding to the one having a large number of pending storages, the occurrence of the invalid start winning can be reduced.

  Subsequent to the process of step S232, the total pending storage number is updated by subtracting one, for example, by subtracting 1 from the total pending storage number count value, and the start data storage unit 591C uses the pending number “1” The storage contents of the start data stored in the lower entries (for example, the entries corresponding to the hold numbers “2” to “8”) are shifted upward by one entry (step S233). Then, it is determined whether the start data read in step S232 is "first" or "second" (step S234).

  When it is determined in step S234 that the start data is "first" (step S234; first), the first special symbol game using the first special figure by the first special symbol display device 4A is started In response to the establishment of the 1 start condition, the variation special feature designation buffer value stored in the game control buffer setting unit 595 is set to "1" (step S235). On the other hand, when it is determined in step S234 that the start data is "second" (step S234; second), the special figure game using the second special figure by the second special symbol display device 4B is started In response to the satisfaction of the second start condition, the fluctuation special figure designation buffer value is set to "2" (step S236).

  After one of the processes in steps S235 and S236 is executed, the pending data is read out from the special view pending storage unit according to the start data read in step S232 (step S237). For example, when the start data is "first", it is a random number value for the special view display result determination as the hold data stored in association with the hold number "1" in the first special view hold storage unit 591A. The numerical data indicating MR1 and the numerical data indicating the random number MR2 for determining the jackpot type are read out. On the other hand, when the start data is "second", it is for the special view display result determination as the hold data stored in association with the hold number "1" in the second special view hold storage unit 151B. The numerical value data indicating the random number value MR1 and the numerical value data indicating the random number value MR2 for determining the jackpot type are read out.

  Following the process of step S 237, the pending storage number count value corresponding to the start data is decremented by 1 and an entry lower than the pending number “1” (for example, pending number “ The storage content of the pending data stored in the entries corresponding to 2 "to" 4 "is shifted upward by one entry (step S238). For example, when the start data is "first", the first hold storage count value is decremented by 1, and the storage content of the hold data in first special view hold storage unit 591A is shifted upward by one entry. Let On the other hand, when the start data is "second", the second hold storage count value is decremented by one, and the storage contents of the hold data in the second special view hold storage unit 591B are each one entry. Shift up.

  Thereafter, as a use table for determining whether the variable display result is "big hit" or "small hit", the special view display result determination table corresponding to the start data is selected and set. (Step S239). For example, if the start data is "first", while the first special display display result determination table 130A shown in FIG. A second special-image display result determination table 130B shown in B) is set as a use table. The CPU 505 refers to the special view display result determination table set in this way, and the numerical data indicating the special view display result determination random number value MR1 read in step S237 matches the big hit determination value data. It is determined whether or not (step S240).

  If the numerical data indicating the random number MR1 matches the jackpot determination value data in step S240 (step S240; Yes), the jackpot flag provided in the game control flag setting unit 592 is set to the on state (step S241 ). At this time, the jackpot type determination table 131 shown in FIG. 34 is selected and set as a use table for determining the jackpot type as any of a plurality of types (step S 242). Then, by referring to the jackpot type determination table 131 set in step S 242 based on the numerical data indicating the random number value MR 2 for jackpot type determination read out in step S 237, the “big hit type” One of a plurality of types, i.e., "one definite variation" to "third definite variation" and "accurate" is determined (step S243). When the variation special figure designation buffer value is set to "2" in the process of step S236, random number value MR2 for big hit type determination is allocated to the big hit type of "probable" in big hit type determination table 131. Since it is not done, the jackpot type is not determined to be "probable". Thus, the big hit type buffer value is set to any one of "00" to "04" corresponding to the big hit type determined in step S243 (step S244).

  When the numerical data representing the random number MR1 does not match the jackpot determination value data in step S240 (step S240; No), the numerical value representing the random number value MR1 for special view display result determination read in step S237. It is determined whether the data matches the loss determination value data (step S245). At this time, if it does not match with the loss determination value data (step S245; No), the small hit flag is set to the on state as it matches with the small hit determination value data (step S246).

  After one of the processes of step S244 and step S246 is executed, a finalized special symbol is set according to the determination result of the variable display result or the determination result of the jackpot type (step S247). As an example, when the numerical data indicating the random number MR1 matches the loss determination value data in step S245, the lost symbol is displayed corresponding to the prior determination result indicating that the variable display result is "loss". A special symbol indicating a symbol of "-" is set as the confirmed special symbol. On the other hand, when the numerical data representing the random number MR1 matches the jackpot determination value data in step S240, the jackpot symbol “1” or “3” is determined according to the jackpot type determination result in step S243. , Set one of the special symbols showing the number "7" to the finalized special symbol. That is, according to the determination result that the jackpot type is "normal", a special symbol indicating the number "3" that is usually the jackpot symbol is set as the determined special symbol. In addition, according to the determination result of making the jackpot type "first definite variation" to "third definite variation", a special symbol indicating a number of "7" which is a probability variation big hit symbol is set as a finalized special symbol. Furthermore, according to the determination result that the jackpot type is "probable", a special symbol indicating a number of "1" that is a two-round jackpot symbol is set as the determined special symbol. Furthermore, when the numerical data indicating the random number MR1 does not match the lost judgment value data in step S245, a small hit symbol is displayed corresponding to the prior judgment result indicating that the variable display result is "small hit". The special symbol indicating the number "5" is set as the confirmed special symbol.

  After setting the finalized special symbol in step S247, the special symbol process flag is updated to "1" which is a value corresponding to the variation pattern setting processing (step S248), and the special symbol normal processing is ended. . When the total number of pending storages is "0" at step S231 (step S231; Yes), after performing predetermined demonstration display setting (step S249), the special symbol normal processing is ended.

  FIG. 59 is a flow chart showing an example of the fluctuation pattern setting process executed in step S111 of FIG. In the fluctuation pattern setting process shown in FIG. 59, the CPU 505 first determines whether the big hit flag is on (step S261). At this time, if the big hit flag is on (step S261; Yes), the table selection shown in FIG. 36 (D) is performed based on whether the gaming state in the pachinko gaming machine 1 is the normal state, the probability changing state or the time saving state. According to the setting, any one of the big hit variation pattern type determination tables 132A to 132I is selected and set as a use table for determining the variation pattern type to any of a plurality of types (step S262). Here, the gaming state in the pachinko gaming machine 1 may be specified from the state of the probability change flag or the time saving flag provided in the game control flag setting unit 592.

  If the big hit flag is off in step S261 (step S261; No), it is determined whether the small hit flag is on (step S263). At this time, if the small hit flag is on (step S263; Yes), the table shown in FIG. 37 (D) is based on whether the gaming state in the pachinko gaming machine 1 is the normal state, the probability change state or the time saving state. According to the selection setting, any one of the small hit variation pattern type determination tables 133A to 133C is selected and set as a use table for determining the variation pattern type to any one of a plurality of types (step S264).

  If the small hit flag is off in step S263 (step S263; No), based on whether the gaming state in pachinko gaming machine 1 is the normal state, the probability changing state, or the time saving state, FIG. One of the reach determination tables 134A to 134C is selected and set as a use table for determining whether or not the decorative symbol is to be derived and displayed in the reach display state according to the table selection setting shown in (step S265). At this time, the total suspension storage number is specified, for example, by reading the total suspension storage number count value stored in the game control counter setting unit 594 (step S266). Subsequently, for example, a random value MR3 for reach determination is extracted from a random counter or the like provided in the game control counter setting unit 594 (step S267). Then, based on the random number value MR3 for reach determination extracted in step S267, the presence or absence of the reach display state is determined by referring to any of the reach determination tables 134A to 134C set in step S265 (step S268). ), It is specified whether or not the judgment result indicates that the reach display state is present (step S269).

  If the reach determination result indicating that the reach display state is to be present is specified in step S269 (step S269; Yes), reach HA2-1 to reach HA2-3, reach HB2-1, and reach HC2-1 in step S268. In accordance with each determination result with the reach display state such as the determination result, the variation pattern type for reach shown in FIGS. 39 (A) to (C) as a use table for determining the fluctuation pattern type to any one of a plurality of types. One of the determination tables 135A to 135C is selected and set (step S270). On the other hand, when a reach determination result indicating that there is no reach display state is specified in step S269 (step S269; No), non-reach HA1-1 to non-reach HA1-5 in step S268, non-reach In order to determine the variation pattern type to one of multiple types according to the judgment result of no reach display state such as the judgment result of HB1-1, non-reach HB1-2, non-reach HC1-1, non-reach HC1-2 One of the non-reach variation pattern type determination tables 136A to 136C shown in FIGS. 40 (A) to 40 (C) is selected and set as the use table of (step S271).

  After executing any of the processes in steps S262, S264, S270, and S271, for example, the random value MR4 for determining the variation pattern type is extracted from the random counter or the like provided in the game control counter setting unit 594 (step S272). ). Then, based on the random value MR4 for determination of the variation pattern type extracted in step S272, by referring to the use table set in any one of steps S262, S264, S270, and S271, a plurality of variation pattern types can be obtained. One of them is determined (step S273).

  Here, in the processing of steps S272 and S273, the variation pattern of the decorative symbol corresponding to the special drawing game executed using the first special drawing by the first special symbol display device 4A based on the satisfaction of the first start condition. Whether the type is determined or the variation pattern type of the decorative symbol corresponding to the special drawing game executed by the second special symbol display device 4B using the second special drawing based on the establishment of the second start condition is determined Regardless of the above, the variation pattern type is determined to be any one of a plurality of types using numerical data indicating a common random value MR4 for determination of a variation pattern type updated by a common random counter or the like. Further, in the processing of steps S272 and S273, regardless of the determination result of the presence or absence of the reach display state in step S268, the common processing module is performed using numerical data indicating the common random number MR4 for determination of fluctuation pattern type The variation pattern type can be determined to any one of a plurality of types. As an example, in the process of step S273, the variation pattern type may be determined with reference to the determination table stored in the address of the ROM 506 set in the determination table pointer.

  Thus, after the variation pattern type is determined in step S273, as a use table for determining the variation pattern to any one of a plurality of types based on the determination result of the variation pattern type, FIGS. 41 and 42A. Then, one of a plurality of variation pattern determination tables such as the hit variation pattern determination tables 137A to 137C shown in (B) and the lost variation pattern determination tables 138A and 138B shown in FIGS. 43 and 44 is selected and set (step S274) ). Subsequently, for example, a random value MR5 for fluctuation pattern determination is extracted from a random counter or the like provided in the game control counter setting unit 594 (step S275). Then, the fluctuation pattern is determined to be any one of a plurality of types by referring to the fluctuation pattern determination table set in step S274 based on the random value MR5 for fluctuation pattern determination extracted in step S275 (step S276). .

  Here, in the processing of steps S275 and S276, the variation pattern of the decorative symbol corresponding to the special drawing game executed using the first special figure by the first special symbol display device 4A based on the satisfaction of the first start condition. Whether to determine the variation pattern of the decorative symbol corresponding to the special drawing game to be executed using the second special figure by the second special symbol display device 4B based on the fact that the second starting condition is established Instead, the variation pattern is determined to be any one of a plurality of types using numerical data indicating a common random value MR5 for determination of a variation pattern, which is updated by a common random counter or the like. Further, in the processes of steps S275 and S276, the common processing module performs fluctuation using the numerical data indicating the common random number value MR5 used to determine the fluctuation pattern regardless of the determination result of the reach display state in step S268. The pattern can be determined to one of a plurality of types. As an example, in the process of step S276, the variation pattern may be determined with reference to the determination table stored at the address of the ROM 506 set in the determination table pointer.

  Subsequent to the determination of the variation pattern in step S276, a special figure variation time is set according to the determination result of the variation pattern (step S277). Thereafter, according to the variation special view designation buffer value, the special view game using the first special view by the first special symbol display device 4A and the special view game using the second special view by the second special symbol display device 4B The setting for starting the variation of the special symbol is performed so as to start any of (step S278). As an example, if the variation special figure designation buffer value is "1", the setting for transmitting the drive signal for updating the display of the first special figure by the first special symbol display device 4A is performed. On the other hand, if the variation special figure designation buffer value is "2", the setting for transmitting the drive signal for updating the display of the second special figure by the second special symbol display device 4B is performed.

  After execution of the process of step S278, setting for transmitting various commands to be used at the start of variation of the special symbol is performed (step S279). For example, when the fluctuation special drawing designation buffer value is “1”, the CPU 505 sequentially sends the first fluctuation start command, the fluctuation pattern designation command, and the variable display result notification command to the effect control board 12 from the main board 11 Transmission for effect included in the transmission command buffer provided in the game control buffer setting unit 595 setting data indicating the storage address (head address) in the ROM 506 of the first variation start command table prepared in advance for transmission It is stored in the buffer area designated by the transmission command pointer in the command buffer. On the other hand, when the fluctuation special drawing designation buffer value is “2”, the CPU 505 sequentially sends the second fluctuation start command, the fluctuation pattern designation command, and the variable display result notification command to the effect control board 12 from the main board 11 For transmission, setting data indicating the storage address in the ROM 506 of the second variation start command table prepared in advance is stored in the buffer area designated by the transmission command pointer in the effect transmission command buffer. When the setting in step S279 is performed, the main substrate 11 causes the effect control substrate 12 each time the main side communication control processing in step S98 shown in FIG. 51 is executed after the variation pattern setting processing is completed. On the other hand, the first fluctuation start command or the second fluctuation start command, the fluctuation pattern designation command, and the variable display result notification command are sequentially transmitted.

  Following the setting in step S279, the value of the special drawing process flag is updated to "2" which is a value corresponding to the special symbol variation processing (step S280), and the variation pattern setting processing is ended.

  FIG. 60 is a flow chart showing an example of the special symbol stop process executed in step S113 of FIG. In the special symbol stop process shown in FIG. 60, the CPU 505 first determines whether the big hit flag is on (step S291). At this time, if the big hit flag is on (step S291; Yes), the big hit start effect waiting time is set (step S292). For example, in the process of step S292, a timer initial value predetermined corresponding to the jackpot start effect waiting time may be set in the game control process timer provided in the game control timer setting unit 593.

  Following the process of step S292, a setting for transmitting a hit start designation command from the main substrate 11 to the effect control substrate 12 is performed (step S293). For example, in the process of step S293, setting data indicating a storage address in the ROM 506 of the hit start designation command table prepared in advance for sending a hit start designation command is designated by the send command pointer in the send command buffer for effect. It may be stored in the buffer area. After that, the big hit flag is cleared and turned off (step S294). Further, the setting for ending the definite change state or the short time state is performed (step S 295). For example, in step S295, processing for clearing the probability variation flag and the time saving flag and turning them off, and processing for clearing the special figure fluctuation number counter for counting the number of times the special figure game is executed in the probability variation state and the time saving status It just needs to be executed. Then, after the value of the special symbol process flag is updated to "4" which is the value corresponding to the special winning opening opening pre-processing (step S296), the special symbol stop process is ended.

  If the big hit flag is off in step S291 (step S291; No), it is determined whether the small hit flag is on (step S297). At this time, if the small hit flag is on (step S 297; Yes), the small hit start presentation waiting time is set (step S 298). For example, in the process of step S298, a timer initial value predetermined corresponding to the small hit start effect waiting time may be set in the game control process timer.

  Subsequent to the process of step S298, as in the process of step S293, setting for transmitting a hit start designation command from the main board 11 to the effect control board 12 is performed (step S299). Thereafter, the small hit flag is cleared to turn off (step S300). Then, the value of the special drawing process flag is updated to "8" which is a value corresponding to the small hit opening pre-processing (step S301).

  When the small hit flag is off at step S297 (step S297; No), the value of the special process process flag is updated to "0" which is a value corresponding to the special symbol normal processing (step S302). . After one of the processes in steps S301 and S302 is performed, it is determined whether to end the probability change state or the time saving state (step S303). For example, in the process of step S303, the value of the special figure fluctuation frequency counter (special figure fluctuation frequency count value) is updated, for example, by subtracting 1 or 1 and the special figure fluctuation frequency count value after updating is predetermined. A determination is made as to whether it matches the special gaming state end determination value. At this time, if it matches with the special game state end determination value, the probability change state or the time saving state may be ended and the state may be controlled to the normal state by clearing the probability change flag or the time saving flag and turning off. On the other hand, if it does not match the special game state end determination value, the state of the probability change flag or the time saving flag may be maintained, and the process of step S303 may be ended. After execution of such a determination of a definite change state or a short time state, the special symbol stop process is ended. It should be noted that the termination determination based on the special figure fluctuation number count value may be performed only in the time saving state, and for the probability change state, it may be continued until the next variable display result is “big hit”. . Alternatively, for example, by extracting numeric data indicating a random number for determining the end of the probability change state from the random counter provided in the game control counter setting unit 594, and referring to the probability change state end determination table stored in the ROM 506 or the like in advance. It may be determined whether or not to end the definite variation state.

  FIG. 61 is a flow chart showing an example of the jackpot end process executed in step S117 shown in FIG. In the big hit end process shown in FIG. 61, the CPU 505 first determines whether or not the big hit end effect waiting time has elapsed (step S311). As an example, in the special winning opening open post-processing in step S116 shown in FIG. 53, when the value of the special process process flag is updated to “7”, a timer initial predetermined in advance corresponding to the big hit end presentation waiting time A value is set to the gaming control process timer. In this case, in the process of step S311, for example, the game control process timer value is updated by subtracting 1 or the like, and the updated game control process timer value matches the predetermined waiting time elapsed determination value or not. It may be determined whether or not the big hit end production waiting time has elapsed. If the jackpot end effect waiting time has not elapsed in step S311 (step S311; No), the jackpot end processing is ended as it is.

  On the other hand, when the big hit end presentation waiting time has elapsed in step S311 (step S311; Yes), the big hit type buffer value stored in the game control buffer setting unit 595 is read out (step S312). Subsequently, it is determined whether or not the jackpot type buffer value read out in step S312 is "0" corresponding to the "normal" jackpot type (step S313). At this time, if the jackpot type buffer value is "0" (step S313; Yes), setting for starting control to the time saving state is performed (step S314). As an example, in the process of step S314, the time saving flag is set to the on state, and the count initial value (for example, "100") predetermined corresponding to the upper limit value of the special figure game executable in the time saving state May be set in the special figure fluctuation number counter.

  If it is determined in step S313 that the jackpot type buffer value is other than "0" (step S313; No), setting for starting control to the positive change state is performed (step S315). As an example, in the process of step S315, the probability variation flag is set to the on state, and the count initial value predetermined corresponding to the upper limit value of the special figure game that can be executed in the probability variation state is It may be set to the counter. When the definite change state is continued until the next variable display result is "big hit", it is not necessary to set the special figure change frequency counter in the process of step S315. After executing any of the processes of steps S314 and S315, the value of the special process process flag is updated to "0" which is a value corresponding to the special symbol normal processing (step S316), and the big hit end processing is ended. Do.

  Next, the operation of the effect control board 12 will be described. In the effect control board 12, when the supply of the power supply voltage is received from the power supply board or the like, the CPU of the effect control microcomputer 120 is activated and executes the effect control main process as shown in the flowchart of FIG. Also in the effect control microcomputer 120, the security check process may be executed by the CPU at the time of power on or system reset, and the effect control microcomputer 120 may be set to the security mode. In this case, after it is determined in the security check process that an unauthorized change has not been made to the ROM, after the security time has elapsed, the mode is shifted to the user mode in which execution of the effect control main process is started. Just do it. When the effect control main process shown in FIG. 62 is started, the CPU of the effect control microcomputer 120 first executes a predetermined initialization process (step S401), and is internally or externally attached to the effect control microcomputer 120. Clearing of the RAM, setting of various initial values, and register setting of CTC (counter / timer circuit) built in the microcomputer 120 for effect control and the like are performed.

  After that, random number update processing is executed (step S402), and numerical data indicating random number values counted by a random counter provided in the RAM or the like of microcomputer 120 for effect control, as various random number values used for effect control, Update by software. Subsequently, it is determined whether the timer interrupt flag is on (step S403). The timer interrupt flag is set to the on state each time a predetermined time (for example, 2 milliseconds) elapses based on, for example, the register setting of the CTC in the effect control microcomputer 120.

  Further, on the side of the effect control board 12, an interrupt for receiving the effect control command from the main board 11 occurs separately from the timer interrupt that occurs every time a predetermined time has elapsed. This interrupt may be, for example, an interrupt generated by full reception data in the serial communication circuit provided in the effect control microcomputer 120. Alternatively, when a signal line for transmitting the effect control INT signal is wired between the main substrate 11 and the effect control substrate 12, an interrupt due to the effect control INT signal being turned on may occur. It is also good. In response to the occurrence of such an interrupt, the CPU of the effect control microcomputer 120 automatically sets the interrupt disable state, but when using a CPU that does not automatically enter the interrupt disable state, the interrupt disable instruction (DI It is desirable to issue an instruction). The CPU of the effect control microcomputer 120 executes, for example, a predetermined command reception interrupt process in response to an interrupt due to full reception data or an interrupt due to the effect control INT signal being turned on. In this command reception interrupt process, communication data stored in a communication data register or the like provided corresponding to the serial communication circuit of the effect control microcomputer 120 is fetched. Alternatively, in the command reception interrupt process, among the input ports included in the PIP or the like included in the effect control microcomputer 120, a predetermined input port for receiving the control signal transmitted from the main board 11 via the relay board 18 Alternatively, a control signal to be an effect control command may be taken. The effect control command fetched at this time is stored, for example, in a effect control command reception buffer provided in the RAM or the like of the effect control microcomputer 120. As an example, when the effect control command has a 2-byte configuration, the first byte (MODE) and the second byte (EXT) are sequentially received and stored in the effect control command reception buffer. Thereafter, the CPU of the effect control microcomputer 120 sets the interrupt permission and then ends the command reception interrupt process.

  If the timer interrupt flag is off at step S403 (step S403; No), the process returns to step S402. On the other hand, when the timer interrupt flag is on at step S403 (step S403; Yes), the timer interrupt flag is cleared and turned off (step S404), and command analysis processing is executed (step S405). . In the command analysis process executed in step S405, for example, various presentation control commands transmitted from the game control microcomputer 100 of the main substrate 11 and stored in the presentation control command reception buffer are read and then read. Settings, control, and the like corresponding to the output control command issued are performed.

  After the command analysis process is performed in step S405, an effect control process process is performed (step S406). In this effect control process, electric components for effects such as display operation of effect images in the display area of the image display device 5, voice output operation from the speakers 8L and 8R, and lighting operation of the game effect lamp 9 and decoration LED The control content of the rendering operation using the (rendering device) is determined, determined, set, and the like according to the rendering control command or the like transmitted from the main substrate 11.

  FIG. 63 is a flowchart showing an example of an effect control process performed in step S406 in FIG. In the effect control process shown in FIG. 63, the CPU of the effect control microcomputer 120 performs, for example, the following steps S160 to S160 according to the value of the effect process flag provided in the RAM or the like of the effect control microcomputer 120 One of the processes in S166 is selected and executed.

  The decorative symbol variation start waiting process in step S160 is a process that is executed when the value of the effect process flag is "0". In this decorative symbol variation start waiting process, the image display device 5 is selected depending on whether any one of the first variation start command and the second variation start command is received as the variation start command transmitted from the main substrate 11. Start the variable display of decorative symbols in "left", "middle", and "right" decorative symbol display areas 5L, 5C, 5R provided in the display area of, and the variable display of color symbols in the color symbol display area It includes a process of determining whether or not to do so. At this time, if it is determined that variable display is to be started, the value of the effect process flag is updated to "1".

  The decorative symbol variation setting process of step S161 is a process that is executed when the value of the effect process flag is "1". In this decorative symbol variation setting process, the start of the special figure game using the first special figure by the first special symbol display device 4A and the start of the special figure game using the second special figure by the second special symbol display device 4B In order to perform various rendering operations including variable display of decorative symbols and color symbols in response to the above, finalized design symbols, temporary stop symbols, and notice effects that become final stop symbols according to variation patterns and variable display results, etc. It includes the process of determining the presence or absence, etc., and selecting and setting any of a plurality of types of effect control patterns prepared in advance as a usage pattern according to the determination result. After such determination or setting is performed, the value of the rendering process flag is updated to "2".

  The decorative symbol variation process of step S162 is a process that is executed when the value of the effect process flag is "2". In this decorative symbol variation-in-progress process, for example, an effect control pattern or the like which is a usage pattern corresponding to the value (effect control process timer value) of the effect control process timer provided in the RAM or the like of the effect control microcomputer 120. The various control data are read out from the, and processing for performing various effect control during variable display of the decorative pattern is included. Then, for example, in response to the effect control process timer value becoming a predetermined variable display end value (for example, “0”) or that the decorative symbol stop command transmitted from the main substrate 11 is received, etc. The finalized stop symbol is displayed as the final stop symbol which is the result of the variable display of the symbol. If the finalized display of the finalized decorative symbol is performed in response to the effect control process timer value becoming the variable display end value, the variable display time corresponding to the fluctuation pattern designated by the fluctuation pattern designation command has elapsed. Sometimes, even without the effect control command from the main substrate 11, it is possible to derive and display the determined decoration pattern autonomously on the side of the effect control substrate 12 to fix the variable display result. When the determined decoration pattern is completely stopped and displayed, the value of the effect process flag is updated to "3".

  The decoration symbol variation end process of step S163 is a process that is executed when the value of the effect process flag is "3". This decoration symbol variation end process includes a process of determining whether or not the hit start designation command transmitted from the main substrate 11 has been received. At this time, if it is determined that the hit start designation command has been received, the value of the rendering process flag is updated to "4" when the variable display result specified from the hit start designation command is "big hit". Be done. On the other hand, when the variable display result specified from the hit start designation command is "small hit", the value of the rendering process flag is updated to "5". Further, when the predetermined time has elapsed without receiving the hit start designation command, the value of the effect process flag is updated to "0" corresponding to the variable display result being "lost".

  The jackpot controlled effect process of step S164 is a process executed when the value of the effect process flag is "4". In this big hit control effect processing, for example, a effect control pattern or the like corresponding to the variable display result becoming “big hit” or the like is set, and the effect image based on the setting content is displayed in the display area of the image display device 5 And outputting sound and sound effects from the speakers 8L and 8R by outputting sound number data to the sound control board 13 and turning on the game effect lamp 9 and the decorative LED by outputting an electric decoration signal to the lamp control board 14 A process of controlling various rendering operations in the big hit gaming state, such as turning on / off and blinking, is included. Then, the value of the rendering process flag is updated to “6”, for example, in response to the reception of the hitting end designation command transmitted from the main substrate 11 or the like.

  The small hitting control-in-progress production process of step S165 is a process that is executed when the value of the presentation process flag is "5". In the small hit control effect process, for example, a effect control pattern or the like is set corresponding to the variable display result becoming "small hit" or the like, and the effect image based on the setting content is displayed on the image display device 5 The voices and sound effects are output from the speakers 8L and 8R by displaying them in the area or by outputting the sound number data to the voice control board 13. The game effect lamp 9 or decoration is output by the output of the illumination signal to the lamp control board 14. A process of controlling various rendering operations in the small hit gaming state such as turning on / off / flashing the LED is included. Then, the value of the rendering process flag is updated to “6”, for example, in response to the reception of the hitting end designation command transmitted from the main substrate 11 or the like.

  The ending effect process of step S166 is a process executed when the value of the effect process flag is "6". In this ending effect processing, a effect control pattern or the like corresponding to the end of the big hit gaming state or the small hit gaming state is set, and the effect image based on the setting content is displayed in the display area of the image display device 5 Or, outputting voices and sound effects from the speakers 8L and 8R by outputting sound number data to the voice control board 13 and turning on / off the game effect lamp 9 and the decorative LED by outputting the illumination signal to the lamp control board 14 A process of controlling various effect operations corresponding to the end of the big hit gaming state or the small hit gaming state, such as flashing / flashing, is included. Then, the value of the effect process flag is updated to “0” in response to the end of the effect operation.

  Next, the operation of the payout control board 15 will be described. In the dispensing control substrate 15, the dispensing control microcomputer 150 is activated in response to the power supply from the power supply substrate 10 being started and the reset signal to the dispensing control microcomputer 150 becoming high level (off state). A payout control main process as shown in the flowchart of FIG. 64 is executed. In the payout control microcomputer 150 as well, the security check process may be executed by the CPU at the time of power on or system reset, and the payout control microcomputer 150 may be set to the security mode. In this case, after it is determined in the security check process that an unauthorized change has not been made to the ROM, after the security time has elapsed, the mode shifts to a user mode in which execution of the payout control main process is started. Just do it. When the payout control main process shown in FIG. 64 is started, the payout control microcomputer 150 first sets the interrupt disabled state (step S421), and sets the interrupt mode (step S422). For example, in step S422, an interrupt mode [2] of a maskable interrupt is set. Subsequently, settings relating to the stack pointer, such as setting of a stack pointer specification address, are performed (step S423). Further, the built-in register is set (initialized) (step S424). Further, setting of CTC and PIP included in the payout control microcomputer 150 is performed (step S424).

  Thereafter, the RAM of the payout control microcomputer 150 is set to be accessible (step S425). Subsequently, for example, a switch signal transmitted from the clear switch 304 installed on the power supply substrate 10 by checking the terminal state in any of the plurality of input ports provided in the PIP included in the payout control microcomputer 150. Based on the signal state of (clear signal), it is determined whether the clear switch 304 is turned on (step S427). Here, the payout control microcomputer 150 may check the state of the clear signal only once via the input port, but may check the state of the clear signal multiple times.

  When the clear switch 304 is off at step S427 (step S427; No), it is determined whether a predetermined backup flag in the payout control microcomputer 150 is on (step S428). The state of the backup flag in the payout control microcomputer 150 is set to a predetermined area such as a RAM provided in the payout control microcomputer 150 when the power supply is stopped. Then, the backup flag setting state is backed up by the backup power supply, so that the state of the backup flag is saved even when the power supply is stopped.

  When the backup flag is on in step S428 (step S428; Yes), data check of the RAM provided in the payout control microcomputer 150 is performed to determine whether the check result is normal or not (step S429). In the process of step S429, for example, a checksum is calculated using storage data in a specific area of the RAM, and the calculated checksum is compared with the checksum stored in the payout checksum buffer. Here, in the payout check sum buffer, a checksum calculated by the same process at the time of the previous power supply stop is stored. If the comparison result does not match, it is determined that the check result is not normal because the data in the specific area of the RAM is different from the data at the time of the power supply stop.

  When the check result in step S429 is normal (step S429; Yes), for example, restoration for returning the control state of the payout control board 15 such as the internal state of the payout control microcomputer 150 to the state when the power supply is stopped The setting at the time is performed to restore the control state before power interruption (step S430). For example, when the value of the predetermined prize ball unpaid counter is stored in the backup area in the RAM of the payout control microcomputer 150 when the power supply to the pachinko gaming machine 1 is stopped, the process of step S430 The stored data in the backup area of the RAM may be read out and set in the prize ball unpaid counter.

  When the clear switch 304 is on at step S427 (step S427; Yes), or when the backup flag is off at step S428 (step S428; No), or the check result is not normal at step S429. Occasionally (step S429; No), initialization processing corresponding to power-on or system reset which is not at the time of power failure recovery is executed. In this initialization process, the RAM in the payout control microcomputer 150 is cleared (initialized) (step S431), and a work area to be a work area is set (step S432). In the process of step S431, predetermined data stored in the RAM of the payout control microcomputer 150 may be set to an arbitrary value or a predetermined initial value. Further, the entire area of the RAM in the payout control microcomputer 150 may be initialized, or a part of the area may be initialized while the predetermined data may be left as it is.

  After one of the processes in steps S430 and S432 is executed, the interrupt enabled state is set (step S433), and generation of various interrupts is waited. It is to be noted that, for example, by setting the register of CTC in microcomputer for payout control 150 or the like before setting the interrupt enabled state in step S433, a timer interrupt is generated every predetermined time (for example, 2 milliseconds). The internal setting of the payout control microcomputer 150 may be performed. Further, serial communication initial setting processing for performing initial setting of the serial communication operation, and interrupt initial setting processing for performing initial setting regarding interrupt processing executed based on the interrupt request may be executed.

  Subsequently, it is determined whether the timer interrupt flag is on (step S434). The timer interrupt flag is set to the on state, for example, when a timeout occurs in CTC in the payout control microcomputer 150. Then, if the timer interrupt flag is off (Step S434; No), the process of Step S434 is repeatedly executed and the process waits.

  In addition, on the side of the payout control board 15, an interrupt for receiving a payout control command from the main board 11 occurs in addition to the timer interrupt generated every time a predetermined time elapses. This interrupt may be, for example, an interrupt generated by full reception data in the serial communication circuit provided in the payout control microcomputer 150. In response to the occurrence of such an interrupt, the CPU of the payout control microcomputer 150 automatically sets the interrupt disable state, but when using a CPU that does not automatically enter the interrupt disable state, the interrupt disable instruction (DI It is desirable to issue an instruction). The CPU of the payout control microcomputer 150 executes, for example, a predetermined command reception interrupt process in response to an interrupt or the like due to full reception data. In this command reception interrupt processing, communication data stored in a communication data register or the like provided corresponding to the serial communication circuit of the payout control microcomputer 150 is fetched. The payout control command fetched at this time is stored, for example, in a payout control command reception buffer provided in the RAM or the like in the payout control microcomputer 150. As an example, when the payout control command has a 2-byte configuration as shown in FIG. 6A, the first byte (MODE) and the second byte (EXT) are sequentially received to be a buffer for receiving a payout control command. Store in Thereafter, the CPU of the payout control microcomputer 150 sets the interrupt permission and then ends the command reception interrupt process.

  If the timer interrupt flag is on at step S434 (step S434; Yes), the timer interrupt flag is cleared and turned off (step S435), and the payout control timer interrupt process is executed (step S435). Step S436) Return to the process of step S434.

  FIG. 65 is a flowchart showing an example of a payout control timer interrupt process executed in step S436 of FIG. The payout control timer interrupt process is a process serving as a payout control process for controlling the payout motor 51 in accordance with the payout control command transmitted from the main substrate 11. In the payout control timer interrupt process shown in FIG. 65, the CPU of the payout control microcomputer 150 first executes predetermined input / output processing (step S 491), and is provided, for example, in a PIP or the like in the payout control microcomputer 150. The state of a predetermined bit in the input port is checked, or predetermined control data is set to a predetermined bit in an external bus interface or the like in the payout control microcomputer 150.

  Subsequently, the CPU of the payout control microcomputer 150 executes card unit processing to perform communication with the card unit connected to the payout control substrate 15 via the interface substrate (step S492). Further, the CPU of the payout control microcomputer 150 checks the presence or absence of various errors generated on the side of the payout control board 15, and executes a payout-side error process for coping with the generated error (step S493). For example, in the dispensing side error processing, the signal state from the full tank switch 26, the ball out switch 27, the dispensing motor position sensor 71, the dispensing count switch 72, etc. is checked or the serial communication circuit in the dispensing control microcomputer 150. The presence or absence of various errors generated on the side of the payout control board 15 is determined by inspecting the communication state of the above. Then, when an error occurrence is detected, for example, a display operation corresponding to the type of the error occurred in the error display LED 74 is executed, or a payout notification command for notifying the main board 11 of the error occurrence is transmitted. It is sufficient if the setting is made. Thereafter, for example, when a procedure for releasing an error that occurs due to turning on of the error release switch 73 or the like is taken, for example, the display of the error display LED 74 is initialized or error release is notified to the main board 11 The setting for transmitting the payment notification command for the purpose may be performed.

  After the payout-side error processing is executed in step S493, the payout operation control processing for controlling the payout operation of the gaming ball according to the ball lending request from the card unit and the number-of-payouts designation command from the main substrate 11 is executed. Execute (step S494). In the payout operation control process, a setting may be made to transmit the winning ball ACK command when the payout number designation command from the main substrate 11 is received. Alternatively, as a process separate from the payout operation control process, a process may be executed in which setting for transmitting a prize ball ACK command is performed.

  Subsequent to the payout operation control process in step S494, a payout control command transmitted from the main substrate 11 is received or a payout notification command is transmitted to the main substrate 11 by executing the payout side communication control process. To control communication. As an example, in the payout side communication control process, a payout control command acquisition process for acquiring a payout control command transmitted from the main substrate 11 by serial communication is executed. In the payout control command acquisition process, the payout control command stored in the payout control command reception buffer may be read, and the setting of a flag or a buffer corresponding to the read payout control command may be performed. As another example, in the payout-side communication control process, transmission of a payout notification command is enabled by sending a transmission operation instruction to a transmission circuit included in the serial communication circuit of the payout control microcomputer 150. When such a payout side communication control process is completed, the interrupt control state is put into the interrupt enabled state, and then the payout control timer interrupt process is ended.

  Hereinafter, a specific operation example of the pachinko gaming machine 1 will be described. In the main board 11, the security check program 506A stored in the ROM 506 or the like when the initial power is supplied from the power supply board 10 (when power is turned on without backup power) or when rebooting after a system reset Is read out and executed, the game control microcomputer 100 enters the security mode.

  At this time, for example, security check processing as shown in FIG. 47 is executed as processing corresponding to the security check program 506A. Here, the security time when the gaming control microcomputer 100 is in the security mode is previously set to the bit number [2-0] or bit number [4-3] of the security time setting KSES stored in the program management area of the ROM 506. Depending on the stored bit values, it may contain time components other than a fixed fixed time.

  For example, if the bit value in bit number [2-0] of security time setting KSES is a value other than "000" (step S2 shown in FIG. 47; No), the setting contents shown in FIG. Correspondingly, in addition to the fixed time, any of a plurality of extension times that can be selected in advance can be set as a time component included in the security time (step S4). Also, if the bit value in bit number [4-3] of security time setting KSES is a value other than "00" (step S6; No), the short mode or long mode as shown in FIG. 12C is supported. Then, a variable setting time that changes in a predetermined time range each time the initialization processing is executed based on system reset or power on can be set as a time component included in the security time (step S8).

  The execution of the game control main process by the user program stored in the ROM 506 is not started until the set security time has elapsed (step S14; No). Then, the generation operation of the numerical data to be the random number value by the random number circuit 509 may not be started while the game control microcomputer 100 is in the security mode. As a result, it becomes difficult to specify the operation start timing of the random number circuit 509, the numerical data to be updated, etc. from the operation start timing by powering on the pachinko gaming machine 1 or system reset, etc., and the analysis result of the game control processing program By connecting the so-called "hanging board" and inputting an illegal signal at a predetermined timing, an action such as generating a big hit gaming state illegally can be reliably prevented.

  As an example, for each model of the pachinko gaming machine 1, the bit value in the bit number [2-0] of the security time setting KSES is set to a different value. In this case, the extension time set in step S4 shown in FIG. It becomes difficult to identify Also, by setting the bit value in the bit number [4-3] of the security time setting KSES to "01" or "10", the variable setting time set in step S8 is made different for each system reset. Accordingly, it becomes extremely difficult to specify the operation start timing of the random number circuit 509 from the operation start timing of the pachinko gaming machine 1.

  FIG. 66 is a timing chart for explaining the operation of the random number circuit 509 incorporated in the game control microcomputer 100 mounted on the main substrate 11. Further, FIG. 66 (A) shows a control clock CCLK generated by the control clock generation circuit 111 mounted on the main substrate 11. FIG. 66 (B) shows the random number clock RCLK generated by the random number clock generation circuit 112. As shown in FIGS. 66 (A) and 66 (B), the oscillation frequency of the control clock CCLK and the oscillation frequency of the random number clock RCLK are different from each other, and one of the oscillation frequencies is It does not become an integral multiple of the other oscillation frequency.

  As shown in FIG. 66 (B), the random number clock RCLK rises from the low level to the high level at timings T10, T11, T12,. The random number clock RCLK is supplied to the random number external clock terminal ERC of the game control microcomputer 100, and is input to the clock terminal CK in the clock flip-flop 552 of the random number circuit 509 shown in FIG. The clock flip-flop 552 responds to the rising edge of the random number clock RCLK input to the clock terminal CK for the latch clock RC0 fed back to the D input terminal from the negative phase output terminal (inverted output terminal) Q-bar. It takes in (latches) and outputs it from the positive phase output terminal (non-inverted output terminal) Q as a random number update clock RGK. Thereby, the random number update clock RGK rises from low level to high level at timings T10, T12, T14,... As shown in FIG. 66C, and is 1/2 of the oscillation frequency of the random number clock RCLK. It becomes a signal having an oscillation frequency. For example, if the oscillation frequency of the random number clock RCLK is 20 MHz, the oscillation frequency of the random number update clock RGK is 10 MHz. Since the oscillation frequency of the random number clock RCLK is not an integral multiple or a fraction of the oscillation frequency of the control clock CCLK, the oscillation frequency of the random number update clock RGK is the oscillation frequency of the control clock CCLK It will be a different frequency. The random number generation circuit 553 updates numerical data in the count value permutation RCN, for example, in response to the rising edge of the random number update clock RGK. The random number sequence change circuit 555 changes the update order of the numerical data in the count value permutation RCN output from the random number generation circuit 553 based on the setting of the random number update rule by the random number sequence change setting circuit 556 as the random number sequence RSN. Output. Thus, the numerical data in the random number sequence RSN is updated, for example, in response to the rising edge of the random number update clock RGK as shown in FIG. 66 (D).

  The latch clock RC0 output from the clock flip flop 552 is an inverted signal of the random number update clock RGK, and its oscillation frequency is the same as the oscillation frequency of the random number update clock RGK, and its phase is the phase of the random number update clock RGK and π. It differs by (= 180 °). The latch clock RC0 is branched into a latch clock RC1 and a latch clock RC2 at a branch point BR1. Therefore, for example, as shown in FIG. 66E, each of the latch clocks RC0, RC1, and RC2 is an oscillation signal whose signal state changes in a common cycle. The latch clock RC1 is input to the clock terminal CK of the latch flip flop 557A. The latch clock RC2 is input to the clock terminal CK of the latch flip flop 557B.

  In response to the rising edge of the latch clock RC1, the latch flip-flop 557A fetches (latches) the first start winning signal SS1 transmitted from the first start port switch 22A and supplied to the input port P0. It is output from the output terminal Q as the start winning combination latch signal SL1. Then, if the capturing method in the random number latch selector 558A is designated as the signal input to the input port P0, the start winning combination latch signal SL1 is output as the random number latch signal LL1. Thus, for example, the first start winning signal SS1 whose signal state changes between the off state (low level) and the on state (high level) at the timing as shown in FIG. 66F is the timing at which the latch clock RC1 rises. After being taken into the latch flip-flop 557A at T11, T13, T15,..., The random number latch signal LL1 whose signal state changes between the off state and the on state at timings T11 and T13 as shown in FIG. And is output from the random number latch selector 558A. Here, the first starting winning signal SS1 transmitted from the first starting opening switch 22A is from the off state when the starting winning of the gaming ball at the first starting winning opening formed by the normal winning ball device 6A is detected. It changes to the on state. The random number latch signal LL1 output from the latch flip-flop 557A via the random number latch selector 558A is supplied to the random value register 559A to be the random value register R1D, and the random number sequence RSN output from the random number sequence changing circuit 555 Used to acquire numerical data. Thus, the latch flip-flop 557A and the random number latch selector 558A acquire numerical data to be random numbers using the latch clock RC1 based on the detection of the start winning of the gaming ball at the first start winning opening. The random number latch signal LL1 is generated separately from the case where the start winning of the gaming ball in the second start winning opening is detected.

  In response to the rising edge of the latch clock RC2, the latch flip-flop 557B takes in (latches) the second start winning signal SS2 transmitted from the second start port switch 22B and supplied to the input port P1. It is output from the output terminal Q as the start winning combination latch signal SL2. Then, if the capture method in the random number latch selector 558B is designated as the signal input to the input port P1, the start winning combination latch signal SL2 is output as the random number latch signal LL2. Thus, for example, the second start winning signal SS2 whose signal state changes between the off state (low level) and the on state (high level) at the timing as shown in FIG. 66I is the timing at which the latch clock RC2 rises. After being taken into the latch flip-flop 557B at T11, T13, T15,..., The random number latch signal LL2 whose signal state changes between the off state and the on state at timings T14 and T15 as shown in FIG. And is output from the random number latch selector 558B. Here, the second start winning signal SS2 transmitted from the second start opening switch 22B is off when the start winning of the game ball at the second start winning opening formed by the normally variable winning ball device 6B is detected. Changes from on to on. The random number latch signal LL2 output from the latch flip-flop 557B via the random number latch selector 558B is supplied to the random value register 559B to be the random value register R2D, and is output from the random number sequence changing circuit 555 in the random number sequence RSN. Used to acquire numerical data. Thus, the latch flip-flop 557B and the random number latch selector 558B acquire numerical data to be random numbers using the latch clock RC2 based on the detection of the start winning of the gaming ball at the second start winning opening. A random number latch signal LL2 is generated separately from when the start winning of the gaming ball at the first start winning opening is detected.

  The random value register 559A serving as the random value register R1D responds to the rising edge of the random number latch signal LL1 input from the random number latch selector 558A to the clock terminal of the numerical data in the random number sequence RSN output from the random number sequence changing circuit 555 Then, it takes in (latches) and updates the numerical data to be stored data. The random value register 559B serving as the random value register R2D responds to the rising edge of the random number latch signal LL2 input from the random number latch selector 558B to the clock terminal of the numerical data in the random number sequence RSN output from the random number sequence changing circuit 555 Then, it takes in (latches) and updates the numerical data to be stored data.

  For example, as shown in FIG. 66 (G), when the rising edge that the random number latch signal LL1 changes from the off state to the on state occurs at timing T11, it is output from the random number sequence changing circuit 555 at this timing T11. The numerical data in the random number sequence RSN is taken into the random value register R1D as shown in FIG. 66 (H), and acquired as numerical data to be a random value. Thereby, in the random number register 559A which becomes the random number register R1D, numerical data used as a random number is calculated based on the detection of the start winning of the gaming ball in the first starting winning opening, the game in the second starting winning opening It can be acquired and stored separately from when the ball's starting winning is detected.

  Also, for example, as shown in FIG. 66 (J), when the rising edge that the random number latch signal LL2 changes from the off state to the on state is generated at timing T13, the random number sequence changing circuit 555 is generated at this timing T13. As shown in FIG. 66 (K), numerical data in the random number sequence RSN being output is taken into the random value register R2D, and acquired as numerical data to be a random value. As a result, the random number register 559B, which becomes the random number register R2D, receives numerical data used as a random number based on the detection of the start winning of the gaming ball in the second starting winning opening, the game in the first starting winning opening It can be acquired and stored separately from when the ball's starting winning is detected.

  Thus, the random value register 559A responds to the rising edge of the start winning combination latch signal SL1 generated by the latch flip-flop 557A using the latch clock RC1 and the rising edge of the random number latch signal LL1 output from the random number latch selector 558A. Obtain numerical data in the random value RSN. The numerical data stored in the random number register 559A is determined in step S208 shown in FIG. 54 that the first start winning determination count value has reached the winning determination value (step S208; Yes), the first start Based on the detection of the start winning game of the effective game ball by the mouth switch 22A, the CPU 505 reads it in step S353 shown in FIG. At this time, in steps S357 and S358, using the numerical data read from random number value register 559A, random number value MR1 for special image display result determination or random value determination random value determination, for example, as shown in FIG. The numerical value MR6 is set.

  The random number register 559B responds to the rising edge of the start winning winning time latch signal SL2 generated by the latch flip-flop 557B using the latch clock RC2 and the rising edge of the random number latch signal LL2 output from the random number latch selector 558B. Obtain numerical data in the random number sequence RSN. The numerical data stored in the random number value register 559B is determined in step S211 shown in FIG. 54 that the second start winning determination count value has reached the winning determination value (step S211; Yes), the second start Based on the detection of the start winning of the effective game ball by the mouth switch 22B, it is read by the CPU 505 in step S354 shown in FIG. At this time, in steps S357 and S358, using the numerical data read from random number value register 559B, random number value MR1 for special figure display result determination or random value determination random value determination, for example, as shown in FIG. The numerical value MR6 is set.

  As described above, in the random number circuit 509, the clock flip flop 552, the random number generation circuit 553, the random number sequence changing circuit 555, etc. acquire numerical data to be random numbers based on the starting winning of the gaming ball at the first starting winning opening. It is configured to acquire numerical data to be random numbers based on the combination of the latch flip-flop 557A, the random number latch selector 558A, and the random number value register 559A configured as above, and the starting winning of the gaming ball at the second starting winning opening. The combination of the latch flip-flop 557B, the random number latch selector 558B, and the random value register 559B is made common. Therefore, the random number update clock RGK output from the clock flip flop 552 and supplied to the random number generation circuit 553 to be used for updating numerical data in the count value permutation RCN and numerical data in the random number sequence RSN is the first start winning opening. The configuration for acquiring numerical data to be a random number based on the start winning of the game ball and the configuration for acquiring numerical data to be a random value based on the start winning for the game ball at the second start winning opening It becomes a clock signal.

  When it is determined in step S14 shown in FIG. 47 that the security time has elapsed (step S14; Yes), the CPU 505 reads the user program stored in the ROM 506, and the game control main processing shown in FIG. To be executed. Then, for example, a random number circuit setting process as shown in FIG. 49 is executed as the setting process in step S33. In this case, the random number circuit 509 starts an operation of generating numerical data to be a random value based on the setting in the random number circuit setting process by the CPU 505. Thus, after the random number circuit 509 starts generating random number values, the process of step S35 is repeatedly executed until the on operation of the game start switch 31 installed on the main substrate 11 is detected, and the process of step S36 No setting is made to enable interrupts. Therefore, even after the update operation of numerical data by the random number circuit 509 is started, a pachinko game such as a game control timer interrupt process shown in FIG. 51 is performed until the on operation of the game start switch 31 is detected. The game control process for controlling the progress of the game in the machine 1 is not started. As a result, it becomes difficult to specify the operation start timing of the random number circuit 509 and the update operation of the numerical data from the start timing of the game control processing, and the aim shooting based on the analysis result of the game control processing program By connecting the input signal and inputting an illegal signal at a predetermined timing, it is possible to reliably prevent an action such as generating a jackpot gaming state illegally.

  Assuming that the bit value in the bit number [0] of the second random number initial setting KRS2 as shown in FIG. 11B is “1”, the random number circuit 509 is generated by the process of step S55 shown in FIG. It is possible to change the start value of the numerical data to be a random value to be changed every system reset. As a result, even if the operation start timing of the random number circuit 509 can be specified, it becomes difficult to specify the numerical data read from the random value register 559A or the random value register 559B provided in the random number circuit 509. Certainly prevent actions such as generating a big hit gaming state illegally by aiming at shooting based on the analysis result of the control processing program or inputting an illegal signal at a predetermined timing by connecting a so-called “hanging board” it can.

  Next, a specific example of the effect operation by displaying various effect images centering on the variable display of the decorative design in the display area of the image display device 5 will be described. In the effect control board 12, in response to the reception of the first change start command and the second change start command transmitted from the main board 11, for example, based on the change pattern specified by the change pattern specification command, for example, the change When the CPU of the control microcomputer 120 supplies a predetermined display control command to the VDP 121 or the like, the "left", "middle" and "right" decorative symbol display portions 5L provided in the display area of the image display device 5 are provided. , 5C, 5R, start the variation of the decorative pattern.

  Below, the specific example in the case where the variable display mode of a decorative symbol is "non-reach" is demonstrated among the cases where a variable display result is "loss". In the case where the specific effect is not executed or the specific effect of the “pseudo ream” is executed while the variable display mode of the decorative symbol is “non-reach”, the specific effect of the “slip” is executed in FIG. 67. When it is displayed, an example of display operation in the case where the specific effect of “development opportunity eye end” is performed is shown. For example, when the fluctuation pattern of the non-reach PA1-1 is designated by the fluctuation pattern designation command, the specific effect as shown in FIGS. 67 (C1) and (C2) is not executed, and the fluctuation pattern of the non-reach PA1-4 67 (E1) to 67 (E4) is executed, and a variation pattern of non-reach PA1-5 is designated, as shown in FIGS. 67 (D1) to 67 (E1) to 67 (E4). When a specific effect of “pseudo series” as shown in (D6) is executed, and a variation pattern of non-reach PA 1-7 is specified, “development opportunities as shown in FIGS. 67 (F1) to (F6) A specific effect of “eye end” is performed. In FIG. 67 (A), for example, in response to the start of fluctuation of the special symbol in the special figure game, the decorative symbol display portions 5L, 5C, 5R of "left", "middle", "right" are decorative symbols. Start to change. After that, for example, as shown in FIG. 67 (B), the decorative symbol indicating the numeral “6” is stopped and displayed (provisional stop display) on the “left” decorative symbol display unit 5L.

  When the specific effect is not performed or when the specific effect of "slip" is performed, the decorative symbol indicating the number "6" is the left final stop symbol in the decorative symbol variation setting process of step S161 shown in FIG. In response to the determination, stop display of the decorative symbol as shown in FIG. 67 (B) is performed. In addition, if it is the fluctuation pattern of non reach PA1-4 where the specified effect of “slip” is executed when the variable display mode of the decorative symbol is “non-reach”, it is always in the decorative symbol display section 5R of “right” A special effect of "slip" to re-variate the decorative pattern temporarily displayed temporarily is displayed, and the decorative pattern to be stopped and displayed on the "left" decorative pattern display section 5L must be changed depending on the specific effect of "slip" Just do it. In addition, when the specific effect of “develop chance eye end” is executed, the combination of the ornamental symbols constituting the predetermined development chance eyes in the decorative symbol variation setting process of step S161 shown in FIG. 63 is the left middle right final In response to the determination as the stop symbol, the decorative symbol as shown in FIG. 67 (B) may be stopped and displayed. When the specific effect of "pseudo reunion" is executed, the decorative symbol indicating the number "6" is determined as the left final stop symbol in the decorative symbol variation setting process of step S161 shown in FIG. 63, and the left final The decorative symbol as shown in FIG. 67 (B) is stopped and displayed corresponding to the combination of the decorative symbols constituting the predetermined pseudo run chance being determined based on the stop symbol as the left middle right temporary stop symbol. Just do it.

  After that, when the specific effect is not executed, as an example, as shown in FIG. 67 (C1), the decorative symbol display portion 5R of “right” stops displaying the decorative symbol showing the numeral “7” (provisional stop display 67), and after the stop display (provisional stop display) of the decorative symbol indicating the numeral “4” is made in the “in” decorative symbol display section 5C as shown in FIG. 67 (C2), it becomes a non-reach combination The finalized decorative symbol is displayed on stop display (final stop display). At this time, the finalized decorative symbol to be stopped and displayed on the decorative symbol display portion 5R of "right" and the decorative symbol display portion 5C of "middle" is determined by the decorative symbol variation setting process of step S161 shown in FIG. Good.

  On the other hand, when the specific rendition of “pseudo series” is executed, as an example, as shown in FIG. 67 (D1), the numeral “7” is shown in the “right” decorative symbol display portion 5R. After stopping display of the decorative pattern (temporary stop display), as shown in FIG. 67 (D2), stop displaying the decorative pattern indicating the number “6” in the decorative pattern display section 5C of “middle” (temporary stop display ), The decoration pattern which becomes the false connection chance eye is stopped and displayed. At this time, for example, after temporary stop display such as swing fluctuation display of decorative symbol is performed, as shown in FIG. 67 (D3), decorative symbol display portions 5L, 5C, 5R of "left", "middle", "right" It is sufficient to change the decoration pattern again in all. Thereafter, as shown in, for example, FIGS. 67 (D4) to (D6), a decorative symbol indicating numbers “6”, “7”, “4” in a predetermined order such as “left” → “right” → “middle” Is sequentially displayed as a stop (provisional stop display), and then the finalized display (final stop display) is displayed as a finalized decorative symbol that is a non-reach combination.

  When the specific effect of "slip" is executed, as an example, as shown in FIG. 67 (E1), the decorative symbol display portion 5R of "right" stops displaying the decorative symbol showing the numeral "5" After temporary stop display), as shown in FIG. 67 (E2), the decorative symbol is re-varied in the “right” decorative symbol display portion 5R. Thereafter, as shown in FIG. 67 (E3), the decorative symbol indicating the numeral “7” is derived and displayed on the “right” decorative symbol display unit 5R, thereby changing the decorative symbol to be stopped and displayed. Here, as shown in FIG. 67 (E1), the decorative symbol temporarily displayed on the "right" decorative symbol display unit 5R is, for example, the right final in the decorative symbol variation setting process of step S161 shown in FIG. It may be determined based on the stop symbol. After that, for example, as shown in FIG. 67 (E4), after the stop display (provisional stop display) of the decorative symbol indicating the number “4” is performed in the “in” decorative symbol display unit 5C, the non reach combination is decided The decorative design is displayed in stop (final stop display).

  When the specific effect of “development opportunity eye end” is executed, as an example, as shown in FIG. 67 (F1), the decorative symbol indicating the number “7” is displayed on the decorative symbol display portion 5R of “right”. After the stop display (temporary stop display), as shown in FIG. 67 (F2), the decorative symbol display section 5C of "middle" is stopped (temporary stop display) on the decorative symbol indicating the numeral "7". As a result, the decorative pattern that constitutes the predetermined development chance eye is temporarily stopped. At this time, for example, as shown in FIG. 67 (F3), an effect display is performed such that the decorative symbol displayed in the temporary stop rotates in a predetermined direction, and then, as shown in FIG. 67 (F4), the decorative symbol is displayed. In the reach display state, an effect display (flicker effect) is performed to make the player expect the development to occur. Here, if the decorative symbol displayed in the temporary stop is rotated in the reverse direction from the effect display as shown in FIG. 67 (F4), the reach display state is developed. In this example, as shown in FIG. 67 (F5), for example, the effect display is performed such that the decorative symbol displayed in the temporary stop state is returned to the original state without the development of the reach display state. From this point on, the finalized decorative symbol constituting the predetermined development chance eye is displayed as it is as a stop (final stop display).

  FIG. 68 shows an example of display operation in the case where the specific effect of "intro" is executed among the cases where the variable display mode of the decorative design is "non-reach". For example, when the fluctuation pattern of the non-reach PA 1-6 is designated by the fluctuation pattern designation command, a specific effect of “intro” as shown in FIG. 68 is executed. In FIG. 68A, for example, in response to the start of fluctuation of the special symbol in the special figure game, the decorative symbol display portions 5L, 5C, 5R of “left”, “middle”, “right” are decorative symbols Start to change. After that, for example, as shown in FIG. 68 (B), the decorative symbol indicating the numeral “3” is stopped and displayed (provisional stop display) in the decorative symbol display section 5L of “left” and the “right” decorative symbol is displayed The decorative symbol indicating the number "2" is displayed in stop in the part 5R (temporary stop display), and the effect image indicating the character CH1 is displayed at the display position corresponding to the "in" decorative symbol display portion 5C. Ru. In addition, the effect image which shows character CH1 should just appear as an effect image by the reach effect performed when a decorative pattern is derived | led-out and displayed in a reach display state later.

  Subsequently, for example, as shown in FIG. 68 (C), after the effect display is performed such that the decorative symbol displayed on the temporary stop display on the left and right decorative symbol display portions 5L and 5R is updated. For example, as shown in FIG. 68 (D), along with the update display of the effect image in which the character CH1 changes, in the decorative symbol display portion 5L of "left", the update to the decorative symbol showing the numeral "4" In the "right" decorative symbol display section 5R of the "right", the update display to the decorative symbol indicating the number "3" is performed respectively. Also, for example, as shown in FIG. 68E, after effect display is performed to further update the decorative symbols displayed in the "left" and "right" decorative symbol display sections 5L and 5R, For example, as shown in FIG. 68 (F), along with the update display of the effect image in which the character CH1 changes, the update display to the decoration pattern showing the number "2" in the decoration design display portion 5L of "left" However, in the "right" decorative symbol display unit 5R, update display to the decorative symbol indicating the number "1" is performed. Then, for example, as shown in FIG. 68 (G), along with the updated display of the effect image in which the character CH1 changes, temporary stop display is performed on the “left” and “right” decorative symbol display portions 5L and 5R. For example, as shown in FIG. 68 (H) to (K), after the effect display is performed to update the decorative symbol, the decorative symbol indicating "2" is displayed on the decorative symbol display portion 5L of "left". While the temporary stop display is performed, the decorative symbols indicating the numbers “1” to “3” are updated and displayed in a predetermined order in the “right” decorative symbol display unit 5R. Thereafter, after the effect display such as updating the decorative symbol as shown in FIG. 68 (L) is performed in the decorative symbol display portion 5R of “right”, for example, “3” as shown in FIG. 68 (M) A decorative pattern indicating the numbers of is temporarily displayed. In this way, when the specific effect of "intro" is finished, for example, as shown in FIG. Be done.

  FIG. 69 shows an example of display operation in the case where the specific effect of "intro" is executed among the cases where the variable display mode of the decorative design is "reach". For example, the variation pattern of the super PA3-3, super PA3-7, super PB3-3, super PA4-3, super PA4-7, super PA5-3, super PB4-3, super PB5-3 by the variation pattern designation command When one of them is designated, a specific effect of "intro" as shown in FIG. 69 is executed. In the display operation example shown in FIG. 69, the same effect display as that of FIGS. 68A to 68L is performed in the portions of FIGS. Thereafter, in the decorative symbol display unit 5R of "right", the decorative symbol indicating the numeral "2" is temporarily stopped and displayed as shown in FIG. 69 (M), for example, and the decorative symbol display unit 5L of "left" is displayed. It becomes a reach display state in line with the decorative pattern displayed temporarily. Thus, when the specific effect of "intro" is finished, for example, as shown in FIG. 69 (N), after the effect image indicating the character CH1 is erased, the reach corresponding to the display of the decorative symbol in the reach display state A presentation etc. are started, and then a finalized display (final stop display) is displayed on the finalized display design that will be a reach combination and the finalized display design that will be a big hit combination.

  FIGS. 70 to 72 show display operation examples when the variable display result is "big hit" and the big hit type is other than "probable". In FIG. 70 (A), for example, in response to the start of fluctuation of the special symbol in the special figure game, the decorative symbol display portions 5L, 5C, 5R of "left", "middle", "right" are decorative symbols. Start to change. After that, for example, as shown in FIG. 70 (B), the decorative symbol indicating the numeral "6" is stopped and displayed (provisional stop display) in the decorative symbol display section 5L of "left".

  Then, for example, when the specific effect of “slip” is executed, such as when the variation pattern is the super PA 4-2, as shown in FIG. 70 (C1) to (C3), as an example, After making a temporary stop display of the decorative pattern in the left "" and "right" decorative symbol display portions 5L and 5R, after changing the decorative pattern again in the "right" decorative symbol display portion 5R, the stop display is performed. The effect display for changing the decorative pattern to be stopped and displayed is performed so that the decorative pattern is derived and displayed in the reach display state. Further, for example, when a specific effect of “pseudo series” is executed, such as when the variation pattern is the super PA 4-4, as shown in FIGS. 70 (D1) to (D5) as an example, After the decorative symbols are displayed temporarily on all of the decorative symbol display parts 5L, 5C and 5R of "left", "middle" and "right", the decorative symbols are displayed on all the decorative symbol display parts 5L, 5C and 5R The effect display is made to change (simulated continuous change) again. After that, the decorative symbols indicating the numeral “6” are aligned in the “left” and “right” decorative symbol display sections 5L and 5R and stop display (temporary stop display), so that the variable display state of the decorative symbols is displayed. Reached. Further, for example, when the specific effect of the “development opportunity eye” is executed, such as when the variation pattern is the super PC 4-1, as shown in FIGS. 70 (E1) to (E6) as an example. , "Left", "middle", "right" All of the symbol display parts 5L, 5C, 5R stop display (provisional stop display) the combination of the decoration pattern which is a predetermined development chance eyes, then temporarily After the effect display is performed such that the decorative symbol stopped and displayed is rotated in the reverse direction, the decorative symbol is derived and displayed in the reach display state.

  After the decorative symbol is derived and displayed in the reach display state as shown in FIG. 70 (C3) and FIG. 70 (D5), for example, as shown in FIG. 71 (A), the “in” decorative symbol display portion 5C The speed of change of the decoration pattern in the Then, for example, when the variation pattern is any of normal PA2-5 to normal PA2-8, as shown in FIG. 71 (B), "6" is shown in the "in" decorative symbol display portion 5C. A reach effect of “normal” is performed in which the numbers are “left” and “right” and the stop display (provisional stop display) is performed in line with the decorative symbol display portions 5L and 5R. In the example shown in FIG. 71 (B), although the decorative symbol constituting the big hit combination is stopped and displayed corresponding to the case where the variable display result is "big hit", the variable display result is "lost". In this case, for example, as shown in FIG. 71 (H), the effect image is displayed after the effect image showing that the number indicating "5" is stopped and displayed on the decorative symbol display section 5C of "middle" In the decoration design display section 5C of 5C, stop display of the decoration design of the number showing "5", or in the decoration design display section 5C of "medium" stop display of decoration design except the number showing "6", etc. Thus, it is possible to stop and display the finalized decorative symbol that constitutes the reach-loss combination, and to end variable display of the decorative symbol. When any of the reach effect α1 to reach effect α3 and the reach effect β1 to reach effect β3 is executed, for example, as shown in FIG. The variation speed of the decorative symbol in the above increases again, and various reach effect display is started. For example, in reach effect β1, after the effect image indicating the character CH2 as shown in FIG. 71 (D) is displayed, the corresponding reach effect display progresses. Also, in the case of one of reach effect α1 to reach effect α3, after the effect image indicating character CH1 as shown in FIG. 71 (E) is displayed, the reach effect as shown in FIG. 71 (F) The display proceeds. Then, in the reach effect α1, for example, as shown in FIG. 71 (G), a decorative symbol appears in the stop display (provisional stop display) in the first stage effect display. In the example shown in FIG. 71 (G), the decorative symbol making up the big hit combination is stopped and displayed corresponding to the case where the variable display result is "big hit", but the variable display result is "losing" In this case, it is possible to stop and display the finalized decorative symbol that constitutes the reach loss combination, and to end variable display of the decorative symbol. On the other hand, in reach effect α2 and reach effect α3, for example, as shown in FIGS. 71 (H) and (I), the process proceeds to the second stage effect display. On the other hand, in reach effect β2 and reach effect β3, after the effect image indicating character CH3 as shown in FIG. 71 (J) is displayed, the corresponding reach effect display progresses.

  As shown in FIG. 71 (I), when the second stage effect display progresses, in the case of the reach effect α2, for example, as shown in FIG. 72 (A), the stop display (provisional stop at the second stage effect display Displayed decorative designs appear. In addition, when a variable display result is "loss", as shown, for example to FIG. 72 (B), the decorative pattern currently displayed is not changed and the stop decorative symbol which comprises a reach loss combination is made to stop-display, It is sufficient to end the variable display of the decorative design. On the other hand, in the reach effect α3, for example, as shown in FIGS. 72 (B) to (D), the process proceeds to the third stage effect display (also referred to as “relief effect”). Then, a decorative pattern for which a stop display (provisional stop display) is made in the third stage effect display appears. Here, when the promotion effect during change is not executed, as shown in FIG. 72 (E), the decorative symbol displayed in temporary stop is displayed as a finalized stop symbol (final stop display). Ru. On the other hand, in the case of executing a promotion effect during change, as shown in FIG. 72 (G), after a temporary stop display of a decorative pattern that is usually a big hit combination as shown in FIG. In the state where the same decorative pattern is aligned in all of the decorative pattern display portions 5L, 5C, 5R on the left, "middle" and "right", they are varied again. Then, when the promotion during change promotion effect is executed in response to the jackpot type being "the first definite change", for example as shown in FIG. After being let go, there is a promotion promotion success during change that stops and displays a finalized decorative symbol that will be a combination of probability variation big hit. In addition, when the promotion failure effect during change is executed, after performing re-variation of the decorative symbol as shown in FIG. 72 (G), for example, as in FIG. It is sufficient to stop and display the decorative pattern.

  FIG. 73 shows an example of display operation when the variable display result is “big hit” and the big hit type is “probable”. In this case, first, as shown in, for example, FIG. 73 (A), "left", "middle", "right" decorative symbol display portion 5L corresponding to the start of fluctuation of the special symbol in the special figure game, etc. , 5C, 5R all start the variation of the decorative pattern. Then, for example, as shown in FIGS. 73 (B) to (D), a decorative pattern showing numbers “1”, “5” and “3” in a predetermined order such as “left” → “right” → “middle” The stop display (provisional stop display) is sequentially performed, and then the finalized display (final stop display) is performed on the finalized decorative symbol that is a predetermined probability chance eye. At this time, as a jackpot effect in the two-round jackpot state, for example, as shown in FIG. 73E, an effect image is displayed to notify transition to a special effect mode such as “LIVE mode”. Then, as an ending effect corresponding to the end of the two round big hit state, for example, the effect image as shown in FIG. 73 (F) is displayed, and for example, the display enabling recognition of the “LIVE mode” can be made, for example As shown in FIG. 73 (G), the display is kept displayed even after the change of the next decorative pattern is started.

  In the example of the special symbol process process shown in FIG. 53, the start winning determination process of step S101 is executed each time a timer interrupt occurs, and the stored data of input port register PI read out in step S201 shown in FIG. 54. From (input port data), it is determined whether the first start winning signal SS1 or the second start winning signal SS2 has been turned on (steps S202 and S205). On the other hand, instead of the start winning determination process of step S101 shown in FIG. 53, at least one of the random number value register 559A to be the random number value register R1D in the random number circuit 509 and the second random number value register 559B to be the random number value register R2D. When numerical data is taken in (or latched) at one of the ends, interrupt processing may be performed according to the interrupt request from the random number circuit 509. In this case, for example, in the random number circuit setting process shown in FIG. 49, the bit values in bit numbers [1] and [0] of the random number interrupt control register RDIC are “1” as shown in FIG. deep. Then, when an interrupt request is generated from the random number circuit 509, the CPU 505 executes a start winning interrupt process as shown in the flowchart of FIG. 74 (B), for example.

  In the start winning interrupt process shown in FIG. 74B, the CPU 505 first reads out the random number latch flag data RDFM0 stored in the bit number [0] of the random number latch flag register RDFM (step S601). Then, it is determined whether the read value in step S601 is "1" (step S602). Here, as shown in FIG. 22B, the random number latch flag data RDFM0 stored in the bit number [0] of the random number latch flag register RDFM takes numerical data into the random value register 559A which becomes the random value register R1D. When it is turned on, the bit value becomes "1". Therefore, when it is determined in step S602 that the read value is "1" (step S602; Yes), it is determined that the numerical data is taken into random number value register 559A based on the first start winning signal SS1 being turned on. Then, the start port buffer value is set to "1" (step S603).

  If it is determined in step S602 that the read value is "0" (step S602; No), the random number latch flag data RDFM1 stored in the bit number [1] of the random number latch flag register RDFM is read (step S604) . Then, it is determined whether the read value in step S604 is "1" (step S605). Here, as shown in FIG. 22B, the random number latch flag data RDFM1 stored in the bit number [1] of the random number latch flag register RDFM is the numerical data to the second random number value register 559B which becomes the random number value register R2D. The bit value becomes "1" when is acquired. Therefore, when the read value is determined to be "1" in step S605 (step S605; Yes), it is determined that the numerical value data is taken into random number value register 559B based on the second start winning signal SS2 being turned on. Then, the start port buffer value is set to "2" (step S606).

  After executing any of the processes of steps S603 and S606, the CPU 505 reads out the pending storage number count value according to the starting opening buffer value (step S607). This process may be the same process as the process of step S214 shown in FIG. On the other hand, when the read value is determined to be "0" in step S605 (step S605; No), numerical data that is an appropriate random number value corresponding to the interrupt request from the random number circuit 509 is fetched. It is determined that the process is not performed, and the process for start-up winning interrupt error is executed (step S608), and then the start-up winning interrupt process is ended. In the start winning interruption error process, for example, the setting for transmitting a predetermined effect control command to the effect control board 12 is performed to notify that the abnormality in the start winning is detected by the effect device, and the like. Until the error cancellation procedure (for example, system reset or operation of the error cancellation switch) is taken, the process may not proceed.

  After the process of step S606 is performed, the processes of steps S609 to S616 illustrated in FIG. 74B are performed in the same manner as the processes of steps S215 to S224 illustrated in FIG. Here, after the process of step S616 is performed, the process proceeds to step S604. As a result, even when both the first starting opening switch 22A and the second starting opening switch 22B simultaneously detect a starting winning combination of valid gaming balls, it is possible to surely complete the processing based on the detection of both starting starting winning combinations.

  When such start-up winning interrupt processing is executed, when the game ball enters the first start-up winning opening or the second start-up winning opening (start-up winning), the random number register 559A corresponding to the start-up winning. And a process for extracting numerical data from the random number circuit 509 in response to an interrupt request based on the fact that numerical data that is a random value is taken into the random number value register 559B (for example, random number setting process executed in step S613) 56 shown in FIG. 56 included in FIG. 56), and it is determined whether the first start winning signal SS1 or the second start winning signal SS2 is turned on each time a timer interrupt occurs. The processing load on the CPU 505 or the like included in the game control microcomputer 100 can be reduced.

  As described above, in the pachinko gaming machine 1 according to the above embodiment, the system reset or the power on can be performed by setting the bit value in the bit number [4-3] of the security time setting KSES to a value other than "00". Based on the variable setting time which changes in a predetermined time range each time the initial setting process is executed, the time component included in the security time can be set. As a result, it becomes difficult to specify the operation start timing of the random number circuit 509, the numerical data to be updated, etc. from the operation start timing by powering on the pachinko gaming machine 1 or system reset, etc., and the analysis result of the game control processing program By connecting the so-called "hanging board" and inputting an illegal signal at a predetermined timing, an action such as generating a big hit gaming state illegally can be reliably prevented.

  Also, by setting the bit value in bit number [2-0] of security time setting KSES to a value other than "000", any of a plurality of extension times that can be selected in advance in addition to the fixed time can be used as the security time. It can be set as an included time component. As a result, it becomes difficult to specify the operation start timing of the random number circuit 509, the numerical data to be updated, etc. from the operation start timing by powering on the pachinko gaming machine 1 or system reset, etc., and the analysis result of the game control processing program By connecting the so-called "hanging board" and inputting an illegal signal at a predetermined timing, an action such as generating a big hit gaming state illegally can be reliably prevented.

  The CPU 505 incorporated in the game control microcomputer 100 determines the fluctuation pattern type using any of the fluctuation pattern type determination tables shown in FIGS. 35, 36, 37, 39 and 40, and then the fluctuation. Based on the pattern type, the fluctuation pattern is determined using one of the fluctuation pattern determination tables shown in FIGS. As a result, when adding the variation pattern type or changing the occurrence rate, only the setting of the determination value in the variation pattern type determination table may be changed, so the setting time can be shortened. In addition, in the case of adding a detailed change pattern or changing the occurrence rate, only the setting of the determination value in the change pattern determination table may be changed, so the setting time can be shortened. That is, since the determination rate of the variation pattern type and the determination rate of the variation pattern can be set separately, it is possible to easily perform design change relating to the variation pattern type and the distribution of the variation pattern.

  Here, as a gaming machine using the values of a plurality of variation type counters, the reach type etc. is determined based on the value of the first variation type counter CS1, and a more detailed symbol based on the value of the second variation type counter CS2. What determines the fluctuation | variation aspect is proposed (for example, stage 0209, 0211, 0212 of FIG. 30, etc. of Unexamined-Japanese-Patent No. 2005-160763 etc.). However, in the technique proposed in this document, for example, the jackpot gaming state in which the number of times of execution of the round, the opening time of the big winning opening, etc. is different from the 15 round jackpot state in addition to the 15 round jackpot state (specifically, Even when the jackpot type is provided "two round jackpot state corresponding to" probable ", etc., the variable display result is determined to be" big hit "regardless of the jackpot type. Therefore, even when controlled to the big hit gaming state such as 2 round big hit status different from the normal big hit gaming state such as 15 round big hit status, reach type and symbol fluctuation similar to the case where it is controlled to the normal big hit gaming status Aspects and the like appear at a common rate, which may give the player a sense of distrust. On the other hand, in the pachinko gaming machine 1 according to the above embodiment, based on the determination that the jackpot type is "probable" in step S243 shown in FIG. 58, it is used for determination in step S273 shown in FIG. In the big hit variation pattern type determination tables 132D, 132H, and 132I set in step S262, for example, the special CA 4-1, the special CA 4-2, the special CB 4 -1, the special CB 4-2, the special CC 4 -1, and the special CC 4 The table data is configured such that a variation pattern type different from the case where the big hit type is other than "probable", such as the variation pattern type of -2, is included. In this way, when the big hit type is "probable", the big hit type is "probable" by determining the variation pattern type or the variation pattern different from the case other than "probable". Even though the game is controlled to the round big hit state, it is possible to prevent the player from being distrusted by performing the same rendering operation as when controlled to the 15 round big hit state.

  In the random number circuit 509 built in or externally attached to the game control microcomputer 100, the latch flip flop 557B, the random number latch selector 558 B and the random number value are obtained by a combination of the latch flip flop 557A, the random number latch selector 558A and the random value register 559A. The numerical data in the random number sequence RSN output from the random number sequence changing circuit 555 is fetched and stored so as to update the numerical data to be a random number separately from the combination of the register 559B. As a result, it is possible to obtain numerical data that is an accurate random number even when a game ball simultaneously enters a plurality of start areas, such as the first and second start winning openings, and a start winning occurs. The clock flip flop 552, the random number generation circuit 553 and the random number sequence change circuit 555 are a combination of the latch flip flop 557A, the random number latch selector 558A and the random value register 559A, the latch flip flop 557B, and the random number latch selector 558B. The random number update clock RGK used to update the count value permutation RCN and the random number sequence RSN by being shared with the combination of the random number value register 559B and being supplied to the random number generation circuit 553 is It becomes a common random number update clock signal. Thereby, the circuit configuration in the random number circuit 509 can be simplified, and the manufacturing cost of the pachinko gaming machine 1 can be reduced. The latch flipflops 557A and 557B branch at the branch point BR1 with the latch clock RC0 generated by the common clock flipflop 552 so that the signal states change in a common cycle. The start-up winning latch signal SL1 and the start-up winning latch signal SL2 are generated using the clocks RC1 and RC2 to obtain numerical data that becomes random numbers. Also in this case, the circuit configuration of the random number circuit 509 can be simplified, and the manufacturing cost of the pachinko gaming machine 1 can be reduced.

  In addition, the oscillation frequency of the random number clock RCLK generated by the random number clock generation circuit 112 and the oscillation frequency of the control clock CCLK generated by the control clock generation circuit 111 are different from each other. The oscillation frequency does not become an integral multiple of the other oscillation frequency. Therefore, the oscillation frequency of the random number update clock RGK generated by the clock flip flop 552 of the random number circuit 509 and the clock RC0 for latch is half the oscillation frequency of the clock RCLK for random numbers, but the oscillation of the control clock CCLK The frequency and the oscillation frequency of the internal system clock SCLK, which is half the oscillation frequency of the control clock CCLK, are different from each other. Thus, synchronization is prevented from occurring between the control clock CCLK and the internal system clock SCLK and the random number update clock RGK, and the random number generation circuit 553 and the random number sequence change circuit 555 generate the random number circuit 509 from the operation timing of the CPU 505. It becomes difficult to specify the update timing of numerical data in the random number sequence RSN. As a result, it is possible to reliably prevent shooting, etc. based on the analysis result of the updating operation of the numerical data to be the random value in the random number circuit 509 from the operation timing of the CPU 505. The oscillation frequencies of the latch clocks RC1 and RC2 generated by branching the latch clock RC0 are also different from the oscillation frequencies of the control clock CCLK and the internal system clock SCLK. In this manner, synchronization is prevented from occurring between the control clock CCLK or the internal system clock SCLK and the latch clocks RC1 and RC2, and from the operation timing of the CPU 505, the random number circuit 509 takes in numerical data to be a random value. It becomes difficult to identify the timing. As a result, it is possible to reliably prevent, for example, shooting based on the analysis result of the operation of taking in numerical data to be a random value in the random number circuit 509 from the operation timing of the CPU 505.

  The CPU 505 incorporated in the game control microcomputer 100 executes, for example, a random number circuit setting process as shown in FIG. 49 as a setting process in step S33 shown in FIG. The process of step S35 is repeatedly executed until the on operation of the game start switch 31 installed on the main substrate 11 is detected after starting the game to control the progression of the game in the pachinko gaming machine 1 Do not start the game control process execution. Thus, it becomes difficult to specify the operation start timing of the random number circuit 509 and the update operation of the numerical data from the start timing of the game control processing. Therefore, it is possible to reliably prevent the shooting based on the result of analyzing the start timing of the game control process, the input of an unauthorized signal by the connection of a so-called "hanging board", and the like. When the random number circuit 509 is externally attached to the game control microcomputer 100, for example, the program management is performed independently of the process performed by the random number circuit 509 before the CPU 505 executes the process of step S35. After the initial setting based on the storage data of the area, the operation of generating the random value may be started.

  In the random number circuit 509 built in or externally attached to the gaming control microcomputer 100, the random number generation circuit 553 is set corresponding to the bit value of the bit number [0] of the second random number initial setting KRS2 being "1". The start value of the numerical value data in the random number sequence RSN output from the random number sequence changing circuit 555 can be changed at each system reset. As a result, even if the operation start timing of the random number circuit 509 can be specified, it becomes difficult to specify the numerical data read from the random value register 559A or the random value register 559B provided in the random number circuit 509. It is possible to reliably prevent the shooting based on the analysis result of the control processing program and the input of an unauthorized signal due to the connection of a so-called “hanging board”.

  In external bus interface 501 provided in microcomputer 100 for game control, the internal resource access control circuit 501A allows external reading of internal data of microcomputer 100 for game control such as storage data of ROM 506 by other than the internal circuit such as CPU 505. Limited This makes it possible to prevent the game control processing program, such as a user program for game control stored in the ROM 506, from being read from the outside of the game control microcomputer 100 and provided for analysis or the like. Then, it is possible to reliably prevent the shooting based on the analysis result of the game control processing program and the input of an illegal signal by the connection of a so-called "hanging board".

  The serial communication circuit 511 included in the gaming control microcomputer 100 uses the first channel transmission / reception circuit 571A capable of transmitting and receiving serial data in both directions, to the payout control microcomputer 150 mounted on the payout control board 15. Perform bi-directional serial communication. On the other hand, the second channel transmission circuit 571B, which can only transmit serial data in a single direction from the main substrate 11, uses a single unit with the effect control microcomputer 120 mounted on the effect control substrate 12 Perform serial communication in the direction. Thereby, the signal input with respect to the main board | substrate 11 can be prohibited from the side of the production control board 12, and a fraudulent act can be prevented.

  The random number circuit 509 built in or externally attached to the game control microcomputer 100 is stored in the bit number [4] of the internal information register CIF when the frequency monitoring circuit 551 detects a frequency abnormality in the random number clock RCLK. The bit value of the internal information data CIF4 is set to "1". Then, CPU 505 determines that the number of times the read value of internal information data CIF 4 is continuously determined to be “1” in step S 63 shown in FIG. 50, for example, has reached the clock abnormality determination value in step S 65. When it is determined, it is determined that an abnormality has occurred in the operation state of the random number circuit 509. As a result, it is possible to reliably prevent a wrongdoing by inputting a wrong signal as the random number clock RCLK.

  The CPU 505 incorporated in the game control microcomputer 100 repeatedly executes, for example, the process of step S71 shown in FIG. 50 to thereby output to the random number value take-in designation register RDLT equivalent to the output of the latch signal to the random number circuit 509. The bit value “1” is written, and the numerical value data stored in the random number value register 559A or the random number value register 559B is read a plurality of times. Then, all bits of the numerical data read out are monitored by executing the processing of steps S72 to S74, etc., and an abnormality occurs in the operation state of the random number circuit 509 in step S76 based on the presence or absence of non-changing bit data. It is determined whether or not. As a result, it is possible to reliably and easily detect that an abnormality has occurred in the operation state of the random number circuit 509, and to prevent fraud.

  In the random number circuit 509 built-in or externally attached to the game control microcomputer 100, when the start winning of the game ball at the first start winning opening formed by the normal winning ball device 6A is detected by the first start opening switch 22A Then, the numerical data in the random number sequence RSN output from the random number sequence changing circuit 555 is fetched so that the numerical value data to be a random value is updated by the combination of the latch flip flop 557A, the random number latch selector 558A and the random value register 559A. Remember. On the other hand, when the start winning of the game ball at the second starting winning opening formed by the normally variable winning ball device 6B is detected by the second starting opening switch 22B, the latch flip flop 557B, the random number latch selector 558B and the disturbance The numerical data in the random number sequence RSN output from the random number sequence changing circuit 555 is fetched and stored so that the numerical data to be a random number is updated by the combination of the numerical value register 559B. As a result, even when the game ball enters both the first starting winning opening and the second starting winning opening in a short time (starting winning), the random number value acquired corresponding to one starting winning is the other, It is possible to reliably prevent the inconvenience of being used as a random number value corresponding to the start winning combination of.

  In step S240 shown in FIG. 58, the CPU 505 incorporated in the gaming control microcomputer 100 determines in step S242 that the numerical data representing the random number value MR1 for special view display result determination matches the jackpot determination value data. After the jackpot type determination table 131 shown in FIG. 34 is set as the use table, the jackpot type is determined to be any of a plurality of types in step S243. And, in the big hit classification decision table 131, either of the large hit classification multiple types either on the basis of the fact that the 1st start condition for starting the special figure game which uses the 1st special figure with the 1st special symbol display device 4A is satisfied The jackpot type may be any of a plurality of types on the basis of the case where it is determined and the second start condition for starting the special figure game using the second special figure by the second special symbol display device 4B is satisfied. The table data is configured such that the ratio at which the jackpot type is determined to be "probable" differs depending on the case of determination. As a result, it is possible to make the player's sense of expectation for being controlled to the two round big hit state different according to which of the first start condition and the second start condition is satisfied, and to improve the game interest. In particular, when the second start condition is satisfied, the jackpot type is not determined to be “probable”, for example, during a period when the second start winning opening is likely to be controlled to the enlarged open state, such as a probability change state or a short time state, It is possible to prevent the game interest from being lowered by the type being "probable", and it is possible to increase the frequency with which prize balls are paid out in a definite change state or a short time state.

  When an interrupt request is generated from the random number circuit 509, the CPU 505 incorporated in the game control microcomputer 100 reads out the random number latch flag data RDFM0 in step S601 shown in FIG. 74B, and then proceeds to step S602. By determining whether the read value is “1” or not, it is determined whether the first starting condition is successful or not based on the fact that the gaming ball has entered the first starting winning opening (start winning). In addition, after the random number latch flag data RDFM1 is read in step S604, the game ball enters the second start winning opening by determining whether the read value is "1" in step S605 (start Whether the second start condition is successful or not is determined based on winning. As a result, the determination process becomes easier as compared with the case where it is determined whether the first start condition or the second start condition is satisfied each time a timer interrupt occurs, and the processing load on the CPU 505 can be reduced.

  On the power supply substrate 10, for example, a clear switch 304 as shown in FIG. 3 is installed. When the CPU 505 of the game control microcomputer 100 determines in step S27 shown in FIG. 48 that the clear switch 304 has been turned on, the random number circuit 509 is executed by executing the processing of step S31 and step S32. Perform game control initialization including the operation state of. Then, the game start switch 31 is installed on the main substrate 11 as shown in FIG. 2, for example, to initialize the operation state of the random number circuit 509 and then start the execution of the game control processing program. Since it is required to turn on both the clear switch 304 installed on the game start switch 31 installed on the main board 11 and the clear switch 304 installed on the main board 11, it is possible to prevent a fraudulent act such as shooting.

  The random number circuit 509 incorporated in or externally attached to the gaming control microcomputer 100 is, for example, the step shown in FIG. 49 by the CPU 505 when the bit value in the bit number [0] of the second random number initial setting KRS2 is “1”. In response to the execution of the process of S55, etc., the start value of the numerical data to be a random value is changed at each system reset. At this time, the start value to be changed at each system reset may be determined using, for example, the count value of a free run counter built in the game control microcomputer 100. As a result, the initial value can be determined using different initial value determination data depending on the timing of system reset and the like, and it is possible to prevent fraudulent acts such as shooting.

  The present invention is not limited to the above embodiment, and various modifications and applications are possible. For example, in the above embodiment, the extension time set in step S4 shown in FIG. 47 corresponds to the bit value in bit number [2-0] of security time setting KSES, and can be selected in advance. It has been described that the extension time is not changed every system reset. However, the present invention is not limited to this, and the extension time to be added to the fixed time may be determined as one of a plurality of extension times for each system reset, for example, by setting in the user program stored in the ROM 506. May be In this case, the extension time set in step S4 is defined to be longer than the longest variable set time that can be set in step S8. Then, after the rough extension time is determined in step S4, the detailed extension time may be determined in step S8. As a result, the security time to be in the security mode when the pachinko gaming machine 1 is turned on or when the system is reset can be largely changed every system reset, and the operation of the random number circuit 509 starts from the operation start timing of the pachinko gaming machine 1 It is more difficult to identify the start timing and the numerical data to be updated.

  Also, for example, the extension time set in step S4 shown in FIG. 47 may be determined using an ID number given to each chip constituting the gaming control microcomputer 100. As an example, part or all of operations such as addition / subtraction / multiplication / division operations using ID numbers for performing predetermined scramble processing on ID numbers, and extension time corresponding to values calculated May be set. In this case, the extension time may be randomly determined for each system reset, for example, by changing an arithmetic expression used to determine the extension time for each system reset. Further, for example, the count value of the free run counter, the ID number, and the ID number are determined so that an arithmetic expression for determining the extension time using the ID number is determined corresponding to the count value of the free run counter stored at system reset. The extension time may be determined randomly at each system reset by using a combination of Also, even when changing the start value of the random number generated by the random number circuit 509 every system reset, the start value of the random number is used by combining the count value of the free run counter and the ID number. You may decide.

  In the above embodiment, the random number clock generation circuit 112 provided outside the gaming control microcomputer 100 has an oscillation frequency different from the oscillation frequency of the control clock CCLK generated by the control clock generation circuit 111. It has been described that the random number clock RCLK is generated and supplied to the random number circuit 509. However, the present invention is not limited to this, and one oscillator in which a clock signal supplied to CPU 505 of microcomputer 100 for game control and a clock signal supplied to random number circuit 509 are included in a common clock generation circuit It may be generated using an oscillation signal generated by In this case, for example, a divider for generating the random number clock RCLK and the control clock CCLK is provided, and synchronization between the latch clocks RC0, RC1, RC2 and the control clock CCLK or the internal system clock SCLK is obtained. A division ratio or the like in each frequency divider may be set so as not to easily occur. All or part of the control clock generation circuit 111 and the random number clock generation circuit 112 may be provided inside the gaming control microcomputer 100 or outside the gaming control microcomputer 100. May be

  In the above embodiment, the random number circuit 509 receives the supply of the random number clock RCLK generated by the random number clock generation circuit 112, and generates the random number update clock RGK and the latch clock RC0 by the clock flip flop 552. As described. However, the present invention is not limited to this. For example, an oscillation signal to be the random number update clock RGK or the latch clock RC0 may be generated outside the random number circuit 509 such as the random number clock generation circuit 112. Alternatively, a circuit for generating the random number update clock RGK and a circuit for generating the latch clock RC0 may be separately provided inside the random number circuit 509. As an example, while the random number update clock RGK is generated by a flip flop similar to the clock flip flop 552, an inversion circuit for inverting the signal state of the random number update clock RGK is provided, and the signal output from the inversion circuit is latched. It may be used as the clock RC0.

  In the above embodiment, the stored value of the refresh register RR1 incorporated in the CPU 505 is added to the upper byte GR1-1 in the general purpose register, and numerical data indicating the random number value MR1 for special view display result determination or addition value determination It has been described that numerical data indicating the random number value MR6 for is set. However, the present invention is not limited to this, and different from the stored value of the refresh register RR1, a value periodically updated by hardware or software may be added. Further, instead of adding the value stored in the refresh register RR1, predetermined arithmetic processing such as subtraction, logical sum, and logical product may be executed. Alternatively, the stored value of the refresh register RR1 may be added to the lower byte GR1-2 of the general purpose register. Alternatively, numerical data to be various random number values may be set by using the upper byte GR1-1 and the lower byte GR1-2 of the general-purpose register as they are without executing any of these arithmetic processing. Also, the upper byte and the lower byte of the numerical data extracted from the random number circuit 509 may be interchanged and stored as the upper byte GR1-1 or the lower byte GR1-2 in the general-purpose register. Furthermore, after the stored value of the refresh register RR1 is added to the upper byte GR1-1 or lower byte GR1-2 in the general purpose register, or arithmetic processing such as addition to the upper byte GR1-1 or lower byte GR1-2 in the general purpose register The upper byte and the lower byte may be interchanged without performing. Of the upper byte and lower byte of the numerical data extracted from the random number circuit 509, data of a specific bit may be replaced with data of another bit. In this case, for example, in the bus connecting the random number value register 559A or the random number value register 559B in the random number circuit 509 with the high-order byte GR1-1 or low-order byte GR1-2 of the general purpose register, The wiring may be crossed to replace the bit data.

  In the above embodiment, the clear switch 304 is installed on the power supply substrate 10, and the game start switch 31 is installed on the main substrate 11 separately from the clear switch 304. However, the present invention is not limited to this, and for example, one switch that doubles as the clear switch 304 and the game start switch 31 may be installed in any one of the power supply substrate 10 and the main substrate 11. As a result, for example, even when the game start switch 31 is taped and fixed, or the like, the clear switch 304 is simultaneously activated to clear the control contents (initialization). Can prevent cheating. However, in the above embodiment, the security time to be the security mode can be changed by setting the extension time in step S4 shown in FIG. 47 or setting the variable setting time in step S8. When the clear switch 304 and the game start switch 31 are not used together, even if the game start switch 31 is tampered with, the operation start timing of the random number circuit 509 or the random number by the software from the operation start timing of the pachinko gaming machine 1 It is difficult to specify the start timing of the update operation and the like, and the effect of preventing fraudulent actions such as shooting is sufficiently high.

  In the above embodiment, when setting random numbers used in the main board 11, such as numerical data indicating a random number MR1 for special view display result determination or numerical data indicating a random number MR6 for adding value determination, software It explained as what performs processing by. However, the present invention is not limited to this. For example, when setting a random number value to be used in the sub-side control board such as the effect control board 12, processing by software may be performed. As an example, the CPU of the effect control microcomputer 120 mounted on the effect control board 12 executes a random number value used to determine the final stop symbol to be the finalized symbol in the variable display of the symbol, and the advance notice effect. The processing may be performed by software for setting a random number value or the like used to determine whether or not it is determined.

  In the above embodiment, it is assumed that external resource reading of internal data of microcomputer 100 for game control, such as all or part of stored data in ROM 506, is restricted by internal resource access control circuit 501A provided in external bus interface 501. did. However, the present invention is not limited to this. For example, a provider of pachinko gaming machine 1 seals a connection terminal or the like for externally reading stored data in ROM 506 in microcomputer 100 for gaming control, so that the external device can not connect. By stopping or the like, external reading of the ROM 506 may be limited.

  In the above embodiment, it has been described that the first starting winning opening formed by the normal winning ball device 6A and the second starting winning opening formed by the normal variable winning ball device 6B are provided as a plurality of starting areas. However, this invention is not limited to this, For example, several starting areas, such as three or more, may be provided. In this case, on the basis of the fact that the start winning game for the game ball has been detected in each start area, a start condition for executing a special figure game using different special symbols may be established. Alternatively, for example, among the three or more starting areas, the special figure game using the same special symbol is executed based on the fact that the starting winning combination of the gaming balls is detected in a part (at least two) starting areas. A start condition for setting may be established. In addition, even if the start winning combination of the game ball is detected in any of the plurality of starting areas, a special figure game using a common symbol (or one set of special symbols) is executed. A start condition may be established. In this case, the start conditions for starting the special figure game may be established in the same order as the order in which the start winnings of the game balls are detected in the plurality of start areas. Alternatively, the start condition for starting the special figure game based on the fact that the start winning combination of the gaming ball is detected in the priority start region by prioritizing the plurality of start regions is the start region having the low priority The start condition of the game ball may be established more preferentially than the start condition based on the detection of the start winning of the game ball.

  In the above embodiment, as the variation pattern setting process of step S111 shown in FIG. 53, the process shown in the flowchart of FIG. 59 is executed regardless of which of the first start condition and the second start condition is met. Explained as However, the present invention is not limited to this, and in the case where the first start condition is satisfied and the case where the second start condition is satisfied, different processing is executed to set the variation pattern type to any one of a plurality of types It is also possible to make a decision on which of the plurality of types of fluctuation patterns. In this case, while the process for determining the variation pattern type and the process for determining the variation pattern are made different depending on which of the first start condition and the second start condition is met, the variation pattern type As numerical data indicating the random number SR4 for determination or numerical data indicating the random number SR5 for fluctuation pattern determination, common numerical data is used regardless of which of the first start condition and the second start condition is met. It is sufficient to use

  For example, as a variation pattern type determination table such as a variation pattern type determination table for big hit, a variation pattern type determination table for small hit, a variation pattern type determination table for reach, a variation pattern type determination table for non-reach, the first start condition and the second start condition Depending on which one of the start conditions is met, different allocations of the random value SR4 for determining the variation pattern type to each variation pattern type may be prepared in advance. Then, in the variation pattern setting process executed in response to the establishment of the first start condition, the variation pattern type determination table according to the establishment of the first start condition is selected as a use table, and random number values for variation pattern type determination Based on SR4, the variation pattern type is determined to be any of a plurality of types. On the other hand, in the variation pattern setting process executed in response to the establishment of the second start condition, a variation pattern type determination table different from the case where the first start condition is established in response to the establishment of the second start condition The variation pattern type may be selected as any one of a plurality of types based on a random number SR4 for determination of a variation pattern type common to the case where the first start condition is satisfied.

  Further, also in the determination processing as to whether or not the decorative symbol is derived and displayed in the reach display state, different processing is executed between the case where the first start condition is satisfied and the case where the second start condition is satisfied. May be In this case, while the process of determining whether or not to be in the reach state is different depending on which of the first start condition and the second start condition is met, as numerical data indicating the random value MR3 for reach determination. Common numerical data may be used regardless of which of the first start condition and the second start condition is satisfied. Furthermore, for example, as a process of determining the jackpot type as any one of a plurality of types instead of the process of step S243 shown in FIG. 58 in the above embodiment, the case where the first start condition is satisfied and the second start condition Processing different from each other may be performed depending on whether or not In this case, while the process for determining the jackpot type is different depending on which of the first start condition and the second start condition is satisfied, as numerical data indicating the random number value MR2 for jackpot type determination. Common numerical data may be used regardless of which of the first start condition and the second start condition is satisfied.

  In the above embodiment, the variable display result is controlled to the small hit gaming state based on the "small hit", and the change of the gaming state is not performed after the small hit gaming state ends. On the other hand, when the variable display result is "big hit", the big hit type is controlled to the 2 round big hit state based on the big hit type becoming "probable", and after the 2 round big hit state is finished, it is controlled to the positive variation state Described as being However, the present invention is not limited to this, and instead of or in addition to the case where the jackpot type is "probable" or the variable display result is "small hit", "sudden time" or A case of "suddenly normal" may be provided. As an example, "sudden time short" and "suddenly normal" are included in the jackpot type in the case where the variable display result is "big hit". In this case, the jackpot type determination table 131 includes table data that assigns the random number value MR2 for jackpot type determination to the jackpot type of "Suddenly Short" or "Suddenly Normal" according to the fluctuation special figure designation buffer value. It should just be comprised. And, when the variable display result is "big hit", when the big hit type becomes "sudden time short", it is controlled to the 2 round big hit state in the same way as the big hit type is "probable" and the 2 round big hit state ends It is controlled to time saving state unlike the case where the jackpot type is "probable" after having done. On the other hand, when the variable display result is "big hit" and the big hit type is "suddenly normal", it is controlled to the 2 round big hit state in the same way as the big hit type is "probable", and the 2 round big hit state ends After the jackpot, unlike the case where the jackpot type is "probable", control is performed in the normal state. As a result, the player's sense of expectation for the gaming state to be controlled after the end of the second round jackpot state can be enhanced, and the game interest can be improved.

  In the case where such "sudden time short" or "sudden normal" is provided, a change pattern type or change pattern different from those in cases other than "sudden short time" and "sudden normal" may be determined. In this way, although the jackpot type is controlled to the two round jackpot state by being "suddenly short" or "suddenly normal", the same rendering operation as when controlled to the 15 round jackpot state is performed It is possible to prevent the player from being distrusted. Also, when the big hit type is "sudden time short" or "sudden normal", the same variation pattern type as when the variable display result is "small hit" or when the big hit type is "probable" It may be possible to decide. As a result, when determining the variation pattern, it is determined that the jackpot type is "sudden time short" or "suddenly normal", or the variable display result is "small hit" or the big hit type is "probable". Regardless of the case, the common variation pattern determination table can be used, and the data volume can be reduced.

  In the above embodiment, after the big hit gaming state based on the variable display result being "big hit" is ended, it is described that it can be controlled to the gaming state such as the probability change state and the time saving state. And, in the definite change state and the time saving state, the possibility that the game ball enters into the 2nd starting winning a prize mouth is increased, it explained that it becomes easy to establish the 2nd starting condition by the control which becomes advantageous for the player being executed . However, the present invention is not limited to this, and for example, in the probability variation state, probability variation control is continuously performed, and high probability opening control is performed to increase the possibility of the game ball entering the second start winning opening. A high base state and a high probability low base state in which probability change control is performed but advantageous open control is not performed may be included. Also, in the time saving state, the low probability high base state in which the special view fluctuation time is shortened and the advantageous opening control is performed, and the low probability low base state in which the special drawing fluctuation time is shortened but the advantageous opening control is not performed. And may be included. As an example, depending on whether the jackpot type is "first probability variation"-"third probability variation" or "probability", after the end of the jackpot gaming state, high probability high base status and high probability low base status It may be controlled to any one. As another example, depending on whether the jackpot type is "first probability variation"-"third probability variation", or "probability", the high probability high base status and the high probability low base status after the end of the jackpot gaming state The proportions controlled either may be made different from one another.

  If the variation pattern type is determined to be any of a plurality of types when the big hit type is "probable", whether to control the high probability high base state or the high probability low base state after the end of the big hit gaming state Accordingly, different fluctuation pattern types may be determined. As an example, when the jackpot type is determined to be "probable" in step S243 shown in FIG. 58, it is determined whether the high probability high base state or the high probability low base state is to be controlled after the end of the jackpot gaming state. Execute the judgment process to At this time, when it is decided to control to the high probability low base state, the case where the jackpot type becomes “probable”, such as the variation pattern type of the special CA4-1, the special CB4-1, and the special CC4-1. When the variable display result is "small hit", a common change pattern type is determined. On the other hand, when it is decided to control to the high probability high base state, it is dedicated only when the big hit type becomes “probable” such as special CA 4-2, special CB 4-2, special CC 4-2. It may be determined as the variation pattern type of. As a result, when the big hit type is "probable" and the high probability low base state is reached after the big hit gaming state is over, the variable display result is displayed as the rendering operation in the variable display of the decorative symbol or the rendering operation in the two round big hit state. After the rendering operation common to the "small hit" is performed, it is possible to be in a high probability low base state. On the other hand, when the big hit type is "probable" and the high probability and high base state is reached after the big hit gaming state ends, the big hit type is "probably determined as the rendering operation during variable display of the decorative symbol or the rendering operation in the 2 round big hit state. After the dedicated rendering operation is performed only in the case of “1”, the high base state can be established.

  In the above embodiment, in the display area of the image display device 5, decorative symbol display areas 5L, 5C, 5R of "left", "middle", "right" are provided, and the decorative symbol display areas 5L, 5C, 5R are provided. It has been described that the fixed decorative symbol to be the final stop symbol is to be stopped and displayed on one predetermined effective line by the stop display of the single decorative symbol. However, the present invention is not limited to this, and for example, in the left, middle, and right decorative symbol display areas 5L, 5C, and 5R, there are three places: upper, middle, and lower. It is also possible to make the decoration pattern stop display capable, and the final decoration pattern to be the final stop design be stopped and displayed on five or eight effective lines.

  Although the pachinko gaming machine 1 provided with the first special symbol display device 4A and the second special symbol display device 4B has been described in the above embodiment, the present invention is also applicable to a pachinko gaming machine provided with one special symbol display device Some of the can be applied. In this case, for example, the combination of the latch flip-flop 557B, the random number latch selector 558B and the random value register 559B included in the random number circuit 509 shown in FIG. The security time may be added to the fixed time and may be set to one of a plurality of selectable extension times in advance.

  In the above embodiment, based on the random number value MR4 for determining the variation pattern type, the specific effect is executed in response to the variation pattern type being determined as the non-reach CA1-4 or non-reach CC1-2 variation pattern type. It has been described that one of the variation patterns of non-reach PA1-4 to non-reach PA1-7 is determined. That is, it has been described that the presence or absence of the specific effect is determined by determining the variation pattern type using the random number value MR4 for determining the variation pattern type. However, the present invention is not limited to this. For example, the presence or absence of a specific effect may be determined by determining a fluctuation pattern using the random value MR5 for fluctuation pattern determination. As an example, the table data of the loss change pattern determination table 138A is set such that the change pattern types of the non-reach CA 1-4 and the non-reach CC 1-2 include the change patterns of the non-reach PA 1-1. In this case, when the variation pattern type is determined as the non-reach CA 1-4 or non-reach CC 1-2 variation pattern type based on the random value MR4 for determination of the variation pattern type, the presence or absence of the specific effect is still determined No, while it is determined that the specific effect is not executed by the fluctuation pattern being determined to be non-reach PA1-1 based on the random value MR5 for fluctuation pattern determination, the fluctuation pattern is determined to be non-reach PA1-4 to non-reach It is determined to execute a specific effect by being determined to any one of PA1-7.

  In addition, the device configuration and data configuration of the pachinko gaming machine 1, the processing shown in the flowchart, and various rendering operations including the display operation of effect images in the display area of the image display device 5 deviate from the spirit of the present invention. As long as it does not, it is possible to change and modify arbitrarily. In addition, the gaming machine according to the present invention is not limited to a payout type gaming machine that pays out a predetermined number of winning balls in response to detection of winning balls, but encloses the gaming balls and responds to detection of winning balls. It can apply also to the enclosed type game machine which gives a score.

  Furthermore, the present invention is not limited to the pachinko gaming machine 1 in the above-described embodiment, but a part thereof may be applied to other gaming machines such as slot machines. In this case, for example, the combination of the latch flip-flop 557B, the random number latch selector 558B and the random value register 559B provided in the random number circuit 509 shown in FIG. 15 is not used. On the other hand, the detection signal from the start lever switch provided in the slot machine is input to the input port P0 provided in the PIP 510. The start lever switch outputs a detection signal that is turned on when the operation on the start lever for starting the game is detected by rotating the plurality of reels.

  Inside the housing of the slot machine, there is provided a variable display device in which a plurality of (for example, three) reels in which a plurality of types of symbols are arranged on the outer periphery are arranged in parallel in the horizontal direction. Further, on the front door of the slot machine, an image display device having a display function similar to that of the image display device 5 in the above embodiment is provided. On the outer peripheral part of each reel, for example, plural kinds of distinguishable symbols such as "red 7", "white 7", "BAR", "JAC", "watermelon", "cherry", and "bell" are predetermined. It is drawn in the order of The symbols drawn on the outer peripheral portion of each reel are displayed on upper, middle, lower, and lower three levels on the variable display device. Each reel is rotated in response to a predetermined operation (for example, a pressing operation or the like) on the start lever, so that the symbols on each reel are displayed while being continuously changed. Then, when stopping the rotation of each reel, the player operates a plurality of stop switches installed corresponding to each reel. In addition, after the rotation of the reel is started, the rotation of the reel may be automatically stopped when the stop switch is not operated even after a predetermined time has elapsed.

  For example, an insertion slot through which game media such as medals can be inserted at a predetermined position of the front door in a slot machine, and a BET switch for setting (BET) bet numbers for game media by one unit (for example, one medal) MAXBET switch for setting the bet number of the maximum number of units (for example, 3 medals) that can be bet in the game, stored as credits (the number of game media stored as gaming value owned by the player) A settlement switch or the like is provided to settle the gaming media used to set the gaming media and the number of bets.

  When playing a game in the slot machine, first, game media is inserted from the insertion slot, or a bet number is set using a credit. When using a credit, operate the BET switch or the MAX BET switch. In this way, when the bet number is set, one of the plurality of pay lines corresponding to the bet number becomes effective, and the operation of the start lever becomes effective, that is, the game becomes executable, and the variable display The execution condition is satisfied. In addition, when the winning of a replay role such as replay occurs in the previous game, the next game can be executed continuously, and the condition for executing the variable display is satisfied. In this way, when the start lever is operated in a state where the game can be executed, the reels rotate in response to the start condition of the variable display being satisfied, and the symbols continuously fluctuate. During the variation of the symbol by the rotation of each reel, various rendering operations are executed by the display operation of the effect image in the image display device, the sound output operation from the speaker, the lighting operation of the game effect lamp, and the like. For example, in the image display device, the same symbol as the symbol drawn on the outer periphery of each reel, or a symbol different from the symbol of each reel but associated with the symbol is variably displayed as identification information for effect Just do it. In addition, even after the variation of the symbol is finished, various rendering operations such as a rendering operation for notifying the occurrence of a winning or a rendering operation to be a demonstration may be performed. In this state, when any one of the plurality of stop switches is operated, the rotation of the corresponding reel is stopped, and the display result is derived and displayed so as to be visible.

  Then, when the rotation of all the reels is stopped, one game is ended, and a combination of symbols called a predetermined combination is stopped as a display result of each reel on any activated pay line. There is a prize winning. The types of winning combinations are roughly classified into small winning combinations with awarding of medals, re-playing combinations that can start the next game without requiring setting of the number of bets, and special effects involving transition of the gaming state. There is a role and a role to be a prize is determined according to the game state. In the slot machine, the occurrence of winning of each combination determined according to the game state is permitted based on the random number value extracted from the random number circuit similar to the random number circuit 509 in the above embodiment at the timing when the start lever is operated. Perform an internal lottery to decide whether to It is also referred to as "internally elected" that the winning of the internal lottery is permitted and the occurrence of a prize is permitted. Among the winnings of each part, the winnings of the small part and the re-playing part are valid only in the game for which the winning is determined, but the winnings of the special part are all the parts whose occurrence is permitted by the internal lottery It is effective until. That is, once the occurrence of the special winning combination is permitted, even if the special winning combination can not be generated in each game, the winning will be carried over to the next game.

  The gaming state in the slot machine includes a specific gaming state and a normal gaming state. The specific gaming state may include AT (assist time), CT (challenge time), RT (replay time), ART (assist replay time) and the like in addition to regular bonus and big bonus. In the regular bonus game state, small roles such as JAC, cherries, watermelons and bells, for example, are determined as winning combinations, and are selected as lottery targets in the internal lottery. In the gaming state of the big bonus, for example, in the predetermined small combination game, small combination such as cherry, watermelon and bell, special combination such as regular bonus (or JACIN) is defined as the winning combination, each small It is a lottery target in the internal lottery in the combination game. In the AT gaming state, a winning condition of a specific combination which can not cause a winning to occur is informed unless an operation matching the winning conditions such as the stop order and stop timing of each reel is performed. In the gaming state of CT, it becomes possible to win a specific small winning combination targeted by each reel being uncontrolled within a certain range. In the gaming state of RT, a replay role such as replay is won with high probability. In the ART gaming state, the AT gaming state and the RT gaming state are combined. In the normal gaming state, for example, a small combination such as cherry, watermelon and bell, a replay combination such as replay, a special bonus such as a big bonus, a regular bonus, etc. are predetermined as winning combinations, and the inside of each game It will be the lottery target in the lottery.

  In the slot machine, a power supply substrate including the same configuration and function as the power supply substrate 10 in the above embodiment, a main substrate including the same configuration and function as the main substrate 11, and a configuration common to the effect control substrate 12 A presentation control board including functions and a payout control board including a configuration and a function common to the payout control board 12 are mounted. Each control board may include a configuration or a function different from that of the control board in the above-described embodiment, depending on the progress of the game in the slot machine and the contents of the effects.

  On the main substrate of the slot machine, a game control microcomputer having the same configuration and function as the game control microcomputer 100 in the above embodiment is mounted. For example, this game control microcomputer is provided with a CPU capable of executing the same control as the CPU 505 in the above embodiment, a ROM capable of storing programs and fixed data similar to the ROM 506, and a work area similar to the RAM 507 A possible RAM etc. should just be incorporated. Further, a random number circuit which is partially or entirely common to the random number circuit 509 in the above embodiment may be incorporated in or externally attached to the game control microcomputer.

  Then, as an example, the CPU incorporated in the gaming control microcomputer provided in the slot machine executes the processing corresponding to steps S1 to S8 shown in FIG. The security time may be added to the fixed time and may be set to one of a plurality of selectable extension times in advance. In addition, the configuration and function of the pachinko gaming machine 1 in the above-described embodiment may be applied to a slot machine without departing from the spirit of the present invention. Here, in the case of determining a variation pattern type or variation pattern as shown in FIGS. 41 to 44 in the slot machine, the process in which the process of steps S261 to S276 shown in FIG. It may be executed by the CPU of the game control microcomputer mounted on the main substrate of the machine, or mounted on the effect control substrate of the slot machine based on the effect control command transmitted from the main substrate to the effect control substrate It may be executed by the CPU of the effect control microcomputer. When the variation pattern type and the variation pattern are determined on the main substrate side of the slot machine, the effect control command indicating the determined variation pattern may be transmitted from the main substrate to the effect control substrate. On the other hand, when the variation pattern type determines the variation pattern on the side of the effect control substrate of the slot machine, the effect control command indicating the internal lottery result is transmitted from the main substrate to the effect control substrate, and the effect control micro The CPU of the computer refers to the variation pattern type determination table selected based on the effect control command to determine one of a plurality of types of variation pattern types (processing corresponding to steps S261 to S273). After that, by referring to the variation pattern determination table selected corresponding to the determined variation pattern type, etc., the effect identification that is variably displayed on the image display device from among the variation patterns included in the variation pattern type A variation pattern of a symbol to be information may be determined (a process corresponding to steps S274 to S276).

1 ... pachinko gaming machine 2 ... gaming board 3 ... gaming machine frame 4A, 4B ... special symbol display device 5 ... image display device 6A ... ordinary winning ball device 6B ... ordinary variable winning ball device 7 ... special variable winning ball device 8L, 8R ... Speaker 9 ... Game effect lamp 11 ... Main board 12 ... Effect control board 13 ... Voice control board 14 ... Lamp control board 15 ... Payout control board 18 ... Relay board 20 ... Normal symbol indicator 21 ... Gate switch 22A, 22B ... Start port switch 23 ... count switch 31 ... game start switch 41 ... pass gate 100 ... microcomputer for game control 501 ... external bus interface 501A ... internal resource access control circuit 502 ... clock circuit 503 ... unique information storage circuit 504 ... reset / interrupt Controller 505 ... C PU
506 ... ROM
507 ... RAM
508 ... CTC
509 ... random number circuit 510 ... PIP
511 ... serial communication circuit 512 ... address decoding circuit 551 ... frequency monitoring circuit 552 ... clock flip flop 553 ... random number generation circuit 554 ... start value setting circuit 555 ... random number sequence changing circuit 556 ... random number sequence changing setting circuit 557A, 557B ... latch For flip-flops 558A, 558B ... Random number latch selector 559A, 559B ... Random number value register 571A ... First channel transmission / reception circuit 571B ... Second channel transmission circuit 581A, 581B ... Transmission shift register 582A, 582B ... Transmission data register 583A, 583B ... Interrupt control circuit 584A ... Reception data register 585A ... Reception shift register

Claims (1)

A gaming machine capable of playing a game and controlling it to an advantageous state for the player,
After executing the predetermined initial setting process, the game control is executed based on the stored contents of the non-volatile memory, and the numerical value data extracted from the numerical value updating means capable of changing the initial value every system reset of the gaming machine is used. Determination means for performing a predetermined determination;
Security check means for executing a security check process for checking whether or not the stored contents of the non-volatile memory are changed in the predetermined initial setting process;
Setting means for setting a period of a security mode for executing the security check process,
A first setting for setting whether to add an extension time as the period of the security mode, and setting whether to change the period of the security mode within a predetermined time range each time the predetermined initial setting processing is executed. And a second setting to do the variable setting.
A game machine characterized by

Images