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JP6429688B2 - Tunnel field effect transistor and method of using the same - Google Patents
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JP6429688B2 - Tunnel field effect transistor and method of using the same - Google Patents

Tunnel field effect transistor and method of using the same Download PDF

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JP6429688B2
JP6429688B2 JP2015050089A JP2015050089A JP6429688B2 JP 6429688 B2 JP6429688 B2 JP 6429688B2 JP 2015050089 A JP2015050089 A JP 2015050089A JP 2015050089 A JP2015050089 A JP 2015050089A JP 6429688 B2 JP6429688 B2 JP 6429688B2
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巴 屋山
巴 屋山
知京 豊裕
豊裕 知京
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Description

本発明は、トンネル電界効果トランジスタに関する。   The present invention relates to a tunnel field effect transistor.

トランジスタは世の中に必要不可決なものとなっており、その低消費電力化が重要な課題となっている。消費電力の少ないトランジスタ構造はこれまで様々なものが提案・開発されてきたが、トンネル電界効果トランジスタは消費電力を極めて低くできるトランジスタとして注目されている。
トンネル電界効果トランジスタは、非特許文献1に記載されているように、半導体中のエネルギー障壁を超えてトンネリングする電流を別の電極の電圧によって制御することで電流のスイッチング動作を行うデバイスである。
トンネル電界効果トランジスタは、世界各地で開発されており、特許文献1には、細長い単結晶ナノ構造のシリコンとゲルマニウムのヘテロ接合を持つことを特徴としたトンネル電界効果トランジスタが記載されており、特許文献2には、ソース層形成領域を一度アモルファス化した後にドーパントを導入することを特徴としたトンネル電界効果トランジスタの技術が記載されている。特許文献3には、ソース領域と接合するエピタキシャル成長層を備えることを特徴としたトンネル電界効果トランジスタが記載されている。
非特許文献2には、別の構造のトンネル電界効果トランジスタが記載されている。非特許文献2のトンネル電界効果トランジスタは、トンネル電界効果トランジスタのトンネル接合領域にアルミニウム(Al)と窒素(N)をともに添加することにより、オン電流を従来の約10倍に増大させるという提案である。非特許文献2のトンネル電界効果トランジスタは他のトンネル電界効果トランジスタと比べて、通常のCMOSトランジスタプロセスに近いプロセスで形成できるので、CMOSトランジスタ回路とトンネル電界効果トランジスタの回路を組み合わせた回路を構成できるなど実用性の高いトランジスタ技術である。非特許文献2で提案されているトランジスタに関して、屋山らは、非特許文献3において、AlとNを添加したSiの構造の安定性と電子状態について検討した。その結果、Si単結晶内に分布するAl原子とN原子が第一近接の配置の場合が他の配置に比べて1eV以上エネルギーが低く安定な配置であることを報告している。この報告の中で、Al原子とN原子といった不純物原子が離れた位置にある場合にはSiは共有結合を保っているが不純物原子近傍では電気陰性度の大きいN原子に電子が引きつけられていることでNが局在準位を形成することも報告している。この報告では、Siは間接エネルギーギャップを有しているが、Nが形成する局在準位によって、運動量保存の条件が緩和されて電子―フォノン結合なしに電子遷移を生じる確率が高められることでトンネル電界効果トランジスタのオン電流が増大したのだろうということも述べている。
Transistors are indispensable to the world, and low power consumption is an important issue. Various transistor structures with low power consumption have been proposed and developed so far, but tunnel field effect transistors are attracting attention as transistors capable of extremely reducing power consumption.
As described in Non-Patent Document 1, a tunnel field effect transistor is a device that performs a current switching operation by controlling a current tunneling beyond an energy barrier in a semiconductor by a voltage of another electrode.
Tunnel field effect transistors have been developed in various parts of the world, and Patent Document 1 describes a tunnel field effect transistor characterized by having a heterojunction of an elongated single crystal nanostructure silicon and germanium. Document 2 describes a tunnel field effect transistor technique characterized in that a dopant is introduced after the source layer forming region is once amorphized. Patent Document 3 describes a tunnel field-effect transistor including an epitaxial growth layer that is joined to a source region.
Non-Patent Document 2 describes a tunnel field effect transistor having another structure. The tunnel field effect transistor of Non-Patent Document 2 is a proposal to increase the on-state current by about 10 times by adding both aluminum (Al) and nitrogen (N) to the tunnel junction region of the tunnel field effect transistor. is there. Since the tunnel field effect transistor of Non-Patent Document 2 can be formed by a process closer to the normal CMOS transistor process than other tunnel field effect transistors, a circuit combining a CMOS transistor circuit and a tunnel field effect transistor circuit can be configured. This is a highly practical transistor technology. Regarding the transistor proposed in Non-Patent Document 2, Yayama et al. In Non-Patent Document 3 examined the stability and electronic state of the Si structure to which Al and N were added. As a result, it is reported that the case where the Al atom and N atom distributed in the Si single crystal are in the first adjacent arrangement is a stable arrangement having a low energy of 1 eV or more as compared with other arrangements. In this report, when impurity atoms such as Al atom and N atom are separated, Si maintains a covalent bond, but an electron is attracted to an N atom having a large electronegativity in the vicinity of the impurity atom. It has also been reported that N forms localized levels. In this report, Si has an indirect energy gap, but the localized level formed by N relaxes the momentum conservation condition and increases the probability of causing an electron transition without an electron-phonon bond. It also states that the on-current of the tunnel field effect transistor may have increased.

特開2015−19072号公報JP2015-19072A 特開2013−69977号公報JP 2013-69977 A 特開2013−187291号公報JP 2013-187291 A

International Electron Devices Meeting(IEDM)2013予稿集“High Ion/Ioff and low subthreshold slope planar-type InGaAs Tunnel FETs with Zn-diffused source junctions”International Electron Devices Meeting (IEDM) 2013 Proceedings “High Ion / Ioff and low subthreshold slope planar-type InGaAs Tunnel FETs with Zn-diffused source junctions” T.Mori et al., 2014 Symposium on VLSI Technology Digest of Technical Papers, “Band-to-Band Tunneling Current Enhancement Utilizing Isoelectronic Trap and its Application to TFETs”T.Mori et al., 2014 Symposium on VLSI Technology Digest of Technical Papers, “Band-to-Band Tunneling Current Enhancement Utilizing Isoelectronic Trap and its Application to TFETs” 屋山、他 第62回応用物理学会春季学術講演会講演予稿集12−366(2015年)Yayama, et al. Proceedings of the 62nd JSAP Spring Meeting, 2015 12-366 (2015)

非特許文献2で提案されている、Si中にAlとNを添加することを特徴としたトンネル電界効果トランジスタについて、なぜこの特徴を有することでオン電流が向上するのか理由が不明瞭であり、さらなる特性向上ができないという課題を抱えていた。
非特許文献3では、この課題を解決すべくオン電流向上の原因検討を行い、Alと第一近接の配置にあるN原子が形成する局在準位によって、運動量保存の条件が緩和されて電子―フォノン結合なしに電子遷移を生じる確率が高められることでトンネル電界効果トランジスタのオン電流が増大したのだろうということまで考察するに至った。
しかしながら、まだ解明したというレベルには至っておらず、依然、この構造でのオン電流の更なる向上が進まないという課題が残っている。
About the tunnel field effect transistor which is proposed in Non-Patent Document 2 and is characterized by adding Al and N in Si, the reason why the on-current is improved by having this feature is unclear, There was a problem that the characteristics could not be further improved.
In Non-Patent Document 3, the cause of the improvement of the on-current is studied to solve this problem, and the condition of momentum conservation is relaxed by the localized level formed by the N atom in the first proximity arrangement with Al. -We came to consider that the on-current of the tunnel field-effect transistor would have increased due to the increased probability of electron transition without phonon coupling.
However, the level has not yet been elucidated, and there remains a problem that further improvement of the on-current in this structure does not progress.

本願発明は、具体的には以下の構成を有する。
(1)本願発明の一側面によれば、高濃度p型領域であるソース領域と、前記ソース領域に接合する低濃度p型領域である第1チャネル領域と、前記ソース領域との接合面とは別の面で接合する低濃度n型領域である第2チャネル領域と、前記第2チャネル領域の前記第1チャネル領域との接合面とは別の面で接合する高濃度n型領域であるドレイン領域と、前記ソース領域、前記第1チャネル領域、前記第2チャネル領域及び前記ドレイン領域で構成される通電領域と絶縁膜を介して接するゲート電極とを備え、前記第1チャネル領域には、シリコン(Si)単結晶にインジウム(In)と窒素(N)が添加物として加わっていることを特徴とするトンネル電界効果トランジスタが与えられる。
(2)ここで、前記第2チャネル領域がn型シリコン(Si)単結晶であってもよい。
(3)インジウム(In)の代わりにガリウム(Ga)が添加されていてもよい。
(4)本願発明の他の側面によれば、前記ソース領域と前記第1チャネル領域の接合領域において、前記ソース領域の価電子帯と前記第1チャネル領域の伝導帯との間でバンド間トンネル現象を生じさせることによってソース領域からドレイン領域に電子流を流すことを特徴とするトンネル電界効果トランジスタを使用する方法が与えられる。
Specifically, the present invention has the following configuration.
(1) According to one aspect of the present invention, a source region that is a high concentration p-type region, a first channel region that is a low concentration p-type region joined to the source region, and a junction surface between the source region Is a high-concentration n-type region that is bonded to a second channel region that is a low-concentration n-type region that is bonded to another surface and a surface that is different from the bonding surface of the second channel region to the first channel region. A drain region; and a gate electrode that is in contact with an energization region composed of the source region, the first channel region, the second channel region, and the drain region through an insulating film, and the first channel region includes: A tunnel field effect transistor is provided in which indium (In) and nitrogen (N) are added as additives to a silicon (Si) single crystal.
(2) Here, the second channel region may be an n-type silicon (Si) single crystal.
(3) Gallium (Ga) may be added instead of indium (In).
(4) According to another aspect of the present invention, in the junction region of the source region and the first channel region, interband between Den gubernaculum of the source region valence band and the first channel region of the There is provided a method of using a tunnel field effect transistor characterized by causing an electron flow from a source region to a drain region by causing a tunneling phenomenon.

本発明の技術を用いることで、トンネル電界効果トランジスタのオン電流量を向上させることができる。   By using the technique of the present invention, the amount of on-current of the tunnel field-effect transistor can be improved.

本発明の実施形態によるトンネル電界効果トランジスタの断面図である。1 is a cross-sectional view of a tunnel field effect transistor according to an embodiment of the present invention. シリコン中のアルミニウム原子と窒素原子の位置関係を示す斜視図である。It is a perspective view which shows the positional relationship of the aluminum atom in a silicon | silicone, and a nitrogen atom. シリコン中のアルミニウム原子と窒素原子に関するエネルギーの計算結果を示すグラフである。It is a graph which shows the calculation result of the energy regarding the aluminum atom in a silicon | silicone, and a nitrogen atom. バンド間トンネル電流の計算モデルと計算結果を説明するための概念図である。It is a conceptual diagram for demonstrating the calculation model and calculation result of an interband tunnel current. III−N族元素添加による遷移確率の計算結果を示すグラフである。It is a graph which shows the calculation result of the transition probability by III-N group element addition.

以下、本発明を詳細に説明する。
図1は、本発明の実施形態によるトンネル電界効果トランジスタの断面図である。
シリコン単結晶基板100の表面領域に高濃度p型領域であるソース領域1が形成されている。ソース領域1は高濃度のp型半導体の状態にしてある。ソース領域1の左側には低濃度p型領域である第1チャネル領域2が形成されている。第1チャネル領域2は図1に示す通り表面近傍だけに形成されている。この理由は、ソース領域1と第1チャネル領域2との接合部分でバンド間トンネル電流が流れればよく、後述するように外部からの制御電圧が最も効果的に印加される表面領域だけに第1チャネル領域2ができればよいからである。
第1チャネル領域2には、インジウム(In)と窒素(N)が添加されている。添加方法としては、イオン注入法でインジウムと窒素を同量注入し、注入によるシリコン結晶のダメージを熱処理で回復させることで得るなど、様々な方法が用いられる。
添加物については、インジウム(In)と窒素(N)の代わりに、ガリウム(Ga)と窒素(N)を同量添加する場合もある。第1チャネル領域2の右側には第2チャネル領域3が接合する形で形成されている。
1つの実施の形態として、第1チャネル領域2が、インジウム(In)と窒素(N)又はガリウム(Ga)と窒素(N)で、第2チャネル領域3が五属元素と窒素(N)の両方を添加する場合がある。
別の実施の形態として、第1チャネル領域2が、インジウム(In)と窒素(N)又はガリウム(Ga)と窒素(N)で、第2チャネル領域3が五属元素のみを添加する場合がある。第2チャネル領域3にはn型となる添加物量を添加する。第2チャネル領域3の右側には、高濃度のn型領域であるドレイン領域4が形成される。第1チャネル領域2に対して第2チャネル領域3が高めの電圧(ポテンシャルとしては深めのポテンシャル)になるようにソース領域1とドレイン領域4に電圧を印加することで第1チャネル領域2から第2チャネル領域3への電子流を円滑に流すことができる。電子流が流れるソース領域1、第1チャネル領域2、第2チャネル領域3、ドレイン領域4で構成される通電領域5と絶縁膜6を介して接するゲート電極7でトンネル電界効果トランジスタが形成される。このゲート電極7に印加する電圧によって通電領域に流れる電子流を遮断(off)したり通電(on)したりできる。添加物がアルミニウム(Al)の場合に比べて、ガリウム(Ga)やインジウム(In)の場合はオン電流が多く確保できる。これは、ソース領域と第1チャネル領域との境界領域に発生する窒素(N)の局在準位が、アルミニウム(Al)の場合に比べて、ガリウム(Ga)やインジウム(In)のほうはより低いことで、バンド間トンネル電流が、より流れやすくなることに起因している。
Hereinafter, the present invention will be described in detail.
FIG. 1 is a cross-sectional view of a tunnel field effect transistor according to an embodiment of the present invention.
A source region 1 that is a high-concentration p-type region is formed in the surface region of the silicon single crystal substrate 100. The source region 1 is in a high-concentration p-type semiconductor state. A first channel region 2 that is a low-concentration p-type region is formed on the left side of the source region 1. The first channel region 2 is formed only near the surface as shown in FIG. The reason is that the band-to-band tunnel current should flow at the junction between the source region 1 and the first channel region 2, and only the surface region to which the external control voltage is most effectively applied as described later. This is because one channel region 2 may be formed.
Indium (In) and nitrogen (N) are added to the first channel region 2. As the addition method, various methods are used such as injecting the same amount of indium and nitrogen by an ion implantation method, and recovering the damage of the silicon crystal due to the implantation by heat treatment.
As for the additive, the same amount of gallium (Ga) and nitrogen (N) may be added instead of indium (In) and nitrogen (N). A second channel region 3 is formed on the right side of the first channel region 2 so as to be joined.
As one embodiment, the first channel region 2 is made of indium (In) and nitrogen (N) or gallium (Ga) and nitrogen (N), and the second channel region 3 is made of a pentium element and nitrogen (N). Both may be added.
As another embodiment, the first channel region 2 may be indium (In) and nitrogen (N) or gallium (Ga) and nitrogen (N), and the second channel region 3 may be added with only a group 5 element. is there. The second channel region 3 is doped with an n-type additive amount. On the right side of the second channel region 3, a drain region 4 which is a high concentration n-type region is formed. By applying a voltage to the source region 1 and the drain region 4 so that the second channel region 3 is at a higher voltage (a deeper potential as the potential) than the first channel region 2, The electron flow to the two-channel region 3 can be made to flow smoothly. A tunnel field effect transistor is formed by a gate electrode 7 which is in contact with an energizing region 5 composed of a source region 1, a first channel region 2, a second channel region 3, and a drain region 4 through which an electron current flows through an insulating film 6. . The voltage applied to the gate electrode 7 can cut off (off) or flow (on) the electron flow flowing in the energized region. A larger on-current can be secured when gallium (Ga) or indium (In) is used than when the additive is aluminum (Al). This is because the localized level of nitrogen (N) generated in the boundary region between the source region and the first channel region is more gallium (Ga) or indium (In) than in the case of aluminum (Al). This is due to the fact that the band-to-band tunneling current is more likely to flow because it is lower.

以下、実施例 によって本発明をさらに具体的に説明するが、本発明はこれら実施例により何ら限定されるものではない。   EXAMPLES Hereinafter, the present invention will be described more specifically with reference to examples, but the present invention is not limited to these examples.

図2は、シリコン中のアルミニウム原子と窒素原子の位置関係を示す斜視図である。左下の角にAlとして示したところにアルミニウム(Al)を置いて、その近傍に窒素(N)原子を様々な位置において、その場合の全体のエネルギー状態を計算して比較した。
図3は、シリコン中のアルミニウム原子と窒素原子に関するエネルギーの計算結果を示すグラフである。図3から明らかなように、窒素(N)がアルミニウム(Al)に最も近い第一近接位置にある場合、それよりも遠い位置にある場合よりもこの計算系のエネルギーが1eV程度低い。つまり、より安定であると言える。この結果から、添加したアルミニウム(Al)と窒素(N)も大半は、互いに最も近い位置である第一近接の配置で存在することが予測される。この傾向はインジウム(In)と窒素(N)の組合せでも、ガリウム(Ga)と窒素(N)の組合せでも同様である。
FIG. 2 is a perspective view showing the positional relationship between aluminum atoms and nitrogen atoms in silicon. Aluminum (Al) was placed in the lower left corner as Al, and nitrogen (N) atoms were calculated at various positions in the vicinity of the aluminum (Al), and the total energy states in that case were calculated and compared.
FIG. 3 is a graph showing the calculation results of energy regarding aluminum atoms and nitrogen atoms in silicon. As is clear from FIG. 3, when the nitrogen (N) is in the first proximity position closest to aluminum (Al), the energy of this calculation system is about 1 eV lower than that in the position farther than that. In other words, it can be said that it is more stable. From this result, it is predicted that most of the added aluminum (Al) and nitrogen (N) also exist in the first proximity arrangement that is the closest position to each other. This tendency is the same for a combination of indium (In) and nitrogen (N) or a combination of gallium (Ga) and nitrogen (N).

図4にバンド間トンネル電流の計算モデルと計算結果を説明するための概念図である。アルミニウム(Al)と窒素(N)の組合せ、インジウム(In)と窒素(N)の組合せ、ガリウム(Ga)と窒素(N)の組合せのそれぞれの場合に、高濃度p型シリコン領域とこれらの組合せを添加した領域の界面領域に発生する準位レベルを算出したところ、図4に示すようにインジウム(In)が最も浅く、ガリウム(Ga)が次に浅く、アルミニウム(Al)が最も深いことがわかった。この中間準位が浅いほど、バンド間トンネリングが効率的に起きる。
その結果、図5に示すIII−N族元素添加による遷移確率の計算結果のグラフが得られた。三属元素と窒素を合わせて添加したものは、シリコン単結晶よりもバンド間トンネリングが4ケタ程度向上することが計算で得られており、その中でもアルミニウム(Al)よりもインジウム(In)やガリウム(Ga)がより遷移確率が高い。
FIG. 4 is a conceptual diagram for explaining a calculation model and a calculation result of the band-to-band tunnel current. In each case of a combination of aluminum (Al) and nitrogen (N), a combination of indium (In) and nitrogen (N), and a combination of gallium (Ga) and nitrogen (N), the high-concentration p-type silicon region and these When the level level generated in the interface region of the region to which the combination is added is calculated, as shown in FIG. 4, indium (In) is the shallowest, gallium (Ga) is the next shallowest, and aluminum (Al) is the deepest. I understood. The shallower the intermediate level, the more efficient band-to-band tunneling occurs.
As a result, the graph of the calculation result of the transition probability by adding the III-N group element shown in FIG. 5 was obtained. It is calculated by adding three group elements and nitrogen that the interband tunneling is improved by about 4 digits as compared with silicon single crystal. Among them, indium (In) and gallium are more than aluminum (Al). (Ga) has a higher transition probability.

トンネル電界効果トランジスタは低消費電力であるので電力の消耗が気になるモバイル機器への応用な電力供給が難しいセンサーネットワークの超低消費電力回路をはじめ非常に多くの応用が期待される。   Since tunnel field effect transistors have low power consumption, they are expected to be used in many applications, including ultra-low power circuits for sensor networks that are difficult to supply power to mobile devices where power consumption is a concern.

1・・・ソース領域、2・・・第1チャネル領域、3・・・第2チャネル領域、4・・・ドレイン領域、5・・・通電領域、6・・・絶縁膜、7・・・ゲート電極、100・・・シリコン単結晶基板
DESCRIPTION OF SYMBOLS 1 ... Source region, 2 ... 1st channel region, 3 ... 2nd channel region, 4 ... Drain region, 5 ... Current supply region, 6 ... Insulating film, 7 ... Gate electrode, 100 ... silicon single crystal substrate

Claims (4)

高濃度p型領域であるソース領域と、 前記ソース領域に接合する低濃度p型領域である第1チャネル領域と、
前記ソース領域との接合面とは別の面で接合する低濃度n型領域である第2チャネル領域と、
前記第2チャネル領域の前記第1チャネル領域との接合面とは別の面で接合する高濃度n型領域であるドレイン領域と、
前記ソース領域、前記第1チャネル領域、前記第2チャネル領域及び前記ドレイン領域で構成される通電領域と絶縁膜を介して接するゲート電極と
を備え、
前記第1チャネル領域には、シリコン(Si)単結晶にインジウム(In)と窒素(N)が添加物として加わっていることを特徴とするトンネル電界効果トランジスタ。
A source region that is a high-concentration p-type region; a first channel region that is a low-concentration p-type region joined to the source region;
A second channel region that is a low-concentration n-type region that is bonded to a surface different from a surface that is bonded to the source region;
A drain region which is a high-concentration n-type region joined on a surface different from a joint surface of the second channel region with the first channel region;
A gate electrode that is in contact with an energizing region composed of the source region, the first channel region, the second channel region, and the drain region through an insulating film;
A tunnel field effect transistor, wherein in the first channel region, indium (In) and nitrogen (N) are added as additives to a silicon (Si) single crystal.
前記第2チャネル領域がn型シリコン(Si)単結晶であることを特徴とする請求項1に記載のトンネル電界効果トランジスタ。   The tunnel field effect transistor according to claim 1, wherein the second channel region is an n-type silicon (Si) single crystal. インジウム(In)の代わりにガリウム(Ga)が添加されていることを特徴とする請求項1又は2に記載のトンネル電界効果トランジスタ。   3. The tunnel field effect transistor according to claim 1, wherein gallium (Ga) is added instead of indium (In). 前記ソース領域と前記第1チャネル領域の接合領域において、前記ソース領域の価電子帯と前記第1チャネル領域の伝導帯との間でバンド間トンネル現象を生じさせることによってソース領域からドレイン領域に電子流を流すことを特徴とする請求項1〜3のいずれかに記載のトンネル電界効果トランジスタを使用する方法。
In the junction region between the source region and the first channel region, the drain region from the source region by producing interband tunneling between the heat gubernaculum the valence band and the first channel region of the source region A method of using a tunnel field effect transistor according to any one of claims 1 to 3, wherein an electron flow is applied.
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