JP6436342B2

JP6436342B2 - Semiconductor device

Info

Publication number: JP6436342B2
Application number: JP2014229379A
Authority: JP
Inventors: 陽平大野; 修一金子
Original assignee: Sanken Electric Co Ltd
Current assignee: Sanken Electric Co Ltd
Priority date: 2014-11-12
Filing date: 2014-11-12
Publication date: 2018-12-12
Anticipated expiration: 2034-11-12
Also published as: JP2016096164A; KR20160056768A

Description

本発明は、ゲート電極下の半導体層にダメージを与えず、信頼性が確保できる構造のＨＥＭＴに関する。
The present invention relates to a HEMT having a structure capable of ensuring reliability without damaging a semiconductor layer under a gate electrode.

HEMTにおいて、ゲート電極を外部に取り出す際、ゲート電極上の絶縁膜にビアホールを形成し、ビアホールに引き出し電極を埋め込んで電極を接続し、引き出す方法が知られている。
In HEMT, when a gate electrode is taken out, a method is known in which a via hole is formed in an insulating film on the gate electrode, a lead electrode is embedded in the via hole, the electrode is connected, and the lead is drawn.

公開特許公報特開２０１３−２１１５４８号公報JP Patent Publication No. 2013-212548

先行文献には、電極上にビアホールを形成し、ビアホールに電極を埋め込み外部に電極を取り出す構造のＨＥＭＴが示されているが、ビアホールに埋め込んだ金属が電極と接続される部分において電極下の層にダメージを与え、安定した電気特性、信頼性が得られないといった問題がある。 The prior art shows a HEMT having a structure in which a via hole is formed on an electrode, the electrode is buried in the via hole, and the electrode is taken out to the outside. There is a problem that stable electrical characteristics and reliability cannot be obtained.

ビアホールを介してゲート電極と引き出し電極を接続する際、ゲート開口領域上のゲート電極には接続せず、第二の絶縁膜上に形成されたゲート電極に接続する。

When the gate electrode and the lead electrode are connected via the via hole, the gate electrode is not connected to the gate electrode on the gate opening region, but is connected to the gate electrode formed on the second insulating film.

本発明によれば、ゲート電極下の半導体層にダメージを与えず、信頼性を確保したＨＥＭＴを得ることができる。
According to the present invention, a HEMT with high reliability can be obtained without damaging the semiconductor layer under the gate electrode.

従来品のHEMTの断面構造である。It is a cross-sectional structure of a conventional HEMT. 従来品のHEMTのゲート電極断面構造である。It is a gate electrode cross-sectional structure of a conventional HEMT. 本発明の実施例１のHEMTのゲート電極断面構造である。It is the gate electrode cross-section of HEMT of Example 1 of this invention.

以下、本発明の実施の形態となる構造について説明する。
Hereinafter, the structure which becomes embodiment of this invention is demonstrated.

図３は実施例１に係るHEMTのゲート電極部分の断面図である。本発明のHEMTにおいては、窒化物系化合物半導体からなる電子走行層１、二次元電子ガス層２、電子供給層３の上にゲート電極５が具備され、その上に第一の絶縁膜６を具備する構造になっている。実施例１においてはゲート開口領域８のゲート電極５の下に、HEMTの電気的特性を向上させるために、P型金属酸化物半導体膜９が形成されている。引き出し電極７は、ビアホール１０に埋め込まれ、ゲート開口領域８の上にあるゲート電極５ではなく、下部に第二の絶縁膜４が存在する領域のゲート電極５で接続されている。これによってゲート電極下の半導体層にダメージを与えず、信頼性を確保したＨＥＭＴを得ることができる。

FIG. 3 is a cross-sectional view of the gate electrode portion of the HEMT according to the first embodiment. In the HEMT of the present invention, a gate electrode 5 is provided on an electron transit layer 1, a two-dimensional electron gas layer 2, and an electron supply layer 3 made of a nitride compound semiconductor, and a first insulating film 6 is formed thereon. It has a structure. In the first embodiment, a P-type metal oxide semiconductor film 9 is formed under the gate electrode 5 in the gate opening region 8 in order to improve the electrical characteristics of the HEMT. The lead electrode 7 is buried in the via hole 10 and is connected not by the gate electrode 5 above the gate opening region 8 but by the gate electrode 5 in the region where the second insulating film 4 exists in the lower part. This makes it possible to obtain a HEMT that ensures reliability without damaging the semiconductor layer under the gate electrode.

第二の絶縁膜４の膜厚は電極接続部のストレスを半導体層に伝えないよう、１０００Å以上であることが望ましい。また、電極接続部の下の第二の絶縁膜４の表面は平坦であることが望ましく、これによって半導体層へのストレスが局所的に集中することを防ぎことができ、ストレスを軽減できる。また、第二の絶縁膜４の膜厚は、電極を接続した領域から、ゲート開口領域に向かって、２段階で段階的に薄く変化することが望ましく、電極接続領域下部の第二の絶縁膜の厚さをa、膜厚が薄く変化した電極接続領域とゲート開口領域の間にある第二の絶縁膜の膜厚をbとすると、２０＞a/b＞１．２の関係にあることが半導体層にストレスを加えないために望ましい。また、第二の絶縁膜厚が変化する領域においては、急峻に絶縁膜の膜厚が変化するのではなく、曲線形状に徐々に変化することが半導体層へのストレスを低減できるため好ましい。
The film thickness of the second insulating film 4 is desirably 1000 mm or more so as not to transmit the stress of the electrode connection portion to the semiconductor layer. In addition, it is desirable that the surface of the second insulating film 4 under the electrode connection portion is flat, whereby stress on the semiconductor layer can be prevented from being concentrated locally and stress can be reduced. Further, the film thickness of the second insulating film 4 is desirably changed gradually in two steps from the region where the electrode is connected to the gate opening region, and the second insulating film below the electrode connecting region is desirable. The relationship of 20> a / b> 1.2 is satisfied, where a is the thickness of the second insulating film between the electrode connection region where the thickness is changed and the gate opening region and b is the thickness of the second insulating film. Is desirable in order not to apply stress to the semiconductor layer. In the region where the second insulating film thickness changes, it is preferable that the film thickness of the insulating film does not change sharply but gradually changes to a curved shape because stress on the semiconductor layer can be reduced.

実施例１においてはおいてゲート電極はW/TiNの２層構造を有しており、P型金属酸化物半導体膜は、NiOを用いている。また引き出し電極はTi/AlCu/TiNの３層構造を有している。ゲート電極、P型金属酸化物半導体、引き出し電極は上記以外の材料を使うことも可能である。また、P型金属酸化物半導体の代わりに絶縁膜を用いたMIS構造のHEMTでも、本発明を適用することが可能である。

In Example 1, the gate electrode has a W / TiN two-layer structure, and the P-type metal oxide semiconductor film uses NiO. The lead electrode has a three-layer structure of Ti / AlCu / TiN. Materials other than those described above can be used for the gate electrode, the P-type metal oxide semiconductor, and the extraction electrode. The present invention can also be applied to a HEMT having a MIS structure using an insulating film instead of a P-type metal oxide semiconductor.

１、電子走行層
２、二次元電子ガス
３、電子供給層
４、第二の絶縁膜
５、ゲート電極
６、第一の絶縁膜
７、引き出し電極
８、ゲート開口領域
９、P形金属酸化物半導体膜
１０、ビアホール
１１、ソース電極
１２、ドレイン電極 DESCRIPTION OF SYMBOLS 1, Electron travel layer 2, Two-dimensional electron gas 3, Electron supply layer 4, Second insulating film 5, Gate electrode 6, First insulating film 7, Lead electrode 8, Gate opening region 9, P-type metal oxide Semiconductor film 10, via hole 11, source electrode 12, drain electrode

Claims

A structure having a first insulating film having a via hole on the gate electrode, and a connection portion between the extraction electrode formed through the via hole and the gate electrode is above the second insulating film,
The second insulating film is thinned in two steps in a stepwise manner from the region having the connection part toward the gate opening region.
The HEMT, wherein the connection portion is between a drain electrode and the gate opening region.

2. The HEMT according to claim 1, wherein the thickness of the second insulating film changes in a curved shape in a region where the thickness changes.

The HEMT according to claim 1, wherein the second insulating film under the connection portion is flat.

The HEMT according to any one of claims 1 to 3, wherein the gate opening region does not include the connection portion between the extraction electrode and the gate electrode.