JP6438451B2 - Optical receiver circuit - Google Patents

Description

  The present invention relates to an optical receiver circuit used in an optical communication system and an optical information processing system, and more particularly to a circuit that realizes an optical receiver circuit having high ESD (Electro-Static Discharge) resistance without deterioration of frequency characteristics. .

  With the spread of optical communication in recent years, there is a demand for cost reduction of optical communication devices. As one of the solutions, there is a method of forming an optical circuit constituting an optical communication device on a large-diameter wafer such as a silicon wafer by using a micro optical circuit technique such as silicon photonics. As a result, the manufacturing cost per chip can be dramatically reduced, and the cost of the optical communication device can be reduced.

  As a typical photodetector formed on a silicon (Si) substrate using such a technique, there is a germanium photodetector (GePD) capable of monolithic integration. GePD is formed on a SOI (Silicon On Insulator) substrate composed of a Si substrate, a Si oxide film, and a surface Si layer by using a lithography technique or the like.

JP 2008-300726 A

D. Celo, D.C. J. et al. Goodwill, C.I. Banks, S.M. Trifoli, P.M. Dumais, J. et al. Jiang, C.I. Zhang, D.H. Geng, and E.M. Bernier, "Electrostatic Discharge Sensitivity of Silicon Photonic Photodetectors and Thermo-Optic Tuning Elements," IEEE GFP 2006, WB2.

  Since GePD has an anode terminal and a cathode terminal directly connected to an electrode which is a connection part to the outside, the pn junction is greatly damaged by ESD (Electro-Static Discharge), and the performance is large. I have the problem of deteriorating. For this reason, GePD is liable to cause a failure, and there is a problem that the yield of the optical circuit chip is lowered.

  The simplest solution to improve the resistance of GePD to ESD on the chip is to increase the size of GePD. However, the dark current that flows when no light is incident increases, and the parasitic capacitance increases. As a result, there is a problem that the high frequency characteristics deteriorate.

  Therefore, as shown in Non-Patent Document 1, a method has been devised in which diodes are arranged in parallel with GePD, and the damage given to GePD is suppressed by the parasitic capacitance, and ESD resistance is improved, but a minute current is detected. Since parasitic capacitance is connected to the terminals, the high frequency characteristics are also deteriorated.

  An object of the present invention is to realize improvement of GePD resistance to ESD on a chip without causing an increase in dark current and deterioration in high-frequency characteristics.

  In order to solve the above-described problem, an invention described in one embodiment includes a photodiode that receives light and generates an electrical signal, and a resistor and a P-type connected in series to the photodiode, respectively. A transistor and a grounded capacitor, a control electrode for inputting a signal for on / off control of the transistor, a power supply electrode for inputting a bias signal to the photodiode, and an electric signal generated by the photodiode A first electrode of the resistor, a drain of the P-type transistor, and the capacitor are connected to a cathode terminal of the photodiode, and the other end of the resistor and the P-type transistor. A gate connected to the control electrode; a source of the P-type transistor is connected to the power supply electrode; Be light receiver circuit, characterized in that the anode of over de is connected to the detection electrode.

  The invention described in another embodiment includes a photodiode that receives light and generates an electrical signal, a resistor, an N-type transistor, and a grounded capacitor that are connected in series to the photodiode, respectively. A control electrode for inputting a signal for controlling on / off of the transistor, a power supply electrode for inputting a bias signal to the photodiode, and a detection electrode for detecting an electric signal generated by the photodiode One end of the resistor, the drain of the N-type transistor, and the capacitor are connected to the anode terminal of the photodiode, and the other end of the resistor and the gate of the N-type transistor are connected to the control electrode The source of the N-type transistor is connected to the power supply electrode, and the cathode of the photodiode is the detection An optical receiver circuit, characterized in that connected to the electrode.

It is a figure which shows the structural example of the optical receiver circuit of 1st Embodiment. It is a figure which shows the structural example at the time of the light detection using the optical receiver circuit of 1st Embodiment. It is a figure which shows the comparison of the frequency characteristic of an optical receiver circuit. It is a figure which shows the optical receiver circuit of 2nd Embodiment. It is a figure which shows the structural example of the optical receiver circuit of 3rd Embodiment. It is a figure which shows the structural example of the optical receiver circuit of 4th Embodiment. It is a figure which shows the structural example of the optical receiver circuit of 5th Embodiment.

  Hereinafter, embodiments of the present invention will be described in detail.

(First embodiment)
FIG. 1 is a diagram illustrating a configuration example of an optical receiving circuit according to a first embodiment of the present invention. The optical receiver circuit of the first embodiment includes a photodiode 1, a resistor 2, a P-type transistor 3, a capacitor (capacitor) 8, a first electrode 5, a second electrode 6, and a third electrode. The electrode 7 is provided. The resistor 2 is connected between the gate and the drain of the P-type transistor 3, and each of the resistor 2 and the P-type transistor 3 is connected in series to the cathode terminal of the photodiode 1. The capacitor 8 is connected between the cathode terminal of the photodiode 1 and the ground. Since the high-frequency signal is coupled to the ground via the capacitor due to the presence of the capacitor 8, the signal band of the high-speed signal can be prevented and the band is extended. The first electrode 5 is connected to the gate of the P-type transistor 3 and one end of the resistor 2. The second electrode 6 is connected to the source of the P-type transistor 3. The third electrode 7 is connected to the anode terminal of the photodiode 1.

  The photodiode 1 is an element that receives light and generates an electrical signal. The anode terminal is connected to the third electrode 7, and the cathode terminal is connected to the other end of the resistor 2 and the drain of the P-type transistor 3. ing.

  One end of the resistor 2 is connected to the first electrode 5 and the gate of the P-type transistor 3, and the other end is connected to the cathode terminal of the photodiode 1.

  The P-type transistor 3 has a gate connected to one end of the resistor 2 and the first electrode 5, a drain connected to the cathode terminal of the photodiode 1 and the other end of the resistor 2, and a source connected to the second electrode 6. Has been.

  The first electrode 5 is an electrode for inputting a control signal for turning on and off the transistor 3, and the second electrode 6 is an electrode for inputting a bias signal to the photodiode 1, and the third electrode 7 Are electrodes for detecting an electrical signal generated in the photodiode 1.

  Here, the voltage actually applied to the photodiode when a high voltage pulse is applied between any two electrodes by discharge by ESD in the optical receiver circuit of the present embodiment will be described.

  First, when a high voltage pulse is applied between the first electrode 5 and the second electrode 6, the third electrode 7 connected to the anode terminal of the photodiode 1 is an open terminal. It is not affected by high voltage pulses.

  Next, when a high voltage pulse is applied between the first electrode 5 and the third electrode 7, a current flows through a circuit in which the resistor 2 and the photodiode 1 are connected in series. However, since the high voltage pulse applied between the first electrode 5 and the third electrode 7 is divided by the resistor 2 and the photodiode 1, the voltage applied to the photodiode 1 itself is applied. Falls below the high voltage pulse. Therefore, since the voltage actually applied to the photodiode 1 itself can be suppressed, the resistance to ESD is improved.

  Further, when a high voltage pulse is applied to the second electrode 6 and the third electrode 7, a current flows through a circuit in which the transistor 3 and the photodiode 1 are connected in series. The gate and drain of the transistor 3 are connected via a resistor 2. Since the high voltage pulse is applied to the second electrode 6 and the third electrode 7, the charge generated between the source and drain of the transistor 3 is diffused in the source substrate of the transistor 3, and is added to the photodiode 1. The voltage drops below the applied high voltage pulse. Therefore, since the voltage actually applied to the photodiode 1 itself can be suppressed, the resistance to ESD is improved.

  As described above, the optical receiver circuit of the present embodiment does not destroy the photodiode that is an internal device even when a high voltage pulse is applied between any two electrodes due to discharge by ESD.

  FIG. 2 is a diagram illustrating a configuration example at the time of light detection using the optical receiver circuit of the first embodiment. As shown in FIG. 2, the optical receiver circuit of the first embodiment is connected to the control circuit 21 via the first electrode 5 with respect to the electronic circuit 20 for photodetection driving, and the second electrode 6 is connected to the power supply circuit 22 via the third electrode 7, and is connected to the detection circuit 23 via the third electrode 7. That is, in the optical receiver circuit of the first embodiment, as shown in FIG. 2, the gate of the P-type transistor 3 is connected to the control circuit 21, the source of the P-type transistor 3 is connected to the power supply circuit 22, and the photodiode 1 is connected to the detection circuit 23.

  The electronic circuit 20 connected to the optical receiver circuit of the present embodiment outputs a control signal so that the control circuit 21 turns on the transistor 3 during light detection, and the power supply circuit 22 biases the photodiode 1. A voltage to be applied is applied, and the detection circuit 23 detects a minute current generated in the photodiode 1.

  As is clear from FIG. 2, in the optical receiver circuit of this embodiment, no element for improving the ESD withstand voltage is connected between the anode terminal of the photodiode 1 for detecting the photocurrent and the detection circuit 23. Therefore, the high frequency characteristics are not deteriorated in signal detection. Further, since the bias voltage applied to the photodiode 1 is supplied from the power supply circuit 22 through the transistor 3 that is turned on, no voltage drop due to the resistor 2 occurs.

  FIG. 3 is a diagram for comparing the frequency characteristics of the optical receiver circuit of the present invention and the second conventional example. FIG. 3 shows a comparison of the frequency characteristics of the conventional optical receiver circuit in the case where ESD protection is performed using a diode as in the conventional example and the non-patent document 1 that do not take ESD countermeasures with the optical receiver circuit of this embodiment. ing. In the protection by the conventional diode, the frequency characteristic is deteriorated by the parasitic capacitance, but the frequency characteristic is not deteriorated in the optical receiving circuit of this embodiment.

  As a conventional measure for improving ESD resistance, there has been a method of connecting a capacitor or another diode in parallel with a photodiode, as cited in Non-Patent Document 1. However, in this case, a capacitor is connected between the anode and the third electrode of the photodiode through which a minute current to be detected flows, and the high-frequency characteristics deteriorate, so that it cannot be applied to a photodiode that requires broadband characteristics. There was a problem.

  In the present invention, since other devices are connected only to the cathode side that supplies power to the photodiode, nothing is connected to the anode side that detects minute signals, and high-frequency characteristics do not deteriorate. The photodetection circuit of the present invention exhibits characteristics that are far wider than that of the conventional photodetection circuit with ESD protection.

  Japanese Patent Application Laid-Open No. 2003-228561 discloses a technique for improving ESD resistance by connecting a resistor to the cathode side of a photodiode and reducing the voltage applied to the photodiode. As a result, the voltage applied to the photodiode decreases, leading to a decrease in sensitivity of the photodiode. Since the magnitude of the voltage drop is determined by the current induced by the optical power input to the photodiode, there is a problem that the voltage applied to the photodiode varies when the optical power changes.

  In the present invention, since the PD and the transistor are connected in series and the transistor is turned on during the light detection operation, the voltage drop at the resistance portion that has conventionally occurred does not occur. Therefore, when the voltage applied to the photodiode does not connect the resistor The sensitivity is not lowered and the voltage does not fluctuate.

  In the past, when the ESD resistance on the chip could not be obtained, the ESD protection was improved by connecting the ESD protection device with a mounting substrate etc. outside the chip, but each element of the present invention is the same Since it can also be integrated on a substrate, an external ESD protection device is not necessary according to the present invention, and reduction of component cost and mounting area can also be realized.

(Second Embodiment)
FIG. 4 is a diagram showing an optical receiver circuit according to the second embodiment of the present invention. As shown in FIG. 4, the optical receiver circuit of the second embodiment uses an N-type transistor 31 instead of the P-type transistor 3 in the optical receiver circuit of the first embodiment. In addition, the resistor 2, the transistor 3, and the capacitor 8 are connected to the cathode terminal of the photodiode 1. However, in this embodiment, the resistor 2, the transistor 31, and the capacitor 8 are connected to the anode terminal of the photodiode 1. With the difference in configuration, the third electrode 7 is connected to the cathode terminal of the photodiode 1. Other configurations are the same as those of the first embodiment.

  In the optical receiver circuit of the second embodiment, the gate of the N-type transistor 31 is connected to the control circuit 21 of the electronic circuit 20 for photodetection drive (see FIG. 2) via the first electrode 5 when detecting light. The source of the N-type transistor 31 is connected to the power supply circuit 22 of the electronic circuit 20 via the second electrode 6, and the cathode terminal of the photodiode 1 is connected to the electronic circuit 20 via the third electrode 7. It is assembled so as to be connected to the detection circuit 23.

  In the optical receiver circuit of the present embodiment, a minute current that flows when receiving an optical signal flows from the cathode of the photodiode to the detection circuit 23 (see FIG. 2) to detect the signal. At this time, since no element for improving the ESD withstand voltage is connected between the cathode and the detection circuit 23, the high-frequency characteristics are not deteriorated in signal detection. Therefore, in the optical receiver circuit of this embodiment, it is possible to realize the ESD resistance improvement effect on the chip as in the optical receiver circuit of the first embodiment without deterioration of high frequency characteristics and voltage drop at the resistor. .

(Third embodiment)
FIG. 5 is a diagram illustrating a configuration example of an optical receiving circuit according to the third embodiment of the present invention. As shown in FIG. 5, the optical receiver circuit of the third embodiment is the same as the optical receiver circuit of the first embodiment, except that the ESD protection circuit 4 is connected between the gate and the source of the P-type transistor 3. It is the composition which is. Other configurations are the same as those of the optical receiver circuit of the first embodiment.

  In the optical receiver circuit of the first embodiment, the gate of the P-type transistor 3 is connected to the first electrode 5, and the ESD resistance of this gate terminal is lower than that of the other electrodes. Normally, when electrostatic breakdown due to ESD occurs at the gate terminal of a transistor, the gate oxide film is dielectrically broken and the terminals are short-circuited. At the time of light detection, the transistor is turned on and operates so as to pass a current. Therefore, there is no particular problem even if the transistor is destroyed and the terminals are short-circuited. However, if the transistor 3 is always ON, it cannot be controlled by the control circuit 21. In the present embodiment, an ESD protection circuit 4 is provided between the gate and the source of the transistor 3 in order to prevent such destruction of the transistor 3.

  As the ESD protection circuit 4, for example, a bidirectional Zener diode or a capacitor having a large capacity can be used.

  Also in the optical receiver circuit of this embodiment, no element for improving the ESD withstand voltage is connected to the path from the anode of the photodiode 1 through which a minute current flows when light is detected to the detection circuit. As a result, while reliably protecting the transistor 3 in addition to the photodiode 1, it is possible to improve the ESD resistance on the chip as in the optical receiver circuit of the first embodiment without deterioration of the high frequency characteristics and voltage drop due to the resistance. It is possible to realize.

(Fourth embodiment)
FIG. 6 is a diagram showing a configuration example of an optical receiver circuit according to the fourth embodiment of the present invention. The optical receiver circuit of the fourth embodiment is the optical receiver circuit of the second embodiment as shown in FIG. 6, and the ESD protection circuit 4 is connected between the gate and the source of the N-type transistor 31. It is the composition which is. Other configurations are the same as those of the optical receiver circuit of the second embodiment.

  Also in the optical receiver circuit of the second embodiment, the gate of the N-type transistor 31 is connected to the first electrode 5, and the ESD resistance of the gate terminal is lower than that of the other electrodes. The optical receiver circuit of the second embodiment does not have a problem at the time of light detection, but cannot be controlled by the control circuit 21 if the transistor 3 is always on. For this reason, the ESD protection circuit 4 is provided between the gate and the source of the transistor 31 as in the optical receiver circuit of the third embodiment.

  Also in the optical receiver circuit of the present embodiment, no element for improving the ESD withstand voltage is connected to the path from the cathode of the photodiode 1 through which a minute current flows when light is detected to the detection circuit. As a result, while reliably protecting the transistor 31 in addition to the photodiode 1, it is possible to improve the ESD resistance on the chip as in the optical receiver circuit of the second embodiment without deterioration of the high frequency characteristics and voltage drop due to the resistance. It is possible to realize.

(Fifth embodiment)
FIG. 7 is a diagram showing a configuration example of an optical receiver circuit according to the fifth embodiment of the present invention. The optical receiver circuit of the fifth embodiment is configured using a plurality of photodiodes on one chip.

  In this optical receiver circuit, the cathodes of a plurality of photodiodes 1a, 1b, 1c, and 1d are connected together and connected in series with a resistor 2 and a P-type transistor 3. The anodes of the plurality of photodiodes 1a, 1b, 1c, and 1d are connected to different third electrodes 7a, 7b, 7c, and 7d, respectively. As the electronic circuit for driving the optical receiver circuit, one having a detection circuit corresponding to the number of the third electrodes 7a, 7b, 7c, 7d can be used.

  As a result, the ESD resistance improvement effect on the chip can be realized without deterioration of the high frequency characteristics and voltage drop due to the resistance. In addition to reducing the component cost and mounting area, the same chip can be used. It is possible to improve the ESD resistance of the plurality of photodiodes with one transistor and one resistor, and the area can be reduced.

  The optical receiver circuit of this embodiment can also be configured using an N-type transistor 31 instead of the P-type transistor 3 of the optical receiver circuit shown in FIG. When the N-type transistor 31 is used, the resistors of the plurality of photodiodes 1a, 1b, 1c, and 1d are connected to one and connected in series as in the optical receiver circuit of the second embodiment. The 2 and N type transistors 31 may be connected to the anode.

  Further, the ESD protection circuit 4 may be provided between the gate and the source of the P-type transistor 3 or the N-type transistor 31 as in the third and fourth embodiments.

  Moreover, since the ESD protection element can be integrated on the same substrate in the optical receiver circuit of any of the above embodiments, it is possible to eliminate the need for an ESD protection device on the mounting substrate or the like. Cost and mounting area can also be reduced.

DESCRIPTION OF SYMBOLS 1 Photodiode 2 Resistance 3 P-type transistor 31 N-type transistor 4 ESD protection circuit 5 1st electrode 6 2nd electrode 7 3rd electrode 8 Capacity | capacitance 20 Electronic circuit 21 Control circuit 22 Power supply circuit 23 Detection circuit

Claims (6)

A photodiode that receives light and generates an electrical signal;
A resistor, a P-type transistor, and a grounded capacitor connected in series to each of the photodiodes;
A control electrode for inputting a signal for controlling on / off of the transistor;
A power supply electrode for inputting a bias signal to the photodiode;
A detection electrode for detecting an electrical signal generated by the photodiode;
One end of the resistor, the drain of the P-type transistor, and the capacitor are connected to the cathode terminal of the photodiode, and the other end of the resistor and the gate of the P-type transistor are connected to the control electrode. A light receiving circuit, wherein a source of a transistor of a type is connected to the power supply electrode, and an anode of the photodiode is connected to the detection electrode. A photodiode that receives light and generates an electrical signal;
A resistor, an N-type transistor, and a grounded capacitor connected in series to each of the photodiodes;
A control electrode for inputting a signal for controlling on / off of the transistor;
A power supply electrode for inputting a bias signal to the photodiode;
A detection electrode for detecting an electrical signal generated by the photodiode;
One end of the resistor, the drain of the N-type transistor, and the capacitor are connected to the anode terminal of the photodiode, and the other end of the resistor and the gate of the N-type transistor are connected to the control electrode. A light receiving circuit, wherein a source of a transistor of a type is connected to the power supply electrode, and a cathode of the photodiode is connected to the detection electrode.   A plurality of the photodiodes and the detection electrodes are provided in the optical receiving circuit, the anodes of the plurality of photodiodes are respectively connected to the separate detection electrodes, and the cathodes of the plurality of photodiodes are one. The optical receiver circuit according to claim 1, wherein the optical receiver circuit is connected to the optical receiver circuit.   A plurality of the photodiodes and the detection electrodes are provided in the optical receiving circuit, the cathodes of the plurality of photodiodes are respectively connected to the separate detection electrodes, and one anode of the plurality of photodiodes is provided. The optical receiver circuit according to claim 2, wherein the optical receiver circuit is connected to the optical receiver circuit.   The optical receiver circuit according to claim 1, further comprising an ESD protection circuit connected between a gate and a source of the transistor.   The optical receiver circuit according to claim 1, wherein all elements are integrated on the same substrate.