JP6450933B2 - Semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device used in various electronic devices.

  A conventional semiconductor device will be described below with reference to the drawings. FIG. 6 is a cross-sectional view showing a configuration of a conventional semiconductor device 1. The semiconductor device 1 includes a lead frame 2, a semiconductor element 3, an insulating layer 4, and an exterior resin 5.

  The semiconductor element 3 is mounted on one surface of the lead frame 2, and the insulating layer 4 is disposed on the opposite surface of the lead frame 2. The semiconductor element 3 is connected to the lead frame 2 by the mounting portion 3A or the wire portion 2A. The insulating layer 4 is thermally coupled to a heat sink 6 provided outside the semiconductor device 1, so that heat generated in the semiconductor element 3 is released to the outside of the semiconductor device 1.

  For example, Patent Document 1 is known as prior art document information related to the invention of this application.

Japanese Patent Laid-Open No. 2015-5540

  In the conventional semiconductor device 1, the heat generated in the semiconductor element 3 is transmitted to the lead frame 2 and immediately transmitted to the insulating layer 4 and the heat sink 6. Here, the insulating layer 4 and the lead frame 2 and the heat sink 6 are firmly fixed to each other by solder (not shown) or the like in order to improve the efficiency of heat conduction. Further, the insulating layer 4 formed of ceramic or the like and the lead frame 2 and the heat sink 6 formed mainly of metal have greatly different expansion coefficients.

  As a result, when heat generated in the semiconductor element 3 is transmitted to the heat sink 6 via the lead frame 2 and the insulating layer 4, stress is generated in each part of the semiconductor device 3 due to the difference in expansion coefficient. In particular, when a large stress occurs, the insulating layer 4 is made of ceramic or the like as described above. Therefore, cracks and cracks are likely to occur, and the heat dissipation efficiency from the semiconductor device 1 to the outside may be reduced. There was a problem of being.

  Accordingly, an object of the present invention is to maintain a high heat dissipation efficiency of a semiconductor device even when a large stress occurs in the semiconductor device at a high temperature.

  In order to achieve this object, the present invention includes a base substrate, a semiconductor element bonded to the base substrate, a lead frame bonded to a surface opposite to the bonding surface of the semiconductor element with the base substrate, A plurality of insulating substrates fixed to a surface of the base substrate opposite to the bonding surface with the semiconductor element, an entire surface of the semiconductor element, a part of the base substrate, a part of the lead frame, and the plurality of insulating substrates; And the base substrate and the lead frame are formed of copper or a copper alloy, and the base substrate is formed thicker than the lead frame. Is.

  According to the present invention, heat generated in the semiconductor element is released to the outside through the lead frame and the base substrate. In particular, the heat transferred to the base substrate is diffused over a wide range from the semiconductor element side to the insulating substrate side of the base substrate by the base substrate thicker than the lead frame. Thereby, the heat dissipation efficiency of the semiconductor element is improved. Furthermore, since the insulating substrate is divided into a plurality of parts, the expansion generated in the insulating substrate due to the heat diffused in a wide range in the base substrate is distributed to the individual insulating substrates. Then, due to the difference in expansion coefficient between the base substrate and the insulating substrate, mechanical stress generated particularly on the insulating substrate is not easily concentrated on the specific base substrate.

  As a result, even if the semiconductor element generates high heat and a large stress is generated inside the semiconductor device at a high temperature, this stress is dispersed in the base substrate, so that the heat applied to each insulating layer is suppressed, and further, the insulating layer is By being separated into pieces, cracks and cracks due to strain caused by heat are less likely to occur, and the semiconductor device can always maintain high heat dissipation efficiency.

Sectional drawing which shows the structure of the semiconductor device in embodiment of this invention Sectional drawing which shows the structure using the heat sink of the semiconductor device in embodiment of this invention Sectional drawing which shows the structure using the several semiconductor element of the semiconductor device in embodiment of this invention Sectional drawing which expanded the principal part of the semiconductor device in embodiment of this invention The block diagram of the inverter circuit using the semiconductor device in embodiment of this invention Sectional view showing the configuration of a conventional semiconductor device

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment)
FIG. 1 is a cross-sectional view showing a configuration of a semiconductor device according to an embodiment of the present invention. The semiconductor device 7 includes a base substrate 8, a semiconductor element 9, a lead frame 10, an insulating substrate 11, and an exterior resin 12.

  The semiconductor element 9 is bonded to the base substrate 8. The semiconductor element 9 is bonded to the lead frame 10 on the surface opposite to the bonding surface 9A of the semiconductor element 9 with the base substrate 8. The plurality of insulating substrates 11 are fixed to the base substrate 8 on the surface of the base substrate 8 opposite to the bonding surface 9 </ b> A between the base substrate 8 and the semiconductor element 9.

  The exterior resin 12 covers the base substrate 8, the semiconductor element 9, the lead frame 10, and the insulating substrate 11. The entire surface of the semiconductor element 9 is covered and sealed with an exterior resin 12. The base substrate 8 is covered with the exterior resin 12 except for a portion exposed from the exterior resin 12. The lead frame 10 is covered with the exterior resin 12 except for a portion exposed from the exterior resin 12. The insulating substrate 11 is covered with the exterior resin 12 except for a portion exposed from the exterior resin 12.

  Here, the base substrate 8 and the lead frame 10 are formed of copper or a copper alloy. Further, the base substrate 8 is formed thicker than the lead frame 10.

  With the above configuration, the heat generated in the semiconductor element 9 is released to the outside of the semiconductor device 7 through the lead frame 10 and the base substrate 8, both of which have a high heat conduction capability. Here, in particular, the heat transferred from the semiconductor element 9 to the base substrate 8 is transferred from the semiconductor element 9 side to the insulating substrate 11 side. The base substrate 8 is formed to be thicker and larger in cross-sectional area than the lead frame 10 and is made of copper or a copper alloy that easily conducts heat. For this reason, the heat generated in the semiconductor element 9 is diffused over a wide range from the semiconductor element 9 side toward the insulating substrate 11 side. Thereby, the heat dissipation of the semiconductor element 9 is improved by the lead frame 10 and particularly the base substrate 8.

  Here, the heat that has already been diffused widely in the base substrate 8 is transferred to the insulating substrate 11. Since the insulating substrate 11 is divided into a plurality of parts, heat diffused and dispersed is transmitted to the individual insulating substrates 11. Therefore, the expansion caused by the heat generated in the insulating substrate 11 is also dispersed. Thereby, due to the difference in expansion coefficient between the base substrate 8 and the insulating substrate 11, the mechanical stress generated particularly on the insulating substrate 11 is not easily concentrated on the specific base substrate 8.

  As described above, even if the semiconductor element 9 generates a high heat and a large stress is generated in the semiconductor device 7 at a high temperature, the stress is dispersed in the base substrate 8, so that the heat applied to each insulating substrate 11 is suppressed. Further, since the insulating substrate 11 is divided into pieces and has a small area and volume, the stress generated in each insulating substrate 11 is smaller than that having a large area and volume. Therefore, cracks and cracks due to strain caused by heat are less likely to occur. As a result, the semiconductor device 7 can always maintain high heat dissipation efficiency, and high reliability can be maintained.

  Hereinafter, the configuration of the semiconductor device 7 will be described in detail. The semiconductor element 9 is joined to the base substrate 8 using solder, conductive paste or the like (not shown). The semiconductor element 9 is bonded to the lead frame 10 on the opposite surface of the semiconductor element 9 from the bonding surface 9A with the base substrate 8 using solder or the like. The plurality of insulating substrates 11 are fixed to the base substrate 8 on the opposite surface of the base substrate 8 to the bonding surface 9A between the base substrate 8 and the semiconductor element 9 using a high heat transfer resin or an adhesive (not shown). Yes.

  The exterior resin 12 covers the base substrate 8, the semiconductor element 9, the lead frame 10, and the insulating substrate 11. The entire surface of the semiconductor element 9 is covered and sealed with an exterior resin 12 except for the joint surface between the base substrate 8 and the lead frame 10. The base substrate 8 is covered with the exterior resin 12 except for the joint surface between the semiconductor element 9 and the insulating substrate 11, and the extending portion 8 </ b> A is exposed from the exterior resin 12. The lead frame 10 is covered with the exterior resin 12 except for the joint surface with the semiconductor element 9, and the extending portion 10 </ b> A is exposed from the exterior resin 12. The insulating substrate 11 is covered with the exterior resin 12 except for the joint surface 11A between the base substrate 8 and the insulating substrate 11, and the heat radiation surface 11B opposite to the joint surface 11A is exposed from the exterior resin 12.

  Here, the lead frame 10 and the base substrate 8 can be energized with a large current. The extending part 10 </ b> A and the extending part 8 </ b> A can be used as input and output ends in the semiconductor device 7. Here, as the exterior resin 12, a thermosetting resin such as an epoxy resin is used.

  The lead frame 10 and the base substrate 8 may be completely sealed with the exterior resin 12 without having the extending portion 10A and the extending portion 8A. At this time, for connection between the outside of the semiconductor device 7 and the lead frame 10 or the base substrate 8, a copper wire (not shown) connected to the lead frame 10 or the base substrate 8 and drawn out from the semiconductor device 7. Should be used.

  As described above, the lead frame 10 is directly connected to one surface of the semiconductor element 9, and the base substrate 8 is directly connected to the opposite surface of the semiconductor element 9 to the connection surface with the lead frame. In other words, the semiconductor element 9 is disposed between conductors having a large thickness. Since the lead frame 10 and the base substrate 8 having a very low electrical resistance correspond to conductor portions through which a large current flows, power loss caused by energization of a large current and heat generation in the conductor accompanying this are reduced. The Thereby, the lead frame 10 and the base substrate 8 play a big role with respect to heat conduction.

  In FIG. 1, the lead frame 10 is shown as a simple rectangular cross section. However, the lead frame 10 is not a simple plate-like conductor, and various wiring patterns are formed by punching the plate-like conductor. Therefore, although shown as a single conductor in FIG. 1, a plurality of branched conductors actually constitute the lead frame 10. Therefore, when an IGBT (insulated gate bipolar transistor) or FET (field effect transistor) is used for the semiconductor element 9, the gate terminal of the semiconductor element 9 is connected to a part of the lead frame 10, and A source terminal or a drain terminal is connected to a part of the base substrate 8, and a drain terminal or a source terminal is connected to the base substrate 8.

  As described above, even if the semiconductor element 9 generates a high heat, the heat is dispersed particularly in the base substrate 8, so that a large stress does not concentrate on a part of the semiconductor device 7. In other words, the heat applied to each insulating substrate 11 and the stress generated in each insulating substrate 11 are dispersed and become smaller. Furthermore, since the insulating substrate 11 is divided into pieces, cracks and cracks due to strain caused by heat are less likely to occur. As a result, the semiconductor device 7 can always maintain high heat dissipation efficiency.

  Therefore, as the base substrate 8 is thickened, heat is rapidly diffused over a wide range. For this reason, by arranging the individual insulating substrates 11 as a group, they can be arranged in a wide area with a large area, and the effect on heat dissipation increases. Since the insulating substrate 11 is divided into individual pieces, even if many insulating substrates 11 are arranged as a group in a wide range, the mechanical strain generated in each insulating substrate 11 is kept small. Therefore, even when a ceramic material that is excellent in thermal conductivity and insulation but mechanically brittle is used for the insulating substrate 11, the insulating substrate 11 is unlikely to deteriorate heat transfer characteristics and heat dissipation characteristics due to cracks and the like.

  In FIG. 1, a single semiconductor element 9 is arranged corresponding to a plurality of separated insulating substrates 11. In this case, it is preferable that the semiconductor elements 9 are arranged with a substantially uniform distance from each insulating substrate 11. Alternatively, the single semiconductor element 9 may face the plurality of insulating substrates 11 and be arranged in a positional relationship across the plurality of insulating substrates 11. Thereby, the semiconductor element 9 can transmit the heat generated in the semiconductor element 9 to the individual insulating substrates 11 substantially evenly. As a result, the heat dissipation efficiency of the individual insulating substrates 11 is improved, and the heat dissipation efficiency of the semiconductor device 7 is necessarily improved.

  Further, in FIG. 1, the insulating substrates 11 are arranged in parallel with each other through a part of the exterior resin 12, but the insulating substrates 11 may be arranged in contact with each other without passing through a part of the exterior resin 12. . Even if the plurality of insulating substrates 11 are in contact with each other, the insulating substrates 11 are separated into individual pieces. Therefore, the insulating substrates 11 are unlikely to be affected by mechanical strain due to expansion and contraction accompanying temperature changes. Thereby, a large number of insulating substrates 11 are arranged per unit area of the base substrate 8, and the heat dissipation efficiency of the semiconductor device 7 is improved.

  Further, FIG. 2 is a cross-sectional view showing a configuration using the heat sink of the semiconductor device 7 in the embodiment of the present invention. As shown in FIG. 2, a heat radiating plate 13 may be attached to the heat radiating surface 11 </ b> B of the insulating substrate 11 in the semiconductor device 7. As a result, the heat that has already been dispersed inside the semiconductor device 7, particularly the base substrate 8 and transmitted to the insulating substrate 11, is further dispersed by the heat radiating plate 13 and then radiated to the outside. As a result, the heat dissipation efficiency of the semiconductor device 7 is further improved.

  Here, the insulating substrate 11 and the heat radiating plate 13 may be fixed using metal bonding such as solder, high heat transfer resin (not shown), or the like, similarly to the fixing of the base substrate 8 and the insulating substrate 11. . In particular, even when metal bonding such as solder is used, as described above, the insulating substrate 11 is divided into pieces and hardly generates stress, so that the connection reliability of the bonding surface is maintained. Of course, heat transfer and heat dissipation are improved.

  The heat radiating plate 13 may be made of aluminum, aluminum alloy, copper, copper alloy, or the like having good heat conductivity. Here, the plate-like heat sink 13 is illustrated, but the heat sink 13 is not limited to such a shape, but has a shape that increases the surface area by providing irregularities on the heat dissipation surface to improve heat dissipation. There may be.

  FIG. 3 is a cross-sectional view showing a configuration using a plurality of semiconductor elements 9 of the semiconductor device 7 in the embodiment of the present invention. As shown in FIG. 3, a plurality of semiconductor elements 9 may be connected to the base substrate 8 and the lead frame 10 or may be arranged. The semiconductor element 9 and the insulating substrate 11 are preferably disposed to face each other with the base substrate 8 therebetween. For example, as shown in FIG. 3, the semiconductor element 9 </ b> X and the insulating substrate 11 </ b> X may be arranged to face each other in the front and be a semiconductor element 9 </ b> X that is a set of heat sources and an insulating substrate 11 </ b> X that is a heat transfer body. Similarly, the semiconductor element 9Y and the insulating substrate 11Y, and the semiconductor element 9Z and the insulating substrate 11Z may be arranged facing each other to form one set. Here, assuming that the amount of heat generated by the semiconductor element 9 </ b> X is the largest, the projected area of the insulating substrate 11 </ b> X onto the base substrate 8 may be the largest compared to the other insulating substrates 11. Alternatively, assuming that the amount of heat generated by the semiconductor element 9Z is the smallest, the projected area of the insulating substrate 11Z onto the base substrate 8 may be made the smallest compared to the other insulating substrates 11. In other words, since the projected areas of the insulating substrates 11X, 11Y, and 11Z on the base substrate 8 substantially correspond to the heat transfer capability, these projected areas are determined according to the respective heat generation amounts of the semiconductor elements 9X, 9Y, and 9Z. That's fine.

  In FIG. 3, the semiconductor element 9X and the insulating substrate 11X, the semiconductor element 9Y and the insulating substrate 11Y, and the semiconductor element 9Z and the insulating substrate 11Z are all arranged in a one-to-one relationship. However, it is not necessary that all of them are arranged one-on-one. For example, when the semiconductor element 9X and the insulating substrate 11X require the most heat dissipation, only the semiconductor element 9X and the insulating substrate 11X are arranged to face each other, and the other semiconductor elements 9Y and 9Z are connected to the insulating substrate 11Y and the insulating substrate 11X. The board | substrate 11Z does not need to be opposingly arranged by 1 to 1. In other words, only predetermined combinations may be arranged to face each other on a one-to-one basis.

  As a result, the insulating substrate 11 can be determined to an appropriate size according to the amount of heat dissipation, and therefore does not have an excessive area due to excessive heat dissipation characteristics. Therefore, cracks and cracks due to impact from the outside of the semiconductor device 7 are less likely to occur. And the heat dissipation efficiency and reliability of the semiconductor device 7 are maintained in a high state.

  Further, the projection area of the insulating substrate 11 onto the base substrate 8 may be determined according to the position where the insulating substrate 11 is disposed. For example, the projected area of the insulating substrate 11Z provided at the position closest to the extending portion 8A in the base substrate 8 may be smaller than that of the insulating substrate 11X or the insulating substrate 11Y. Alternatively, the insulating substrate 11Z may have the smallest projected area among the plurality of insulating substrates 11.

  When the base substrate 8 is thicker than the lead frame 10 and the heat conduction effect and heat diffusion effect by the base substrate 8 are large, a part of the heat generated in the plurality of semiconductor elements 9 propagates through the base substrate 8 to the extending portion 8A. And discharged to the outside of the semiconductor device 7. For this reason, even if the insulating substrate 11Z provided at the position closest to the extending portion 8A has a lower ability for heat dissipation than the other insulating substrates 11X and 11Y, the heat generated in the semiconductor element 9Z is particularly extended. The base substrate 8 proximate to the portion 8A is likely to be discharged to the extending portion 8A. For this reason, the heat radiation capability of the entire semiconductor device 7 is unlikely to decrease. Thereby, in particular, the insulating substrate 11Z disposed closest to the extending portion 8A can be determined to be smaller than the size corresponding to the heat radiation amount of the semiconductor element 9Z facing each other. Therefore, the projected area of the insulating substrate 11 onto the base substrate 8 is reduced, and cracks and cracks due to impacts from the outside of the semiconductor device 7 are less likely to occur. And the heat dissipation efficiency and reliability of the semiconductor device 7 are maintained in a high state.

  FIG. 4 is an enlarged cross-sectional view of a main part of the semiconductor device 7 according to the embodiment of the present invention. As shown in the locus of the broken line in FIG. 4, the projected area of the insulating substrate 11 onto the base substrate 8 may be smaller than the projected area of the semiconductor element 9 onto the base substrate 8. Alternatively, the projected shape of the insulating substrate 11 onto the base substrate 8 may be included in the projected shape of the semiconductor element 9 onto the base substrate 8. As described above, since the base substrate 8 is thicker than the lead frame 10 and the base substrate 8 has a large thermal diffusion effect, part of the heat generated in the plurality of semiconductor elements 9 extends through the base substrate 8. Propagated to the part 8 </ b> A and discharged to the outside of the semiconductor device 7. For this reason, the plurality of insulating substrates 11 may release part of the heat generated in the plurality of semiconductor elements 9. Therefore, the projected shape or projected area of the insulating substrate 11X facing the semiconductor element 9X on the base substrate 8 may be included in the projected shape or projected area of the semiconductor element 9X on the base substrate 8 or may be small. Therefore, it is difficult for the insulating substrate 11 to be cracked or cracked due to an impact from the outside of the semiconductor device 7. And the heat dissipation efficiency and reliability of the semiconductor device 7 are maintained in a high state.

  At this time, for example, heat generated in the semiconductor element 9X is transmitted to the insulating substrate 11X and also transmitted to the insulating substrate 11Y adjacent to the insulating substrate 11X. Thereby, the heat generated in the semiconductor element 9X is released to the outside of the semiconductor device 7 also by the insulating substrates 11X and 11Y. Therefore, since the single insulating substrate 11 can be determined to be smaller than the appropriate size according to the heat radiation amount of the single semiconductor element 9 opposed via the base substrate 8, the area of the insulating substrate 11 can be reduced, and the semiconductor Cracks and cracks due to impact from the outside of the device 7 are less likely to occur. And the heat dissipation efficiency and reliability of the semiconductor device 7 are maintained in a high state.

  Here, taking the semiconductor element 9X as an example, heat generated from the semiconductor element 9X is efficiently dissipated by the insulating substrate 11X facing the semiconductor element 9X and the insulating substrate 11Y disposed adjacent to the insulating substrate 11X. The following conditions are desirable. Here, when the distance separating the insulating substrate 11X and the insulating substrate 11Y disposed adjacent to the insulating substrate 11X is L and the thickness of the base substrate 8 is TB, the heat dissipation effect is obtained by setting TB> L. Tends to be prominent.

  The heat generated from the semiconductor element 9X is propagated in the directions indicated by the arrows Hv, Hd, and Hh in the figure, but the base substrate 8 is a metal such as thick copper having a large value of TB, so that time elapses. At the same time, heat propagation in the Hd direction increases. When the condition of TB> L is satisfied as described above, the bonding surface 9A between the semiconductor element 9X and the base substrate 8 is close to a positional relationship that generally faces the insulating substrate 11Y, although it is not front. For this reason, the heat generated from the semiconductor element 9X is efficiently transmitted not only to the insulating substrate 11X but also to the insulating substrate 11Y. Therefore, by setting TB> L, the heat dissipation effect is likely to be remarkable.

  The above effect is the same in that heat generated from the semiconductor element 9Y can be efficiently transmitted not only to the insulating substrate 11Y but also to the insulating substrate 11X.

  The above effect is particularly effective when the semiconductor element 9X and the semiconductor element 9Y generate heat alternately. As an example, FIG. 5 is a block diagram of an inverter circuit 14 using the semiconductor device 7 in the embodiment of the present invention. As shown in FIG. 5, the inverter circuit 14 controls a switching element corresponding to the semiconductor element 9 </ b> X by the control element 15, and converts the DC voltage of the DC power supply 17 into an AC voltage using the inductance element 16.

  Here, the semiconductor element 9X corresponds to a switching element as described above, and the semiconductor element 9Y corresponds to a rectifying element. The switching element is an IGBT or FET, and the rectifying element is a diode, which is connected with a polarity opposite to that of the DC power supply 17. Further, the semiconductor element 9X and the semiconductor element 9Y are provided in the upper arm and the lower arm, respectively.

  First, as a first operation, when the semiconductor element 9X of the upper arm is turned on, a reverse bias is applied to the semiconductor element 9Y of the upper arm, and the semiconductor element 9Y does not operate. In other words, at this time, the semiconductor element 9X of the upper arm generates heat, and the semiconductor element 9Y of the upper arm does not generate heat. At this time, the semiconductor element 9X of the lower arm is OFF.

  Next, as a second operation, since the energy stored in the inductance element 16 cannot be immediately cut off when the semiconductor element 9X of the upper arm is turned off, a forward bias is applied to the semiconductor element 9Y of the lower arm. Thus, the semiconductor element 9Y of the lower arm operates. In other words, at this time, the semiconductor element 9Y of the lower arm generates heat, and the semiconductor element 9X of the upper arm does not generate heat.

  Next, as a third operation, when the semiconductor element 9X of the lower arm is turned on, a reverse bias is applied to the semiconductor element 9Y of the lower arm, and the semiconductor element 9Y does not operate. In other words, at this time, the semiconductor element 9X of the lower arm generates heat, and the semiconductor element 9Y of the lower arm does not generate heat. At this time, the semiconductor element 9X of the upper arm is OFF.

  Next, as a fourth operation, since the energy stored in the inductance element 16 cannot be immediately cut off when the lower arm semiconductor element 9X is turned OFF, a forward bias is applied to the upper arm semiconductor element 9Y. Thus, the semiconductor element 9Y of the upper arm operates. In other words, at this time, the semiconductor element 9Y of the upper arm generates heat, and the semiconductor element 9X of the upper arm does not generate heat.

  Thus, in the inverter circuit of FIG. 5, the first operation to the fourth operation are repeatedly performed. When either one of the semiconductor element 9X and the semiconductor element 9Y shown in FIG. 4 operates and both do not operate at the same time, the insulating substrate 11X and the insulating substrate 11Y efficiently exhibit an effect on heat dissipation.

  The semiconductor device of the present invention has an effect of maintaining high heat dissipation efficiency, and is useful in various electronic devices.

DESCRIPTION OF SYMBOLS 7 Semiconductor device 8 Base substrate 8A, 10A Extension part 9, 9X, 9Y, 9Z Semiconductor element 9A, 11A Bonding surface 10 Lead frame 11, 11X, 11Y, 11Z Insulating substrate 11B Heat radiation surface 12 Exterior resin 13 Heat radiation plate 14 Inverter circuit 15 Control element 16 Inductance element

Claims (4)

A base substrate;
A semiconductor element bonded to the base substrate;
A lead frame bonded to a surface opposite to the bonding surface with the base substrate in the semiconductor element;
A plurality of insulating substrates fixed to a surface opposite to the bonding surface with the semiconductor element in the base substrate;
An exterior resin that covers the entire surface of the semiconductor element, a part of the base substrate, a part of the lead frame, and a part of the plurality of insulating substrates;
The base substrate and the lead frame are formed of copper or a copper alloy,
The base substrate is formed thicker than the lead frame,
Semiconductor device. The semiconductor element is disposed to face the insulating substrate in a one-to-one relationship.
The semiconductor device according to claim 1. The projected shape of the semiconductor element on the base substrate includes the projected shape of the plurality of insulating substrates on the base substrate,
The distance between the plurality of adjacent insulating substrates is smaller than the thickness of the base substrate.
The semiconductor device according to claim 2. The semiconductor element is
Consisting of a switch element and a rectifying element connected in parallel to the switch element, in which current flows alternately,
Each of the switch element and the rectifying element is
Arranged to face different insulating substrates among the plurality of insulating substrates,
The semiconductor device according to claim 2.

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