JP6467474B2 - Switch device - Google Patents

Description

  The present invention relates to a switch device.

Conventionally, in a semiconductor switch such as a MOSFET, it has been known that a gate-source voltage is maintained at a substantially constant voltage by using a level shifter to reduce variation in on-resistance (see, for example, Patent Document 1).
Patent Document 1 US Pat. No. 8,400,340

  However, a semiconductor switch such as a MOSFET has a junction capacitance, and the junction capacitance varies depending on the signal strength of the input signal, so that distortion may occur in the signal. Therefore, a switch device that reduces variations in the on-resistance and junction capacitance of the MOSFET has been desired.

  In the first aspect of the present invention, the first terminal and the second terminal are connected between the first terminal and the second terminal, and the first terminal and the second terminal are electrically connected or disconnected according to the gate voltage applied to the gate terminal. When the main switch has a voltage divider including a first voltage dividing resistor on the first terminal side and a second voltage dividing resistor on the second terminal side, and the main switch is connected, A voltage output unit that outputs a voltage corresponding to the voltage of the two terminals, a buffer that outputs a voltage that follows the output voltage of the voltage output unit in a connected state of the main switch, and a first voltage that corresponds to the output voltage of the buffer. And a switch control circuit that supplies a second voltage corresponding to an output voltage of a buffer to a bulk terminal of a main switch.

  It should be noted that the above summary of the invention does not enumerate all the necessary features of the present invention. In addition, a sub-combination of these feature groups can also be an invention.

2 shows a configuration example of a switch device 100. The structural example of the switch apparatus 200 which concerns on this embodiment is shown. The structural example of the voltage output part 220 which concerns on this embodiment is shown. The structural example of the buffer 230 which concerns on this embodiment is shown. 2 shows a configuration example of a switch control circuit 240 according to the present embodiment. The 1st modification of the switch apparatus 200 which concerns on this embodiment is shown. The 2nd modification of the switch apparatus 200 which concerns on this embodiment is shown. The structural example of the switch control circuit 240 of the switch apparatus 200 of a 2nd modification is shown. The 1st modification of the voltage output part 220 which concerns on this embodiment is shown. The 1st example of the voltage waveform in each part of the main switch 210 concerning this embodiment is shown. The 2nd example of the voltage waveform in each part of the main switch 210 concerning this embodiment is shown. The 2nd modification of the voltage output part 220 which concerns on this embodiment is shown.

  Hereinafter, the present invention will be described through embodiments of the invention, but the following embodiments do not limit the invention according to the claims. In addition, not all the combinations of features described in the embodiments are essential for the solving means of the invention.

  FIG. 1 shows a configuration example of the switch device 100. The switch device 100 controls the gate-source voltage of the semiconductor switch to be substantially constant, and keeps the on-resistance of the semiconductor switch at a substantially constant value. The switch device 100 includes a first terminal 12, a second terminal 14, a third terminal 16, a power supply unit 20, a main switch 110, a first sub switch 112, a second sub switch 114, a current source 120, an inverter 130, and a logic level shifter 140. A third sub switch 150 and a level shifter 160.

  The first terminal 12 and the second terminal 14 are connected to one end and the other end of the main switch 110, respectively, and transmit an electrical signal when the main switch 110 is in a connected state. The first terminal 12 and the second terminal 14 are connected to, for example, a transmission source and a transmission destination of an electrical signal. One of the first terminal 12 and the second terminal 14 functions as, for example, an electric signal input terminal. In this case, the other terminal functions as an output terminal.

  The third terminal 16 inputs a control signal that controls the switch device 100. That is, the switch device 100 electrically connects or disconnects the first terminal 12 and the second terminal 14 in accordance with a control signal input to the third terminal 16. The power supply unit 20 outputs a predetermined voltage. The power supply unit 20 may supply a power supply voltage of the switch device 100. In this case, the power supply unit 20 supplies a voltage to each unit of the switch device 100.

  The main switch 110 is connected between the first terminal 12 and the second terminal 14, and is electrically connected between the first terminal 12 and the second terminal 14 in accordance with a gate voltage applied to the gate terminal (G). Disconnect. The main switch 110 may be an n-channel MOSFET, and may be a p-channel MOSFET instead. FIG. 1 shows an example in which the main switch 110 is an n-channel MOSFET.

  As an example, the main switch 110 has a source terminal (S) connected to the first terminal 12 and a drain terminal (D) connected to the second terminal 14. As an example, the source terminal and / or the bulk terminal (B) of the main switch 110 are connected to a ground (GND) potential such as 0V. The main switch 110 electrically connects or disconnects between the drain terminal and the source terminal according to the gate-source voltage.

  The first sub switch 112 is connected between the first terminal 12 and the bulk terminal of the main switch 110, and is electrically connected between the first terminal 12 and the bulk terminal of the main switch 110 according to the gate voltage applied to the gate terminal. Connect or disconnect. The second sub switch 114 is connected between the bulk terminal of the main switch 110 and the second terminal 14, and electrically connects between the bulk terminal of the main switch 110 and the second terminal 14 according to the gate voltage applied to the gate terminal. Connect or disconnect.

  The first sub switch 112 and the second sub switch 114 may be n-channel MOSFETs, and may be p-channel MOSFETs instead. The gate terminals of the main switch 110, the first sub switch 112, and the second sub switch 114 are preferably MOSFETs having the same polarity. FIG. 1 shows an example in which the first sub switch 112 and the second sub switch 114 are n-channel MOSFETs. As an example, the drain terminal of the first sub switch 112 is connected to the first terminal 12, and the source terminal is connected to the bulk terminal of the main switch 110. The source terminal of the second sub switch 114 is connected to the bulk terminal of the main switch 110, and the drain terminal is connected to the second terminal 14.

  The gate terminals of the main switch 110, the first sub switch 112, and the second sub switch 114 are connected to each other and supplied with substantially the same gate voltage. That is, the main switch 110, the first sub switch 112, and the second sub switch 114 are switched between a connected state and a disconnected state according to the control signal. Therefore, when the connection state is established between the first terminal 12 and the second terminal 14, a transmission path via the main switch 110 and a transmission path via the first sub switch 112 and the second sub switch 114 are formed. The

  The current source 120 passes a predetermined constant current. The inverter 130 inverts the logic of the control signal input from the third terminal 16. The logic level shifter 140 shifts the output level of the inverter 130. The third sub switch 150 is connected between the gate terminal of the main switch 110 and the ground potential, and electrically connects or disconnects between the gate terminal of the main switch 110 and the ground potential according to the output of the logic level shifter 140. The third sub switch 150 is, for example, an n-channel MOSFET.

  The level shifter 160 is provided between the gate terminal and the bulk terminal of the main switch 110, and generates a predetermined potential difference between the gate terminal and the bulk terminal of the main switch 110 in accordance with an input of current. Here, the predetermined potential difference is a potential difference equal to or higher than the gate-source voltage that brings the main switch 110 into a connected state. That is, in response to the level shifter 160 generating a predetermined potential difference, the main switch 110, the first sub switch 112, and the second sub switch 114 are switched to the connected state.

  As an example, the level shifter 160 has one end connected to the gate terminal of the main switch 110 and the current source 120, the other end connected to the bulk terminal of the main switch 110, and one end and the other according to the current input from the current source 120. A predetermined potential difference is generated between the ends. In this case, the level shifter 160 may stop generating the potential difference in response to the one end side becoming substantially 0V.

  For example, the inverter 130 and the logic level shifter 140 supply a low potential signal to the gate electrode of the third sub switch 150 in accordance with a control signal (for example, a high potential) that sets the main switch 110 in a connected state. As a result, the third sub switch 150 electrically disconnects between the gate terminal of the main switch 110 and the ground potential. As a result, the current source 120 allows a substantially constant current to flow through the level shifter 160, so that the main switch 110, the first sub switch 112, and the second sub switch 114 can be switched to the connected state.

  Further, the inverter 130 and the logic level shifter 140 supply a high potential signal to the gate electrode of the third sub switch 150 in accordance with a control signal (for example, a low potential) that turns off the main switch 110. As a result, the third sub switch 150 electrically connects the gate terminal of the main switch 110 and the ground potential, and sets the gate voltage of the main switch 110 to approximately 0V. As a result, since the current source 120 passes a substantially constant current to the ground, the current is not supplied to the level shifter 160, and the voltage between the gate and the source of the main switch 110 becomes approximately 0V and is in a disconnected state. Similarly, the first sub switch 112 and the second sub switch 114 are disconnected.

  As described above, the switch device 100 can switch the main switch 110 to either the connected state or the disconnected state according to the control signal. Further, since the switch device 100 is in a connected state with the gate-source voltage of the main switch 110 set to a substantially constant voltage, even if the voltage at the first terminal 12 or the second terminal 14 fluctuates, the on-resistance is reduced. It can be kept at a constant value.

  However, the switch device 100 includes the main switch 110, the first sub switch 112, and the second sub switch 114 between the first terminal 12 and the second terminal 14, and the first terminal 12 and the second terminal 14 are electrically connected. In the case of connection, the plurality of switches are connected. It is known that the main switch 110, the first sub switch 112, and the second sub switch 114 are formed on a well region formed by a PN junction or the like and electrically separated from the semiconductor substrate. .

  In this case, a parasitic junction capacitance is formed so as to be a load on the first terminal 12 and the second terminal 14. When such a junction capacitance exists, the load capacitance with respect to the first terminal 12 and the second terminal 14 varies according to the variation in the potential of the first terminal 12 and the second terminal 14. For example, when an analog signal is input to the first terminal 12 and the analog signal is received by a load connected to the second terminal 14, the load capacity varies depending on the signal strength of the analog signal. A signal may be distorted and a signal waveform may be deteriorated.

  In the switching device 100, the other end of the level shifter 160 is connected to the source terminals of the first sub switch 112 and the second sub switch 114, so that a current flows into the analog signal to be transmitted. Here, the current flowing through the level shifter 160 is a current supplied from the current source 120. However, when harmonic noise of an electric signal is superimposed on the current source 120, the harmonic noise is mixed into the analog signal, and the analog The signal waveform of the signal may be deteriorated.

  Such deterioration of the signal waveform becomes conspicuous when, for example, a damping resistor is provided on the first terminal 12 side on the transmission side. It is known that the on-resistance is lowered by increasing the W / L ratio of the MOS transistor for the purpose of reducing the distortion superimposed on the analog signal. Here, L is the channel length, but since there is a lower limit to the channel length, it is known to increase the channel width, which is W.

  However, when handling a high-quality audio signal, signal transmission with a low distortion of, for example, −130 dB or less may be required, and it is difficult to reduce the distortion by adjusting the W / L ratio of the transistor. It was. Moreover, it has been difficult to reduce harmonic noise and the like mixed from the current source 120. Therefore, the switch device 200 according to the present embodiment reliably performs the switching operation according to the control signal while reducing the on-resistance and reducing distortion superimposed on the signal to be transmitted. Such a switch device 200 will be described next.

  FIG. 2 shows a configuration example of the switch device 200 according to the present embodiment. The switch device 200 controls the gate voltage in accordance with the signal voltage of the input electric signal to reduce distortion superimposed on the signal to be transmitted. The switch device 200 includes a first terminal 22, a second terminal 24, a third terminal 26, a main switch 210, a voltage output unit 220, a buffer 230, and a switch control circuit 240.

  The first terminal 22 and the second terminal 24 are connected to one end and the other end of the main switch 210, respectively, and transmit an electrical signal when the main switch 210 is in a connected state. The first terminal 22 and the second terminal 24 are connected to, for example, a transmission source and a transmission destination of an electrical signal. One of the first terminal 22 and the second terminal 24 functions as, for example, an electric signal input terminal. In this case, the other terminal functions as an output terminal.

  The third terminal 26 inputs a control signal for controlling the switch device 200. That is, the switch device 200 electrically connects or disconnects the first terminal 22 and the second terminal 24 according to a control signal input to the third terminal 26.

  The main switch 210 is connected between the first terminal 22 and the second terminal 24, and is electrically connected between the first terminal 22 and the second terminal 24 in accordance with a gate voltage applied to the gate terminal (G). Disconnect. The main switch 210 is a semiconductor switch such as an FET. As an example, the main switch 210 has a drain terminal (D) connected to the second terminal 24 and a source terminal (S) connected to the first terminal 22. The main switch 210 electrically connects or disconnects between the drain terminal and the source terminal according to the gate-source voltage. The main switch 210 further includes a bulk terminal (back gate terminal, B).

  In the present embodiment, the main switch 210 is an example of a normally-off n-type semiconductor switch that electrically connects the drain terminal and the source terminal in response to the gate terminal being turned on (high potential). Will be explained. In this case, the main switch 210 is preferably an n-channel MOSFET. The main switch 210 is preferably provided in a p-well on a substrate surface such as a semiconductor substrate.

  The voltage output unit 220 outputs a voltage corresponding to the voltage at the first terminal 22 and the voltage at the second terminal 24 when the main switch 210 is in the connected state. The voltage output unit 220 is connected to, for example, the first terminal 22, the second terminal 24, and the third terminal 26, and the voltage according to the voltage of the first terminal 22, the voltage of the second terminal 24, and the control signal, Supply to buffer 230.

  The buffer 230 outputs a voltage that follows a voltage corresponding to at least one of the voltage at the first terminal 22 and the voltage at the second terminal 24 when the main switch 210 is connected. The buffer 230 supplies a voltage that follows the output voltage of the voltage output unit 220 to the switch control circuit 240.

  The switch control circuit 240 supplies a first voltage corresponding to the output voltage of the buffer 230 to the gate terminal of the main switch 210. The switch control circuit 240 supplies a second voltage corresponding to the output voltage of the buffer 230 to the bulk terminal of the main switch 210. When the main switch 210 is connected, the switch control circuit 240 supplies a first voltage obtained by adding a non-zero offset voltage to the second voltage supplied to the bulk terminal of the main switch 210 to the gate terminal of the main switch 210. . In addition, the switch control circuit 240 supplies the same first voltage as the second voltage supplied to the bulk terminal of the main switch 210 to the gate terminal of the main switch 210 when the main switch 210 is disconnected.

  The above switch device 200 supplies a gate voltage corresponding to the signal voltage of the electrical signal transmitted by the main switch 210 to the gate electrode of the main switch 210. Next, the gate voltage supplied to the gate electrode of the main switch 210 by the switch device 200 will be described together with the details of each part.

  FIG. 3 shows a configuration example of the voltage output unit 220 according to the present embodiment. The voltage output unit 220 includes a reference potential generating unit 30, a first input terminal 32, a second input terminal 34, a third input terminal 36, an intermediate terminal 38, a voltage divider 222, a first sub switch 224, a second sub switch 226, And a third sub switch 228.

The reference potential generating unit 30 generates a first reference potential that serves as a reference for the switch device 200. For example, the reference potential generating unit 30 generates a potential that turns off the main switch 210 as the first reference potential. The first reference potential may be a potential that turns off a diode formed between the source terminal and the bulk terminal of the main switch 210. The reference potential generating unit 30 generates a potential equal to or lower than the lower limit value of the voltage range of the electrical signal transmitted by the main switch 210 as the first reference potential. For example, the reference potential generator 30 transmits a sine wave signal (3 · sin ωt) having an amplitude voltage of 3V with 0V as a reference between the first terminal 22 and the second terminal 24. It is generated as the first reference potential. Here, the first reference potential is set to V _OFF .

  The first input terminal 32 is connected to the first terminal 22 and inputs a signal input to the source terminal of the main switch 210 or a signal output from the source terminal. The second input terminal 34 is connected to the second terminal 24 and receives a signal input to the drain terminal of the main switch 210 or a signal output from the drain terminal. The third input terminal 36 is connected to the third terminal 26 and inputs a control signal. The intermediate terminal 38 outputs the output of the voltage output unit 220 to the buffer 230.

  The voltage divider 222 is provided between the first input terminal 32 and the second input terminal 34. The voltage divider 222 divides the voltage of the source terminal and the drain terminal of the main switch 210 when the main switch 210 is connected. The voltage divider 222 includes a first voltage dividing resistor 252 on the first terminal 22 side and a second voltage dividing resistor 254 on the second terminal 24 side.

The first voltage dividing resistor 252 is a voltage dividing resistor connected to the first terminal 22 side. The first voltage dividing resistor 252 has one end connected to the first input terminal 32 side and the other end connected to the second voltage dividing resistor 254. Here, the resistance value of the first voltage divider resistor 252 and _{R 1.} The second voltage dividing resistor 254 is a voltage dividing resistor connected to the second terminal 24 side. The second voltage dividing resistor 254 has one end connected to the other end of the first voltage dividing resistor 252 and the other end connected to the second input terminal 34 side. Here, the resistance value of the second voltage divider resistor 254 and _{R 2.}

  It is desirable that the first voltage dividing resistor 252 and the second voltage dividing resistor 254 have substantially the same resistance value. In this case, the voltage divider 222 divides the voltage between the first terminal 22 and the second terminal 24 approximately 1: 1. The intermediate terminal 38 is connected between the first voltage dividing resistor 252 and the second voltage dividing resistor 254, and outputs the result of voltage division by the voltage divider 222 to the buffer 230.

  The first sub switch 224 is provided between the first terminal 22 and the first voltage dividing resistor 252 and is connected when the main switch 210 is connected, and is disconnected when the main switch 210 is disconnected. It becomes. That is, the first sub switch 224 switches whether to electrically connect one end of the first voltage dividing resistor 252 and the first input terminal 32 according to a control signal input from the third input terminal 36.

  The second sub switch 226 is provided between the second terminal 24 and the second voltage dividing resistor 254. The second sub switch 226 is connected when the main switch 210 is connected, and is disconnected when the main switch 210 is disconnected. It becomes. That is, the second sub switch 226 switches whether to electrically connect the other end of the second voltage dividing resistor 254 and the second input terminal 34 in accordance with a control signal input from the third input terminal 36. .

  Alternatively, the first sub switch 224 may be provided between the intermediate terminal 38 and the first voltage dividing resistor 252. That is, the first sub switch 224 switches whether to transmit the electric signal input from the first input terminal 32 to the intermediate terminal 38 in accordance with the control signal input from the third input terminal 36. Similarly, the second sub switch 226 may be provided between the intermediate terminal 38 and the second voltage dividing resistor 254. That is, the second sub switch 226 switches whether to transmit the electric signal input from the second input terminal 34 to the intermediate terminal 38 in accordance with the control signal input from the third input terminal 36.

  The third sub switch 228 is connected between the first voltage dividing resistor 252 and the second voltage dividing resistor 254 and between the reference potential generating unit 30 and is connected when the main switch 210 is disconnected. When the main switch 210 is in the connected state, the disconnected state is entered. That is, the third sub switch 228 switches whether to electrically connect between the first voltage dividing resistor 252 and the second voltage dividing resistor 254 and the reference potential generating unit 30 according to the control signal.

For example, the third sub switch 228 supplies the first reference potential V _OFF to the intermediate terminal 38 between the first voltage dividing resistor 252 and the second voltage dividing resistor 254 when the main switch 210 is disconnected. The third sub switch 228 electrically disconnects the first voltage dividing resistor 252 and the second voltage dividing resistor 254 and the reference potential generating unit 30 when the main switch 210 is connected. To do. As a result, the voltage divided by the voltage divider 222 is output from the intermediate terminal 38. In this case, the voltage output from the intermediate terminal 38 when the V _M, can be the voltage V _M shown by the following equation.
(Equation 1)
V _M = V ₁ · R ₂ / (R ₁ + R ₂ ) + V ₂ · R ₁ / (R ₁ + R ₂ )
= (V ₁ + V ₂ ) / 2 (connection state)
V _M = V _OFF (disconnected state)

Here, the voltage of the first terminal 22 is V ₁ , and the voltage of the second terminal 24 is V ₂ . Further, R ₁ = R ₂ was set. The first sub switch 224, the second sub switch 226, and the third sub switch 228 are preferably semiconductor switches.

As described above, the voltage output unit 220 supplies the voltage divided by the voltage divider 222 from the intermediate terminal 38 to the buffer 230 in accordance with the control signal for setting the main switch 210 in the connected state. In addition, the voltage output unit 220 supplies the first reference potential V _OFF of the reference potential generation unit 30 from the intermediate terminal 38 to the buffer 230 in response to a control signal for _{turning off} the main switch 210. Next, the buffer 230 will be described.

FIG. 4 shows a configuration example of the buffer 230 according to the present embodiment. Buffer 230 outputs a voltage that follows the voltage _{V M} from the intermediate terminal 38 of the voltage output unit 220 to the switch control circuit 240. The buffer 230 includes a fourth input terminal 232, a first output terminal 234, and an amplifying unit 236.

  The fourth input terminal 232 is connected to the intermediate terminal 38 of the voltage output unit 220 and receives the output voltage of the voltage divider 222 of the voltage output unit 220. The first output terminal 234 outputs the output of the buffer 230 to the switch control circuit 240.

The amplifying unit 236 amplifies the input electric signal. The amplifying unit 236 may be a buffer amplifier having an amplification factor of approximately 1. Thus, the buffer 230, a voltage following the voltage V _M which is output from the intermediate terminal 38 is supplied to the switch control circuit 240. For example, the buffer 230 supplies the voltage divided by the voltage divider 222 in accordance with a control signal that causes the main switch 210 to be connected. Further, the buffer 230 supplies the first reference potential V _OFF in response to a control signal that causes the main switch 210 to be disconnected. The buffer 230 may be a voltage follower circuit that outputs a voltage of an input signal substantially multiplied by one. The buffer 230 may be a circuit in which two inverting amplifier circuits are connected. The switch control circuit 240 will be described next.

  FIG. 5 shows a configuration example of the switch control circuit 240 according to the present embodiment. The switch control circuit 240 includes a fifth input terminal 42, a sixth input terminal 44, a second output terminal 46, a third output terminal 48, a power supply unit 52, a constant current circuit 242, a resistor 244, 4 sub-switches 246.

  The fifth input terminal 42 is connected to the first output terminal 234 of the buffer 230 and receives the output of the buffer 230. The sixth input terminal 44 is connected to the third terminal 26 and inputs a control signal. The second output terminal 46 outputs the first output of the switch control circuit 240 to the bulk terminal of the main switch 210. For example, the fifth input terminal 42 and the second output terminal 46 are connected to the switch control circuit 240, and a voltage substantially the same as the output voltage of the buffer 230 is supplied to the bulk terminal of the main switch 210 as a first output.

  The third output terminal 48 outputs the second output of the switch control circuit 240 to the gate terminal of the main switch 210. The power supply unit 52 outputs a predetermined voltage. The power supply unit 52 may supply the power supply voltage of the switch device 200. In this case, the power supply unit 52 supplies the voltage to each unit such as the buffer 230. In the present embodiment, the voltage that the switch control circuit 240 supplies to the gate terminal of the main switch 210 is a first voltage, and the voltage that is supplied to the bulk terminal of the main switch 210 is a second voltage.

  The constant current circuit 242 flows a predetermined current. One end of the constant current circuit 242 is connected to the power supply unit 52, and a substantially constant current is output from the other end. The constant current circuit 242 is preferably composed of a transistor or the like.

The resistor 244 generates an offset voltage when the current from the constant current circuit 242 flows. One end of the resistor 244 is connected to the fifth input terminal 42 and the second output terminal 46, and the other end is connected to the third output terminal 48. The resistor 244 has a predetermined resistance value such that a predetermined offset voltage is generated between one end and the other end in accordance with the current value of the current flowing through the constant current circuit 242. Here, the value of the offset voltage is V _a .

The offset voltage V _a is, for example, (as an example, the threshold voltage V _T) voltage between the gate and source for switching the main switch 210 to the connected state is set to the above voltage. Thus, when the current from the constant current circuit 242 flows through the resistor 244, the resistor 244, and supplies the offset voltage V _a between the gate terminal and the bulk terminal of the main switch 210. The switch control circuit 240 supplies _a positive offset voltage Va when the main switch 210 is an n-type semiconductor switch.

  The fourth sub switch 246 is connected between the constant current circuit 242 and the resistor 244, and allows a substantially constant current from the constant current circuit 242 to flow through the resistor 244 in accordance with a control signal input from the sixth input terminal 44. Toggles whether or not. That is, the fourth sub switch 246 switches whether to electrically connect the other end of the constant current circuit 242 and the other end of the resistor 244. The fourth sub switch 246 is preferably a semiconductor switch.

For example, the fourth sub switch 246 electrically disconnects the constant current circuit 242 and the resistor 244 when the main switch 210 is disconnected. That is, the fourth sub switch 246 is a switch that is in a disconnected state in response to a control signal that causes the main switch 210 to be in a disconnected state. Thus, the resistance 244, without causing the offset voltage V _a, and substantially 0V between the gate terminal and the bulk terminal of the main switch 210.

The fourth sub switch 246 electrically connects the constant current circuit 242 and the resistor 244 when the main switch 210 is connected. That is, the fourth sub switch 246 is a switch that is connected according to a control signal that causes the main switch 210 to be connected. Thus, the resistance 244, causing the offset voltage V _a, and supplies the offset voltage V _a between the gate terminal and the bulk terminal of the main switch 210.

As described above, the switch control circuit 240, the gate terminal of the main switch 210 the voltage gate voltage plus the offset voltage V _a to from the intermediate terminal 38 (first voltage) in the case of the connection state of the main switch 210 To supply. The switch control circuit 240 supplies a voltage gate voltage is not applied an offset voltage V _a to from the intermediate terminal 38 (first voltage) in the case of a disconnected state of the main switch 210 to the gate terminal of the main switch 210 .

That is, when the gate voltage is V _G , V _G is expressed by the following equation.
(Equation 2)
V _G = V _M + V _a (connection state)
V _G = V _M (disconnected state)

By substituting equation (1) into equation (2), the following equation is obtained.
(Equation 3)
V _G = (V ₁ + V ₂ ) / 2 + V _a (connection state)
V _G = V _OFF (disconnected state)

Here, if from the first terminal 22 to the second terminal 24 current I flows, the voltage drop I · _{R ON} by the ON resistance _{R ON} of the main switch 210 occurs, as in the following equation, the first terminal 22 The voltage becomes higher than that of the second terminal 24.
(Equation 4)
V ₁ = V ₂ + I • R _ON

In this case, the average voltage V _AVE of the voltage at the first terminal 22 and the voltage at the second terminal 24 is calculated as follows.
(Equation 5)
V _AVE = (V ₁ + V ₂ ) / 2 = V ₂ + I · R _ON / 2

The gate voltage V _G of the main switch 210 is a voltage V _AVE + V _a obtained by _adding the offset voltage V _a to the average voltage V _AVE . In this case, since the first terminal 22 side is the drain terminal and the second terminal 24 side is the source terminal, the gate-source voltage V _GS of the main switch 210 is calculated as follows.
(Equation 6)
V _GS = V _AVE + V _a −V ₂ = V _a + I · _RON / 2

On the other hand, if the second terminal 24 to the first terminal 22 current I flows, the voltage drop I · _{R ON} by the ON resistance _{R ON} of the main switch 210 occurs, as in the following equation, toward the second terminals 24 However, the voltage is higher than that of the first terminal 22.
(Equation 7)
V ₁ = V ₂ -I ・ R _ON

In this case, since the second terminal 24 side is the drain terminal and the first terminal 22 side is the source terminal, the gate-source voltage V _GS of the main switch 210 is calculated as follows.
(Equation 8)
_{V GS = V AVE + V a} -V 1 = (V 1 + V 2) / 2 + V a -V 1
= V _a + I · R _ON / 2

Since the equation (8) is the same as the equation (6), the gate-source voltage V _GS of the main switch 210 is equal to the threshold value regardless of the direction of the signal transmitted between the first terminal 22 and the second terminal 24. It becomes a substantially constant voltage larger than the voltage V _T. Incidentally, when taking into account the on-resistance _{R ON,} the gate-source voltage _{V GS} is also the signal current I flowing between the first terminal 22 and second terminal 24 is changed, _{I-R ON} / It can be seen that the voltage is almost constant and the voltage is substantially constant.

Further, the switch control circuit 240 supplies the first reference potential V _OFF to the gate terminal and the bulk terminal of the main switch 210 when the main switch 210 is in a disconnected state. Since the first reference potential V _OFF is a potential equal to or lower than the lower limit value of the voltage range of the electrical signal transmitted by the main switch 210, the potential of the gate terminal is equal to the potential of the first terminal 22 and the second terminal 24. It gets smaller. That is, the gate-source voltage V _GS of the main switch 210 becomes 0 V or less, and the main switch 210 maintains the disconnected state.

That is, the switch device 200 according to the present embodiment can stably maintain the disconnected state and the connected state according to the control signal even if the signal strength of the input electric signal varies. Further, since the switch device 200 keeps the gate-source voltage V _GS at a substantially constant voltage, it is possible to reduce fluctuations in on-resistance.

  In the switch device 200, the first terminal 22 and the second terminal 24 that are input / output terminals are not connected to the bulk terminal of the main switch 210. Therefore, even if harmonic noise or the like is superimposed on the constant current circuit 242, it is possible to prevent the harmonic noise from being mixed into the transmission path between the first terminal 22 and the second terminal 24 via the bulk terminal. Even when the main switch 210 is provided on a p-well on a substrate surface such as a semiconductor substrate and a junction capacitance is formed, the junction capacitance is a load on the first terminal 22 and the second terminal 24. Can be prevented.

  As described above, the switch device 200 according to the present embodiment reduces harmonic noise, and also reduces fluctuations in load capacitance based on the junction capacitance, so that distortion generated in the electric signal to be transmitted is reduced and the signal waveform is reduced. Can be prevented.

  The switch device 200 according to the present embodiment described above supplies the voltage obtained by dividing the voltage of the first terminal 22 and the voltage of the second terminal 24 to the buffer 230. However, the present invention is not limited to this. Absent. For example, when it is known in advance that an electrical signal input to the switch device 200 is input from either the first terminal 22 or the second terminal 24, the switch device 200 is a terminal on the side where the electrical signal is input. May be supplied to the buffer 230. Next, such a switch device 200 will be described.

FIG. 6 shows a first modification of the switch device 200 according to the present embodiment. In the switch device 200 of the first modification, the same reference numerals are given to the substantially same operations as those of the switch device 200 according to the present embodiment shown in FIG. 2, and the description thereof is omitted. The switch device 200 according to the first modification shows an example in which an electrical signal is input from the first terminal 22 when the main switch 210 is in a connected state. In this case, the switch device 200 supplies the voltage V ₁ of the first terminal 22 to which an electric signal is input to the buffer 230 via the third sub switch 228.

In other words, the third sub switch 228 of the first modification switches so as to supply the voltage V ₁ of the first terminal 22 to the buffer 230 in accordance with a control signal for setting the main switch 210 in the connected state. In addition, the third sub switch 228 of the first modified example supplies the first reference potential V _OFF generated by the reference potential generation unit 30 to the buffer 230 in response to a control signal for _{turning off} the main switch 210. Switch. As an example, the third sub switch 228 of the first modification is configured by a plurality of n-channel MOSFETs.

Thereby, the buffer 230 supplies the voltage V ₁ of the first terminal 22 or the first reference potential V _OFF to the switch control circuit 240. The switch control circuit 240, in response to a control signal to the main switch 210 to the connected state, the voltage V ₁ of the first terminal 22 is supplied to the bulk terminal of the main switch 210, an offset voltage to the voltage V ₁ of the first terminal 22 supplying a gate voltage plus V _a gate terminal. As a result, the gate-source voltage V _GS of the main switch 210 becomes a substantially constant voltage exceeding the threshold voltage V _T , and the connection state can be maintained while reducing the on-resistance variation.

In addition, the switch control circuit 240 supplies the first reference potential V _OFF to the bulk terminal and the gate terminal of the main switch 210 in response to a control signal that causes the main switch 210 to be disconnected. As a result, even if an electric signal is input to the first terminal 22, a potential equal to or lower than the lower limit value of the voltage range of the electric signal is supplied to the gate terminal of the main switch 210 as the gate voltage. The source voltage V _GS is a voltage _lower than the threshold voltage V _T. Therefore, the main switch 210 can maintain a disconnected state.

  In the switch device 200 according to the first modification described above, the first terminal 22 and the second terminal 24 serving as input / output terminals are not connected to the bulk terminal of the main switch 210, similarly to the switch device 200 shown in FIG. That is, the switch device 200 according to the first modified example reduces harmonic noise and also reduces fluctuations in load capacitance based on the junction capacitance, thereby reducing distortion generated in the electric signal to be transmitted and degrading the signal waveform. Can be prevented. In the above switch device 200 according to the present embodiment, the example in which the main switch 210 is an n-type semiconductor switch has been described. However, the present invention is not limited to this. The main switch 210 may be a p-type semiconductor switch. Such a switch device 200 will be described next.

  FIG. 7 shows a second modification of the switch device 200 according to the present embodiment. The switch device 200 of the second modified example shows an example in which the main switch 210 is a p-type semiconductor switch. In this case, the main switch 210 is preferably a p-channel MOSFET. The main switch 210 is preferably provided in an n-well on the substrate surface. In the switch device 200 of the second modification, the same reference numerals are given to the substantially same operations as those of the switch device 200 according to the present embodiment shown in FIG. 2, and the description thereof is omitted.

  The switch device 200 of the second modification has a schematic configuration substantially the same as the schematic configuration of the switch device 200 shown in FIG. Since the switch device 200 has a different polarity from the main switch 210, the reference potential generator 30 of the voltage output unit 220 generates a potential different from the first reference potential described with reference to FIG. The reference potential generator 30 generates, for example, a potential that is equal to or higher than the upper limit value of the voltage range of the electrical signal transmitted by the main switch 210 as the first reference potential. The switch control circuit 240 also has a correspondingly different internal circuit configuration. Next, the switch control circuit 240 of the second modification will be described.

FIG. 8 shows a configuration example of the switch control circuit 240 of the switch device 200 of the second modification. Similarly to the switch control circuit 240 shown in FIG. 5, the switch control circuit 240 of the second modification has a fifth input terminal 42, a sixth input terminal 44, a second output terminal 46, and a third output terminal 48. , A constant current circuit 242, a resistor 244, and a fourth sub switch 246. Note that the switch control circuit 240 of the second modification has a second reference potential 54 instead of the power supply unit 52. The second reference potential 54, the main switch 210 is the lowest potential of the following voltages can supply a gate voltage V _a on the main switch 210 with respect to the potential of the electrical signal to be transmitted.

Since the polarity of the main switch 210 is different in the constant current circuit 242, a current having a direction opposite to that of the constant current circuit 242 of the switch control circuit 240 shown in FIG. That is, the constant current circuit 242 flows a current from the resistor 244 toward the constant current circuit 242. That is, when a current flows from the constant current circuit 242 to the resistor 244, the resistor 244, and supplies the offset voltage V _a negative voltage between the gate and source terminals of the main switch 210. Thus, the switch control circuit 240, since switches whether to supply the offset voltage V _a of the negative voltage in response to the control signal, the main switch 210 of the p-type semiconductor switch or a connected state and the disconnected state It can be switched correspondingly.

FIG. 9 shows a first modification of the voltage output unit 220 according to the present embodiment. In the voltage output unit 220 of the first modified example, the same reference numerals are given to the substantially same operations as those of the voltage output unit 220 according to the present embodiment shown in FIG. The voltage output unit 220 of the first modification outputs an average voltage of the voltage at the first terminal 22 and the voltage at the second terminal 24 when the main switch 210 is in the connected state. In addition, when the main switch 210 is disconnected, the voltage output unit 220 according to the first modified example has one of the voltage at the first terminal 22 and the voltage at the second terminal 24, and the first reference potential V _OFF . The voltage according to is output.

The voltage output unit 220 of the first modified example includes at least the first terminal 22 side from the intermediate point between the first voltage dividing resistor 252 and the second voltage dividing resistor 254 and the second terminal 24 side from the intermediate point. One has a sub-switch. FIG. 9 illustrates an example in which a signal is transmitted from the first terminal 22 to the second terminal 24 when the main switch 210 is connected. As an example, the signal is a sine wave signal (3 · sin ωt) having an amplitude voltage of 3V. In this case, the first sub switch 224 described with reference to FIG. That is, FIG. 9 shows an example of the voltage output unit 220 that outputs a voltage corresponding to the voltage of the first terminal 22 and the first reference potential V _OFF when the main switch 210 is in a disconnected state. The voltage output unit 220 further includes a first output resistor 312 and a second output resistor 314.

One end of the first output resistor 312 is connected between the first voltage dividing resistor 252 and the second voltage dividing resistor 254, and the output voltage of the voltage output unit 220 is output from the other end. That is, the first output resistor 312 is connected between the first voltage dividing resistor 252 and the second voltage dividing resistor 254 and between the intermediate terminal 38. The second output resistor 314 has one end connected to the other end of the first output resistor 312 and the other end supplied with the first reference potential V _OFF . That is, the intermediate terminal 38 is connected between the first output resistor 312 and the second output resistor 314.

Resistance _{R 4} of the resistance value _{R 3} and the second output resistor 314 of the first output resistor 312, it is desirable to have a substantially same value. The resistance value R ₂ of the resistance value R ₁ and the second dividing resistor 254 of the first dividing resistor 252, it is desirable to have a substantially same value. The resistance _{R 4} of the resistance value _{R 3} and the second output resistor 314 of the first output resistor 312, than the respective resistance value _{R 2} of the resistance value _{R 1} and the second dividing resistor 254 of the first divider resistor 252 It is desirable to have a sufficiently large value (for example, several times, several tens of times, or several tens of times or more). In the present embodiment, the resistance values of the first voltage dividing resistor 252 and the second voltage dividing resistor 254 are substantially the same value, and the resistance values of the first output resistor 312 and the second output resistor 314 are substantially the same value. sufficiently than the resistance value _{R 2} of the resistance value _{R 3} and the resistance value _{R 1} and the second dividing resistor 254 of a resistance value _{R 4} is first dividing resistor 252 respectively of the second output resistor 314 of the first output resistor 312 An example of a large value (R ₁ = R ₂ , R ₃ = R ₄ , R ₁ << R ₃ , R ₂ << R ₄ ) will be described.

In the voltage output unit 220 of the first modification, the third sub switch 228 is connected between the second output resistor 314 and the reference potential generation unit 30. The third sub switch 228 is disconnected when the main switch 210 is connected, and is connected when the main switch 210 is disconnected. That is, the third sub switch 228 switches whether to electrically connect the other end of the second output resistor 314 and the reference potential generation unit 30 according to the control signal. Here, the first reference potential V _OFF is a potential that turns off the diode formed between the source terminal and the bulk terminal of the main switch 210.

  In the voltage output unit 220 of the first modified example, the second sub switch 226 is in a connected state when the main switch 210 is in a connected state, and is in a disconnected state when the main switch 210 is in a disconnected state. That is, in the voltage output unit 220 of the first modification, for example, when the main switch 210 is connected, the second sub switch 226 is connected and the third sub switch 228 is disconnected. The voltage divided by 222 is output from the intermediate terminal 38.

Here, when the first voltage divider resistor 252 and second voltage divider resistor 254 is substantially the same resistance value, similarly to the equation (1), the voltage V _M which is output from the intermediate terminal 38 is as follows And the average voltage of the voltage at the first terminal 22 and the voltage at the second terminal 24.
(Equation 9)
V _M = V ₁ · R ₂ / (R ₁ + R ₂ ) + V ₂ · R ₁ / (R ₁ + R ₂ )
= (V ₁ + V ₂ ) / 2 (connection state)

Further, in the voltage output unit 220 of the first modified example, when the main switch 210 is in the disconnected state, the second sub switch 226 is in the disconnected state and the third sub switch 228 is in the connected state. the voltage V ₁ and the first reference potential V _OFF to output the divided voltage in each resistor. Resistance _{R 1} of the first voltage divider resistor 252, the resistance value _{R 2,} the relationship _{R 1} of the resistance value _{R 4} of the resistance value _{R 3,} and the second output resistor 314 of the first output resistor 312 of the second divider resistor 254 from _{= R 2, R 3 = R} 4, R 1 << R 3, R 2 << R 4, the voltage _{V M} which is output from the intermediate terminal 38 is shown by the following equation.
(Equation 10)
V _M = V ₁ · R ₄ / (R ₃ + R ₄ ) + V _OFF · R ₃ / (R ₃ + R ₄ )
= (V ₁ + V _OFF ) / 2 (disconnected state)

When the voltage output unit 220 of the first modified example described above is used, the gate voltage V _G of the main switch 210 is obtained by substituting the formulas (9) and (10) into the formula (2). Is calculated as follows. The voltage waveform of each unit of the main switch 210 such gate voltage V _G is supplied will be described.
(Equation 11)
V _G = (V ₁ + V ₂ ) / 2 + V _a (connection state)
V _G = (V ₁ + V _OFF ) / 2 (disconnected state)

FIG. 10 shows a first example of a voltage waveform in each part of the main switch 210 according to the present embodiment. In FIG. 10, the horizontal axis indicates time, and the vertical axis indicates voltage. FIG. 10 shows an example of a voltage waveform when a control signal for turning off the main switch 210 is supplied. Therefore, the voltage _{V B} of the gate voltage _{V G} and the bulk terminal of the main switch 210 is a voltage substantially equal to the voltage _{V M} from the intermediate terminal 38.

Further, since the sine wave signal V ₁ is supplied to the source terminal of the main switch 210, the source-gate voltage V _SG is expressed by the following equation.
(Equation 12)
V _SG = V _SB = V ₁ −V _M = (V ₁ −V _OFF ) · R ₃ / (R ₃ + R ₄ )

Here, the source-bulk voltage was set to _VSB . As an example, when the voltage dividing ratio of the first output resistor 312 and the second output resistor 314 is 1: 1, and the first reference voltage value V _OFF is −3V, the source-gate voltage V _SG is between 0V and + 3V. Becomes a sine wave signal with an amplitude of 1.5 V. In FIG. 10, such a source-gate voltage V _SG is indicated by a one-dot chain line. In FIG. 10, the electric signal V ₁ input to the first terminal 22 is indicated by a solid line.

Further, when the voltage input to the drain terminal of the main switch 210 and V _2, the source-drain voltage V _SD between is shown by the following equation.
(Equation 13)
V _SD = V ₁ −V ₂

As an example, when the voltage _{V 2} to be input to the source terminal of 0V, the source-drain voltage _{V SD} between becomes _{V 1.} That is, the source-gate voltage V _SG is a sine wave signal having an amplitude of 3 V that oscillates between −3 V and +3 V. Such a source-gate voltage V _SG substantially matches the waveform of the solid line in FIG.

Further, the gate-drain voltage V _GD of the main switch 210 is expressed by the following equation. Here, the voltage between the bulk and the drain was set to _VBD .
(Equation 14)
_{V GD = V BD = -V DB} = V M -V 2
= V ₁ · R ₄ / (R ₃ + R ₄ ) + V _OFF · R ₃ / (R ₃ + R ₄ ) −V ₂

For example, the gate-drain voltage V _GD is a sine wave signal having an amplitude of 1.5 V that oscillates between −3 V and 0 V. Such a gate-drain voltage V _GD is indicated by a dotted line in FIG. As described above, the switch device 200 sets the gate-drain voltage V _GD of the main switch 210 to 0 V or less in accordance with the control signal for turning off the main switch 210, so that the main switch 210 is turned off. Can be. Further, as shown in FIG. 10, it can be seen that the absolute values of the inter-terminal voltages V _SG , V _SB , V _SD , V _DB , and V _GD of the main switch 210 are all small signals of about 5 V or less.

  As described above, the switch device 200 according to the present embodiment sets the first reference potential to be equal to or lower than the lower limit value of the voltage range of the electric signal input to the first terminal 22 when the main switch 210 is disconnected. The switch device 200 disconnects the gate voltage of the main switch 210 even if the voltage dividing ratio of the first output resistor 312 and the second output resistor 314 becomes the voltage of the upper limit value of the electric signal input to the first terminal 22. The ratio is set so as not to exceed the voltage of the second terminal 24 in the state.

Further, the switch device 200 has a predetermined voltage range (for example, a voltage range of voltage output from the intermediate terminal 38 between the first output resistor 312 and the second output resistor 314 when the main switch 210 is disconnected. The voltage division ratio of the first output resistor 312 and the second output resistor 314 is set so that the small signal voltage range is 5 V or less. Thereby, the switch device 200 can set the voltage between the terminals of the main switch 210 within a predetermined voltage range while setting the gate-drain voltage _VGD of the main switch 210 to 0 V or less.

FIG. 11 shows a second example of the voltage waveform at each part of the main switch 210 according to the present embodiment. The horizontal axis in FIG. 11 indicates time, and the vertical axis indicates voltage. FIG. 11 shows an example of a voltage waveform when a control signal for connecting the main switch 210 is supplied. Therefore, the gate voltage V _G of the main switch 210 is V ₁ + V _a , and the voltage V _{B at the} bulk terminal is V ₁ . 11 shows an example of a gate voltage _{V G} of the main switch 210 by a dotted line. Note that FIG. 11 shows an example in which a substantially 1V offset voltage _{V a.}

Further, since voltage _{V 1} to be input to the source terminal of the main switch 210, the voltage _{V GS} between the gate and source of the main switch 210 is _{V a,} and the main switch 210 is in a connected state. As a result, the first terminal 22 and the second terminal 24 become conductive, and when the on-resistance of the main switch 210 is sufficiently small, the voltage V ₂ of the second terminal 24 is substantially the same as the voltage V ₁ of the first terminal 22. It becomes. That is, the voltage _{V 1} of the first terminal 22, the voltage _{V 2} of the second terminal 24, and the voltage _{V B} of the bulk terminal, as shown by the solid line in FIG. 11, a substantially identical voltage signal.

As described above, the source terminal of the main switch 210, a drain terminal, and a signal voltage to be input to the bulk terminal, since substantially equal to _{V 1,} the voltage between the terminals _V SB of the main switch _{210, V DB,} and _{V DS} is , Approximately 0V. Further, _{-V SG} is approximately equal to the offset voltage _{V a.} That is, it can be seen that the absolute values of the voltages V _SG , V _SB , V _SD , V _DB , and V _GD of the main switch 210 are all small signals of about 5 V or less. Therefore, the switch device 200 according to the present embodiment can make the absolute value of the voltage across the terminals of the main switch 210 equal to or less than a predetermined value even when the main switch 210 is in the connected state and the disconnected state.

  For example, the withstand voltage of the main switch 210 can be less than the difference between the upper limit value and the lower limit value of the voltage range of the electric signal input to the first terminal 22. As an example, when a sine wave signal having an amplitude of 3V with reference to 0V is input to the first terminal 22, the main switch 210 determines that the difference (6V) between the upper limit value (+ 3V) and the lower limit value (−3V) of the sine wave signal. The withstand voltage can be less than. That is, the switch device 200 according to the present embodiment can use the main switch 110 for small signals if the input electric signal is a small signal of about 5 V or less, thereby reducing the cost and the switch device 200. Can be miniaturized.

Although the voltage output part 220 of the above 1st modification demonstrated the example which an electrical signal inputs from the 1st terminal 22, it is not limited to this. The voltage output unit 220 may receive an electrical signal from the second terminal 24. In this case, the voltage output unit 220 includes a first sub switch 224 on the first terminal 22 side instead of the second sub switch 226 on the second terminal 24 side. Accordingly, the voltage output unit 220 can output a voltage corresponding to the voltage of the second terminal 24 and the first reference potential V _OFF when the main switch 210 is in a disconnected state, as described above. In addition, the switch device 200 can be operated.

  As described above, the voltage output unit 220 of the first modification is preferably used when it is previously known that an electrical signal is input from either the first terminal 22 or the second terminal 24. . In other words, the voltage output unit 220 of the first modification may be provided with a sub switch on the opposite side of the first terminal 22 and the second terminal 24 to the side where the electrical signal is input, and the side where the electrical signal is input. The sub-switches may be omitted or always connected.

  On the other hand, when an electric signal is input from both the first terminal 22 and the second terminal 24, or when it is not known in advance that the signal is input from either of the first terminal 22 and the second terminal 24, the voltage output unit 220 may And a second sub-switch 226 may be provided. Such a voltage output unit 220 will be described below.

  FIG. 12 shows a second modification of the voltage output unit 220 according to the present embodiment. In the voltage output unit 220 of the second modification, the same reference numerals are given to the same components as those of the voltage output unit 220 of the first modification shown in FIG. The voltage output unit 220 of the second modification has a first sub switch 224 and a second sub switch 226.

  The first sub switch 224 is provided closer to the first terminal 22 than an intermediate point between the first voltage dividing resistor 252 and the second voltage dividing resistor 254. The first sub switch 224 may be provided between the first terminal 22 side and the first voltage dividing resistor 252. Alternatively, the first sub switch 224 may be provided between the first voltage dividing resistor 252 and the intermediate point.

  The second sub switch 226 is provided closer to the second terminal 24 than an intermediate point between the first voltage dividing resistor 252 and the second voltage dividing resistor 254. The second sub switch 226 may be provided between the second terminal 24 side and the second voltage dividing resistor 254. Alternatively, the second sub switch 226 may be provided between the second voltage dividing resistor 254 and the intermediate point.

The first sub switch 224 and the second sub switch 226 are respectively connected when the main switch 210 is connected. Further, the third sub switch 228 is in a disconnected state. Thereby, the voltage output unit 220 of the second modification can output the average voltage of the voltage V ₁ of the first terminal 22 and the voltage V ₂ of the second terminal 24.

When the main switch 210 is in a disconnected state, when an electric signal is input to the first terminal 22, the first sub switch 224 is in a connected state and the second sub switch 226 is in a disconnected state. In this case, the voltage output unit 220 of the second modified example has the same circuit configuration as the voltage output unit 220 of the first modified example described with reference to FIG. 9, and the main switch 210 is turned off as described with reference to FIG. the voltage _{V M} to be output from the intermediate terminal 38.

In the case where the main switch 210 is disconnected, when an electric signal is input to the second terminal 24, the first sub switch 224 is disconnected and the second sub switch 226 is connected. In this case, the voltage output unit 220 of the second modification example is configured so that the voltage output unit 220 is connected to the voltage of the second terminal 24 and the first reference potential V as described in the case where an electric signal is input to the first terminal 22. can output a voltage corresponding to the _OFF, it outputs a voltage V _M to the main switch 210 to the disconnected state from the intermediate terminal 38.

  As described above, the voltage output unit 220 according to the second modified example disconnects the sub switch on the opposite side of the first terminal 22 and the second terminal 24 from the terminal to which the electric signal is input, The main switch 210 can be disconnected. Thus, the voltage output unit 220 controls the state of the main switch 210 by selecting the sub switch to be disconnected according to the input electrical signal even when the terminal to which the electrical signal is input is switched. Can do.

  As mentioned above, although this invention was demonstrated using embodiment, the technical scope of this invention is not limited to the range as described in the said embodiment. It will be apparent to those skilled in the art that various modifications or improvements can be added to the above-described embodiment. It is apparent from the scope of the claims that the embodiments added with such changes or improvements can be included in the technical scope of the present invention.

The order of execution of each process such as operations, procedures, steps, and stages in the apparatus, system, program, and method shown in the claims, the description, and the drawings is particularly “before” or “prior to”. It should be noted that the output can be realized in any order unless the output of the previous process is used in the subsequent process. Regarding the operation flow in the claims, the description, and the drawings, even if it is described using “first”, “next”, etc. for convenience, it means that it is essential to carry out in this order. It is not a thing.
(Item 1)
A main switch connected between the first terminal and the second terminal and electrically connecting or disconnecting between the first terminal and the second terminal according to a gate voltage applied to the gate terminal;
A voltage divider including a first voltage dividing resistor on the first terminal side and a second voltage dividing resistor on the second terminal side; and when the main switch is connected, the voltage of the first terminal and A voltage output unit that outputs a voltage according to the voltage of the second terminal;
In a connection state of the main switch, a buffer that outputs a voltage that follows the output voltage of the voltage output unit;
A switch control circuit for supplying a first voltage according to the output voltage of the buffer to the gate terminal of the main switch and supplying a second voltage according to the output voltage of the buffer to the bulk terminal of the main switch;
A switch device comprising:
(Item 2)
The switch device according to item 1, wherein the voltage output unit supplies a first reference potential to an intermediate terminal between the first voltage dividing resistor and the second voltage dividing resistor when the main switch is disconnected. .
(Item 3)
The voltage output unit is
Provided between the first terminal and the first voltage dividing resistor, or between the intermediate terminal and the first voltage dividing resistor, and when the main switch is in the connected state, the connected state is established. A first sub-switch that is in a disconnected state when it is in a disconnected state;
Provided between the second terminal and the second voltage dividing resistor, or between the intermediate terminal and the second voltage dividing resistor, and when the main switch is in a connected state, the connected state is established. A second sub-switch that is in a disconnected state when it is in a disconnected state;
The switch device according to item 2, further comprising:
(Item 4)
The voltage output unit is
When the main switch is connected, the average voltage of the voltage of the first terminal and the voltage of the second terminal is output,
The switch device according to item 1, wherein when the main switch is in a disconnected state, a voltage corresponding to one of the voltage of the first terminal and the voltage of the second terminal and the first reference potential is output.
(Item 5)
The voltage output unit is
A first output resistor having one end connected between the first voltage dividing resistor and the second voltage dividing resistor and outputting an output voltage of the voltage output unit from the other end;
A second output resistor having one end connected to the other end of the first output resistor and the other end supplied with the first reference potential;
A third sub-switch provided between the second output resistor and the first reference potential, which is in a disconnected state when the main switch is in a connected state, and in a connected state when the main switch is in a disconnected state; ,
Item 5. The switch device according to Item 4.
(Item 6)
The voltage output unit includes a sub switch on at least one of a first terminal side from an intermediate point between the first voltage dividing resistor and the second voltage dividing resistor and a second terminal side from the intermediate point. Have
6. The switch device according to item 5, wherein the sub switch is in a connected state when the main switch is in a connected state, and is in a disconnected state when the main switch is in a disconnected state.
(Item 7)
The voltage output unit is
A first sub switch provided on the first terminal side of an intermediate point between the first voltage dividing resistor and the second voltage dividing resistor;
A second sub-switch provided closer to the second terminal than the intermediate point;
Have
When the main switch is in a connected state, the first sub switch and the second sub switch are in a connected state,
When the main switch is in a disconnected state,
When an electrical signal is input to the first terminal, the first sub switch is connected, the second sub switch is disconnected,
6. The switch device according to item 5, wherein when an electric signal is input to the second terminal, the first sub switch is disconnected and the second sub switch is connected.
(Item 8)
The switch device according to any one of Items 2 to 7, wherein the first reference potential is a potential for turning off a diode formed between a source terminal and a bulk terminal of the main switch.
(Item 9)
The switch control circuit includes:
When the main switch is connected, the first voltage obtained by adding a non-zero offset voltage to the second voltage supplied to the bulk terminal is supplied to the gate terminal;
When the main switch is in a disconnected state, the first voltage that is the same as the second voltage supplied to the bulk terminal is supplied to the gate terminal.
Item 9. The switch device according to any one of items 1 to 8.
(Item 10)
The main switch is an n-type semiconductor switch,
The offset voltage is a positive voltage.
Item 10. The switch device according to item 9.
(Item 11)
Item 11. The switch device according to Item 10, wherein the main switch is provided in a p-well on the substrate surface.
(Item 12)
The main switch is a p-type semiconductor switch,
The offset voltage is a negative voltage.
Item 10. The switch device according to item 9.
(Item 13)
Item 13. The switch device according to Item 12, wherein the main switch is provided in an n-well on the substrate surface.

12 1st terminal, 14 2nd terminal, 16 3rd terminal, 20 power supply part, 22 1st terminal, 24 2nd terminal, 26 3rd terminal, 30 reference potential generating part, 32 1st input terminal, 34 2nd input Terminal, 36 third input terminal, 38 intermediate terminal, 42 fifth input terminal, 44 sixth input terminal, 46 second output terminal, 48 third output terminal, 52 power supply section, 54 second reference potential, 100 switch device, 110 main switch, 112 first sub switch, 114 second sub switch, 120 current source, 130 inverter, 140 logic level shifter, 150 third sub switch, 160 level shifter, 200 switch device, 210 main switch, 220 voltage output unit, 222 Voltage divider 224 First sub switch 226 Second sub switch 228 Third sub switch 230 Buffer, 232 Fourth input terminal, 234 First output terminal, 236 Amplifier, 240 Switch control circuit, 242 Constant current circuit, 244 Resistance, 246 Fourth sub switch, 252 First voltage dividing resistor, 254 Second voltage dividing Resistor, 312 first output resistor, 314 second output resistor

Claims (15)

A main switch connected between the first terminal and the second terminal and electrically connecting or disconnecting between the first terminal and the second terminal according to a gate voltage applied to the gate terminal;
A voltage divider including a first voltage dividing resistor on the first terminal side and a second voltage dividing resistor on the second terminal side; and when the main switch is connected, the voltage of the first terminal and When a voltage corresponding to the voltage at the second terminal is output and the main switch is disconnected, a first reference potential is output to an intermediate terminal between the first voltage dividing resistor and the second voltage dividing resistor. A voltage output section;
A buffer that outputs a voltage that follows the output voltage of the voltage output unit;
A switch control circuit for supplying a first voltage according to the output voltage of the buffer to the gate terminal of the main switch and supplying a second voltage according to the output voltage of the buffer to the bulk terminal of the main switch;
Ru equipped with a switch device. The voltage output unit is
Provided between the first terminal and the first voltage dividing resistor, or between the intermediate terminal and the first voltage dividing resistor, and when the main switch is in the connected state, the connected state is established. A first sub-switch that is in a disconnected state when it is in a disconnected state;
Provided between the second terminal and the second voltage dividing resistor, or between the intermediate terminal and the second voltage dividing resistor, and when the main switch is in a connected state, the connected state is established. A second sub-switch that is in a disconnected state when it is in a disconnected state;
The switch device according to claim 1, further comprising: A main switch connected between the first terminal and the second terminal and electrically connecting or disconnecting between the first terminal and the second terminal according to a gate voltage applied to the gate terminal;
A voltage divider including a first voltage dividing resistor on the first terminal side and a second voltage dividing resistor on the second terminal side; and when the main switch is connected, the voltage of the first terminal and When outputting a voltage according to the voltage of the second terminal and turning off the main switch, the voltage of the first terminal or the voltage of the second terminal is set to the first reference potential. A voltage output unit that outputs a voltage according to the
A buffer that outputs a voltage that follows the output voltage of the voltage output unit;
A switch control circuit for supplying a first voltage according to the output voltage of the buffer to the gate terminal of the main switch and supplying a second voltage according to the output voltage of the buffer to the bulk terminal of the main switch;
Ru equipped with a switch device.   4. The switch device according to claim 3, wherein the voltage output unit outputs an average voltage of the voltage of the first terminal and the voltage of the second terminal when the main switch is connected. 5. The voltage output unit is
A first output resistor having one end connected between the first voltage dividing resistor and the second voltage dividing resistor and outputting an output voltage of the voltage output unit from the other end;
A second output resistor having one end connected to the other end of the first output resistor and the other end supplied with the first reference potential;
A third sub-switch provided between the second output resistor and the first reference potential, which is in a disconnected state when the main switch is in a connected state, and in a connected state when the main switch is in a disconnected state; ,
The switch device according to claim 4, comprising: The voltage output unit includes a sub switch on at least one of a first terminal side from an intermediate point between the first voltage dividing resistor and the second voltage dividing resistor and a second terminal side from the intermediate point. Have
6. The switch device according to claim 5, wherein the sub switch is in a connected state when the main switch is in a connected state, and is in a disconnected state when the main switch is in a disconnected state. The voltage output unit is
A first sub switch provided on the first terminal side of an intermediate point between the first voltage dividing resistor and the second voltage dividing resistor;
A second sub-switch provided closer to the second terminal than the intermediate point;
Have
When the main switch is in a connected state, the first sub switch and the second sub switch are in a connected state,
When the main switch is in a disconnected state,
When an electrical signal is input to the first terminal, the first sub switch is connected, the second sub switch is disconnected,
6. The switch device according to claim 5, wherein, when an electric signal is input to the second terminal, the first sub switch is in a disconnected state and the second sub switch is in a connected state.   The switch device according to any one of claims 1 to 7, wherein the first reference potential is a potential for turning off a diode formed between a source terminal and a bulk terminal of the main switch. The switch control circuit includes:
When the main switch is connected, the first voltage obtained by adding a non-zero offset voltage to the second voltage supplied to the bulk terminal is supplied to the gate terminal;
The switch device according to any one of claims 1 to 8, wherein when the main switch is in a disconnected state, the first voltage that is the same as the second voltage supplied to the bulk terminal is supplied to the gate terminal. A main switch connected between the first terminal and the second terminal and electrically connecting or disconnecting between the first terminal and the second terminal according to a gate voltage applied to the gate terminal;
A voltage divider including a first voltage dividing resistor on the first terminal side and a second voltage dividing resistor on the second terminal side; and when the main switch is connected, the voltage of the first terminal and A voltage corresponding to the voltage of the second terminal is output , and the first reference potential, or the voltage of the first terminal and the voltage of the second terminal and the first reference potential in the disconnected state of the main switch A voltage output unit that outputs a voltage according to
A buffer that outputs a voltage that follows the output voltage of the voltage output unit;
A switch control circuit for supplying a first voltage according to the output voltage of the buffer to the gate terminal of the main switch and supplying a second voltage according to the output voltage of the buffer to the bulk terminal of the main switch;
With
The switch control circuit supplies the gate terminal with the same first voltage as the second voltage supplied to the bulk terminal when the main switch is in a disconnected state.
Switch device.   The switch control circuit supplies the first voltage, which is obtained by adding a non-zero offset voltage to the second voltage supplied to the bulk terminal, when the main switch is connected. The switch device according to 1. The main switch is an n-type semiconductor switch,
The switch device according to claim 9 or 11, wherein the offset voltage is a positive voltage.   The switch device according to claim 12, wherein the main switch is provided in a p-well on a substrate surface. The main switch is a p-type semiconductor switch,
The switch device according to claim 9 or 11, wherein the offset voltage is a negative voltage.   The switch device according to claim 13, wherein the main switch is provided in an n-well on a substrate surface.

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