JP6498630B2 - Communication system, communication method, and signal dividing circuit - Google Patents

Description

  In a communication system used for wireless communication or wired communication, in order to effectively use a limited frequency band for a plurality of different users, a signal transmitted by dividing a frequency band from a transmitting apparatus is received by the receiving apparatus. The present invention relates to a communication system, a communication method, and a signal dividing circuit for performing demodulation processing by band synthesis.

9 and 10 show configuration examples of a transmission device and a reception device in a conventional communication system (see Non-Patent Document 1).
In FIG. 9, the transmission apparatus includes a modulator 101, a dividing circuit 10, and a D / A converter 103. The transmission data is modulated by the modulator 101 using a modulation scheme such as QPSK, and is input to the dividing circuit 10 as a single carrier modulation signal.

The dividing circuit 10 includes a serial-parallel conversion circuit 11, a DFT (discrete Fourier transform) circuit 12, a division filter 13 _{1 to} 13 _n (n is an integer of 2 or more), a frequency shifter 14 _{1 to} 14 _n , an addition circuit 15, and an IDFT ( (Discrete inverse Fourier transform) A circuit 16, a parallel-serial conversion circuit 17, and a division filter coefficient generation circuit 18 are provided, and a band of a single carrier modulation signal is divided into n and distributed and transmitted on the frequency axis. An example in which the band of the single carrier modulation signal is divided into three (n = 3) is shown in FIG.

The single carrier modulation signal input to the dividing circuit 10 is subjected to serial-parallel conversion, and discrete Fourier transform is performed by the DFT circuit 12 to convert the time domain signal into the frequency domain signal. The division filters 13 _{1 to} 13 ₃ multiply the single carrier modulation signal converted to the frequency domain by a filter coefficient for dividing the signal band indicated by the broken line in FIG. b) Three sub-modulated signals S _{1 to} S _{3 shown} in FIG. The frequency shifters 14 _{1 to} 14 ₃ disperse and arrange the sub-modulated signals in a desired band on the frequency axis and add them by the adder circuit 15, thereby distributing the sub-modulations arranged in a distributed manner as shown in FIG. A signal is generated. The submodulated signal after the distributed arrangement is converted from a frequency domain signal to a time domain signal by discrete inverse Fourier transform in the IDFT circuit 16, and converted into a transmission signal by parallel-serial conversion.

In FIG. 10, the receiving apparatus includes an A / D converter 201, an extraction circuit 20, and a demodulator 203. The received signal is converted into a digital signal by the A / D converter 201 and input to the extraction circuit 20.
The extraction circuit 20 includes a serial-parallel conversion circuit 21, a DFT circuit 22, extraction filters 23 ₁ to 23 _n , frequency shifters 24 _{1 to} 24 _n , an addition circuit 25, an IDFT circuit 26, a parallel-serial conversion circuit 27, and an extraction filter coefficient generation circuit. 28, the sub-modulated signal whose band is divided into n is combined with the single carrier modulated signal before the division. An example of synthesizing a single carrier modulation signal whose band is divided into three (n = 3) is shown in FIG.

The received signal input to the extraction circuit 20 is serial-parallel converted, and is subjected to discrete Fourier transform by the DFT circuit 22 to convert the time domain signal into the frequency domain received signal. Each of the extraction filters 23 ₁ to 23 ₃ multiplies the reception signal converted into the frequency domain by a filter coefficient indicated by a broken line in FIG. to extract the S ₁ ~S _3. As shown in FIG. 12B, the frequency shifters 24 _{1 to} 24 ₃ return the extracted sub-modulated signal to the band before being frequency shifted on the transmission side, and add them by the adder circuit 25 to A synthesized modulated signal as shown in (c) is generated. The combined modulated signal is converted from a frequency domain signal to a time domain signal by discrete inverse Fourier transform in the IDFT circuit 26, and is output after parallel-serial conversion. The demodulator 203 demodulates the single carrier modulation signal output from the extraction circuit 20 and restores the received data.

  By using such a transmission device and reception device, each sub-modulation signal generated by dividing the occupied band of the single carrier modulation signal can be distributed and arranged at any location on the frequency axis, so that it can be used by different users. A discontinuous free frequency band can be used effectively.

Abe, Nakahira, Sugiyama, “Experimental Verification of Blind Phase Compensation in Bandwidth Dispersion Transmission”, IEICE Technical Report, vol.111, no.336, SAT2011-46, pp.41-46, December 2011 Abe, Nakahira, Sugiyama, “Experimental verification of blind type frequency synchronization method in spectrum division adapter”, IEICE Technical Report, Satellite Communication, vol.113, no.193, pp.25-30, August 2013

As shown in FIGS. 9 and 11, the conventional signal division circuit converts a time-domain modulation signal into a frequency-domain modulation signal S by a discrete Fourier transform (DFT) of size L, and uses a division filter to obtain a desired band. Divided into sub-modulated signals S _{1 to} S ₃ . As shown in FIGS. 10 and 12, desired sub-modulated signals S _{1 to} S ₃ are extracted by an extraction filter in the frequency domain with the same configuration on the reception side.

  The modulation signal S converted to the frequency domain by DFT on the transmission side originally has a waveform in the frequency domain indicated by a solid line in FIG. 13, but as indicated by “◯” in FIG. It has only discrete values based on DFT with resolution k. As shown by a broken line in FIG. 13, the division filter uses a symbol rate and a value obtained by discretizing a 3 dB bandwidth of each sub-modulated signal with a DFT having a size L and a frequency resolution k with respect to the discrete signal converted into the frequency domain. Each filter coefficient is generated and multiplied. Even on the receiving side, the received signal and the extraction filter have only discretized values and perform multiplication.

FIG. 13 shows an example in which a single carrier modulation signal S having a symbol rate B of 26 times the frequency resolution k (B = 26k) is divided into _three sub modulation signals S ₁ , S ₂ , S ₃ . The 3 dB bandwidths of the divided sub-modulation signals are B ₁ = 8k, B ₂ = 10k, and B ₃ = 8k, respectively. That is, the 3 dB bandwidth of the symbol rate, the division filter, and the extraction filter is an integral multiple of the frequency resolution k. For this reason, considering that the divided spectrum satisfies the symmetrical root roll-off characteristic from the center frequency, a filter coefficient that is 3 dB lower than the passband can be generated at the cutoff frequency only when the frequency resolution is k. However, since filter coefficients cannot be generated in other cases, there is a problem that it is not possible to cope with an arbitrary symbol rate or sub-modulation signal. In addition, by increasing the DFT size and decreasing the frequency resolution k, it is possible to increase the bandwidth that can be handled. However, as the DFT size increases, the multiplier and buffer sizes also increase, so the overall circuit scale increases. There was a problem.

  Further, due to such a problem, a value is prepared in which the symbol rate and the 3 dB bandwidth of the divided sub-modulated signal satisfy the discretization restriction, and the values are discretized and extracted as shown in FIG. The input to the filter coefficient generation circuit 28 was necessary.

  In the latter stage of the DFT, a configuration in which n-fold interpolation is performed on the signal component on the frequency axis, a filter coefficient with a frequency resolution of k / n is multiplied, and 1 / n-fold decimation is performed. There has been a problem that the circuit scale of the multiplication circuit increases to n times.

  The present invention provides a communication method, a communication system, and a signal dividing circuit capable of dividing a signal of an arbitrary symbol rate while suppressing an increase in circuit scale and generating a sub-modulated signal of an arbitrary bandwidth. Objective.

  In a first aspect of the invention, a transmitting device converts a modulated signal into a frequency domain signal by discrete Fourier transform, divides the signal into a plurality of sub-modulated signals by a plurality of division filters, and shifts the frequency to an arbitrary band on the frequency axis. The signal is converted to a time-axis signal by inverse discrete Fourier transform and transmitted, and the received sub-modulated signal is converted to a frequency domain signal by discrete Fourier transform at the receiving device, and a plurality of sub-modulated signals are converted by a plurality of extraction filters. In the communication method of extracting, frequency shifting to the frequency band before division, adding all sub-modulated signals, converting to a time axis signal by inverse discrete Fourier transform, and restoring the modulated signal before division, the transmitting device A step of setting a frequency resolution of a filter coefficient generation circuit of a division filter that generates a submodulation signal smaller than a frequency resolution of a discrete Fourier transform, and the filter coefficient generation circuit Dividing the modulated signal with a division filter using only the filter coefficient selected at a frequency interval corresponding to the frequency resolution of the discrete Fourier transform among the generated filter coefficients. The step of setting the frequency resolution of the filter coefficient generation circuit of the extraction filter that extracts the sub-modulation signal to be smaller than the frequency resolution, and the filter coefficient generated by the filter coefficient generation circuit according to the frequency resolution of the discrete Fourier transform Extracting a sub-modulated signal with an extraction filter using only filter coefficients selected at a frequency interval.

  The second invention converts a modulated signal into a frequency domain signal by discrete Fourier transform, divides the modulated signal into a plurality of submodulated signals by a plurality of division filters, shifts the frequency to an arbitrary band on the frequency axis, and performs inverse discrete Fourier transform. A transmitter including a signal that is converted into a time-axis signal by transmission, and the received sub-modulated signal is converted to a frequency-domain signal by discrete Fourier transform, and a plurality of sub-modulated signals are extracted and divided by a plurality of extraction filters. In a communication system comprising: a receiving apparatus that shifts the frequency to the previous frequency band, adds all sub-modulated signals, converts the signals into a time axis signal by inverse discrete Fourier transform, and restores the modulated signals before division; Sets the frequency resolution of the filter coefficient generation circuit of the division filter that generates the submodulation signal smaller than the frequency resolution of the discrete Fourier transform, and generates the filter coefficient generation circuit. The modulation signal is divided by the division filter using only the filter coefficient selected at the frequency interval corresponding to the frequency resolution of the discrete Fourier transform, among the filter coefficients generated in step (1). The frequency resolution of the filter coefficient generation circuit of the extraction filter that extracts the submodulation signal is set smaller than the resolution, and the filter coefficient generated by the filter coefficient generation circuit is set at a frequency interval corresponding to the frequency resolution of the discrete Fourier transform. In this configuration, the sub-modulation signal is extracted by an extraction filter that uses only selected filter coefficients.

  In the communication system of the second invention, the transmission device is configured to input the modulated signal output from the device having a modulation function after A / D conversion, and the receiving device performs D / A conversion on the restored modulated signal. Output to a device having a demodulation function.

  In the signal division circuit including the division filter or the extraction filter of the communication system according to the second invention, a filter coefficient generation circuit for generating a filter coefficient with a frequency resolution set smaller than the frequency resolution of the discrete Fourier transform, and a filter coefficient generation circuit Of the generated filter coefficients, select only the filter coefficients selected at the frequency interval corresponding to the frequency resolution of the discrete Fourier transform, and set them in the division filter or extraction filter, and select the filter coefficient to divide the modulation signal or extract the sub-modulation signal Circuit.

  According to the present invention, it is possible to generate a sub-modulated signal having an arbitrary bandwidth by dividing a signal having an arbitrary symbol rate that cannot be dealt with by frequency resolution in the prior art while suppressing an increase in circuit scale. As a result, a signal having an arbitrary symbol rate can be flexibly divided and arranged in a vacant band on the frequency axis, so that frequency use efficiency can be improved.

It is a figure which shows the structural example of the transmitter in Example 1 of the communication system of this invention. It is a figure which shows the structural example of the receiver in Example 1 of the communication system of this invention. It is a figure which shows the example which produces | generates a filter coefficient in the high precision division | segmentation filter coefficient generation circuit 19a. It is a figure which shows the example which produces | generates a filter coefficient in the high precision extraction filter coefficient production | generation circuit 29a. It is a flowchart showing a processing procedure for correcting the 3dB bandwidth B _1. N = 4, a diagram illustrating a generation example of the extraction filter coefficient when the frequency resolution _{k / 4, B 1 = 8.4k} . It is a figure which shows the structural example of the transmitter in Example 2 of the communication system of this invention. It is a figure which shows the structural example of the receiver in Example 2 of the communication system of this invention. It is a figure which shows the structural example of the transmitter in the conventional communication system. It is a figure which shows the structural example of the receiver in the conventional communication system. It is a figure which shows the example of a band division | segmentation in a transmitter. It is a figure which shows the band synthetic | combination example in a receiver. Is a diagram showing an example of dividing into sub-modulated signal _{S 1, S 2, S 3} .

Example 1
FIG. 1 shows a configuration example of a transmission apparatus in Embodiment 1 of the communication system of the present invention. FIG. 2 shows a configuration example of a receiving apparatus in the first embodiment of the communication system of the present invention.
In FIG. 1, the transmission apparatus includes a modulator 101, a dividing circuit 10, and a D / A converter 103. The dividing circuit 10 includes a series-parallel conversion circuit 11, a DFT (discrete Fourier transform) circuit 12, and division filters 13 ₁ to 13. 13 _m (m is an integer of 2 or more), frequency shifters 14 _{1 to} 14 _m , addition circuit 15, IDFT (discrete inverse Fourier transform) circuit 16, parallel-serial conversion circuit 17, high-precision division filter coefficient generation circuit 19 a and division filter The coefficient selection circuit 19b is provided, and the band of the single carrier modulation signal is divided into m and distributed and transmitted on the frequency axis.

In FIG. 2, the receiving apparatus includes an A / D converter 201, an extraction circuit 20, and a demodulator 203. The extraction circuit 20 includes a series-parallel conversion circuit 21, a DFT circuit 22, extraction filters 23 ₁ to 23 _m , a frequency shifter. 24 _{1 to} 24 _m , an adder circuit 25, an IDFT circuit 26, a parallel-serial converter circuit 27, a high-precision extraction filter coefficient generation circuit 29a, and an extraction filter coefficient selection circuit 29b, and a sub-modulated signal whose band is divided into m before division It is the structure which synthesize | combines to a single carrier modulation signal.

A feature of the present invention is that the high-precision division filter coefficient generation circuit 19a and the high-precision extraction filter coefficient generation circuit 29a generate division filter coefficients and extraction filter coefficients with a DFT having a DFT size of nL and a frequency resolution of k / n. The divided filter coefficient selection circuit 19b and the extraction filter coefficient selection circuit 29b select every n filter coefficients from the center frequency of the sub-modulation signal, or calculate a correction value from the filter coefficients adjacent to every n filter coefficients. Then, the signals are multiplied in the division filters 13 _{1 to} 13 _m and the extraction filters 23 ₁ to 23 _m .

FIG. 3 shows an example in which filter coefficients are generated by the high-precision division filter coefficient generation circuit 19a when the modulation signal is divided into three in the transmission apparatus.
The symbol rate and the 3 dB bandwidth of the sub-modulation signal are set to B = 23k, B ₁ = 7k, B ₂ = 9k, and B ₃ = 7k, which are odd multiples of the frequency resolution k that could not be handled conventionally.

The high-precision division filter coefficient generation circuit 19a generates filter coefficients indicated by “x” and “Δ” when the DFT size is 2L and the frequency resolution is k / 2. B, B ₁ , B ₂ , and B ₃ can generate accurate filter coefficients when the DFT size is 2L and the frequency resolution is k / 2. However, there are only signal components of DFT size L indicated by “◯” and frequency resolution k. Therefore, the division filter coefficient selection circuit 19b selects every n filter coefficients (n = 2) from the center frequency of each filter, that is, only the filter coefficient indicated by “x”, and multiplies the signal by the division filter.

  FIG. 4 shows an example in which the reception apparatus receives the sub-modulated signal divided into three on the transmission side and generates the extraction filter coefficient necessary for synthesis by the high-precision extraction filter coefficient generation circuit 29a. Similar to the transmission apparatus, the high-precision extraction filter coefficient generation circuit 29a generates filter coefficients with a DFT size of 2L and frequency decomposition k / 2, and the extraction filter coefficient selection circuit 29b has every n pieces (n = n) from the center frequency of each filter. 2) That is, only filter coefficients indicated by “x” are selected, and the signal is multiplied by the extraction filter.

As shown in FIGS. 3 and 4, in order to correspond to the division filter coefficients and extraction filter coefficients corresponding to an arbitrary symbol rate B and 3 dB bandwidth B _i , a high-precision division filter coefficient generation circuit 19a and a high-precision extraction In the filter coefficient generation circuit 29a, for example, according to the flowchart shown in FIG. 5, an appropriate value of n is calculated, a filter coefficient is generated with the DFT size nL, and the frequency resolution k / n, and the divided filter coefficient selection circuit 19b and the extraction filter coefficient The selection circuit 29b selects every n pieces from the center frequency of each filter.

However, in order to cope with an arbitrary symbol rate B or 3 dB bandwidth B _i , it is necessary that the transmitting apparatus shown in FIG. 1 and the receiving apparatus shown in FIG. However, since the DFT size increases as n increases, the processing speed, buffer size, circuit scale, and the like increase. Therefore, it is impossible to make a circuit that operates for any value of n. Therefore, an optimum filter coefficient is generated for an arbitrary symbol rate B or 3 dB bandwidth B _{i at} the maximum value N of n that can be implemented.

FIG. 6 is an example of generation of extraction filter coefficients when N = 4, DFT size 4L, frequency resolution k / 4, and B ₁ = 8.4 k. According to the flowchart of FIG. 5, the symbol rate B or the 3 dB bandwidth B ₁ is corrected.

In the flowchart of FIG. 5, first, the symbol rate B or 3 dB bandwidth B _i is set to x (S1), the value obtained by dividing x by the frequency resolution k is set to y, and n is set to 1 (S2). In the example of FIG. 6, x = 8.4k, y = 8.4, and n = 1.

Next, y = y mod 2, that is, a remainder obtained by dividing y by 2 is set as y (S3). Next, it is determined whether or not y is 0 (S4). If y is 0, B _i = x and the process ends (S5). Here, when x (symbol rate B or 3 dB bandwidth B _i ) is an even multiple of k, y becomes 0, and the processing is terminated because the conditions are the same as in the conventional case. In the example of FIG. 6, x is 8.4K, without leaving to become y = 8.4 mod 2 = 0.4, searching for a suitable value of B _i and n by the step S6 and subsequent steps.

  Here, it is determined whether n is N (S6). In the example of FIG. 6, since n = 1 and n <N, the fractional part is extracted from y (S7), the y is doubled, the value of n is also doubled (S8), and the result is fed back to step S3. In the example of FIG. 6, y = 0.4 × 2 = 0.8 and n = 2.

In step S3, y = y mod 2 (n = 2) is executed, and it is determined whether y is 0 (S4). If y is 0, the process ends with B _i = x (S5). Here, when x is an odd multiple of k, y becomes 0 and the process is terminated. In the example of FIG. 6, since x is 8.4k and y = 0.8 mod 2 = 0.8, the process does not end, and appropriate values of B _i and n are searched by the processing after step S6.

  Here, it is determined whether n is N (S6). In the example of FIG. 6, since n = 2 and n <N, the fractional part is extracted from y (S7), the y is doubled, the value of n is also doubled (S8), and the result is fed back to step S3. In the example of FIG. 6, y = 0.8 × 2 = 1.6 and n = 4.

In step S3, y = y mod 2 (n = 4) is executed, and it is determined whether or not y is 0 (S4). If y is 0, B _i = x and the process ends (S5). Here, when x is a multiple of 0.5k, such as 4.5k, 8.5k, etc., y becomes 0 and the process is terminated. In the example of FIG. 6, since x is 8.4k and y = 1.6 mod 2 = 1.6, the process is not terminated, and appropriate values of B _i and n are searched for by the processing after step S6.

Here, it is determined whether n is N (S6). In the example of FIG. 6, since n = 4 and n = N is established, the process of increasing the value of n after step S7 is not executed. In this case, an accurate filter coefficient cannot be generated for the symbol rate B or the 3 dB bandwidth B _i , but a filter coefficient approximated in the range of high-resolution DFT (DFT size nL) is generated after step S9.

  In the approximation method, for x = 8.4k, the nearest discrete value is calculated at n = 4 and frequency resolution k / n, and the filter coefficient at that time is generated. Since the frequency resolution k / 4 = 0.25k, 8.4k is between the discrete values 8.25k and 8.5k, and the discrete value closest to 8.4k is 8.5k. Therefore, 8.5k is derived by the following method.

A difference z between x (= 8.4k) and a discrete value (8.25k) smaller than x is calculated as follows (S9).
z = (x / k) mod 1 / n = (8.4 k / k) mod 0.25 = 0.15
Next, it is determined whether x (= 8.4k) is closer to a discrete value greater than x (8.5k) or a smaller discrete value (8.25k) (S10). z / near (1 / n) is greater than x discrete values equal to or larger than 0.5 (8.5K), in the case of less than 0.5 is determined to be close to x less than discrete value (8.25k), closer to B _i (S11, S12).

In the example of FIG. 6, since z / (1 / n) = 0.15 / 0.25 ≧ 0.5, the following calculation is performed in order to correct to a discrete value larger than x (S11).
B _i = x−z × k + k / n
= 8.4k-0.15k + 0.25k = 8.5k
On the other hand, when z / (1 / n) <0.5, the following calculation is performed to correct to a discrete value smaller than x (S12).
B _i = x−z × k

  Here, when z / (1 / n) is 0.5 or more, it may be possible to pick up noise of the component outside the occupied band by correcting to a discrete value larger than x (carrying up). A process may be performed in which the difference z from the value is rounded down and corrected to a discrete value smaller than x. That is, step S10 is not performed after step S9, and the process of step S12 is performed.

Next, filter coefficients are generated from B _i and n obtained in this way, filter coefficients are selected every n from the center frequency of the filter, and the signal is multiplied. In the example of FIG. 6, the filter coefficient indicated by “x” is selected.

  With this method, since only the filter coefficients need to be generated with a reduced frequency resolution, the circuit scale of the multiplier used in the DFT is the same as the conventional one, and the division and synthesis of the modulated signal is the same as when the DFT size is increased. realizable.

(Example 2)
7 and 8 show configuration examples of the transmission apparatus and the reception apparatus in the second embodiment of the communication system of the present invention. The second embodiment corresponds to the transmission device and the reception device shown in Non-Patent Document 2.

  In FIG. 7, the transmission apparatus of the second embodiment is a transmission adapter 100 including an A / D converter 102 and a D / A converter 103 before and after the dividing circuit 10 of the first embodiment shown in FIG. Is input to the transmission adapter 100, and a sub-modulated signal is generated and transmitted.

  In FIG. 8, the receiving apparatus of the second embodiment is a receiving adapter 200 including an A / D converter 201 and a D / A converter 202 before and after the extraction circuit 20 of the first embodiment shown in FIG. The sub-modulation signals are combined, the original modulation signal is restored, input to the existing modem 300, and demodulated.

  Since this configuration also includes the division circuit 10 and the extraction circuit 20 having the same circuit configuration as that of the first embodiment, the modulation signal of the existing modem 300 that inputs and outputs an arbitrary symbol rate can be freely divided and transmitted to an arbitrary bandwidth. it can.

(Other examples)
In the transmission apparatus according to the first embodiment illustrated in FIG. 1 and the second embodiment illustrated in FIG. 7, the order of the division filters 13 _{1 to} 13 _m and the frequency shifters 14 _{1 to} 14 _m of the division circuit 10 may be switched. In the receiving apparatus according to the first embodiment illustrated in FIG. 2 and the second embodiment illustrated in FIG. 8, the order of the extraction filters 23 ₁ to 23 _m and the frequency shifters 24 _{1 to} 24 _m may be changed in the extraction circuit 20.

Further, in the receiving apparatus of the first embodiment shown in FIG. 2 and the second embodiment shown in FIG. 8, means for compensating the phase between the sub-modulated signals is provided in the extraction circuit 20 before or after the frequency shifters 24 _{1 to} 24 _m. It may be provided. For the phase compensation, for example, a “blind type phase compensation method” shown in Non-Patent Document 1 may be used. In addition, frequency synchronization may be performed simultaneously using the “blind frequency synchronization method” shown in Non-Patent Document 2.

  In addition, in the transmission apparatus according to the first embodiment illustrated in FIG. 1 and the second embodiment illustrated in FIG. 7, a division circuit that processes continuous signals may be used. In addition, in the receiving apparatus according to the first embodiment illustrated in FIG. 2 and the second embodiment illustrated in FIG. 8, the extraction circuit 20 may be configured to use overlap addition or overlap storage.

DESCRIPTION OF SYMBOLS 10 Division circuit 20 Extraction circuit 11,21 Serial-parallel conversion circuit 12,22 DFT (discrete Fourier transform) circuit 13,23 Division filter 14,24 Frequency shifter 15,25 Adder circuit 16,26 IDFT (discrete inverse Fourier transform) circuit 17 , 27 Parallel-serial conversion circuit 18 Division filter coefficient generation circuit 19a High-precision division filter coefficient generation circuit 19b Division filter coefficient selection circuit 28 Extraction filter coefficient generation circuit 29a High-precision extraction filter coefficient generation circuit 29b Extraction filter coefficient selection circuit 100 Transmission adapter 101 Modulator 102, 201 A / D converter 103, 202 D / A converter 200 Receiving adapter 203 Demodulator 300 Existing modem

Claims (4)

The transmitter converts the modulated signal into a frequency domain signal by discrete Fourier transform, divides it into multiple submodulated signals by multiple division filters, shifts the frequency to an arbitrary band on the frequency axis, and performs inverse discrete Fourier transform. Convert to time axis signal and send
The receiving device converts the received sub-modulated signal into a frequency domain signal by discrete Fourier transform, extracts a plurality of sub-modulated signals by a plurality of extraction filters, shifts the frequency to the frequency band before the division, and all sub-modulated signals In the communication method of restoring the modulation signal before the division by converting to a time-axis signal by inverse discrete Fourier transform,
The transmitting apparatus sets a frequency resolution of a filter coefficient generation circuit of the division filter that generates the sub-modulation signal smaller than a frequency resolution of the discrete Fourier transform, and a filter coefficient generated by the filter coefficient generation circuit And dividing the modulation signal with the division filter using only the filter coefficient selected at a frequency interval according to the frequency resolution of the discrete Fourier transform,
The receiving apparatus sets a frequency resolution of a filter coefficient generation circuit of the extraction filter that extracts the sub-modulation signal to be smaller than a frequency resolution of the discrete Fourier transform, and a filter coefficient generated by the filter coefficient generation circuit A sub-modulated signal is extracted by the extraction filter using only the filter coefficient selected at a frequency interval corresponding to the frequency resolution of the discrete Fourier transform. The modulated signal is converted into a frequency domain signal by discrete Fourier transform, divided into multiple sub-modulated signals by multiple division filters, frequency shifted to an arbitrary band on the frequency axis, and time-axis signal by inverse discrete Fourier transform Including a transmitting device that converts and transmits to
The received sub-modulated signal is converted into a frequency domain signal by discrete Fourier transform, a plurality of sub-modulated signals are extracted by a plurality of extraction filters, the frequency is shifted to the frequency band before division, and all sub-modulated signals are added. In a communication system comprising: a receiving device that converts to a time axis signal by inverse discrete Fourier transform and restores a modulated signal before division;
The transmission device sets a frequency resolution of a filter coefficient generation circuit of the division filter that generates the sub-modulated signal to be lower than a frequency resolution of the discrete Fourier transform, and among the filter coefficients generated by the filter coefficient generation circuit , The modulation signal is divided by the division filter using only the filter coefficient selected at a frequency interval according to the frequency resolution of the discrete Fourier transform,
The receiving apparatus sets a frequency resolution of a filter coefficient generation circuit of the extraction filter that extracts the sub-modulated signal to be lower than a frequency resolution of the discrete Fourier transform, and among the filter coefficients generated by the filter coefficient generation circuit A communication system, wherein a sub-modulated signal is extracted by the extraction filter using only filter coefficients selected at a frequency interval corresponding to the frequency resolution of the discrete Fourier transform. The communication system according to claim 2,
The transmission device is configured to A / D-convert and input the modulation signal output by a device having a modulation function,
The communication apparatus is configured to perform D / A conversion on the restored modulated signal and output to a device having a demodulation function. The signal division circuit including the division filter or the extraction filter of the communication system according to claim 2,
A filter coefficient generation circuit for generating a filter coefficient with a frequency resolution set smaller than the frequency resolution of the discrete Fourier transform;
Of the filter coefficients generated by the filter coefficient generation circuit, only filter coefficients selected at a frequency interval corresponding to the frequency resolution of the discrete Fourier transform are set in the division filter or the extraction filter, and the modulation signal is divided or A signal division circuit comprising: a filter coefficient selection circuit that extracts the sub-modulation signal.

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