JP6503908B2 - Control program, control method, and control device - Google Patents

Description

  The present invention relates to a control program, a control method, and a control device.

  The amount of data handled by software (programs) has been increasing with the recent development of big data, and the information and communication technology (ICT) environment has become large-scale. In an ICT environment that handles large-scale data, a large-capacity storage device is provided to store a large amount of data.

  In software processing, when the amount of data handled is small, an event that does not appear as a failure may appear as a failure as the amount of data increases. Therefore, verification of software operation is performed using large-scale data similar to the actual operation environment. For example, the verification apparatus accesses a large-capacity storage device in which large-scale data is stored to perform software operation verification.

  Techniques related to software operation verification are described, for example, in Patent Documents 1 and 2.

JP, 2001-022609, A Japanese Patent Application Laid-Open No. 07-249012

  However, when performing operation verification using large-scale data similar to the actual operation environment, preparing a large-capacity storage device increases the cost of the operation verification. On the other hand, when suppressing the volume of data used for operation verification in order to suppress the increase in cost, the operation verification is performed based on a configuration different from the data configuration of the actual operation environment. As a result, the same operation verification as the operation environment is not secured, and the accuracy of the software operation verification may be degraded.

  In one aspect, the present invention aims to provide a control program, a control method, and a control device that suppress a decrease in the accuracy of program operation verification.

  In one aspect, when the computer stores test data generated based on master data in the first storage unit, and the program to be verified executes processing using the generated test data among the test data. The position of the data read out is specified, and the data corresponding to the specified position is extracted from the test data and stored in the second storage unit, based on the data stored in the second storage unit Execute the verification process.

  According to one aspect, the decrease in the accuracy of program operation verification is suppressed.

It is a figure which shows the structure of the test system in this Embodiment. It is a figure which illustrates typically the outline | summary of the verification process of the verification apparatus 100 shown in FIG. It is a figure which shows a part of data example of master data Md. It is a figure which shows a part of data example of test data Td. It is a flowchart figure explaining the outline | summary of the verification in this Embodiment. It is a hardware block diagram of the verification apparatus 100 (FIG. 1, FIG. 2) in this Embodiment. It is a figure which shows an example of the read area | region table 60 shown in FIG. It is a figure which shows the example of a part of data of extract test data Tdx shown in FIG. It is a figure which shows an example of the address conversion table 70 shown in FIG. It is a block diagram of the software block of the driver program 10 of the verification apparatus 100 shown in FIG. It is a flowchart figure explaining the flow of verification of the software program 20 in this Embodiment. It is a figure which illustrates typically the process of a 1st preparatory process (S11 of FIG. 11). It is a flowchart figure explaining the detail of a process of a 1st preparatory process (S11 of FIG. 11). It is a flowchart figure explaining the detail of a process of process S23 of FIG. It is a figure which illustrates typically the outline | summary of a process of a 2nd preparatory process (S12 of FIG. 11). It is a flowchart figure explaining the detail of a process of a 2nd preparatory process (S12 of FIG. 11). It is a flowchart figure explaining the production | generation process (process S41 of FIG. 16) of extraction test data Tdx and the address conversion table 70. FIG. It is a figure which illustrates typically the outline | summary of a process of a verification process (S13 of FIG. 11). It is a flowchart figure explaining the detail of a process of a verification process (S13 of FIG. 11).

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the technical scope of the present invention is not limited to these embodiments, but extends to the matters described in the claims and the equivalents thereof.

[Verification system]
FIG. 1 is a diagram showing a configuration of a test system in the present embodiment. The verification system illustrated in FIG. 1 includes a verification device (control device) 100, and storage devices SD1 and SD2 (also referred to as storage devices SD). The verification device 100 is connected to the storage devices SD1 and SD2.

  The verification apparatus 100 illustrated in FIG. 1 performs verification processing such as whether or not the function of the software operates properly, and whether or not the performance of the software satisfies a predetermined standard. The verification device 100 performs software verification processing, for example, at the time of software development, or at the time of version upgrade accompanying function addition and fault correction.

  In the verification device 100, a test program 30, software to be verified (also referred to as software to be verified) 20, and a driver program (control program) 10 operate. The test program 30 is a program for instructing the software 20 to be verified to execute the verification process. The driver program 10 is, for example, a program included in an operation system (not shown) operating in the verification device 100, and controls access processing to the storage device SD.

  In the present embodiment, the software 20 to be verified is, for example, software of a database management system (DBMS). The DBMS software performs access processing to the database according to the access request, and performs construction and management of the database.

  The software 20 to be verified is not limited to the example of the software of the DBMS, and may be software of a file system, software that performs arithmetic processing and the like based on data, and the like.

  When the software 20 to be verified is DBMS software, the verification device 100 verifies whether the process of accessing the database or the process of constructing the database of the DBMS software operates properly. The verification apparatus 100 performs verification processing assuming an operation environment using the software 20 to be verified, in addition to verification of basic access processing (data write, read, search processing, etc.).

  For example, the verification device 100 verifies whether the process of generating a large-capacity database or the process of accessing a large-capacity database by the software 20 to be verified operates properly. The verification apparatus 100 determines whether or not the access processing of data located at the boundary of the top, the tail, etc. of a large-capacity database by the software 20 to be verified and the access processing of an arbitrary number of data operate properly. Verify. Further, the verification device 100 verifies whether the performance of access processing of a large-capacity database by the software 20 to be verified satisfies a predetermined standard.

  The storage device SD1 shown in FIG. 1 stores master data Md. Master data Md in the present embodiment is data that is the source of test data Td. The master data Md is, for example, data used in an operation environment of the actual verification target software 20, and is a large volume of data. The verification device 100 generates test data Td of various variations according to the content of verification based on the master data Md. An example of the master data Md will be described later according to FIG.

  The storage device SD2 illustrated in FIG. 1 stores information such as test data Td and the result of verification processing. The test data Td in the present embodiment is data used for the verification process of the software 20. The test data Td has data according to the verification content. The test data Td includes, for example, some data dd-1 to dd-4 (also referred to as data dd) included in the master data Md, or all data, and data obtained by processing the data included in the master data Md. . An example of the test data Td will be described later according to FIG.

  Although the master data Md and the test data Td are stored in different storage devices SD1 and SD2 according to the example of FIG. 1, they may be stored in the same storage device SD. The test data Td may be stored in a storage area in the verification device 100.

  Next, the flow of the verification process will be described. When the test program 30 instructs the start of the test, the verification target software 20 reads out the data dd of the master data Md stored in the storage device SD1, processes it as necessary, and writes it in the storage device SD2. By repeating this process, the verification target software 20 generates test data Td based on the master data Md.

  When the generation of the test data Td is completed, the verification target software 20 performs an access process on the test data Td stored in the storage device SD2 in accordance with the instruction of the test program 30. The verification target software 20 stores the result of the access process in the storage device SD2 as the result information of the verification process. The test program 30 determines, for example, based on the comparison result between the result information and the expected value, whether or not the software 20 to be verified operates properly.

  Thus, the verification apparatus 100 verifies that the function operates properly by executing the function of the software program 20 according to the test program 30. That is, the verification apparatus 100 verifies whether the reading of a large amount of data or the writing of a large amount of data by the software 20 to be verified operates properly through the generation process of the test data Td. Further, the verification apparatus 100 verifies whether the access process of the software 20 to be verified operates properly through the access process on the test data Td.

  FIG. 2 is a diagram schematically illustrating the outline of the verification process of the verification device 100 shown in FIG. As described above with reference to FIG. 1, in the verification device 100, the test program 30, the software 20 to be verified, and the driver program 10 operate. As described above with reference to FIG. 1, the verification device 100 performs the generation process F1 of the test data Td based on the master data Md and the verification process F2 using the generated test data Td.

  In the test data Td generation process F1, the test program 30 instructs the software 20 to be verified to read the master data Md (read instruction), write the read data to the storage device SD2 (write instruction), etc. To issue

  The verification target software 20 outputs a write instruction and a read instruction to the driver program 10 in accordance with the instruction received from the test program 30. The driver program 10 accesses each data stored in the storage device SD in response to an instruction received from the software 20 to be verified.

  In the verification process F2 using the test data Td, the test program 30 issues a read instruction (read instruction) for the test data Td and a write instruction (write instruction) for the test data Td to the software 20 to be verified. .

  The verification target software 20 issues a write instruction and a read instruction to the driver program 10 in accordance with the instruction received from the test program 30. In response to the instruction received from the verification target software 20, the driver program 10 accesses the test data Td stored in the storage device SD2.

  Here, an example of the master data Md and the test data Td will be described according to FIGS. 3 and 4. The master data Md and the test data Td in the present embodiment are data in a CSV (Comma-Separated Values: CSV) format. However, the present invention is not limited to this example, and the master data Md and the test data Td may be data of another format (for example, binary format etc.).

[Master data Md]
FIG. 3 is a view showing a part of data example of the master data Md. The master data Md shown in FIG. 3 is a part of data, and actually has a large amount of data.

  Master data Md shown in FIG. 3 is data having information on professional sports, and includes two types of data groups Md-1 and Md-2. Master data Md-1 shown in (A) of FIG. 3 is a data group having player information, and master data Md-2 shown in (B) of FIG. 3 is a data group having team information.

  Each data of master data Md-1 having player information shown in FIG. 3A has identification information (No) for identifying data, name information, affiliation information, number information, and score number information. . For example, the data of identification information "1" has name information "PONEME", belonging information "Urawa Blue Jays", model number information "10", and specific number information "252". Similarly, data of identification information "2" has name information "WAHI", affiliation information "Urawa Blue Jays", serial number information "21", and specific number information "108". The same is true for other data.

  Each data of master data Md-2 which has team information shown in (B) of Drawing 3 has discernment information (No) which identifies data, name information, number-of-winnings information, and address information. For example, the data of identification information "1" has name information "Urawa Blue Jays", winning number information "7", and location information "Urawa". Similarly, the data of the identification information "2" has name information "Hiroshima Fretse", winning times information "1", and location information "Hiroshima". The same is true for other data.

[Test data Td]
FIG. 4 is a view showing a part of an example of test data Td. The test data Td shown in FIG. 4 is a part of data, and the test data Td actually has a large amount of data.

  The test program 30 generates test data Td shown in FIG. 4 based on the master data Md shown in FIG. 3 by instructing the software 20 to be verified. At this time, the test program 30 may generate the test data Td based on the generation rule and the logic used for generating the random value generated in advance, in addition to the master data Md.

  According to the example of FIG. 4, the test program 30 generates test data Td by combining the master data Md shown in (A) and (B) of FIG. Specifically, the test data Td in FIG. 4 is data generated by combining each data group with the affiliation information that each data group in (A) and (B) in FIG. 3 has as a key.

  Each data of test data Td shown in FIG. 4 includes identification information for identifying data, name information, affiliation information, number information, score number information, and winning times information. For example, the data of identification information "1" corresponds to name information "PONEME", affiliation information "Urawa Blue Jays", serial number information "10", specific number information "252", and affiliation information "Urawa Blue Jays" It has the winning number information "7". Similarly, the data of identification information "4" corresponds to name information "HISA", affiliation information "Hiroshima Fletce", identification number information "9", specific number information "136", and affiliation information "Hiroshima Fletce" Have the number of wins information “1”. The same is true for other data.

  Also, the test program 30 may generate test data Td to which data having information overlapping with other data or data having invalid information is arbitrarily added. The test data Td shown in FIG. 4 is data of identification information “5” in which the data of identification information “1” and information overlap, data of identification information “6” having invalid information in name information, affiliation information, etc. including.

  As described in FIGS. 1 to 4, the verification device 100 reads data from the master data Md, generates test data Td, and performs verification based on the generated test data Td. In the case of performing verification assuming an environment similar to the actual operation environment, the verification device 100 performs, for example, a verification process using a large amount of test data Td.

  When the size of test data Td is large, in order to store test data Td, it is necessary to prepare a storage device (for example, storage device SD2 shown in FIGS. 1 and 2) having a large capacity storage area. Costs for On the other hand, when suppressing the size of the test data Td in order to reduce the cost, the operation verification is performed based on a configuration different from the data configuration of the actual operation environment, and the accuracy of the software operation verification decreases. There is.

  In addition, when the size of the test data Td is large, the verification device 100 stores the test data Td in the large-capacity storage device SD2 connected to the verification device 100 via communication as shown in FIG. The verification process is performed by accessing SD2. When the storage device SD2 is accessed via communication, the access processing takes time, and the time taken for the verification processing also increases.

[Overview of this embodiment]
Therefore, the verification device 100 according to the present embodiment stores the test data Td generated based on the master data Md in the first storage unit (such as the storage device SD). Further, the verification device 100 specifies the position of the data read out when the program to be verified (software to be verified) 20 executes the process using the generated test data Td among the test data Td. Then, the verification device 100 extracts data corresponding to the specified position from the test data Td, stores the data in the second storage unit (auxiliary storage device 202), and based on the data stored in the second storage unit. Execute verification processing.

  FIG. 5 is a flowchart for explaining an outline of verification in the present embodiment.

  S1: The verification device 100 stores the test data Td generated based on the master data Md in the storage device SD or the like before execution of the verification process, and the test target software 20 of the test data Td executes the test data Td. Identify the location of the read data.

  The verification apparatus 100 executes, for example, the test data Td generation process F1 and the verification process F2 described in FIG. 2 before executing the verification process. Then, the verification device 100 specifies, among the data included in the test data Td, the data read out in the verification process F2.

  S2: When executing the verification process, the verification device 100 extracts data corresponding to the position specified in step S1 from the test data Td, and stores the data in a storage area such as the auxiliary storage device 202 in the verification device 100. Do.

  S3: The verification device 100 executes verification processing F2 based on the data stored in the storage area. At the time of execution of the verification process F2, data read by the software 20 to be verified is stored in the storage area. Therefore, the verification device 100 can verify the reading and writing on the data by the software 20 to be verified. On the other hand, data not read out by the software 20 to be verified is not stored in the storage area, but is not necessarily read out, so it need not necessarily be stored in the storage area.

  As described above, the verification device 100 according to the present embodiment specifies in advance the data read out at the time of execution of the verification process F2, selectively stores the specified data in the storage area, and performs verification based on the stored data. Implement the process. The data read out in the verification process F2 is a part of test data Td. Thereby, the verification device 100 can suppress the volume of data stored in the storage area at the time of the verification process F2.

  Therefore, even in the case of performing verification processing using large-capacity test data Td similar to the operation environment, it is possible to reduce the cost of verification by suppressing the capacity of the storage area used for verification processing. . Therefore, the verification device 100 can suppress the decrease in the accuracy of the operation verification by suppressing the cost of the operation verification of the software 20.

  In addition, since the capacity of data stored in the storage area can be reduced, the verification device 100 can store test data Td used for verification processing in a storage area (local storage area) in the verification device 100. The access speed to the local storage area is faster than the access speed to the storage device SD (FIG. 1, FIG. 2). Therefore, the verification apparatus 100 can perform the verification process at higher speed using the data stored in the local storage area, and can reduce the time required for the verification process.

  Further, at the time of execution of verification process F2, verification device 100 in the present embodiment does not write to data not stored in the storage area (that is, data not read out during verification process F2). As a result, the time taken for writing can be shortened, so the verification device 100 can further reduce the time taken for execution of the verification process.

[Hardware Configuration of Verification Device 100]
FIG. 6 is a hardware configuration diagram of the verification device 100 (FIGS. 1 and 2) in the present embodiment. The verification device 100 includes, for example, a central processing unit (CPU) 101, a memory 102 including a main memory 201, an auxiliary storage device 202, and the like, a communication interface unit 103, and an external interface unit 104. The respective parts are connected to one another via a bus 106.

  The CPU 101 is connected to the memory 102 and the like via the bus 106 and controls the entire verification device 100. The communication interface unit 103 connects to another device (not shown) via the Internet or the like. A main memory 201 indicating a random access memory (RAM) or the like stores data to be processed by the CPU 101. Also, the external interface unit 104 is connected to the storage device SD or the like (FIG. 1, FIG. 2).

  The auxiliary storage device 202 includes an area (not shown) for storing a program of an operating system executed by the CPU 101. The auxiliary storage device 202 further includes a software program storage area 20, a driver program storage area 10, and a test program storage area 30. The auxiliary storage device 202 also has a read area table storage area 60, an excerpted test data storage area Tdx, and an address conversion table storage area 70. The auxiliary storage device 202 indicates a hard disk drive (HDD), a non-volatile semiconductor memory, or the like.

  The software program in the software program storage area 20 (hereinafter referred to as the software program 20) implements the processing of the software program (software to be verified) 20 by execution of the CPU 101. As described above, the software program 20 is, for example, DBMS software.

  The test program in the test program storage area 30 (hereinafter referred to as the test program 30) realizes the processing of the test program 30 by the execution of the CPU 101. The test program 30 outputs, to the software program 20, the start and end of each of the processes F1 and F2 and an instruction of the access process in each of the processes F1 and F2.

  The driver program (hereinafter referred to as a driver program 10) in the driver program storage area 10 realizes an access process to the storage device SD and the like by the execution of the CPU 101. In response to an access instruction such as a read instruction or a write instruction by the software program 20, the driver program 10 performs processing corresponding to the instruction and outputs the processing result to the software program 20. The details of the driver program 10 will be described later according to the software block diagram of FIG.

  For example, a user who performs a verification process of the software program 20 replaces the driver program 10 that the operation system (not shown) has at the time of verification with the driver program 10 in the present embodiment.

  The read area table (hereinafter referred to as a read area table 60) of the read area table storage area 60 is a table generated and referred to by the driver program 10. The read area table 60 is a table having, among data included in the test data Td (FIG. 4), information specifying data to be read by the software program 20 in the verification process F2. Details of the lead area table 60 will be described later with reference to FIG.

  The extraction test data (hereinafter, extraction test data Tdx) of the extraction test data storage area Tdx selects the data to be read by the software program 20 in the verification process F2 among the data possessed by the test data Td (FIG. 4) Data that the Details of the excerpted test data Tdx will be described later with reference to FIG.

  The address conversion table (hereinafter referred to as the address conversion table 70) of the address conversion table storage area 70 corresponds to an address in the test data Td of each data included in the excerpt test data Tdx and an address in the excerpt test data Tdx. Have information. Details of the address conversion table 70 will be described later with reference to FIG.

[Read area table 60]
FIG. 7 is a diagram showing an example of the read area table 60 shown in FIG. As described above, the read area table 60 has information for identifying data to be read out in the verification process F2 among data included in the test data Td. In other words, the read area table 60 has information for identifying, among the storage areas where the test data Td is stored, the storage area targeted by the software program 20 for the read command.

  The read area table 60 shown in the example of FIG. 7 has a block number (0 to N) corresponding to the offset from the start position of the test data Td and a read flag indicating whether or not the data of the block number is read. And have a value.

  The block number is identification information of the block bk obtained by dividing the area of the storage device SD2 in which the test data Td is stored into an area of a predetermined size. In the present embodiment, in order to simplify the description, the case where the size of the block bk is the same as the size of each data included in the test data Td is illustrated. In the example of FIG. 7, block numbers “0”, “1”, and “2” are referred to in order from the top block bk of the test data Td.

  According to the example of FIG. 7, the read flags of the block numbers “0”, “1”, “5”, “64”, “287”, “289”, and “290” have the value “ON”. This is because the data stored in the area of the block numbers “0”, “1”, “5”, “64”, “287”, “289”, “290” is a software program during the verification process F2. Indicates that it is read out by 20.

[Excerpt test data Tdx]
FIG. 8 is a diagram showing an example of part of the excerpted test data Tdx shown in FIG. The excerpt test data Tdx shown in FIG. 8 is a part of data, and the excerpt test data Tdx actually has a large amount of data.

  The excerpted test data Tdx has, among the data included in the test data Td shown in FIG. 4, data read out in the verification process F2. In other words, among the data included in the test data Td, the extracted test data Tdx has data stored in the area of the block number having the read flag “ON” on the read area table 60 illustrated in FIG. 7.

  According to the read area table 60 shown in FIG. 7, for example, the value of the read flag of the data stored in the area of the block numbers “0” “1” “5” indicates “ON”. Therefore, according to the example of FIG. 8, the extracted test data Tdx is identification information “1” stored in the area of the block numbers “0” “1” “5” among the data included in the test data Td (FIG. 4). It has data of "2" and "6". Further, although not shown in FIG. 8, the excerpted test data Tdx has data of the area of the block number in the same manner for the block numbers whose other read flags are “ON”.

  According to the example of FIG. 8, the excerpt test data Tdx is not the target of reading in the verification process F2, and data of identification information "3" to "5" stored in the area of block numbers "2" to "4" Do not have. Therefore, for example, the offset in the test data Td of the data of the identification information “6” is different from the offset in the excerpted test data Tdx.

  Therefore, driver program 10 converts the target address (the address in test data Td) of the access request received from software program 20 into the address in excerpted test data Tdx according to address conversion table 70 shown in FIG.

[Address conversion table 70]
FIG. 9 is a diagram showing an example of the address conversion table 70 shown in FIG. The address conversion table 70 includes the address (offset) in the test data Td (FIG. 4) and the address (offset) in the excerpt test data Tdx (FIG. 8) of each data included in the excerpt test data Tdx shown in FIG. It has correspondence information with.

  The correspondence information indicated by the arrow 70-1 in FIG. 9 is, for example, the offset "0x2a00000" in the test data Td and the offset "0x1000000" in the excerpt test data Tdx of the data of the identification information "6" shown in FIG. Indicates The address conversion table 70 similarly applies the address in the test data Td of the data and the excerpt test to the other data (for example, the data of the identification information “1” and “2” etc.) included in the excerpt test data Tdx. It has correspondence information with an address in data Tdx.

[Software Block of Verification Device 100]
FIG. 10 is a block diagram of software blocks of the driver program 10 of the verification device 100 shown in FIG. The driver program 10 includes, for example, a control module 111, an access module 112, a read area table generation module 113, and an excise test data generation module 114.

  The control module 111 controls each of the modules 112-114. The access module 112 receives an access instruction from the software program 20, and performs access processing to the master data Md, the test data Td, and the excerpt test data Tdx according to the processes F1 and F2 to be executed and the access instruction. Further, the access module 112 refers to the address conversion table 70, converts the address according to the address, and performs access processing based on the converted address.

  The read area table generation module 113 specifies an area in the test data Td read out in the verification process F2 among the data included in the test data Td (FIG. 4), and generates the read area table 60 (FIG. 7). . Details of the processing of the read area table generation module 113 will be described later according to the flow chart of FIG.

  The extracted test data generation module 114 generates the extracted test data Tdx (FIG. 8) and the address conversion table 70 (FIG. 9) based on the read area table 60 (FIG. 7) and the test data Td (FIG. 4). Do. Details of the processing of the excerpted test data generation module 114 will be described later according to FIG.

[Flow of verification]
FIG. 11 is a flowchart for explaining the flow of verification of the software program 20 in the present embodiment.

  S11: The verification device 100 performs a first preparation step. The first preparation step includes a test data Td generation process F1-1 (not shown in FIG. 11) and a verification process F2-1 (not shown in FIG. 11) of the software program 20 using the test data Td. Do.

  The verification device 100 generates the test data Td in accordance with the test data Td generation process F1-1, and generates the read area table 60 in accordance with the verification process F2-1. The details of the process of step S11 will be described later according to FIGS.

  S12: The verification device 100 performs a second preparation step. The second preparation step generates excerpted test data Tdx and an address conversion table 70 based on the read area table 60 and the test data Td. The details of the process of step S12 will be described later according to FIGS.

  The extracted test data Tdx and the address conversion table 70 thus generated are stored, for example, in the auxiliary storage device 202 of the verification device 100 that performs the verification step (S13). The present embodiment exemplifies a case where the verification device 100 performing the first and second preparation steps is the same as the verification device 100 performing the verification step (S13).

  S13: The verification device 100 performs a verification process. In the verification process, test data Td generation process F1-2 (not shown in FIG. 11) and software program 20 verification process F2-2 (not shown in FIG. 11) are performed. The details of the process of step S13 will be described later according to FIGS.

(Test data Td generation process F1-2)
The verification apparatus 100 has already generated excerpted test data Tdx used for verification processing in accordance with step S12. However, as described above with reference to FIG. 1, the verification apparatus 100 appropriately operates the reading of a large amount of data and the writing of a large amount of data by the verification target software 20 through the test data Td generation process. To verify. Therefore, the verification device 100 also performs test data Td generation processing F1-2 in the verification step (S13).

  Further, when performing verification processing using test data Td similar to the actual operation environment, it is desirable that master data Md that is the source of test data Td include a large amount of data similar to the operation environment. However, as the capacity of the master data Md increases, the overhead at the time of reading the master data Md increases, and the time for reading the master data Md increases. That is, the time taken to generate the test data Td increases.

  When the master data Md is stored in the storage device SD1 connected to the verification apparatus 100 via communication as in the present embodiment, the time taken to read the master data Md becomes even longer, and the test is performed. The time taken to generate data Td increases.

  Therefore, in the test data Td generation process F1-2 in the verification step S13, the following process is performed. The driver program 10 notifies the software program 20 of the completion of an instruction in response to a read instruction of the master data Md by the software program 20 and a read instruction for the test data Td. That is, the driver program 10 returns control to the software program 20 without performing processing in response to a read instruction for the master data Md and a read instruction for the test data Td.

  As a result, the driver program 10 can omit the reading of the master data Md and the writing of the test data Td, and the time required for the test data Td generation process F1-2 can be shortened. By shortening the time of the test data Td generation process F1-2, the driver program 10 can reduce the time required for the verification process. For example, in the case of the software program 20 in which failure correction, function addition, and the like occur frequently, the software program 20 can be provided more efficiently and easily by shortening the time required for verification processing.

(Verification process F2-2)
In the verification process F 2-2 in the verification step S 13, the verification device 100 performs a verification process of the software program 20 based on the extracted test data Tdx stored in the auxiliary storage device 202 and the address conversion table 70.

  Therefore, the driver program 10 responds to a read instruction of data (corresponding to position information) read in the verification process F2 by the software program 20, and the target data of the read instruction is transmitted to the second storage unit (auxiliary storage device It reads from the storage area of 202 etc.). Alternatively, the driver program 10 writes the target data of the write instruction in the second storage unit in response to the write instruction for the data read in the verification process F2. Then, the driver program 10 notifies the software program 20 of the completion of the instruction.

  That is, the driver program 10 processes an instruction in response to a read instruction or a write instruction for data included in the excerpted test data Tdx, and notifies the software program 20 of the completion of the instruction.

  Further, the driver program 10 notifies the software program 20 of the completion of the instruction in response to the write instruction for the data other than the data (corresponding to the position information) read (corresponding to the position information) by the software program 20 in the verification process F2. That is, the driver program 10 notifies the completion of the instruction to the software program 20 without processing the instruction in response to the write instruction for the data not included in the excerpted test data Tdx.

  In this manner, the driver program 10 returns control to the software program 20 without writing in response to a write instruction for data not included in the excerpted test data Tdx. Thereby, the driver program 10 realizes verification of the software program 20 based on the excerpted test data Tdx having only a part of the test data Td.

  In addition, by not writing data not included in the excerpt test data Tdx, the time required for writing can be shortened. Therefore, the verification device 100 can further reduce the time required to execute the verification process.

(When the verification is repeated)
The verifier of the software program 20 executes the first preparation step (S11) and the second preparation step (S12) once, and performs the verification step (S13) by adding the function of the software program 20, correcting a fault, etc. Perform the regression test each time. That is, the verifier uses the excerpted test data Tdx and the address conversion table 70 generated according to the first preparation step (S11) and the second preparation step (S12) once to repeat the repetition of the software program 20. Verification (S13) is performed.

  As described above, the verification apparatus 100 repeats the execution of the verification process based on the data stored by extracting the data read out when the software program 20 executes from the test data Td.

  Therefore, the extraction test data Tdx and the address conversion table 70 need only be generated once for a given software program 20. As a result, the verification device 100 can omit the generation process of the excerpted test data Tdx and the address conversion table 70 after the second time, so that the time required for verification can be shortened. Therefore, the capacity of the storage area used for the verification process can be suppressed, and the software program 20 can be verified more efficiently and easily.

  The master data Md is, for example, another storage area different from the storage area (auxiliary storage device) 202 included in the verification device 100, and another storage area (access storage is slower than the access speed to the storage area (storage It is stored in the device SD1). On the other hand, since the excerpted test data Tdx has a smaller capacity than the test data Td, it can be stored in the storage area of the verification device 100. Therefore, the verification device 100 can perform the verification process at high speed based on the excerpt test data Tdx stored in the storage area located in the verification device 100.

  Next, according to FIGS. 12 to 19, details of each step of steps S <b> 11 to S <b> 13 described in FIG. 11 will be sequentially described. First, the first preparation step (S11) will be described according to FIGS.

[Outline of First Preparation Step (S11 in FIG. 11)]
FIG. 12 is a diagram schematically illustrating the process of the first preparation step (S11 of FIG. 11). In FIG. 12, the same components as those shown in FIG. 2 are indicated by the same symbols. FIG. 12 shows the test data Td generation process F1-1 and the verification process F2-1 of the software program 20 using the generated test data Td in the first preparation process (step S11).
(Test data Td generation process F1-1)
The verification device 100 generates test data Td based on the data dd read from the master data Md as described in FIG.

  The test program 30 outputs a read command for the master data Md to the driver program 10 (x2) via the software program 20 (x1). In response to the received read command, the driver program 10 reads the master data Md stored in the storage device SD1 (x3), and outputs the read data dd to the test program 30 via the software program 20 (x2). Do it (x1).

  The test program 30 processes the data dd read from the master data Md as necessary, and outputs a write command for the test data Td of the data dd to the driver program 10 through the software program 20 (x4) (x5 ). In response to the received write command, the driver program 10 writes the data dd in the test data Td stored in the storage device SD2 (x6).

  Similarly, the driver program 10 performs access processing to the master data Md and the test data Td in accordance with an instruction received from the software program 20 according to the test program 30 (x11 to x16). The driver program 10 generates test data Td by repeating this access process.

  When the generation of the test data Td is completed, the driver program 10 copies and saves the generated test data Td in preparation for the update of the test data Td accompanying the subsequent verification process F2-1 (not shown). ). Specifically, the driver program 10 saves the pre-update test data Td for use in the process of generating the excerpted test data Tdx (S12 in FIG. 11).

(Verification process F2-1)
The verification apparatus 100 performs verification processing of the software program 20 according to a predetermined verification item, using the generated test data Td.

  The test program 30 outputs an access instruction (read instruction, write instruction) of the test data Td to the driver program 10 via the software program 20 (y1, y4, y11, y14) according to the verification content (y2) , Y5, y12, y15). In response to the received access command, the driver program 10 performs processing corresponding to the access command on target data of the test data Td stored in the storage device SD2 (y3, y6, y13, y16).

  According to the example of FIG. 12, the driver program 10 reads the data of the areas a1 and a2 in the test data Td (y3, y13). Further, the driver program 10 writes data to the area a2 in the test data Td (y6), and writes data to the area a3 (y16). According to the example of FIG. 12, in the verification process F2-1, although writing to the data in the area a3 is performed, reading is not performed.

  Therefore, the driver program 10 specifies data (areas a1, a2, etc.) to be a target of a read instruction among data (areas) included in the test data Td. Then, the driver program 10 generates the read area table 60 in which the read flag of the block numbers “0” and “1” corresponding to the areas a1 and a2 is set to the value “ON” (y17), and stores it in the storage device SD2. Do.

[Details of Process of First Preparation Step (S11 in FIG. 11)]
FIG. 13 is a flowchart for explaining the details of the process of the first preparation step (S11 in FIG. 11).

  S21: The verification device 100 generates the test data Td based on the data dd read from the master data Md as the test data Td generation process F1-1 as described in FIG. 2 and stores the test data Td in the storage device SD2. . Details of the process of the driver program 10 in step S21 will be described later with reference to the flowchart of FIG.

  S22: When receiving the completion notice of the test data Td generation process from the test program 30, the control module 111 of the driver program 10 copies the generated test data Td and saves it. As described above, the control module 111 copies and saves the test data Td in preparation for updating the test data Td in the subsequent step S23.

  S23: The verification device 100 performs verification processing of the software program 20 using the generated test data Td as verification processing F2-1.

  As described in FIG. 12, the access module 112 of the driver program 10 performs an access process on the test data Td in response to the access instruction (read instruction, write instruction) received from the software program 20.

  At this time, the read area table generation module 113 generates a read area table 60 (FIG. 7) and stores it in the storage device SD2. The read area table generation module 113 may store the read area table 60 in the auxiliary storage device 202 in the verification device 100.

  Next, the details of the process of step S23 will be described according to the flow chart of FIG.

[(S23 in FIG. 13) generation process of the lead area table 60]
FIG. 14 is a flowchart for explaining the details of the process of step S23 of FIG.

  S31: When receiving the access instruction from the software program 20, the control module 111 of the driver program 10 acquires the type of the access instruction.

  S32: The control module 111 determines whether the acquired type is a read command.

  S33: If it is determined that the command is a read command (Yes in S32), the read area table generation module 113 acquires the parameters (offset, size) of the read command. Then, the read area table generation module 113 acquires (specifies) the block number corresponding to the target area of the read command based on the offset and the size.

  S34: The read area table generation module 113 sets the read flag in the read area table 60 corresponding to the acquired (specified) block number to the value “ON”.

  Specifically, when a read command for data of identification information “1” is received, the read area table generation module 113 corresponds to the data of identification information “1” as position information in test data Td of the data to be read. Identify the block number "0". Then, the read area table generation module 113 sets the read flag in the read area table 60 corresponding to the block number “0” to the value “ON”. The same applies to the case where data in other areas are read out.

  S35: The access module 112 executes a read instruction.

  S36: The access module 112 sets a return value (return value) of the processing of the read instruction, and returns control to the software program 20 that has called the read instruction.

  S37: On the other hand, when it is determined that the type acquired in step S31 is a write command (No in S32), the access module 112 executes the write command.

  S38: The access module 112 sets a return value (return value) of the processing of the write command, and returns control to the software program 20 that has called the write command.

  Next, the second preparation step (S12 in FIG. 11) will be described according to FIGS. First, the outline of the second preparation process will be described according to FIG.

[Overview of Second Preparation Step (S12 in FIG. 11)]
FIG. 15 is a diagram schematically illustrating the outline of the process of the second preparation step (S12 of FIG. 11). In FIG. 15, the same components as those shown in FIG. 12 are indicated by the same symbols. FIG. 15 shows generation processing of the excerpted test data Tdx and the address conversion table 70 in the second preparation step.

  According to the present embodiment, in the read area table 60, the read flag of the block number ("0", "1", etc.) corresponding to the area (areas a1, a2, ..., ak etc.) has the value "ON". It has the information to the effect. Therefore, as shown in FIG. 15, the excerpt test data generation module 114 of the driver program 10 has data of an area (areas a1, a2,..., Ak, etc.) among data included in the saved test data Td. Generate test data Tdx.

  The data read out in the verification process F-2 is part of data of the test data Td. Further, the data read out in the verification process F-2 indicates, depending on the contents of verification, data of a part of data included in the test data Td. Therefore, depending on the contents of the verification, the capacity of the excerpted test data Tdx can be largely suppressed with respect to the test data Td.

  Further, the excerpt test data generation module 114 has a correspondence between the address in the test data Td and the address in the excerpt test data Tdx of the data stored in the area (areas a1, a2,..., Ak etc.). , Address conversion table 70 is generated.

[Details of Second Preparation Step (S12 in FIG. 11)]
FIG. 16 is a flowchart for explaining the details of the process of the second preparation step (S12 in FIG. 11).

  S41: The extracted test data generation module 114 generates the extracted test data Tdx (FIG. 8) and the address conversion table 70 (FIG. 9) based on the read area table 60 (FIG. 7) and the test data Td (FIG. 4). Do. Details of the process of step S41 will be described later with reference to the flowchart of FIG.

  S42: The control module 111 of the driver program 10 sets the mode setting to the test data Td generation process F1.

  S43: The control module 111 sets an identification number of a test program for specifying a test case. For example, since the test data Td differs depending on the test case, the excerpted test data Tdx also differs depending on the test case.

  S44: The verifier matches the excerpted test data Tdx and the address conversion table 70 corresponding to the test program for specifying the target test case to the auxiliary storage device 202 (FIG. 6) of the verification device 100 that performs the verification step (S13). Remember.

  Next, according to the flow chart of FIG. 17, the process of generating the excerpted test data Tdx and the address conversion table 70 shown in step S41 will be described.

[(S41 in FIG. 16) excerpted test data Tdx, generation process of address conversion table 70]
FIG. 17 is a flowchart for explaining the generation process (step S41 in FIG. 16) of the excerpt test data Tdx and the address conversion table 70.

  S51: The extracted test data generation module 114 sets the value "1" to the variable "K".

  S52: The extraction test data generation module 114 acquires the value of the read flag of the block number of the variable “K” in the read area table 60.

  S53: The extracted test data generation module 114 determines whether the value of the acquired read flag is the value “ON”.

  S54: When the value is “ON” (Yes in S53), the excerpted test data generation module 114 reads data of the area of the block number of the variable “K” from the test data Td.

  S55: The excerpted test data generation module 114 acquires an offset value from the head position in the test data Td of the data read from the test data Td.

  S56: The extraction test data generation module 114 writes the data read from the test data Td into the extraction test data Tdx.

  S57: The excerpt test data generation module 114 acquires an offset from the start position in the excerpt test data Tdx of the data written to the excerpt test data Tdx in step S56.

  S58: The excerpt test data generation module 114 writes, in the address conversion table 70, correspondence information between the offset in the test data Td and the offset in the excerpt test data Tdx of the data written to the excerpt test data Tdx in step S56 to add).

  For example, as shown in FIG. 9, the excerpt test data generation module 114 obtains the offset “0x2a00000” in the test data Td and the offset “0x1000000” in the excerpt test data Tdx for the data of the identification information “6”. Do. Then, the extracted test data generation module 114 writes the acquired correspondence information of the offset into the address conversion table 70.

  S59: If the value is not “ON” (No in S53), or after step S58, the extraction test data generation module 114 increments the value of the variable “K”.

  S60: The extraction test data generation module 114 determines whether the end of the lead area table 60 has been reached. If the end of the read area table 60 has been reached (Yes in S60), the extracted test data generation module 114 ends the process. On the other hand, when the terminal has not reached the end (No in S60), the extraction test data generation module 114 transitions to step S52.

  Next, the verification step (S13 in FIG. 11) will be described according to FIGS. First, the outline of the verification process will be described according to FIG.

[Overview of Verification Process (S13 in FIG. 11)]
FIG. 18 is a diagram schematically illustrating the outline of the process of the verification step (S13 of FIG. 11). In FIG. 18, the same components as those shown in FIGS. 12 and 15 are indicated by the same symbols. FIG. 18 shows the test data Td generation process F1-2 and the software program 20 verification process F2-2 in the verification step (S13).

(Test data Td generation process F1-2)
The verification device 100 generates test data Td based on the data dd read from the master data Md, as in the first preparation step (S11 in FIG. 11).

  Similar to the first preparation step (S11), the test program 30 outputs a read command for the master data Md (x21) to the driver program 10 via the software program 20 (x22). However, as shown in the example of FIG. 18, in the verification step (S13), in response to the received read command, the driver program 10 performs control without reading the master data Md (x23: dotted line). It returns to the software program 20 (x22).

  Further, the test program 30 outputs a write instruction for the test data Td of the data dd (x24) to the driver program 10 via the software program 20 (x25). Similar to the read command, the driver program 10 returns control to the software program 20 in response to the received write command without performing data write processing on the test data Td (x26: dotted line).

  Similarly, the driver program 10 returns control to the caller without performing a read instruction for the master data Md and a write instruction for the test data Td (x31 to x36).

  As a result, the driver program 10 can omit the reading of the master data Md and the writing of the test data Td, and the time required for the test data Td generation process F1-2 can be shortened.

(Verification process F2-2)
The verification device 100 verifies the software program 20 in the same manner as the first preparation step (S11 in FIG. 11). However, in the verification step S13, the verification device 100 performs the verification process of the software program 20 based on the extracted test data Tdx stored in the auxiliary storage device 202 and the address conversion table 70.

  As described above with reference to FIG. 11, the driver program 10 performs the processing according to the instruction in response to the read instruction or the write instruction for the data read in the verification process F2, and then completes the instruction program. Notify On the other hand, the driver program 10 notifies the software program 20 of the completion of the instruction without performing processing in response to the write instruction for the data that is not read. Thereby, the driver program 10 realizes verification of the software program 20 based on the excerpted test data Tdx having only a part of the test data Td.

  Specifically, the test program 30 outputs an access instruction (read instruction, write instruction) of the test data Td to the driver program 10 via the software program 20 (y21, y24, y31, y34) (y22, y25) , Y32, y35). In the verification step S13, in response to the received access instruction, the driver program 10 performs processing according to the access instruction when the address of the target of the access instruction indicates data to be read out in the verification processing F2.

  In the present embodiment, the address (the address of the area a1, a2 in the test data Td) of the target of the access instruction (y22, y25, y32) received from the software program 20 is the data read out in the verification process F2. Show. Therefore, based on the address conversion table 70, the driver program 10 converts the target address of the access instruction (the address of the areas a1 and a2 in the test data Td) into the address of the excerpt test data Tdx. Then, the driver program 10 performs access processing for the converted address (y23x, y26x, y33x).

  As described above, the driver program 10 responds to a read command of data (corresponding to position information) read in the verification process F2, and converts the target address of the read command into the address of the corresponding second storage unit. Read out the target data from the converted address. Alternatively, the driver program 10 responds to a write instruction for data read in the verification process F2, converts the target address of the write instruction into the address of the corresponding second storage unit, and converts the target data after conversion. Write to

  Thus, the driver program 10 converts the address of the target of the access instruction received from the software program 20 into the address of the excerpt test data Tdx. Thereby, the driver program 10 can realize verification of the software program 20 based on the excerpted test data Tdx having only a part of the test data Td.

  On the other hand, the target address of the write command (y35) received from the software program 20 is the address of the area a3 in the test data Td, and does not indicate the data read out in the verification process F2 (y36). Therefore, driver program 10 notifies software program 20 of the completion of the write command in response to the reception of the write command. That is, the driver program 10 returns control to the software program 20 without processing the write command.

  Next, details of the process of the verification step (S13 in FIG. 11) shown in FIG. 18 will be described according to the flowchart of FIG.

[Details of Verification Process (S13 in FIG. 11)]
FIG. 19 is a flowchart for explaining the details of the process of the verification step (S13 of FIG. 11).

  In the case of the test data Td generation process F1-2 in the verification step (S13), the test program 30 designates a dummy address different from the address of the master data Md and the test data Td as the target address of the access instruction.

  S61: The access module 112 of the driver program 10 determines the mode (process) to be executed.

  S62: When the mode indicates the generation process F1 of the test data Td (S61: generation process), the access module 112 determines whether the address to be accessed has a value equal to or more than a dummy address designated in advance. An address having a value greater than or equal to the dummy address indicates that the address is a dummy address.

  S63: The case of the generation process F1-1 of the test data Td in the first preparation step (S11) is shown, in which the access target address is a value smaller than the dummy address (No in S62). Thus, the access module 112 executes the access instruction in response to the access instruction received from the software program 20.

  On the other hand, when the address to be accessed is a value greater than or equal to the dummy address (Yes in S62), the access module 112 does not read the master data Md and write the test data Td. Return control. That is, the access module 112 omits the process of generating the test data Td.

  S64: When the mode indicates the verification process F2 (S61: verification process), the access module 112 determines whether the access instruction received from the software program 20 is a read instruction or a write instruction.

  S65: When the access instruction is a write instruction (S64: write instruction), the access module 112 determines whether the address of the target of the write instruction is included in the address conversion table 70. That is, the access module 112 indicates whether the target address of the write instruction is the address of the data read in the verification process F2-2.

  If the address of the target of the write command is not included in the address conversion table 70 (No in S65), the access module 112 returns control to the software program 20 without processing the write command.

  S66: If the address of the target of the write instruction is included in the address conversion table 70 (Yes in S65), or if the access instruction is a read instruction (S64: read instruction), the access module 112 performs address conversion processing. Do. Specifically, the access module 112 refers to the address conversion table 70 and converts the access target address (the address in the test data Td) into the address of the excerpt test data Tdx.

  S67: The access module 112 executes a read or write instruction of the data in the excerpted test data Tdx according to the converted address.

  Thereby, in response to the access instruction from the software program 20, it becomes possible to access the data in the excerpt test data Tdx targeted by the access instruction. That is, the driver program 10 realizes verification of the software program 20 based on the extracted test data Tdx.

Other Embodiments
The above embodiment exemplifies the case where the excerpted test data Tdx and the address conversion table 70 are stored in the auxiliary storage device 202 of the verification device 100. However, it is not limited to this example. The extracted test data Tdx and the address conversion table 70 may be stored in the storage device SD2 connected to the verification device 100.

  Further, according to the above-described embodiment, the verification device 100 performs the test data Td generation process F1-2 in the verification step (S13). However, the verification apparatus 100 may not execute the test data Td generation process F1-2 itself in the verification step (S13). The verification device 100 may execute only the verification process F2-2, for example, in the verification step (S13).

  The following is a summary of the above embodiment.

(Supplementary Note 1)
On the computer
Storing test data generated based on the master data in the first storage unit;
Identifying, among the test data, a position of data read out when the program to be verified executes a process using the generated test data;
Data corresponding to the specified position is extracted from the test data and stored in the second storage unit;
Executing verification processing based on the data stored in the second storage unit;
A control program characterized in that it performs.

(Supplementary Note 2)
In Appendix 1,
The execution responds to a read command or a write command of data corresponding to the position by the program to be verified, reads target data of the read command from the second storage unit, or targets data of the write command. The completion of the instruction is notified to the program to be verified, and the completion of the instruction is notified in response to a write instruction for data other than the data corresponding to the position by the program to be verified. Notify the verification program,
Control program.

(Supplementary Note 3)
In Appendix 2,
The execution is responsive to a read instruction or a write instruction of data corresponding to the position, and converts the target address of the read instruction into the address of the second storage unit corresponding to the target address, and the target data Is read from the converted address, or the target address of the write instruction is converted to the address of the second storage unit corresponding to the target address, and the target data is written to the converted address, the instruction Informing the program to be verified of
Control program.

(Supplementary Note 4)
In any of Appendices 1 to 3,
The execution notifies the completion of the instruction to the program to be verified in response to a read instruction of the master data by the program to be verified and a write instruction to the test data by the program to be verified.
Control program.

(Supplementary Note 5)
In any of Appendices 1 to 4,
The execution repeats the execution of the verification process based on the data stored in the second storage unit.
Control program.

(Supplementary Note 6)
In any of Appendices 1 to 5,
The access speed to the first storage unit is slower than the access speed to the second storage unit,
Control program.

(Appendix 7)
The processing unit stores test data generated based on the master data in the first storage unit;
The processing unit specifies a position of data read out from the test data when the program to be verified executes a process using the generated test data,
The processing unit extracts data corresponding to the specified position from the test data and stores the data in the second storage unit.
The processing unit executes verification processing based on the data stored in the second storage unit;
Control method.

(Supplementary Note 8)
In Appendix 7,
The execution responds to a read command or a write command of data corresponding to the position by the program to be verified, reads target data of the read command from the second storage unit, or targets data of the write command. The completion of the instruction is notified to the program to be verified, and the completion of the instruction is notified in response to a write instruction for data other than the data corresponding to the position by the program to be verified. Notify the verification program,
Control method.

(Appendix 9)
In Appendix 8,
The execution is responsive to a read instruction or a write instruction of data corresponding to the position, and converts the target address of the read instruction into the address of the second storage unit corresponding to the target address, and the target data Is read from the converted address, or the target address of the write instruction is converted to the address of the second storage unit corresponding to the target address, and the target data is written to the converted address, the instruction Informing the program to be verified of
Control method.

(Supplementary Note 10)
In any of Appendices 7 to 9,
The execution notifies the completion of the instruction to the program to be verified in response to a read instruction of the master data by the program to be verified and a write instruction to the test data by the program to be verified.
Control method.

(Supplementary Note 11)
In any of Appendices 7 to 10,
The execution repeats the execution of the verification process based on the data stored in the second storage unit.
Control method.

(Supplementary Note 12)
In any of Appendices 7 to 11,
The access speed to the first storage unit is slower than the access speed to the second storage unit,
Control method.

(Supplementary Note 13)
A first storage unit,
A second storage unit,
Test data generated based on master data is stored in the first storage unit, and of the test data, data read out when the program to be verified executes processing using the generated test data A position is specified, data corresponding to the specified position is extracted from the test data, stored in the second storage unit, and a verification process is executed based on the data stored in the second storage unit. A processing unit,
A control device having

(Supplementary Note 14)
In appendix 13,
The processing unit responds to a read command or a write command of data corresponding to the position according to the program to be verified, reads target data of the read command from the second storage unit, or target data of the write command. Is written to the second storage unit, the completion of the instruction is notified to the program to be verified, and the instruction is completed in response to a write instruction for data other than the data corresponding to the position by Notify the program to be verified
Control device.

(Supplementary Note 15)
In appendix 14,
The processing unit responds to a read command or a write command of data corresponding to the position, converts a target address of the read command into an address of the second storage unit corresponding to the target address, and The data is read from the converted address, or the target address of the write instruction is converted to the address of the second storage unit corresponding to the target address, and the target data is written to the converted address, Informing the program to be verified that the instruction has been completed,
Control device.

(Supplementary Note 16)
In any of appendices 13 to 15,
The processing unit notifies the verification program of completion of the instruction in response to a read instruction of the master data by the verification program and a write instruction for the test data by the verification program.
Control device.

(Supplementary Note 17)
In any one of appendices 13 to 16,
The processing unit repeats execution of the verification process based on the data stored in the second storage unit.
Control device.

(Appendix 18)
In any one of appendices 13 to 17,
The access speed to the first storage unit is slower than the access speed to the second storage unit,
Control device.

100: verification device, SD1: storage device, SD2: storage device, 10: driver program, 20: software program, 30: test program, Md: master data, Td: test data, Tdx: excerpted test data

Claims (4)

On the computer
Storing test data generated based on the master data in the first storage unit;
Identifying, among the test data, a position of data read out when the program to be verified executes a process using the generated test data;
Data corresponding to the specified position is extracted from the test data and stored in the second storage unit;
Perform verification processing based on the data stored in the second storage unit,
The execution responds to a read command or a write command of data corresponding to the position by the program to be verified, reads target data of the read command from the second storage unit, or targets data of the write command. The completion of the instruction is notified to the program to be verified, and the completion of the instruction is notified in response to a write instruction for data other than the data corresponding to the position by the program to be verified. Notify the verification program,
A control program characterized in that it performs.   On the computer
  Storing test data generated based on the master data in the first storage unit;
  Identifying, among the test data, a position of data read out when the program to be verified executes a process using the generated test data;
  Data corresponding to the specified position is extracted from the test data and stored in the second storage unit;
  Executing verification processing based on the data stored in the second storage unit;
  The execution notifies the completion of the instruction to the program to be verified in response to a read instruction of the master data by the program to be verified and a write instruction to the test data by the program to be verified.
  A control program characterized in that it performs. A first storage unit,
A second storage unit,
Test data generated based on master data is stored in the first storage unit, and of the test data, data read out when the program to be verified executes processing using the generated test data A position is specified, data corresponding to the specified position is extracted from the test data, stored in the second storage unit, and a verification process is executed based on the data stored in the second storage unit. It includes a processing unit, a
The processing unit, in the execution, responds to a read command or a write command of data corresponding to the position by the program to be verified, reads target data of the read command from the second storage unit, or the write The target data of an instruction is written to the second storage unit, the completion of the instruction is notified to the program to be verified, and the instruction is performed in response to a write instruction for data other than the data corresponding to the position by the program to be verified. Informing the program to be verified of
Control device.   A first storage unit,
  A second storage unit,
  Test data generated based on master data is stored in the first storage unit, and of the test data, data read out when the program to be verified executes processing using the generated test data A position is specified, data corresponding to the specified position is extracted from the test data, stored in the second storage unit, and a verification process is executed based on the data stored in the second storage unit. And a processing unit
  The processing unit notifies the verification program of completion of the instruction in response to an instruction to read the master data by the program to be verified and a write instruction to the test data by the program to be verified in the execution. Do,
  Control device.

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