JP6507973B2 - Wafer manufacturing method and system - Google Patents

Description

The present invention prepares a processing wafer made of a semiconductor, and a method of manufacturing a wafer in which processing is performed on the outer surface of the processing wafer, and a production system for controlling such a method of manufacturing a wafer In particular, the present invention relates to a manufacturing method and a manufacturing system capable of performing history management of a processing wafer even when an authentication mark marked on the outer surface of the processing wafer disappears due to a processing step.
About.

  Heretofore, as a method of manufacturing a wafer of this type, the one described in Patent Document 1 has been proposed. In this case, when there is a possibility that the certification mark may disappear on one outer surface of the processing wafer, the certification mark is read and a new certification mark is printed on the other position on the one outer surface. It is a thing.

Japanese Patent Application Laid-Open No. 7-307255

  However, if the authentication mark originally marked on the outer surface of the processing wafer has disappeared due to processing steps such as polishing or other wafer attachment applied to the outer surface of the processing wafer, the processing The history of the processing wafer after the process becomes unknown.

  The present invention has been made in view of the above problems, and even if the authentication mark disappears on the outer surface of one of the processing wafers due to the processing step, the authentication marks are checked back to the initial stage of the processing wafer, An object of the present invention is to provide a method of manufacturing a wafer whose history can be confirmed and a production system for controlling the same.

In order to achieve the above object, in the invention according to claim 1, a step of marking a first authentication mark (M1) for identification on the outer surface (11) of the first wafer (2a);
Storing information of the first authentication mark of the first wafer and information of the outer surface (11) on which the first authentication mark is marked in the storage means (200);
Marking a second authentication mark (M2) for identification on the outer surface (12) of the second wafer (2b);
Storing in the storage means the information of the outer surface (12) on which the second authentication mark of the second wafer and the second authentication mark are marked;
A first bonding step of bonding the first wafer and the second wafer together at opposite surfaces of the outer surface on which the marking is performed;
Storing information of the first authentication mark, the second authentication mark of the multilayer wafer (2) obtained by the first bonding step, and the outer surface (11, 12) on which the marking is performed in the storage means When,
A first processing step of processing one of the front and back outer surfaces (11, 12) of the multilayer wafer to make the first certification mark or the second certification mark disappear;
Marking a third identification mark (M3) for identification on the outer surface of the third wafer (2c);
Storing information of the outer surface of the third wafer on which the third authentication mark and the third authentication mark are marked, in the storage means;
After the first processing, one of the outer surfaces of the multilayer wafer where the first authentication mark or the second authentication mark has disappeared and the opposite surface of the outer surface of the third wafer where the third authentication mark is marked And a second bonding step of bonding
A first certification mark or a second certification mark marked on the outer surface (11, 12) of the processing wafer (10) obtained by the second bonding step, and a third certification mark and a certification mark Storing information of the outer surface in the storage means;
A second processing step of processing the outer surface of the processing wafer after the storing step of the processing wafer ;
When any one of the first to third certification marks marked on any one of the outer surfaces (11) of the front and back of the processing wafer disappears in the second processing step , And a mark deriving step of deriving a extinguished authentication mark on the basis of any one of the first to third authentication marks remaining on the other outer surface (12) by the storage means. .

  According to it, the certification marks are respectively marked on both outer surfaces of the prepared processing wafer, and the certification marks on both outer surfaces are stored as a pair in the storage means, so either one of them is selected by the processing step. Even if the certification mark on the outer surface has disappeared, the history can be traced back to the initial state of the processing wafer by deriving the certification mark which has disappeared on the other outer surface, by the certification mark remaining on the other outer surface. The management from the initial stage to the end of processing can be performed on the wafer for processing.

  Therefore, according to the present invention, even if the authentication mark disappears on one outer surface of the processing wafer due to the processing step, the wafer can check the authentication mark retroactively to the initial stage of the processing wafer and confirm the history. Can provide a manufacturing method of

In the invention according to claim 2, in the manufacturing method according to claim 1, it is derived by the mark deriving step on one outer surface of the processing wafer after the second processing step in which the authentication mark has disappeared. The method is characterized by comprising a re-marking step of re-marking the erased certification mark.

  According to this, it is possible to display the erased certification mark on the outer surface of the processing wafer by re-marking, and the state in which the certification mark is marked on both the front and back outer surfaces of the processing wafer is restored again. Do.

  Then, after that, as in the manufacturing method of claim 1 above, by repeating the processing step and the mark deriving step, the authentication mark disappears in the processing step on either outer surface of the processing wafer. Also, the history can be checked retrospectively to the initial stage of the processing wafer.

In the invention according to claim 3 , the first wafer (2a) having the first authentication mark (M1) for identification marked on the outer surface (11) and the second for identification on the outer surface (12) Preparing a second wafer (2b) marked with a certification mark (M2) and a multilayer wafer (2) bonded on the opposite surface of the outer surface marked,
After performing the first processing on one of the outer surfaces of the front and back of the multilayer wafer, the first authentication mark or the second authentication mark has disappeared due to the first processing of the multilayer wafer The surface and the third wafer (2c) whose outer surface is marked with the third authentication mark (M3) for identification are bonded together on the opposite surface of the marked outer surface to form a processing wafer (10) ,
A production system for controlling a method of manufacturing a wafer, wherein a second processing step of processing the outer surface of a processing wafer is performed, the method comprising:
A storage means (200) for storing information on the outer surface of the first wafer, the second wafer, the multilayer wafer, the third wafer and the processing wafer, and a marking means (102) for marking the outer surface of the processing wafer; Equipped with
The memory means stores both authentication marks on the front and back outer surfaces of the processing wafer, and marks one of the front and back outer surfaces of the processing wafer after the second processing step . when any one of the first to third authentication mark disappeared, the storage means, based on one of the first to third authentication mark remaining on the other external surface plane, wherein disappear It is characterized in that the certification mark is derived.

  According to it, the certification marks are respectively marked on both outer surfaces of the prepared processing wafer, and the certification marks on both outer surfaces are stored as a pair in the storage means, so either one of them is selected by the processing step. Even if the certification mark on the outer surface has disappeared, the history can be traced back to the initial state of the processing wafer by deriving the certification mark which has disappeared on the other outer surface, by the certification mark remaining on the other outer surface. The management from the initial stage to the end of processing can be performed on the wafer for processing.

  Therefore, according to the present invention, even if the authentication mark disappears on one outer surface of the processing wafer due to the processing step, the wafer can check the authentication mark retroactively to the initial stage of the processing wafer and confirm the history. It is possible to provide a production system that controls the manufacturing method of

Here, also in the production system according to claim 3 , as in the invention according to claim 4 , the memory means is provided on one outer surface of the processing wafer after the second processing step where the authentication mark has disappeared. The derived authentication mark may be re-marked by the marking means. According to this, it is possible to provide a production system having the same effect as the production method according to the second aspect.

  In addition, the code | symbol in the parenthesis of each means described in the claim and this column is an example which shows the correspondence with the specific means as described in embodiment mentioned later.

It is a figure which shows typically the production system which controls the manufacturing method of the wafer concerning 1st Embodiment of this invention. It is a schematic plan view which shows the prepared processing wafer concerning the said 1st Embodiment. It is process drawing which shows the manufacturing method of the wafer concerning the said 1st Embodiment. It is process drawing which shows the manufacturing method of the wafer concerning 2nd Embodiment of this invention. It is process drawing which shows the manufacturing method of the wafer concerning 3rd Embodiment of this invention. It is process drawing which shows the manufacturing method of the wafer concerning 4th Embodiment of this invention.

  Hereinafter, an embodiment of the present invention will be described based on the drawings. In the following embodiments, parts identical or equivalent to each other are denoted by the same reference numerals in the drawings in order to simplify the description. Further, in FIGS. 3 to 6, the respective authentication marks M1 to M3 are schematically shown by white circles.

First Embodiment
A production system according to the first embodiment of the present invention will be described with reference to FIG. In FIG. 1, the processing wafer 10 is made of a semiconductor such as silicon in which one of the outer surfaces 11 and 12 of the front and back is one outer surface 11 and the other is the other outer surface 12.

  Here, as shown in FIG. 3 described later, the processing wafer 10 is made of the single layer wafer 1, and one outer surface of the single layer wafer 1 corresponds to one outer surface 11 of the processing wafer. The other outer surface of the single layer wafer 1 corresponds to the other outer surface 12 of the processing wafer.

  The control means 100 includes a reading means 101 for reading information on the outer surfaces 11 and 12 of the processing wafer 10, a marking means 102 for marking the outer surfaces 11 and 12 of the processing wafer 10, and these means 101 and 102. And a control unit comprising a computer (not shown) for controlling. Here, the reading means 101 has a CCD or the like, and the marking means 102 performs marking with a laser or the like.

  The storage unit 200 stores information (specifically, an authentication mark to be described later, a marking surface thereof, and the like) of the outer surfaces 11 and 12 of the processing wafer 10 from the initial stage of processing to the after processing. It consists of. These pieces of information are mainly sent from the reading means 101 to the storage means 200.

  In addition, the storage unit 200 stores information at the time of lot insertion which will be described later, and issues instructions to the reading unit 101 and the marking unit 102 based on the stored information or the like. Furthermore, the storage unit 200 is also configured to store the history of various operations performed by the control unit 100 and various information associated therewith.

  Next, with reference to FIG. 2 and FIG. 3, the manufacturing method of the wafer of this embodiment by the said production system is described.

[Step of FIG. 3 (a): lot input step]
Raw stone lot is subjected to lot input processing in the production system according to the product to be produced. By this lot insertion, a lot ID is generated on the system, and this lot ID is stored in the storage unit 200. One lot consists of an assembly of a plurality of single layer wafers 1, and the lot ID is a unique symbol or number for identifying this assembly.

[Step of FIG. 3 (b), FIG. 2: Marking step of first authentication mark]
Then, the first authentication mark M1 is marked on one outer surface 11 of the processing wafer 10. Specifically, the first authentication mark M1 and the marking surface thereof are indicated from the storage means 200 to the control means 100. Then, the first authentication mark M 1 is marked on one outer surface 11 of the processing wafer 10 by the marking means 102.

  At this time, the fact that the first authentication mark M1 is marked on one outer surface 11 of the processing wafer 10 is stored in the storage unit 200 via the reading unit 101. Here, as shown in FIG. 2, the first authentication mark M1 is marked at the peripheral portion of one outer surface 11 of the processing wafer 10 at a portion opposite to the orientation flat OL.

  Although not limiting, in FIG. 2, the first authentication mark M1 is “1111”. In this case, for example, the first two digits "11" represent the lot ID, and the second two digits "11" represent the identification number of each wafer in the lot.

[Step of FIG. 3 (c): Marking step of second certification mark]
Next, on the other outer surface 12 of the processing wafer 10, the same mark as the first authentication mark M1, for example, "1111" similar to the example of the first authentication mark M1, is marked as the second authentication mark M2.

  Specifically, the second authentication mark M2 and the marking surface thereof are indicated from the storage means 200 to the control means 100. Then, the second authentication mark M2 is marked on the other outer surface 12 of the processing wafer 10 by the marking means 102. At this time, the second authentication mark M2 on the processing wafer 10 and the other outer surface 12 which is the marking surface thereof are stored in the storage means 200.

  The steps shown in FIGS. 3A to 3C correspond to the preparation steps in the present manufacturing method. That is, according to this preparation process, the processing wafer 10 in which the authentication marks M1 and M2 for identification are marked on the front and back outer surfaces 11 and 12 respectively is prepared. At the same time, both authentication marks M1 and M2 on the front and back outer surfaces 11 and 12 of the prepared processing wafer 10 are stored in the storage unit 200.

[Step of FIG. 3 (d): processing step and mark derivation step]
Next, in the processing step, processing is performed on the outer surfaces 11 and 12 of the processing wafer 10. Specifically, in the processing step, the processing is performed on one of the outer surfaces 11 and 12 of the front and back of the processing wafer 10, whereby the authentication mark on the processed outer surface disappears.

  For example, as the processing step, there may be mentioned a polishing step of polishing the outer surfaces 11 and 12 of the processing wafer. Then, in FIG. 3 (d), the first authentication mark M 1 is erased by performing processing on one outer surface 11 of the processing wafer 10 made of the single layer wafer 1, and on the other outer surface 12. The second certification mark M2 is to remain.

  As described above, when the first authentication mark M1 on the outer surface 11 of one of the outer surfaces 11 and 12 of the front and back of the processing wafer 10 after the processing step disappears, in the present manufacturing method, the mark deriving step is performed. .

  In the mark derivation step, the storage means 200 derives the eliminated first authentication mark M1 based on the second authentication mark M2 remaining on the other outer surface 12 of the processing wafer 10. Specifically, the second authentication mark M2 remaining on the other outer surface 12 is collated with the storage means 200, and the first authentication mark M1 eliminated on the one outer surface 11 is derived.

[Step of FIG. 3 (e): re-marking step]
Next, in the present manufacturing method, the first authentication mark M1 derived in the mark deriving step is re-marked on one outer surface 11 where the first authentication mark M1 disappears on the processing wafer 10 after the processing step. .

  Specifically, the derived first authentication mark M1 and its marking surface are instructed from the storage unit 200 to the control unit 100. Then, the marking means 102 remarks the processing wafer 10.

  In this re-marking, the storage means 200 collates the information of the second authentication mark M2 remaining on the processing wafer 10 to be re-marked and the surface on which the second authentication mark M2 remains, It is desirable to send the information to the marking means 102. Then, based on the information, the marking means 102 determines whether the processing wafer 10 to be re-marked from now is correct, and if correct, re-marks.

  By the way, according to the manufacturing method and the production system of the present embodiment, the authentication marks M1 and M2 are marked on both outer surfaces 11 and 12 of the prepared processing wafer 10, respectively, and the authentication marks on both outer surfaces 11 and 12 M1 and M2 are stored in the storage unit 200 as a pair.

  Therefore, even if the authentication mark on one of the outer surfaces 11 and 12 disappears due to the processing step, the authentication mark remaining on the other outer surface is used to derive the erased authentication mark. It becomes possible. By doing so, the history can be traced back to the initial state of the processing wafer 10, and management from the initial stage to the end of the processing of the processing wafer 10 can be performed.

  Therefore, according to the present embodiment, even if the authentication mark disappears on the outer surface of one of the processing wafers 10 in the processing step, the authentication marks are checked back to the initial stage of the processing wafer 10 and the history is It is possible to provide a wafer production method and production system that can be confirmed.

  Further, according to the present embodiment, the authentication mark derived in the mark deriving step can be re-marked, so that the erased authentication mark can be displayed on the outer surface of the processing wafer 10, and again the front and back of the processing wafer 10 The state in which the authentication marks M1 and M2 are marked on both the outer surfaces 11 and 12 is restored.

  In this case, after that, as in the above-described manufacturing method, by repeating the processing step and the mark lead-out step, even if the authentication mark disappears in the processing step on either one of the outer surfaces of the processing wafer 10, The history can be confirmed by going back to the initial stage of the processing wafer 10.

  In the present embodiment, in the processing step, the second authentication mark M2 disappears on the other outer surface 12 of the processing wafer 10 contrary to the above-mentioned FIG. 1 The certification mark M1 may remain. In this case, the mark derivation process may be performed based on the remaining first authentication mark M1, and the second authentication mark M2 may be re-marked on the other outer surface 12.

Second Embodiment
The wafer manufacturing method according to the second embodiment of the present invention will be described with reference to FIG. 4, focusing on the differences from the first embodiment. About the manufacturing method of this embodiment, it controls by the same production system as the said FIG.

  Here, the present embodiment is different from the first embodiment in that, as the processing wafer 10, the one composed of the multilayer wafer 2 formed by bonding the first wafer 2a and the second wafer 2b is used.

[Steps in FIG. 4A and FIG. 4B]
In this step, for the first wafer 2a, the lot insertion step and the marking step of the first authentication mark M1 are performed as in the first embodiment. Thereby, the first wafer 2a on which the first authentication mark M1 is marked is prepared.

[Step of FIG. 4 (c): Bonding step]
On the other hand, with respect to the second wafer 2b as well, the lot insertion step is performed as described above, and the marking step of the second authentication mark M2 is performed. The marking of the second authentication mark M2 on the second wafer 2b is performed in the same manner as the marking of the first authentication mark M1. Thereby, the second wafer 2b marked with the second authentication mark M2 is prepared.

  Here, when the second authentication mark M2 is a mark different from the first authentication mark M1 and the first authentication mark M1 is the above example “1111”, the second authentication mark M2 is, for example, “2222”. Do.

  The first wafer 2a and the second wafer 2b may be produced in the same factory or may be produced in different factories. In any case, information on each authentication mark M1, M2 of each wafer 2a, 2b and its marking surface is stored in storage means 200.

  Then, as shown in FIG. 4C, the first wafer 2a with the first authentication mark M1 marked, the second wafer 2b with the second authentication mark M2 marked, and the opposite of the marking surface On the surface, they are bonded by direct bonding or the like to form the multilayer wafer 2.

  At the stage when the multilayer wafer 2 is formed, the processing wafer 10 of the present embodiment is prepared, and the information on the outer surfaces 11 and 12 of the processing wafer 10 is stored in the storage means 200. Thus, the steps of FIGS. 4A to 4C are the preparation steps of the present embodiment.

  Here, the outer surface on the first wafer 2 a side in the multilayer wafer 2 corresponds to one outer surface 11 of the processing wafer 10, and the outer surface on the second wafer 2 b side is the other outer surface of the processing wafer 10 It corresponds to 12.

  As described above, in the present embodiment, the processing wafer 10 is the multilayer wafer 2. However, as in the first embodiment, in the preparation step, the authentication marks M1 and M2 are respectively formed on the outer surfaces 11 and 12 of the front and back. The marked processing wafer 10 is prepared. At the same time, in the preparation step, both of the authentication marks M1 and M2 on the outer surfaces 11 and 12 on the front and back sides of the prepared processing wafer 10 are stored in the storage means 200.

[Step of FIG. 4 (d): processing step and mark derivation step]
Next, as the processing step, processing such as polishing is performed on the outer surfaces 11 and 12 of the processing wafer 10. Here, in the processing step of FIG. 4D, the first authentication mark M1 disappears on the outer surface of the processing wafer 10 on the side of the first wafer 2a in the processing wafer 10 after the processing step, that is, the second wafer The second authentication mark M2 remains on the outer surface 2b on the 2b side, ie, on the other outer surface 12.

  Then, in the mark deriving step, the eliminated first authentication mark M1 is derived based on the second authentication mark M2 remaining on the other outer surface 12 of the processing wafer 10 after the processing step. Specifically, the second authentication mark M2 remaining on the other outer surface 12 is collated with the storage means 200, and the first authentication mark M1 eliminated on the one outer surface 11 is derived.

[Step of FIG. 4 (e): remarking step]
Next, also in the present manufacturing method, as in the first embodiment, on the one outer surface 11 where the first authentication mark M1 on the processing wafer 10 after the processing step has disappeared, (1) The certification mark M1 is remarked by the marking means 102.

  As described above, also by the manufacturing method and the production system of the present embodiment, after the authentication marks M1 and M2 of both outer surfaces 11 and 12 of the processing wafer 10 before processing are stored in the storage unit 200, after the processing step Even if the authentication mark on one of the outer surfaces has disappeared, the authentication mark remaining on the other outer surface makes it possible to derive the lost authentication mark.

  Therefore, even in the present embodiment, even if the authentication mark disappears on the outer surface of one of the processing wafers 10 in the processing step, the authentication marks are checked to the initial stage of the processing wafer 10 and the history is confirmed. It is possible to provide a method and system for producing a wafer that can be used. Moreover, the effect by re-marking is the same as that of the said 1st Embodiment by this embodiment.

  Also in the present embodiment, in the processing step, the second authentication mark M2 disappears on the other outer surface 12 of the processing wafer 10 made of the multilayer wafer 2 contrary to the above-mentioned FIG. The first authentication mark M1 may remain on the outer surface 11. Also in this case, the mark deriving process may be performed based on the remaining first authentication mark M1, and the second authentication mark M2 may be re-marked on the other outer surface 12.

Third Embodiment
The method of manufacturing a wafer according to the third embodiment of the present invention is a modification of the second embodiment, and the present manufacturing method will be described with reference to FIG. 5, focusing on differences from the second embodiment. Describe. The manufacturing method of the present embodiment is also controlled by the same production system as that of FIG.

  Also in this embodiment, as the processing wafer 10, a wafer made of the multilayer wafer 2 in which the first wafer 2a and the second wafer 2b are bonded is used. Here, in the second embodiment, as shown in FIGS. 4A and 4B, the second wafer 2b is attached to the lower surface of the first wafer 2a, and the first authentication mark M1 is It was to be marked on the upper surface of the first wafer 2a.

  On the other hand, in the present embodiment, as shown in FIGS. 5A and 5B, the second wafer 2b is attached to the upper surface of the first wafer 2a, and the first authentication mark M1 is the first The lower surface of the wafer 2a is marked.

[Steps of FIG. 5 (a) and FIG. 5 (b)]
In this step, the lot insertion step and the marking step of the first authentication mark M1 are performed on the first wafer 2a as described above. Thereby, the first wafer 2a on which the first authentication mark M1 is marked is prepared.

[Step of FIG. 5 (c): Bonding step]
On the other hand, in the same manner as described above, the lot insertion process is performed on the second wafer 2b as in the second embodiment, and the marking process of the second authentication mark M2 is performed.

  As a result, the second wafer 2b on which the second authentication mark M2 as a mark different from the first authentication mark M1 is marked is prepared. Then, as in the second embodiment, the information on the authentication marks M1 and M2 of the wafers 2a and 2b and the marking surface thereof is stored in the storage unit 200.

  And also in this embodiment, as shown in FIG. 5C, the first wafer 2a marked with the first authentication mark M1 and the second wafer 2b marked with the second authentication mark M2 mutually The multilayer wafer 2 is formed by direct bonding or the like on the surface opposite to the marking surface.

  At the stage when the multilayer wafer 2 is formed, the processing wafer 10 of the present embodiment is prepared, and the information on the outer surfaces 11 and 12 of the processing wafer 10 is stored in the storage means 200. Thus, the steps of FIGS. 5A to 5C are the preparation steps of the present embodiment.

  Thus, also in the present embodiment, the processing wafer 10 is the multilayer wafer 2 as in the second embodiment, but in the preparation step, the authentication marks M1 and M2 are respectively marked on the outer surfaces 11 and 12 of the front and back. The processing wafer 10 is prepared. At the same time, both authentication marks M1 and M2 on the front and back outer surfaces 11 and 12 of the prepared processing wafer 10 are stored in the storage means 200.

[Step of FIG. 5 (d): processing step and mark derivation step]
Next, as in the second embodiment, when the processing step is performed, as shown in FIG. 5D, on the one outer surface 11 of the processing wafer 10 after the processing step on the first wafer 2a side, The first authentication mark M1 disappears, and the second authentication mark M2 remains on the other outer surface 12 on the second wafer 2b side.

  Then, as in the second embodiment, in the mark deriving step, the eliminated first authentication mark M1 is based on the second authentication mark M2 remaining on the other outer surface 12 of the processing wafer 10 after the processing step. derive.

[Step of FIG. 5 (e): re-marking step]
Next, as in the second embodiment, on one outer surface 11 where the first authentication mark M1 on the processing wafer 10 after the processing step has disappeared, the first authentication mark M1 derived in the mark deriving step is The marking means 102 remarks.

  The manufacturing method of this embodiment is above. As described above, the same effects as those described in the second embodiment can be exhibited by the manufacturing method of the present embodiment and the production system that controls the same.

Fourth Embodiment
The method of manufacturing a wafer according to the fourth embodiment of the present invention is a modification of the second embodiment, and the present manufacturing method will be described with reference to FIG. 6, focusing on the differences with the second embodiment. Describe. The manufacturing method of the present embodiment is also controlled by the same production system as that of FIG.

  Also in the present embodiment, as in the second embodiment, as the processing wafer 10, one formed of the multilayer wafer 2 in which the first wafer 2a and the second wafer 2b are bonded is used.

[Steps of FIG. 6 (a) and FIG. 6 (b)]
In this step, a lot insertion step and a marking step of the first authentication mark M1 are performed on the first wafer 2a as in the second embodiment. Thereby, the first wafer 2a on which the first authentication mark M1 is marked is prepared.

[Step of FIG. 6 (c): Bonding step]
On the other hand, in the same manner as described above, the lot insertion process is performed on the second wafer 2b as in the second embodiment, and the marking process of the second authentication mark M2 is performed.

  Also in the present embodiment, as shown in FIG. 6C, the first wafer 2a marked with the first authentication mark M1 and the second wafer 2b marked with the second authentication mark M2 are mutually different. The multilayer wafer 2 is formed by direct bonding or the like on the surface opposite to the marking surface.

  At the stage when the multilayer wafer 2 is formed, the processing wafer 10 of the present embodiment is prepared, and the information on the outer surfaces 11 and 12 of the processing wafer 10 is stored in the storage means 200. Thus, the steps of FIGS. 6A to 6C are the preparation steps of this embodiment.

  Thus, also in the preparation step of this embodiment, as in the second embodiment, the processing wafer 10 made of the multilayer wafer 2 with the authentication marks M1 and M2 marked on the outer surfaces 11 and 12 of the front and back is prepared. In addition, both authentication marks M1 and M2 of the outer surfaces 11 and 12 on the front and back sides of the prepared processing wafer 10 are stored in the storage means 200.

[Steps in FIG. 6 (d), FIG. 6 (e), and FIG. 6 (f): processing step and mark derivation step]
Next, as in the second embodiment, when the processing step is performed, as shown in FIG. 6D, on the one outer surface 11 of the processing wafer 10 after the processing step on the first wafer 2a side, The first authentication mark M1 disappears, and the second authentication mark M2 remains on the other outer surface 12 on the second wafer 2b side.

  Thereafter, in the processing step of the present embodiment, as shown in FIG. 6E, the third wafer 2c is further bonded and attached to one outer surface 11 of the processing wafer 10. The third authentication mark M3 is marked on the surface of the third wafer 2c opposite to the bonding surface.

  For the third wafer 2c, the lot insertion step is performed as described above, and the marking step of the third authentication mark M3 is performed. The marking of the third authentication mark M3 on the third wafer 2c is performed in the same manner as the marking of the first authentication mark M1. Thereby, the third wafer 2c with the third authentication mark M3 marked is prepared.

  Here, the third authentication mark M3 is a mark different from the first authentication mark M1 and the second authentication mark M2, the first authentication mark M1 is the above example “1111”, and the second authentication mark M2 is the above. In the example “2222”, for example, the third authentication mark M3 is set to “3333”.

  Also in the present embodiment, the first wafer 2a, the second wafer 2b, and the third wafer 2c may be produced in the same factory, or may be produced in different factories. However, each authentication mark M1, M2, M3 of each wafer 2a, 2b, 2c and information of its marking surface is stored in the storage means 200.

  Thus, in the processing step of the present embodiment, as shown in FIG. 6E, the second wafer 2b and the third wafer 2c are attached to both sides of the first wafer 2a, and these three layers are stacked. The processing wafer 10 is formed. In the processing wafer 10, the outer surface on the third wafer 2c side corresponds to one outer surface 11, and the outer surface on the second wafer 2b side corresponds to the other outer surface 12.

  Further, in the processing step of the present embodiment, as shown in FIG. 6F, one outer surface 11 of the processing wafer 10 consisting of the three-layer wafer, that is, the outer surface of the third wafer 2c is polished or the like Process by

  Thereby, as shown in FIG. 6F, the third authentication mark M3 disappears on the outer surface 11 of the third wafer 2c side of the processing wafer 10 after the processing step, and the second wafer 2b side is removed. On the other outer surface 12 of the second authentication mark M2 remains.

  Even in such a state, in the present embodiment, as in the second embodiment, the second authentication mark M2 remaining on the other outer surface 12 of the processing wafer 10 after the processing step in the mark deriving step , The first authentication mark M1 which has disappeared can be derived.

[Step of FIG. 6 (g): re-marking step]
Next, as in the second embodiment, on one outer surface 11 where the first authentication mark M1 on the processing wafer 10 after the processing step has disappeared, the first authentication mark M1 derived in the mark deriving step is The marking means 102 remarks. Here, the first authentication mark M1 is re-marked on the outer surface of the third wafer 2c in the processing wafer 10.

  Although the manufacturing method of the present embodiment is as described above, the same effects as those described in the second embodiment can be exhibited also by the manufacturing method of the present embodiment and the production system for controlling the same. It is a thing.

  As mentioned above, although the manufacturing method and the production system of the present invention have been described with reference to the first to fourth embodiments, the above various authentication marks M1 to M3 and their marking surfaces, bonding of wafers, and their bonding Information such as the bonding surface is stored in the storage unit 200 as a history.

  The main example of the information stored in the storage unit 200 as the history is not limited, but is listed below. Information of lot ID of each above-mentioned wafer 1, 2a-2c. Information of certification mark M1-M3 and its marking surface in each above-mentioned wafer 1, 2a-2c. Information of certification mark and its marking surface in re-marking. Information on the wafer and the bonding surface in the bonding step (bonding) of the wafer, and the certification marks M1 to M3, etc.

(Other embodiments)
In addition, in the manufacturing method shown to said each embodiment, although a process to a mark derivation | leading-out process is performed, a re-marking process may not be performed. For example, even if the certification mark disappears in the processing step, it is sufficient if the history of the processing wafer 10 is known in the mark derivation step, and in the process after the certification mark disappears, no re-marking is necessary. Then, re-marking may not be performed.

  Further, in the manufacturing method described in each of the above embodiments, after the re-marking step, or after the mark derivation step if no re-marking is performed, wiring formation, dicing, and the like are appropriately performed on the processing wafer 10. Of course, the process is carried out to finally complete the chip unit product.

  In each of the above embodiments, the lot loading step and the marking step of each certification mark are performed for each wafer, but in the lot step, the wafers of the raw stone lot on which the respective certification marks are already marked are received. May be

  Further, in the example shown in FIG. 2 above, the outer peripheral portion of one outer surface 11 of the processing wafer 10 is marked at a portion opposite to the orientation flat OL. However, as the processing wafer 10 used in each of the above-described embodiments and the other above-described wafers, the presence or absence of an orientation flat does not matter. For example, there may be a notch or the like. Also, the positions of the respective authentication marks are not limited to the example shown in FIG.

  In addition, although the first authentication mark M1 is a character mark such as "1111" in FIG. 2 described above, a two-dimensional code may be used as the authentication mark used in each of the above embodiments. That is, as long as it means a specific authentication mark, it may be a character mark or a two-dimensional code. For example, at the beginning, the character mark is marked, and in the remarking, a two-dimensional code meaning the character mark You may make it mark.

  Specifically, after the certification mark on the wafer disappears, re-marking is performed. At this time, there is a method of character mark to character mark and a method of two-dimensional code to two-dimensional code. However, other than these methods, the two-dimensional code may be re-marked after the character mark disappears, or the character mark may be re-marked after the two-dimensional code disappears.

  Furthermore, in the case where both the character mark and the two-dimensional code are marked as the first authentication mark, at the time of re-marking, both or either one may be marked.

  Moreover, this invention is not limited to above-described embodiment, In the range described in the claim, it can change suitably. Moreover, said each embodiment is not mutually unrelated and can be combined suitably unless the combination is obviously impossible, and said each embodiment is limited to said example of illustration. Absent. Further, in each of the above-described embodiments, it is needless to say that the elements constituting the embodiment are not necessarily essential except when clearly indicated as being essential and when it is considered to be obviously essential in principle. Yes. Further, in the above embodiments, when numerical values such as the number, numerical value, amount, range, etc. of constituent elements of the embodiment are mentioned, it is clearly indicated that they are particularly essential and clearly limited to a specific number in principle. It is not limited to the specific number except when it is done. Further, in the above embodiments, when referring to the shape, positional relationship, etc. of the component etc., unless otherwise specified or in principle when limited to a specific shape, positional relationship, etc. It is not limited to the positional relationship and the like.

10 processing wafer 11 one outer surface of processing wafer 12 other outer surface of processing wafer 102 marking means 200 storage means M1 first certification mark M2 second certification mark

Claims (4)

Marking a first authentication mark (M1) for identification on the outer surface (11) of the first wafer (2a);
Storing in the storage means (200) information of the first authentication mark of the first wafer and information of the outer surface (11) on which the first authentication mark is marked;
Marking a second authentication mark (M2) for identification on the outer surface (12) of the second wafer (2b);
Storing in the storage means information of the second authentication mark of the second wafer and information of the outer surface (12) on which the second authentication mark is marked;
A first bonding step of bonding the first wafer and the second wafer on opposite surfaces of the outer surface on which the marking is performed;
The information of the first authentication mark, the second authentication mark, and the outer surface (11, 12) having these marks on the multilayer wafer (2) obtained by the first bonding step is stored Storing in the means,
A first processing step of processing one of the outer surfaces (11, 12) of the outer surface (11, 12) of the front and back of the multilayer wafer to cause the first authentication mark or the second authentication mark to disappear When,
Marking a third identification mark (M3) for identification on the outer surface of the third wafer (2c);
Storing information of the outer surface of the third wafer on which the third authentication mark and the third authentication mark have been marked in the storage means;
After the first processing, one of the outer surface of the multilayer wafer from which the first authentication mark or the second authentication mark has disappeared and the third authentication mark from the third wafer are marked A second bonding step of bonding the opposite surface of the outer surface,
The first authentication mark or the second authentication mark marked on the outer surface (11, 12) of the processing wafer (10) obtained by the second bonding step, the third authentication mark, and Storing information of the outer surface having the authentication mark in the storage means;
A second processing step of processing the outer surface of the processing wafer after the storing step of the processing wafer ;
In the second processing step , any one of the first to third authentication marks marked on any one outer surface (11) of the front and back outer surfaces of the processing wafer disappears A mark deriving step of deriving the extinguished authentication mark based on any one of the first to third authentication marks left on the other outer surface (12) by the storage means ; A method of manufacturing a wafer comprising: On the outer surface of one of the first to third authentication marks on the processing wafer after the second processing step, the erased authentication mark derived in the mark deriving step is The method of manufacturing a wafer according to claim 1, further comprising: a re-marking step of re-marking. A first wafer (2a) having a first authentication mark (M1) for identification marking on an outer surface (11), and a second authentication mark (M2) for identification on an outer surface (12) Preparing a multilayer wafer (2) in which a second wafer (2b) is bonded to the opposite surface of the outer surface marked as described above;
After performing the first processing on one of the outer surfaces of the front and back outer surfaces of the multilayer wafer, the first authentication mark or the second authentication mark is formed by the first processing on the multilayer wafer. And the third wafer (2c) with the third authentication mark (M3) for identification being marked on the outer surface, and bonding the opposite surfaces of the outer surface marked with each other Processing wafer (10),
A production system for controlling a method of manufacturing a wafer, wherein a second processing step of processing the outer surface of the processing wafer is performed,
Storage means (200) for storing information on the outer surface of the first wafer, the second wafer, the multilayer wafer, the third wafer and the processing wafer;
Marking means (102) for marking the outer surface of the processing wafer,
Storing both authentication marks on the front and back outer surfaces of the processing wafer by the storage means;
When any one of the first to third authentication marks marked on any one of the front and back outer surfaces of the processing wafer after the second processing step disappears, production system, characterized by said storage means, based on one of the first to third authentication mark remaining on the other external surface plane, that it has to derive the authentication mark disappears. On the outer surface of one of the first to third authentication marks on the processing wafer after the second processing step, the erased authentication mark drawn by the storage means is provided. The production system according to claim 3 , wherein re-marking is performed by the marking means.

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