JP6517966B2 - Oscillator circuit - Google Patents

Description

  The present invention relates to an oscillator circuit that enables high frequency oscillation.

  2. Description of the Related Art Conventionally, in a wireless device, an oscillation circuit formed of a resonant circuit formed of an inductor and a capacitor and a transistor has been used. By using a variable capacitance diode as a capacitor, a voltage controlled oscillator (VCO: voltage controlled oscillator) is configured, and frequency control becomes possible. In addition, a phase locked circuit (PLL: Phase-locked loop) can be formed by the voltage control oscillation circuit, the phase comparator, the loop filter, and the frequency divider, and can be used for a PLL frequency synthesizer.

  In recent years, the oscillation circuit as described above is formed as part of a semiconductor integrated circuit. As a method of forming an oscillation circuit as a part of a semiconductor integrated circuit, when all parts constituting the oscillation circuit are formed in the semiconductor integrated circuit, a part of parts constituting the oscillation circuit is formed outside the semiconductor integrated circuit (Ie, formed as an external part). For example, when the oscillation frequency is less than several hundred megahertz (MHz), an inductor having an inductance of about 10 nanohenries (nH) is required. In such a case, if the inductor is provided in the semiconductor integrated circuit, the area occupied by the inductor in the semiconductor integrated circuit becomes excessive, and the semiconductor integrated circuit itself becomes large. For this reason, in an oscillation circuit having an oscillation frequency of several hundred MHz or less, generally, an inductor is provided outside the semiconductor integrated circuit. On the other hand, when the oscillation frequency is 1 gigahertz (GHz) or more, an inductor having an inductance of about 5 nH is required, and the inductor can be accommodated in a semiconductor integrated circuit. For example, Patent Document 1 discloses an oscillation circuit in which an inductor is formed as an external component. Further, Patent Document 2 discloses an oscillation circuit formed by using a capacitor as an external component. Patent Document 3 discloses an oscillation circuit having a configuration in which a capacitor is provided in a semiconductor integrated circuit, an inductor is provided as an external component, and an external capacitor is connected in series to the inductor.

JP 2007-110504 A JP-A-7-131243 JP 6-132728 A

  However, in a wireless device, circuits having various functions such as a receiver circuit, a transmitter circuit, a phase synchronization circuit, and a control circuit are accommodated in a semiconductor integrated circuit, and in a receiver circuit handling weak signals, an oscillator circuit is used. Signal interference is a problem.

  For example, in an oscillation circuit having a structure in which a transistor and a capacitor are provided in a semiconductor integrated circuit and only an inductor is provided outside the semiconductor integrated circuit, when an oscillation frequency of 500 MHz is realized with a 15 nH inductor, the capacitance is From equation (1), 6.75 picofarads (pF) are obtained.

Equation 1

In the above equation, f is a resonance frequency, L is an inductance, and C is a capacitance. Assuming that the effective value of the voltage amplitude of the resonant circuit in the oscillation state is 1 V, the reactance of the inductor is 2πfL = 47.1 (Ω). Thus, the high frequency current flowing through the resonant circuit is 1 ÷ 47.1 = 21.2 (mA). Such high frequency current is a large current comparable to the power supply current of the semiconductor integrated circuit itself.

  When such a high frequency current flows in the resonant circuit, an electromagnetic wave is emitted from the conductive material forming the current path of the resonant circuit, and further, the substrate potential of the semiconductor element fluctuates, and the characteristics of other circuits in the semiconductor integrated circuit Is degraded. For example, the characteristic deterioration of the semiconductor integrated circuit such as the reduction of the reception sensitivity occurs.

  In order to solve the above-mentioned problems, it is conceivable to reduce the oscillation amplitude. However, if the oscillation amplitude is reduced, the purity of the oscillation signal is degraded, and it is difficult to use such a method. In addition, it is conceivable to widen the space between the oscillation circuit and another circuit, or to provide a shield between the oscillation circuit and another circuit, but this increases the area and cost of the semiconductor integrated circuit. Such methods are also difficult to use.

  The present invention has been made in view of the above circumstances, and suppresses the characteristic deterioration of other circuits provided in a semiconductor integrated circuit when outputting an oscillation signal having an oscillation frequency of several hundreds of megahertz. To provide an oscillation circuit that can

  In order to solve the problems described above, a semiconductor device according to the present invention is a semiconductor device including a semiconductor integrated circuit, and a first capacitor provided inside the semiconductor integrated circuit and the outside of the semiconductor integrated circuit. A first wiring formed of an inductor provided, and a first wiring which surrounds a first region defined between the first capacitor and the inductor and which connects the first capacitor and the inductor; A closed circuit, the inductor, a second capacitor provided outside the semiconductor integrated circuit and disposed outside the first region, and defined between the inductor and the second capacitor. A second closed circuit formed of a second wiring that surrounds the second region and connects the inductor and the second capacitor, and the wiring resistance of the second wiring is: Wherein the serial smaller than wiring resistance of the first wiring.

  An oscillation circuit according to the present invention includes a first closed circuit including an internal capacitor provided inside a semiconductor integrated circuit, an external inductor provided outside the semiconductor integrated circuit, and a wire connecting the internal capacitor and the external inductor. And a second closed circuit including an external capacitor provided outside the semiconductor integrated circuit, an external inductor, and a wire connecting the external capacitor and the external inductor. Then, since the wiring resistance of the second closed circuit is smaller than the wiring resistance of the first closed circuit, the high frequency current easily flows to the outside of the semiconductor integrated circuit, and other circuits in the semiconductor integrated circuit receive due to the high frequency current flowing at the time of oscillation. The impact can be reduced.

  That is, in the oscillation circuit of the present invention, even in the case of outputting an oscillation signal having an oscillation frequency of several hundreds of megahertz, characteristic degradation of other circuits provided in the semiconductor integrated circuit can be suppressed.

It is an equivalent circuit schematic of a radio provided with the oscillation circuit concerning Example 1 of the present invention. It is a schematic block diagram of the resonance circuit which comprises the oscillation circuit which concerns on Example 1 of this invention. It is a schematic block diagram for demonstrating the high frequency magnetic field in a radio | wireless machine provided with the oscillation circuit which concerns on Example 1 of this invention. It is an equivalent circuit schematic of the radio | wireless machine provided with the oscillation circuit which concerns on Example 2 of this invention. It is a schematic block diagram of the oscillation circuit which concerns on Example 2 of this invention.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings.

  First, an oscillation circuit according to a first embodiment of the present invention will be described with reference to FIGS. 1 to 3. FIG. 1 is an equivalent circuit diagram of a wireless device provided with an oscillation circuit according to a first embodiment of the present invention. FIG. 2 is a schematic configuration diagram of a resonant circuit that constitutes the oscillation circuit according to the first embodiment of the present invention. FIG. 3 is a schematic configuration diagram for explaining a high frequency magnetic field in a wireless device provided with the oscillation circuit according to the first embodiment of the present invention.

  As shown in FIG. 1, the wireless device 10 includes an oscillation circuit 20, a reception circuit 30, a transmission circuit 40, and a control circuit 50. In the wireless device 10, a part of the oscillation circuit 20, the reception circuit 30, the transmission circuit 40 and the control circuit 50 are provided inside the semiconductor integrated circuit 60. The receiving circuit 30 has a function of receiving data supplied from the other wireless device to the wireless device 10 and performing predetermined processing. The transmission circuit 40 also has a function of generating data for transmission from the wireless device 10 to another wireless device and transmitting the data. The control circuit 50 supplies control signals to the oscillation circuit 20, the reception circuit 30, and the transmission circuit 40, and controls these circuits to perform predetermined operations. The wireless device 10 may have a memory unit or the like for storing data in addition to these circuits, and is not limited to the above-described configuration.

  The oscillation circuit 20 includes an amplification circuit 21 and a resonance circuit 22 connected to the input end and the output end of the amplification circuit 21. The amplifier circuit 21 includes two p-channel type MOS (Metal Oxide Semiconductor) transistors P1 and P2 provided in a semiconductor integrated circuit 60 and two n-channel type MOS transistors N1 and N2. The specific configuration of the amplifier circuit 21 is as follows. The source ends of the MOS transistors P1 and P2 are connected to the power supply voltage Vdd, the drain end of the MOS transistor P1 is connected to the drain end of the MOS transistor N1, and the drain end of the MOS transistor P2 is connected to the drain end of the MOS transistor N2. There is. The drain end of the MOS transistor P1 is connected to the gate ends of the MOS transistors P2 and N2, and the drain end of the MOS transistor P2 is connected to the gate ends of the MOS transistors P1 and N1. Furthermore, the gate end of the MOS transistor P1 is connected to the gate end of the MOS transistor N1 and the drain ends of the MOS transistors P2 and N2, and the gate end of the MOS transistor P2 is connected to the gate end of the MOS transistor N2 and the drain ends of the MOS transistors P1 and N1. It is connected to the. The source terminals of the MOS transistors N1 and N2 are connected to the ground potential.

  The resonant circuit 22 includes two internal capacitors C1 and C2 and variable capacitance diodes D1 and D2 provided in the semiconductor integrated circuit 60, and an external inductor L1 and an external capacitor C3 provided outside the semiconductor integrated circuit 60. It is done. The specific configuration of the resonant circuit 22 is as follows. The anodes of the variable capacitance diodes D1 and D2 are connected to each other, and the anodes of the variable capacitance diodes D1 and D2 are connected to the frequency control voltage Vc. The cathode of the variable capacitance diode D1 is connected to the internal capacitor C1 and the external connection terminal T1 of the semiconductor integrated circuit 60, and the cathode of the variable capacitance diode D2 is connected to the internal capacitor C2 and the external connection terminal T2 of the semiconductor integrated circuit 60. One end of each of the internal capacitors C1 and C2 is connected to the ground potential. The internal capacitor C1 and the variable capacitance diode D1 are connected to the drain ends of the MOS transistors P1 and N1 of the connection circuit 21, and the internal capacitor C2 and the variable capacitance diode D2 are connected to the drain ends of the MOS transistors P2 and N2 of the connection circuit 21. It is connected to the. Outside the semiconductor integrated circuit 60, the external inductor L1 and the external capacitor C3 are connected in parallel to the semiconductor integrated circuit 60, and one end of the external inductor L1 and the external capacitor C3 is connected via the connection point T3. The other end of the external inductor L1 and the external capacitor C3 is connected to the external connection terminal T2 of the semiconductor integrated circuit 60 via the connection point T4.

  Next, the configuration of the resonant circuit 22 will be described in detail with reference to FIG. In FIG. 2, the direction in which the wiring extends from both ends of the external inductor L1 is defined as the X direction, and the direction in which the wiring extends from the external connection terminals T1 and T2 is defined as the Y direction.

  As shown in FIG. 2, the resonance circuit 22 is formed by connecting the variable capacitance diodes D1 and D2 and the external inductor L1 via the external connection terminals T1 and T2 to form a first closed circuit 23 ( It has two closed circuits of the 2nd closed circuit 24 (it shows with a dashed-dotted line) formed by having connected the external inductor L1 and the external capacitor C3 (it shows with a broken line). The wiring length of the wiring constituting the first closed circuit 23 is longer than the wiring length of the wiring constituting the second closed circuit 24. That is, the area enclosed by the first closed circuit 23 is larger than the area enclosed by the wires forming the second closed circuit 24. The material of the wiring forming the first closed circuit 23 is the same as the material of the wiring forming the second closed circuit 24.

  In addition, the width W1 of a part of the wiring forming the first closed circuit 23 is smaller than the width W2 of the wiring forming the second closed circuit 24. Specifically, among the wires constituting the first closed circuit 23, the width W1 of the wire from the connection point T3 to the connection point T4 via the external connection terminal T1, the variable capacitance diodes D1 and D2, and the external connection terminal T2 is , And the width W2 of the wire forming the second closed circuit 24. Here, the thickness of the wiring forming the first closed circuit 23 is equal to the thickness of the wiring forming the second closed circuit 24. Therefore, the cross-sectional area of the wire forming the first closed circuit 23 is smaller than the cross-sectional area of the wire forming the second closed circuit 24.

  Further, the wiring of width W1 extending in the Y direction and the wiring of width W2 extending in the Y direction are connected at connection points T3 and T4 so that the outer edges coincide with each other.

  Note that the widths of all the wires forming the second closed circuit 24 do not have to be larger than the widths of the wires forming the first closed circuit 23, and, for example, of the wires forming the second closed circuit 24 The width of the wiring extended in the Y direction may be increased. The wiring of width W1 extending in the Y direction and the wiring of width W2 extending in the Y direction may be connected at the connection points T3 and T4 so that the inner edges coincide, and further, the central portion of each wiring is It may be connected at the connection points T3 and T4 so as to coincide with each other.

  By having the configuration as described above, the oscillation circuit 20 has a frequency determined by the combined capacitance of the capacitors of the internal capacitors C1 and C2, the external capacitor C3, and the variable capacitance diodes D1 and D2, and the inductance of the external inductor L1. It oscillates at. The oscillation frequency can be changed by changing the frequency control voltage Vc applied to the variable capacitance diodes D1 and D2.

  In the first embodiment, the inductance of the external inductor L1 is 15 nanohenry (nH), and the combined capacitance of the capacitors of the internal capacitors C1 and C2 and the variable capacitance diodes D1 and D2 in the semiconductor integrated circuit 60 is 1.75 picofarads (pF The capacitance of the external capacitor C3 is 5 pF, and the oscillation frequency is 500 MHz. Here, the reactance of the external inductor L1 at an oscillation frequency of 500 MHz is 47.1 ohms (Ω), and the high frequency current flowing through the external inductor L1 is 21.2 mA. Further, the high frequency current flowing in the external inductor L1 flows through the semiconductor integrated circuit 60 (that is, flows in the first closed circuit 23) and flows through the external capacitor C3 (that is, the second closed circuit) It is a current obtained by synthesizing the high frequency current (flowing to 24). Therefore, the 21.2 mA high frequency current flowing through the external inductor L1 is a current obtained by combining the 5.5 mA high frequency current flowing through the first closed circuit 23 and the 15.7 mA high frequency current flowing through the second closed circuit 24. . In this manner, capacitors for determining the oscillation frequency are separately provided inside and outside semiconductor integrated circuit 60, and capacitance of external capacitor C3 provided outside semiconductor integrated circuit 60 is provided in semiconductor integrated circuit 60. By making the capacitance larger than the combined capacitance of the capacitors, the amount of current flowing in the semiconductor integrated circuit 60 can be reduced. Thus, the influence of the high frequency current flowing through the oscillation circuit 20 on the reception circuit 30, the transmission circuit 40 and the control circuit 50 in the semiconductor integrated circuit 60 can be reduced.

  Further, in the first embodiment, the wire length of the wire forming the first closed circuit 23 is longer than the wire length of the wire forming the second closed circuit 24, and furthermore, the wire forming the first closed circuit 23 is disconnected. The area is smaller than the cross-sectional area of the wires forming the second closed circuit 24, and the materials forming both wires are the same. That is, the wiring resistance in the first closed circuit 23 is larger than the wiring resistance in the second closed circuit 24. Therefore, the high frequency current easily flows in the second closed circuit 24, and the reduction of the amount of current flowing in the semiconductor integrated circuit 60 as described above is efficiently realized, and the receiving circuit 30 and the transmitting circuit 40 in the semiconductor integrated circuit 60. And the influence which the control circuit 50 receives can be reduced. Also, in the case where the combined capacitance of the capacitors in the semiconductor integrated circuit 60 must be equal to or greater than the capacitance of the external capacitor C 3, the amount of current flowing in the semiconductor integrated circuit 60 by using the above-described relationship of the line width. In the semiconductor integrated circuit 60, the influence on the receiving circuit 30, the transmitting circuit 40 and the control circuit 50 can be reduced.

  If the wiring resistance in the first closed circuit 23 can be made larger than the wiring resistance in the second closed circuit 24, the structure is not limited to the one described above. For example, a material having a lower conductivity than the material of the wiring of the second closed circuit may be used for the wiring of the first closed circuit 23. Further, the wiring resistance in the first closed circuit 23 may be made larger than the wiring resistance in the second closed circuit 24 by changing not only the wiring width but also the wiring thickness.

  Furthermore, in the first embodiment, the area enclosed by the first closed circuit 23 is made larger than the area enclosed by the second closed circuit 24. Since the strength of the high frequency magnetic field is determined by the area surrounded by the current path and the current value and the product, the high frequency in the second closed circuit 24 is reduced by reducing the area surrounded by the second closed circuit 24 where the amount of current increases. The strength of the magnetic field can be reduced.

  Furthermore, the internal capacitors C1 and C2 and variable capacitance diodes D1 and D2 are arranged in the + Y direction with respect to the external inductor L1, and the external capacitor C3 is arranged in the −Y direction (ie, the external capacitor C3 is formed by the first closed circuit 23). The extension direction of the first closed circuit 23 and the second closed circuit 24 is different at the connection points T3 and T4 (that is, the extension direction is the + Y direction or the −Y direction). Therefore, the directions of the high frequency current flowing through the first closed circuit 23 and the second closed circuit 24 at the same time are reversed. That is, the phase of the high frequency current generated in the first closed circuit 23 is inverted with respect to the high frequency current generated in the second closed circuit 24. And as FIG. 3 shows, the direction (arrow of a broken line) of the high frequency magnetic field in the 1st closed circuit 23 in predetermined time and the direction (arrow of a dashed dotted line) of the high frequency magnetic field in the 2nd closed circuit 24 are reverse. become. Therefore, it becomes possible to cancel out the high frequency magnetic field generated by the high frequency current flowing in the first closed circuit 23 by the high frequency magnetic field generated by the high frequency current flowing in the second closed circuit 24 and the semiconductor integrated circuit by the high frequency magnetic field generated in the first closed circuit 23 The influence of other circuits such as the receiving circuit 30, the transmitting circuit 40 and the control circuit 50 in 60 can be reduced.

  As described above, since the strength of the high frequency magnetic field is determined by the product of the area surrounded by the current path and the current value, the product of the area surrounded by the first closed circuit 23 and the amount of current flowing in the first closed circuit 23 The wire length and width of the first closed circuit 23 and the second closed circuit 23, and further, the same as the product of the area enclosed by the second closed circuit 24 and the amount of current flowing in the second closed circuit 24. More preferably, the capacitances of the internal capacitors C1, C2, the variable capacitance diodes D1, D2 and the external capacitor C3 are determined. If the phase of the high frequency current generated in the first closed circuit 23 can be reversed with respect to the high frequency current generated in the second closed circuit 24, it is not necessary to arrange the external inductor L1 and the external capacitor C3 as described above. For example, the external capacitor C3 may be provided in the area surrounded by the first closed circuit 23.

  The amplification circuit 21 is not limited to the case of being configured of a p channel type MOS transistor and an n channel type MOS transistor, and may be configured of only ap channel type or n channel type MOS transistor. Also, the external inductor L1 may have a midpoint tap, and may further use two inductors connected in series. Furthermore, the configuration of the oscillation circuit 20 is not limited to the above-described configuration, and may be a Colpitts circuit, a Hartley circuit, or a Clap circuit. However, in any case, it is necessary to arrange at least an inductor and a capacitor outside the semiconductor integrated circuit. Also, instead of the external inductor L1, a quartz oscillator may be disposed to constitute a quartz oscillation circuit.

  As described above, the oscillator circuit 20 of the present invention includes the internal capacitors C1 and C2 provided inside the semiconductor integrated circuit 60, the external inductor L1 provided outside the semiconductor integrated circuit 60, and the internal capacitors C1 and C2. And a first closed circuit 23 formed of a wire connecting the external inductor L1, an external capacitor C3 provided outside the semiconductor integrated circuit 60, a wire connecting the external inductor L1, and the external capacitor C3 and the external inductor L1. And a second closed circuit 24. Then, since the wiring resistance of the second closed circuit 24 is smaller than the wiring resistance of the first closed circuit 23, the high frequency current easily flows to the outside of the semiconductor integrated circuit 60, and the other high frequency current flows at the time of oscillation. It is possible to reduce the influence of the circuit of

  That is, in the oscillation circuit of the present invention, even in the case of outputting an oscillation signal having an oscillation frequency of several hundreds of megahertz, characteristic degradation of other circuits provided in the semiconductor integrated circuit can be suppressed.

  In the wireless device of the first embodiment, the amplifier circuit that constitutes the oscillation circuit is provided in the semiconductor integrated circuit, but the amplifier circuit may be provided outside the semiconductor integrated circuit. The configuration of the radio in such a case will be described with reference to FIGS. 4 and 5. FIG. 4 is an equivalent circuit diagram of a wireless device provided with an oscillator circuit according to a second embodiment of the present invention, and FIG. 5 is a schematic configuration diagram of an oscillator circuit according to the second embodiment of the present invention. In addition, about the same member as the member which comprises the radio | wireless machine 10 which concerns on Example 1, and the same structure, the description is abbreviate | omitted and attaches | subjects the same code | symbol in drawing.

  As shown in FIG. 4, the wireless device 100 includes an oscillation circuit 120, a reception circuit 30, a transmission circuit 40, a control circuit 50, a base voltage bias circuit 130, and an emitter voltage bias circuit (current source) 140. ing. In the wireless device 100, a part of the oscillation circuit 120, the reception circuit 30, the transmission circuit 40, the control circuit 50, the base voltage bias circuit 130, and the emitter voltage bias circuit 140 are provided in the semiconductor integrated circuit 160.

  The oscillator circuit 120 is composed of an amplifier circuit 121 and a resonance circuit 122. The amplifier circuit 121 is composed of an NPN bipolar transistor 170 provided outside the semiconductor integrated circuit 160. The base of the bipolar transistor 170 is connected to a base voltage bias circuit 130 provided in the semiconductor integrated circuit 160 through the external connection terminal T5 and the resistor R1. The emitter of the bipolar transistor 170 is connected to an emitter current bias circuit 140 provided in the semiconductor integrated circuit 160 through the external connection terminal T6. Furthermore, the collector of the bipolar transistor 170 is connected to the power supply voltage Vdd.

  Resonant circuit 122 includes two internal capacitors C1 and C2 and variable capacitance diodes D1 and D2 provided in semiconductor integrated circuit 160, and external inductor L1 and external capacitors C3 to C7 provided outside semiconductor integrated circuit 160. It consists of The specific configuration of the resonant circuit 122 is as follows. Outside the semiconductor integrated circuit 160, the external inductor L1 and the external capacitor C3 are connected in parallel to the semiconductor integrated circuit 160, and one end of the external inductor L1 and the external capacitor C3 is connected via the connection point T3. The other end of the external inductor L1 and the external capacitor C3 is connected to the external connection terminal T2 of the semiconductor integrated circuit 160 via the connection point T4. Also, an external capacitor C5 is connected to one end of the external capacitor C3 via a connection point T7, and an external capacitor C4 is connected to the other end via a connection point T8. An external capacitor C6 is connected to the external capacitor C5 via a connection point T9, and an external capacitor C7 is connected to the external capacitor C6 via a connection point T10. Furthermore, the external capacitors C3 and C5 are connected to the base of the bipolar transistor 170 through the connection points T7 and T11, and the external capacitors C5 and C6 are connected to the emitter of the bipolar transistor 170 through the connection points T9 and T12. C7 is connected to the collector of the bipolar transistor 170 via the connection point T13. The external capacitor C4 is connected to the ground potential via the connection point T14, and the external capacitors C6 and C7 are connected to the ground potential via the connection points T10 and T14. Here, the external capacitors C4 and C7 are provided to lower the impedance of the power supply having the power supply voltage Vdd. The configuration in the semiconductor integrated circuit 160 is the same as that of the first embodiment, and thus the description thereof is omitted.

  Next, the configuration of the resonant circuit 122 will be described in detail with reference to FIG. In FIG. 5, the direction in which the wiring extends from both ends of the external inductor L1 is defined as the X direction, and the direction in which the wiring extends from the external connection terminals T1 and T2 is defined as the Y direction.

  As shown in FIG. 5, the resonant circuit 122 is formed by connecting the first closed circuit 23 and the second closed circuit 24 identical to the first embodiment, and the external capacitors C3, C4, C5 and C6. Having four closed circuits 151 (shown by a dashed line) and a fourth closed circuit 152 (shown by a broken line) formed by connecting external capacitors C6 and C7 and a bipolar transistor 170 There is. Here, the wiring length of the wiring constituting the first closed circuit 23 is longer than the wiring length of the wirings constituting the second closed circuit 24, the third closed circuit 151 and the fourth closed circuit 152.

  In addition, the width W3 of the wiring forming the third closed circuit 151 and the fourth closed circuit 152 and the width W4 of the wiring forming the fourth closed circuit 152 are the same as the width W2 of the wiring of the second closed circuit 24. . The width W5 of the wiring from the base of the bipolar transistor 170 to the connection point T7 is the same as the width W1 of a part of the wiring forming the first closed circuit 23. Here, the thicknesses of the wirings of the first closed circuit 23, the second closed circuit 24, the third closed circuit 152, and the fourth closed circuit 153 are equal. Therefore, the cross-sectional area of the wires forming the first closed circuit 23 is smaller than the cross-sectional area of the wires forming the third closed circuit 152 and the fourth closed circuit 153. Furthermore, the material of the wiring of the first closed circuit 23, the second closed circuit 24, the third closed circuit 152, and the fourth closed circuit 153 is the same.

  With the above-described configuration, oscillation circuit 120 is determined by the combined capacitance of the capacitors of internal capacitors C1 and C2, external capacitors C3 to C7, and variable capacitance diodes D1 and D2, and the inductance of external inductor L1. Oscillate at the frequency The oscillation frequency can be changed by changing the frequency control voltage Vc applied to the variable capacitance diodes D1 and D2.

  In the second embodiment, capacitors for determining the oscillation frequency are arranged in and out of semiconductor integrated circuit 160, and the combined capacitance of external capacitors C3 to C7 provided outside semiconductor integrated circuit 160 is a semiconductor integrated circuit. Since the combined capacitance of the capacitors provided in the circuit 160 is made larger, the amount of current flowing in the semiconductor integrated circuit 160 can be reduced. Thus, the influence of the high frequency current flowing through the oscillation circuit 120 on the reception circuit 30, the transmission circuit 40 and the control circuit 50 in the semiconductor integrated circuit 160 can be reduced.

Further, in the second embodiment, the wiring length of the wiring constituting the first closed circuit 23 is longer than the wiring length of the wirings constituting the second closed circuit 24, the third closed circuit 151 and the fourth closed circuit 152, The cross-sectional area of the wires forming the first closed circuit 23 is smaller than the cross-sectional area of the wires forming the second closed circuit 24, the third closed circuit 151, and the fourth closed circuit 152, and the materials forming both wires are the same It is. That is, the wiring resistance in the first closed circuit 23 is larger than the wiring resistance in the second closed circuit 24, the third closed circuit 151, and the fourth closed circuit 152. Therefore, the high frequency current easily flows in the second closed circuit 24, the third closed circuit 151, and the fourth closed circuit 152, and the reduction of the amount of current flowing in the semiconductor integrated circuit 160 as described above is efficiently realized. The influence on receiver circuit 30, transmitter circuit 40 and control circuit 50 in integrated circuit 160 can be reduced.

  Furthermore, in the second embodiment, since the amplifier circuit 121 is provided outside the semiconductor integrated circuit 160, the current flowing from the bipolar transistor 170 constituting the amplifier circuit 121 to the ground potential does not flow into the semiconductor integrated circuit 160. Therefore, the influence which such a current generate | occur | produces on the receiving circuit 30, the transmitting circuit 40, and the control circuit 50 can be reduced.

  In the second embodiment, as in the first embodiment, the directions of the high frequency currents flowing through the first closed circuit 23 and the second closed circuit 24 at the same time are reversed. Therefore, the direction of the high frequency magnetic field in the first closed circuit 23 at a predetermined time is opposite to the direction of the high frequency magnetic field in the second closed circuit 24, and the high frequency magnetic field generated by the high frequency current flowing in the first closed circuit 23 It can be canceled out by the high frequency magnetic field generated by the high frequency current flowing to 24. Further, in the second embodiment, since the high frequency current flows also in the third closed circuit 151 and the fourth closed circuit 152, the first closed circuit 23, the second closed circuit 23, the third closed circuit 151, and the fourth closed circuit 152. Of the first closed circuit 23, the second closed circuit 23, the third closed circuit 151, and the fourth closed circuit 152 so that the strength of the high frequency magnetic field obtained by combining the high frequency magnetic fields generated in the respective It is more preferable to determine the wiring length and width, and furthermore, the capacitances of the internal capacitors C1 and C2, the variable capacitance diodes D1 and D2, and the external capacitors C3 to C7.

  The amplifier circuit 21 of the first embodiment may be further provided in the semiconductor integrated circuit 160. In general, when the amplifier circuit 21 in the semiconductor integrated circuit 160 is used, the current consumption can be reduced, but it becomes difficult to reduce the fluctuation of the oscillation frequency. On the other hand, when the amplification circuit 121 outside the semiconductor integrated circuit 160 is used, the fluctuation of the oscillation frequency can be reduced, but it is difficult to reduce the consumption current. Therefore, by providing amplification circuits inside and outside semiconductor integrated circuit 160, amplification circuit 21 in semiconductor integrated circuit 160 needs to be reduced at the time of data reception where it is necessary to reduce current consumption more than suppression of oscillation frequency fluctuation. At the time of data transmission where it is necessary to perform the oscillation operation used and to suppress the fluctuation of the oscillation frequency more than the reduction of the consumption current, the oscillation operation using the amplification circuit 121 outside the semiconductor integrated circuit 160 may be performed. More preferable.

DESCRIPTION OF SYMBOLS 10 radio | wireless machine 20 oscillation circuit 21 amplifier circuit 22 resonance circuit 60 semiconductor integrated circuit C1, C2 internal capacitor C3 external capacitor L1 external inductor

Claims (6)

A semiconductor device including a semiconductor integrated circuit,
A first capacitor provided inside the semiconductor integrated circuit, an inductor provided outside the semiconductor integrated circuit, and a first region defined between the first capacitor and the inductor are surrounded. A first closed circuit constituted by a first wiring connecting the first capacitor and the inductor;
A second region defined between the inductor, a second capacitor provided outside the semiconductor integrated circuit and disposed outside the first region, and the inductor and the second capacitor; A second closed circuit constituted by a second wire connecting the inductor and the second capacitor;
Have
A semiconductor device characterized in that a wiring resistance of the second wiring is smaller than a wiring resistance of the first wiring.   The semiconductor device according to claim 1, wherein an area of the first region is larger than an area of the second region.   The semiconductor device according to claim 1, wherein a capacitance of the second capacitor is larger than a capacitance of the first capacitor. A third capacitor defined between the second capacitor, a third capacitor provided outside the first region and the second region, and the second capacitor and the third capacitor A third closed circuit constituted by a third wiring surrounding the second region and connecting the second capacitor and the third capacitor;
The third capacitor, a bipolar transistor disposed in parallel with the third capacitor outside the first region, the second region, and the third region, and the third transistor A fourth closed circuit constituted by a fourth wiring surrounding the fourth region defined between the capacitor and the bipolar transistor and connecting the third capacitor and the bipolar transistor;
The semiconductor device according to any one of claims 1 to 3, further comprising:   The wiring length of the first closed circuit is longer than the wiring length of each of the second closed circuit, the third closed circuit, and the fourth closed circuit. Semiconductor device. The wiring resistance of the first closed circuit is larger than the wiring resistance of each of the second closed circuit, the third closed circuit, and the fourth closed circuit. The semiconductor device of description.

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