JP6528617B2 - Circuit element built-in substrate and DC-DC converter module - Google Patents

Description

  The present invention relates to a circuit element built-in substrate and a DC-DC converter module, and more particularly to a technique for improving handling of a substrate after singulation.

  Conventionally, a circuit element built-in substrate in which circuit elements such as a coil and a capacitor are built in a substrate is used for electronic devices. A coil embedded substrate in which a loop-like in-plane conductor is disposed in a plurality of base layers constituting a ceramic multilayer substrate, and the in-plane conductor is connected by an interlayer conductor penetrating the base layer to form a coil It is an example of such a circuit element built-in board (for example, patent document 1). Patent Document 1 discloses a manufacturing method in which a non-fired collective substrate in which a plurality of coil-embedded substrates are connected is manufactured, and the collective substrate is fired at once, and then singulated into individual coil-embedded substrates.

JP, 2012-129364, A

  However, in the manufacturing method in which individualization is performed after batch firing, the dimensional error of each coil-embedded substrate tends to be large. Therefore, as the miniaturization of the substrate progresses, the ratio of the dimensional error to the substrate dimension increases, and the concern of losing the merit of the product due to the miniaturization of the substrate increases.

  On the other hand, there is also known a manufacturing method based on individual piece firing, in which unbaked collective substrates are separated into pieces and then fired. Although the coil built-in substrate manufactured by piece-by-piece firing has small dimensional error, handling in mounting is complicated because it is necessary to handle the substrate in a separated state.

  Then, this invention aims at providing the circuit element built-in board | substrate which improved the handling after singulation, and the DC-DC converter module using the said circuit element built-in board | substrate.

In order to achieve the above object, a circuit element built-in substrate according to one aspect of the present invention comprises three or more first electrodes provided at line symmetrical positions on a first main surface of the substrate, and a second main of the substrate A second electrode provided at an opposing position of each of the first electrodes on the surface, a first conductor for connecting each of the first electrodes to a second electrode at an opposing position of the first electrode, and formed in the substrate, 2 and the terminal device nonpolar first and second ends are respectively connected to the first electrode and the other first electrode while at the out line symmetrical position of the first electrode, the first And a second conductor for connecting a plurality of first electrodes which are in line symmetry among the one electrode and to which the two-terminal element is not connected .

According to this configuration, when the first electrode and the second electrode are not distinguished from each other, the arrangement and connection of the electrode and the two-terminal element are performed when the circuit element built-in substrate is viewed from the first main surface (front) And the second main surface (back side) are completely identical. Therefore, the circuit element built-in substrate can be used without distinction between front and back. Further, in the case of using the circuit element built-in substrate in either of the front and back directions, the wiring connecting the electrodes arranged at the same arrangement position can be provided in the circuit element built-in substrate by the second conductor. As a result, for example, in the mounting operation using the circuit element-embedded substrate after singulation, the surfaces of the individual circuit element-embedded substrates that are singulated are sorted (that is, the front and back are recognized to make it necessary. This eliminates the need to turn over and simplifies handling in implementation.

  The two-terminal element may be any of an inductance element, a capacitance element, and a resistance element.

  According to this configuration, it is possible to incorporate, as the two-terminal element, components relatively frequently used in general electronic devices in the circuit element built-in substrate.

  In the circuit element built-in substrate according to one aspect of the present invention, the one first electrode and the other first electrode provided at line symmetrical positions on the first main surface of the substrate, and the second main surface of the substrate The inductance element includes: a second electrode and a second electrode provided at the facing position of the one first electrode and the facing position of the other first electrode, and an inductance element formed in the substrate; The first end of the inductance element is connected to the one first electrode and the one second electrode, the second end of the inductance element is connected to the other first electrode, and the first end of the inductance element and the first end An intermediate point between the two ends is connected to the other second electrode.

  According to this configuration, an inductance value between the first end and the second end of the inductance element can be obtained between the one first electrode and the other first electrode. Further, an inductance value between the first end of the inductance element and the intermediate point is obtained between the one first electrode and the other first electrode. Therefore, either the front or back surface of the circuit element built-in substrate can be used, and the inductance value can be selected according to the surface to be used. Thus, in the mounting operation using the circuit element built-in substrate after singulation, the work of sorting the faces of the individual circuit element built-in substrates being singulated is a complicated operation, and the inductance element It is improved to work with the function of selecting the inductance value of.

  Moreover, the electrode which is not in the line-symmetrical position may be further provided on at least one of the first main surface and the second main surface of the substrate.

  According to this configuration, it is possible to selectively use the electrodes that are not in the line symmetrical position according to the front and back of the circuit element built-in substrate. For example, different circuit devices are configured using the circuit element built-in substrate for each front and back By doing this, cost advantages can be obtained by the common use of parts.

  Further, all the electrodes provided on the first main surface and the second main surface of the substrate may be disposed at line symmetrical positions.

  According to this configuration, it is possible to provide the circuit element built-in substrate with only the electrodes for enabling the circuit element built-in substrate to be used either on the front or the back. Therefore, the effect of improving the handling of the circuit element built-in substrate after singulation can be obtained without inhibiting the miniaturization of the circuit element built-in substrate.

  Further, in the DC-DC converter module according to one aspect of the present invention, three or more first electrodes provided in line symmetry positions on a first main surface of a substrate, and the second above-mentioned second main surface of the substrate A second electrode provided at the opposite position of each of the first electrodes, a conductor connecting each of the first electrodes to the second electrode at the opposite position of the first electrode, and formed in the substrate, A circuit element built-in substrate having one end and a second end having inductance elements respectively connected to the first electrode and the other first electrode located at line symmetrical positions of the first electrodes, and connected to the inductance element And an IC chip mounted on any one of the first main surface and the second main surface of the circuit element built-in substrate. The first electrode and the front of the element-embedded substrate On the other hand, when the first electrode is a first coil electrode and a second coil electrode, and the second electrode facing the first coil electrode and the second coil electrode is a third coil electrode and a fourth coil electrode, respectively. An IC chip is mounted on the first main surface, and the first coil terminal and the second coil terminal of the IC chip are respectively connected to the first coil electrode and the second coil electrode, or An IC chip is mounted on the second main surface, and the first coil terminal and the second coil terminal of the IC chip are respectively connected to the fourth coil electrode and the third coil electrode.

  According to this configuration, the DC-DC converter can be configured by mounting the IC chip on any one of the first main surface and the second main surface of the circuit element built-in substrate. That is, when the IC chip is mounted on the circuit element built-in substrate, it is not necessary to sort the surfaces of the circuit element built-in substrate, so the handling in mounting is simplified.

  In addition, the DC-DC converter module further includes a first chip capacitor and a second chip capacitor mounted on the one of the first main surface and the second main surface, and Each of two first electrodes in line symmetry positions is a first capacitor electrode and a second capacitor electrode, and each of other two first electrodes in line symmetry positions is a third capacitor electrode and a fourth capacitor electrode, The second capacitor electrode, the sixth capacitor electrode, the seventh capacitor electrode, and the eighth capacitor electrode respectively correspond to the first capacitor electrode, the second capacitor electrode, the third capacitor electrode, and the fourth capacitor electrode. When the first chip capacitor and the second chip capacitor are mounted on the first main surface, the first chip capacitor may be And the second end is respectively connected to the first capacitor electrode and the third capacitor electrode, and the first end and the second end of the second chip capacitor are respectively connected to the second capacitor electrode and the fourth capacitor electrode; Alternatively, the first chip capacitor and the second chip capacitor may be mounted on the second main surface, and the first end and the second end of the first chip capacitor may be connected to the sixth capacitor electrode and the eighth capacitor electrode, respectively. The first and second ends of the second chip capacitor may be connected to the fifth capacitor electrode and the seventh capacitor electrode, respectively.

  According to this configuration, the IC chip, the first chip capacitor, and the second chip capacitor are mounted on any one of the first main surface and the second main surface of the circuit element built-in substrate. Thus, the DC-DC converter can be configured. That is, when the IC chip, the first chip capacitor, and the second chip capacitor are mounted on the circuit element built-in substrate, there is no need to sort the surface of the circuit element built-in substrate, so handling in mounting is simplified. Ru.

  Further, in the DC-DC converter module according to one aspect of the present invention, three or more first electrodes provided in line symmetry positions on a first main surface of a substrate, and the second above-mentioned second main surface of the substrate A second electrode provided at an opposing position of each of the first electrodes, and the first electrode and the other first electrode which are formed in the substrate and whose first end and second end are in line symmetry among the first electrodes. And an inductance element connected to each of the electrodes, wherein the one first electrode and the second electrode at a position opposite to the one first electrode are connected, and the intermediate point of the inductance element and the other first A circuit element built-in substrate to which a second electrode at a position opposite to the electrode is connected, and a first coil terminal and a second coil terminal connected to the inductance element, the first of the circuit element built-in substrate What of the main surface and the second main surface And an IC chip mounted on one side, wherein the first and second electrodes of the circuit element built-in substrate are used as a first coil electrode and a second coil electrode, and the first coil electrode and the second coil electrode When the second electrode opposed to the second coil electrode is a third coil electrode and a fourth coil electrode, the IC chip is mounted on the first main surface, and the first coil terminal of the IC chip and the fourth coil electrode A second coil terminal is connected to the first coil electrode and the second coil electrode, or the IC chip is mounted on the second main surface, and the first coil terminal of the IC chip and A second coil terminal is connected to the fourth coil electrode and the third coil electrode, respectively.

  According to this configuration, it is possible to manufacture a plurality of types of DC-DC converter modules using one type of the circuit element built-in substrate by selectively using the front and back of the circuit element built-in substrate. Cost benefits from

  According to the circuit element built-in substrate and the DC-DC converter module of the present invention, a circuit element built-in substrate with improved handling after singulation and a DC-DC converter module using the circuit element built-in substrate can be obtained.

FIG. 2 is a diagram conceptually showing an example of a cross-sectional structure of a circuit element built-in substrate according to the first embodiment. FIG. 7 is a top view showing an example of the arrangement of conductors provided in each layer constituting the circuit element built-in substrate according to the first embodiment. FIG. 1 is an exploded perspective view showing an example of the configuration of a DC-DC converter module according to Embodiment 1; FIG. 1 is an exploded perspective view showing an example of the configuration of a DC-DC converter module according to Embodiment 1; FIG. 1 is a circuit diagram showing an example of a DC-DC converter according to a first embodiment. FIG. 13 is a top view showing an example of the arrangement of conductors provided in each layer constituting the circuit element built-in substrate according to the second embodiment. FIG. 7 is an exploded perspective view showing an example of the configuration of a DC-DC converter module according to a second embodiment. FIG. 7 is an exploded perspective view showing an example of the configuration of a DC-DC converter module according to a second embodiment. FIG. 7 is a circuit diagram showing an example of a DC-DC converter according to a second embodiment. FIG. 18 is a top view showing an example of the arrangement of conductors provided in each layer of the circuit element built-in substrate according to the third embodiment. FIG. 16 is a schematic view equivalently representing a coil incorporated in the circuit element built-in substrate according to the third embodiment. FIG. 18 is an exploded perspective view showing an example of the configuration of a DC-DC converter module according to a third embodiment. FIG. 18 is an exploded perspective view showing an example of the configuration of a DC-DC converter module according to a third embodiment. FIG. 13 is a circuit diagram showing an example of a DC-DC converter according to a third embodiment. It is an exploded perspective view showing an example of composition of a DC-DC converter module concerning a modification. It is a perspective view showing an example of electrode arrangement of a circuit element built-in board concerning a modification. It is a perspective view showing an example of electrode arrangement of a circuit element built-in board concerning a modification.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that all the embodiments described below show general or specific examples. The numerical values, shapes, materials, components, arrangement and connection of the components, the manufacturing process, the order of manufacturing processes, and the like shown in the following embodiments are merely examples, and are not intended to limit the present invention. Among the components in the following embodiments, components not described in the independent claims are described as optional components. Also, the size or ratio of sizes of components shown in the drawings is not necessarily exact.

Embodiment 1
The circuit element built-in substrate according to the first embodiment is a ceramic multilayer substrate in which a coil is formed, and is used, for example, in a DC-DC converter.

  FIG. 1 is a view conceptually showing an example of the cross-sectional structure of the multilayer substrate 10. In the following, for the sake of simplicity, the same components are indicated by the same pattern, the reference numerals are appropriately omitted, and the components in different cross sections may be shown and described in the same drawing.

  The multilayer substrate 10 is configured by laminating the nonmagnetic layer 11, the magnetic layer 12, and the nonmagnetic layer 15 in this order. The nonmagnetic layers 11 and 15 are respectively formed as the surface layer of the one main surface and the surface layer of the other main surface of the multilayer substrate 10, and are exposed in the multilayer substrate 10. In the example of FIG. 1, the magnetic layer 12 is formed by laminating magnetic layers 121 to 124. Although the nonmagnetic layers 11 and 15 are illustrated as a single layer, they may be configured by laminating a plurality of nonmagnetic layers, respectively.

  The multilayer substrate 10 is provided with various conductors including the coil 31. The conductor includes a first electrode 18 formed on the exposed surface of the nonmagnetic layer 15, a second electrode 17 formed on the exposed surface of the nonmagnetic layer 11, and each magnetic layer and each nonmagnetic layer. In-plane conductor 19 formed along the main surface, and interlayer conductor 20 formed by penetrating each magnetic layer and each nonmagnetic layer in the thickness direction are included.

  The nonmagnetic layers 11 and 15 are made of, for example, a low magnetic permeability or nonmagnetic ceramic substrate. The magnetic layer 12 is made of, for example, a magnetic ceramic base having a larger permeability than the nonmagnetic layers 11 and 15. The nonmagnetic layers constituting the nonmagnetic layers 11 and 15 and the magnetic layers constituting the magnetic layers 12 and 14 are collectively referred to as a base layer.

  For example, magnetic ferrite ceramics are used as the magnetic ceramics. Specifically, ferrite containing iron oxide as a main component and containing at least one or more of zinc, nickel and copper may be used. For nonmagnetic ceramics, for example, nonmagnetic ferrite ceramics or alumina ceramics containing alumina as a main component may be used.

  For the first electrode 18, the second electrode 17, the in-plane conductor 19 and the interlayer conductor 20, for example, a metal or alloy containing silver as a main component can be used. The first electrode 18 and the second electrode 17 may be plated with, for example, nickel, palladium, or gold.

  The magnetic ferrite ceramic and the nonmagnetic ferrite ceramic that constitute each layer of the multilayer substrate 10 are so-called LTCC ceramics (Low Temperature Co-fired Ceramics), the sintering temperature of the multilayer substrate 10 is below the melting point of silver, and silver is used as the conductor It is possible to use By forming the in-plane conductor 19 and the interlayer conductor 20 by using silver having a low resistivity, a DC-DC converter circuit which has small loss and is excellent in circuit characteristics such as power efficiency is formed. In particular, by using silver as the conductor, the multilayer substrate 10 can be fired, for example, in an oxidizing atmosphere such as the air.

  FIG. 2 is a top view showing an example of the arrangement of the conductors provided in each layer constituting the multilayer substrate 10. As shown in FIG. In FIG. 2, the arrangement of the conductors in the nonmagnetic layer 11, the magnetic layers 121 to 124, and the nonmagnetic layer 15 in the order of lamination, and the conductor transferred from the transfer sheet 16 to the nonmagnetic layer 15. The arrangement is shown.

  The multilayer substrate 10 of FIG. 1 is formed, for example, by laminating a plurality of nonmagnetic or magnetic ceramic green sheets on which a conductor paste is disposed according to the arrangement of FIG. Formed by firing. The detailed manufacturing method of the DC-DC converter using the multilayer substrate 10 and the multilayer substrate 10 will be described in detail later.

  Below, among the one main surface and the other main surface of each base material layer, for convenience of explanation, the lower side is described as the back side in order of lamination, and the upper side is described as the front side. Further, the exposed surface of the nonmagnetic layer 15 is referred to as a first main surface or surface, and the exposed surface of the nonmagnetic layer 11 is referred to as a second main surface or back.

  The arrangement of the conductors shown in FIG. 2 will be described in detail.

  Electrodes P1, P2, P3, P4, and P5 are provided as the first electrode 18 on the front side of the nonmagnetic layer 15, that is, the first main surface of the multilayer substrate 10 by transfer from the transfer sheet 16. . The electrodes P1, P2, P3, P4, and P5 are provided at positions of line symmetry with respect to the symmetry axis X.

  Electrodes Q1, Q2, Q3, Q4, and Q5 are provided as the second electrode 17 on the back side of the nonmagnetic layer 11, that is, on the second main surface of the multilayer substrate 10. The electrodes Q1, Q2, Q3, Q4, and Q5 are provided at opposing positions of the electrodes P1, P2, P3, P4, and P5, respectively. In other words, the electrodes Q1, Q2, Q3, Q4, and Q5 are arranged at mirror positions of the electrodes P1, P2, P3, P4, and P5, and are provided at positions symmetrical with respect to the symmetry axis Y.

  Each of the first electrodes 18 is connected to the opposing second electrode 17 by an interlayer conductor.

  On the back side of the magnetic layer 121, an in-plane conductor A for routing is formed. The in-plane conductor A is located at the interface between the magnetic layer 121 and the nonmagnetic layer 11 in the multilayer substrate 10 after lamination. Similarly, an in-plane conductor B for drawing is formed on the back side of the nonmagnetic layer 15. The in-plane conductor B is located at the interface between the nonmagnetic layer 15 and the magnetic layer 124 in the multilayer substrate 10 after lamination.

  In the magnetic layers 122, 123, 124, loop-shaped in-plane conductors W1, W2, W3 constituting the coil 31 are formed. The in-plane conductors W1 and W2 are connected to the adjacent in-plane conductors W2 and W3 via the interlayer conductors. The respective ends of the in-plane conductors W1 and W3 constitute a first end Wa and a second end Wb of the coil 31.

  The first end Wa of the coil 31 is connected to the electrodes P4 and Q4 through the interlayer conductor and the in-plane conductor A, and the second end Wb is connected to the electrodes P5 and Q5 through the interlayer conductor and the in-plane conductor B It is connected. Here, the coil 31 is an example of the nonpolar two-terminal element, and the electrodes P4 and P5 are examples of the one side first electrode and the other side first electrode which are in line symmetry among the first electrodes 18.

  The arrangement of the conductors in each layer constituting the multilayer substrate 10 is not limited to the example shown in FIG. For example, appropriate modifications can be made, such as arranging the in-plane conductor 19 on the opposing main surfaces of adjacent layers.

  According to the multilayer substrate 10 configured as described above, the following effects can be obtained. That is, in the multilayer substrate 10, in the case where the first electrode 18 and the second electrode 17 are not distinguished, the arrangement and connection of the conductor and the coil 31 including the first electrode 18 and the second electrode 17 The top view as viewed from the main surface and the bottom view as viewed from the second main surface are completely identical. Further, the winding direction of the coil 31 is the same in the top view and the bottom view and is not distinguished.

  Therefore, the multilayer substrate 10 can be used regardless of front and back. For example, in the mounting operation using the multilayer substrate 10 after singulation, it is not necessary to sort the faces of the individual multilayer substrate 10 being singulated, and handling in mounting is simplified.

  Next, a DC-DC converter using the multilayer substrate 10 will be described.

  FIG. 3 is an exploded perspective view showing an example of the configuration of the DC-DC converter. The DC-DC converter shown in FIG. 3 is configured by mounting a DC-DC converter module 1 formed by mounting an IC chip 32 for control on a multilayer substrate 10 on a mother substrate MB.

  The IC chip 32 is, for example, an IC chip that performs a step-down operation by switching control, and includes an enable terminal EN, an input terminal Vin, a ground terminal GND, a feedback terminal FB, and an output terminal Vout. These terminals of the IC chip 32 are provided at substantially the same arrangement positions as the first electrode 18 of the multilayer substrate 10.

The mother board MB has an enable terminal P _EN , a power supply terminal P _IN , a ground terminal P _GND , a load terminal P _OUT , and a dummy terminal NC. These terminals of the mother substrate MB are provided at substantially the same arrangement positions as the first electrode 18 of the multilayer substrate 10.

  FIG. 3 shows the case where the IC chip 32 is mounted on the first main surface of the multilayer substrate 10. In this case, the feedback terminal FB and the output terminal Vout of the IC chip 32 are connected to the electrodes P4 and P5, respectively. Here, the feedback terminal FB and the output terminal Vout are an example of the first coil terminal and the second coil terminal, respectively, and the electrodes P4 and P5 are an example of the first coil electrode and the second coil electrode, respectively.

Enable terminal EN of the IC chip 32, electrode P1, an interlayer conductor of the multilayer substrate 10, via the electrode Q1, is connected to the enable terminal _{P EN} of the mother board MB.

An input terminal Vin of the IC chip 32, electrodes P2, an interlayer conductor of the multilayer substrate 10, via the electrode Q2, is connected to the power supply terminal _{P IN} of the mother board MB.

Ground terminal GND of the IC chip 32, electrode P3 of the multilayer substrate 10, an interlayer conductor, via the electrode Q3, is connected to the ground terminal _{P GND} of the mother board MB.

Feedback terminal FB of the IC chip 32, electrodes P4, interlayer conductors of the multilayer substrate 10, via the electrode Q4, are connected to the load terminal _{P OUT} of the mother board MB.

  The output terminal Vout of the IC chip 32 is connected to the dummy terminal NC of the mother substrate MB via the electrode P5 of the multilayer substrate 10, the interlayer conductor, and the electrode Q5.

  Such a connection constitutes a DC-DC converter. A similar DC-DC converter can be configured using the multilayer substrate 10 in reverse.

  FIG. 4 is an exploded perspective view showing an example of the configuration of the DC-DC converter when the multilayer substrate 10 is used for turning over.

  FIG. 4 shows the case where the IC chip 32 is mounted on the second main surface of the multilayer substrate 10. In this case, the feedback terminal FB and the output terminal Vout of the IC chip 32 are connected to the electrodes Q5 and Q4, respectively. Here, the feedback terminal FB and the output terminal Vout are an example of the first coil terminal and the second coil terminal, respectively, and the electrodes Q5 and Q4 are an example of the fourth coil electrode and the third coil electrode, respectively.

Enable terminal EN of the IC chip 32, the electrode Q2 of the multilayer substrate 10, an interlayer conductor, via the electrode P2, is connected to the enable terminal _{P EN} of the mother board MB.

An input terminal Vin of the IC chip 32, electrodes Q1 of the multilayer substrate 10, an interlayer conductor, via the electrodes P1, is connected to the power supply terminal _{P IN} of the mother board MB.

Ground terminal GND of the IC chip 32, the electrode Q3 of the multilayer substrate 10, an interlayer conductor, via the electrode P3, is connected to the ground terminal _{P GND} of the mother board MB.

Feedback terminal FB of the IC chip 32, the electrode Q5, interlayer conductors of the multilayer substrate 10, via the electrode P5, is connected to the load terminal _{P OUT} of the mother board MB.

  The output terminal Vout of the IC chip 32 is connected to the dummy terminal NC of the mother substrate MB via the electrode Q4 of the multilayer substrate 10, the interlayer conductor, and the electrode P4.

  Such a connection constitutes a DC-DC converter similar to that shown in FIG.

  FIG. 5 is a circuit diagram corresponding to the DC-DC converter shown in FIGS. 3 and 4.

  The DC-DC converter of FIG. 5 is configured using the DC-DC converter module 1 shown in FIGS. 3 and 4 and the smoothing capacitors C1 and C2 not shown in FIGS. Circuit elements other than the DC-DC converter module 1 of FIG. 5 may be disposed on the mother board. That is, the smoothing capacitors C1 and C2 may be mounted on the mother board MB.

  The IC chip 32 is, for example, an IC chip that performs a step-down operation by switching control, and internally has a switching element such as a MOS FET.

In the DC-DC converter of FIG. 5, the input voltage supplied from the power supply terminal _PIN to the input terminal Vin is switched by the IC chip 32 and intermittently output to the output terminal Vout, and the load terminal P _OUT is output via the coil 31. Output to IC chip 32, based on the voltage of the load terminal P _OUT obtained by the feedback terminal FB, the frequency and pulse width of the switching by variable control, to stabilize the voltage of the load terminal P _OUT to set voltage.

  In FIG. 5, the electrodes of the multilayer substrate 10 are indicated by white circles. The electrodes that make up the circuit differ depending on whether the multilayer substrate 10 is used on the front or back. Therefore, in FIG. 5, following the reference numerals of the terminals used in the mounting on the first main surface shown in FIG. 3, the reference numerals of the terminals used in the mounting on the second main surface shown in FIG. . It is also apparent from the reference numerals of the electrodes shown in FIG. 5 that the multilayer substrate 10 can be used without distinction between the front and back.

  As a result, in response to a demand for downsizing of the DC-DC converter module, mounting of the multilayer substrate 10 can be performed without distinction between front and back while securing high dimensional accuracy by, for example, individual firing. Simplification of handling can also be achieved.

  Next, a method of manufacturing a DC-DC converter will be described.

  First, ceramic green sheets to be the respective base material layers of the multilayer substrate 10 are prepared. Specifically, a ceramic green sheet for a magnetic layer is prepared by forming a slurry containing magnetic ceramic powder into a sheet, and a slurry containing a nonmagnetic ceramic powder is formed into a sheet. Prepare a ceramic green sheet.

  Then, through holes are formed at specific positions in a predetermined ceramic green sheet, for example, according to the arrangement shown in FIG. The through holes include via holes for interlayer conductors. The conductive paste is filled in the through hole as a via hole to form an interlayer conductor (via hole conductor), and the conductive paste is printed at a specific position on the main surface to form an in-plane conductor pattern and a surface electrode pattern. . The through holes may be formed, for example, by laser processing, and the in-plane conductor patterns and the surface electrode patterns may be patterned by screen printing of a conductor paste containing, for example, Ag powder.

  Next, the plurality of ceramic green sheets on which the conductor paste is disposed are aligned, laminated, pressure-bonded, and integrated into an unfired laminate.

  The steps so far are performed on a collective substrate in which a plurality of multilayer substrates 10 are connected.

  Then, the unfired laminate is singulated into individual multilayer substrates 10, and the singulated multilayer substrates 10 are fired. By this firing, the magnetic ceramic powder and the nonmagnetic ceramic powder in each ceramic green sheet are sintered, and the Ag powder in the conductor paste is sintered. Thus, the multilayer substrate 10 is fired individually. Since the multilayer substrate 10 is singulated after singulation, high dimensional accuracy can be obtained as compared to the case where the collective substrate is singulated after batch firing.

  Next, the first electrode 18 exposed to the nonmagnetic layer 15 of the fired multilayer substrate 10 and the second electrode 17 exposed to the nonmagnetic layer 11 are plated. Specifically, a nickel / gold plating film is formed by electroless plating.

  Thereafter, the IC chip 32 is mounted on any one of the first electrode 18 and the second electrode 17 by reflow soldering or the like. As described above, the multilayer substrate 10 can be used regardless of front and back. Therefore, when the IC chip 32 is mounted on the multilayer substrate 10, it is not necessary to sort the surfaces of the individual multilayer substrates 10 which are singulated, and the handling of mounting is simplified.

  As described above, the DC-DC converter module 1 on which the IC chip 32 is mounted is completed. The completed DC-DC converter module 1 is mounted on a mother substrate such as a printed wiring board via the main surface opposite to the main surface on which the IC chip 32 is mounted.

  Such a manufacturing method achieves improvement in dimensional accuracy of the DC-DC converter module and simplification of handling in mounting operation.

Second Embodiment
The circuit element built-in substrate according to the second embodiment is a ceramic multilayer substrate in which a coil is formed, and a capacitor electrode for mounting a chip capacitor is added to the circuit element built-in substrate according to the first embodiment. Configured Further, the DC-DC converter module according to the second embodiment is configured by mounting an IC chip and a chip capacitor on such a circuit element built-in substrate. In the following, with regard to the circuit element built-in substrate and the DC-DC converter module of the second embodiment, the description of the same matters as the first embodiment will be omitted as appropriate, and the differences from the first embodiment will be mainly described.

  Multilayer substrate 10a according to the second embodiment has a cross-sectional structure equivalent to that of multilayer substrate 10 shown in FIG. 1, and an electrode for mounting a chip capacitor on the first main surface and the second main surface of multilayer substrate 10 Is added.

  FIG. 6 is a top view showing an example of the arrangement of the conductors provided in each layer constituting the multilayer substrate 10a. FIG. 6 is represented in the same notation as in FIG.

  Electrodes P6, P7, P8, and P9 are added as the first electrode 18 on the front side of the nonmagnetic layer 15, that is, the first main surface of the multilayer substrate 10a. The electrodes P1 to P9 are provided at positions in line symmetry with the symmetry axis X. Here, the electrodes P6 and P9 are an example of the two first electrodes in axisymmetrical positions, and the electrodes P7 and P8 are an example of the other two first electrodes in axisymmetrical positions. The electrodes P6, P9, P7, and P8 are examples of the first to fourth capacitor electrodes, respectively.

  As the second electrode 17, electrodes Q6, Q7, Q8 and Q9 are added to the back side of the nonmagnetic layer 11, that is, the second main surface of the multilayer substrate 10a. The electrodes Q1 to Q9 are provided at opposing positions of the electrodes P1 to P9, respectively. That is, the electrodes Q1 to Q9 are disposed in line symmetry with respect to the symmetry axis Y in an arrangement that is a mirror image of the electrodes P1 to P9. Here, the electrodes Q6, Q9, Q7, and Q8 are examples of the fifth to eighth capacitor electrodes, respectively.

  Each of the first electrodes 18 is connected to the opposing second electrode 17 by an interlayer conductor.

  On the back side of the nonmagnetic layer 15, an in-plane conductor G for routing is added.

  The electrodes P3, P7 and P8 are connected to each other by the interlayer conductor and the in-plane conductor G. The electrodes P3, P7 and P8 are an example of a plurality of first electrodes 18 which are in line symmetry and to which the coil 31 is not connected. The in-plane conductor G is a wiring which grounds two chip capacitors, as an example.

  The arrangement of the conductors in each layer constituting the multilayer substrate 10a is not limited to the example shown in FIG. For example, appropriate modifications can be made, such as arranging the in-plane conductor 19 on the opposing main surfaces of adjacent layers.

  According to the multilayer substrate 10a configured as described above, the following effects can be obtained. That is, in the multilayer substrate 10a, when the first electrode 18 and the second electrode 17 are not distinguished from each other, the arrangement and connection of the conductor and the coil 31 including the first electrode 18 and the second electrode 17 are the first multilayer substrate 10a. The top view as viewed from the main surface and the bottom view as viewed from the second main surface are completely identical. Further, the winding direction of the coil 31 is the same in the top view and the bottom view and is not distinguished.

  Further, in the case where the multilayer substrate 10 is used in either of the front and back directions, the wiring connecting the electrodes in the same arrangement position can be provided in the multilayer substrate 10 by a conductor.

  Therefore, the multilayer substrate 10a can be used regardless of front and back. For example, in the mounting operation using the multilayer substrate 10a after singulation, it is not necessary to sort the faces of the individual multilayer substrate 10a being singulated, and handling in mounting is simplified.

  Next, a DC-DC converter using the multilayer substrate 10a will be described.

  FIG. 7 is an exploded perspective view showing an example of the configuration of the DC-DC converter. The DC-DC converter shown in FIG. 7 is configured by mounting a DC-DC converter module 2 in which an IC chip 32 for control and chip capacitors 33 and 34 are mounted on a multilayer substrate 10 a on a mother substrate MB.

  The IC chip 32 is the same as the IC chip 32 referred to in the first embodiment.

In addition to the enable terminal P _EN , the power supply terminal P _IN , the ground terminal P _GND , the load terminal P _OUT , and the dummy terminal NC, the mother board MB includes capacitor terminals P _C1 and P _C2 and two more dummy terminals NC. Have. These terminals of the mother substrate MB are provided at substantially the same arrangement positions as the first electrode 18 of the multilayer substrate 10a.

  FIG. 7 shows the case where the IC chip 32 and the chip capacitors 33, 34 are mounted on the first main surface of the multilayer substrate 10a. In this case, the first end and the second end of the chip capacitor 33 are respectively connected to the electrodes P6, P7, and the first end and the second end of the chip capacitor 34 are respectively connected to the electrodes P9, P8.

The first end of the chip capacitor 33, the electrode P6, interlayer conductors of the multilayer substrate 10, via the electrode Q6, are connected to the capacitor terminal _{P C1} of the mother board MB.

  The second end of the chip capacitor 33 is connected to the dummy terminal NC of the mother substrate MB via the electrode P7 of the multilayer substrate 10, the interlayer conductor, and the electrode Q7.

The first end of the chip capacitor 34, the electrode P9, interlayer conductors of the multilayer substrate 10, via the electrode Q9, connected to the capacitor terminal _{P C2} of the mother board MB.

  The second end of the chip capacitor 34 is connected to the dummy terminal NC of the mother substrate MB via the electrode P8 of the multilayer substrate 10, the interlayer conductor, and the electrode Q8.

The mother board MB, jumper wiring J2 connecting the jumper wires _{J 1} and capacitor terminals _{P C2} for connecting the capacitor terminals _{P C1} and the power supply terminal _{P IN} and load terminal _{P OUT} is provided. The jumper wires J1 and J2 can not be provided in the multilayer substrate 10a because they are not symmetrical in arrangement, and thus are provided on the mother substrate MB.

  Such a connection constitutes a DC-DC converter having two chip capacitors. A similar DC-DC converter can be configured using the multilayer substrate 10a in reverse.

  FIG. 8 is an exploded perspective view showing an example of the configuration of the DC-DC converter when the multilayer substrate 10a is used for turning over.

  FIG. 8 shows the case where the IC chip 32 and the chip capacitors 33, 34 are mounted on the second main surface of the multilayer substrate 10a. In this case, the first end and the second end of the chip capacitor 33 are respectively connected to the electrodes Q9 and Q8, and the first end and the second end of the chip capacitor 34 are respectively connected to the electrodes Q6 and Q7.

The first end of the chip capacitor 33, the electrode Q9 of the multilayer substrate 10, an interlayer conductor, via the electrode P9, is connected to the capacitor terminal _{P C1} of the mother board MB.

  The second end of the chip capacitor 33 is connected to the dummy terminal NC of the mother substrate MB via the electrode Q8 of the multilayer substrate 10, the interlayer conductor, and the electrode P8.

The first end of the chip capacitor 34, the electrode Q6 of the multilayer substrate 10, an interlayer conductor, via the electrode P6, is connected to the capacitor terminal _{P C2} of the mother board MB.

  The second end of the chip capacitor 34 is connected to the dummy terminal NC of the mother substrate MB via the electrode Q7 of the multilayer substrate 10, the interlayer conductor, and the electrode P7.

  Such a connection constitutes a DC-DC converter similar to that shown in FIG.

  FIG. 9 is a circuit diagram corresponding to the DC-DC converter shown in FIGS. 7 and 8.

  The DC-DC converter of FIG. 9 is configured using the DC-DC converter module 2 shown in FIGS. The DC-DC converter of FIG. 9 is substantially the same as the DC-DC converter of FIG.

  In FIG. 9, the electrodes of the multilayer substrate 10a are indicated by white circles. The electrodes constituting the circuit differ depending on which of the front and back the multilayer substrate 10a is used. Therefore, in FIG. 9, the reference numerals of the terminals used in the mounting on the second main surface shown in FIG. 8 are shown in parentheses following the reference numerals of the terminals used in the mounting on the first main surface shown in FIG. There is. It is also apparent from the reference numerals of the electrodes shown in FIG. 9 that the multilayer substrate 10a can be used without distinction between the front and back.

  As a result, in response to a demand for downsizing of the DC-DC converter module, the mounting in the mounting can be performed by using the multilayer substrate 10a without distinction between the front and back while securing high dimensional accuracy by, for example, individual firing. Simplification of handling can also be achieved.

Third Embodiment
The circuit element built-in substrate according to the third embodiment is a ceramic multilayer substrate in which a coil as an inductor element is formed. The circuit element built-in substrate according to the third embodiment is connected to the coil by electrodes arranged at equivalent positions of each of the first main surface and the second main surface, and each of the first main surface and the second main surface The inductance values of the coils at the electrodes are different. That is, as in the circuit element built-in substrate according to Embodiment 1, the circuit element built-in substrate according to Embodiment 3 can be used with any of the first main surface and the second main surface, and further, a surface to be used Have the additional function of being able to select the inductance value accordingly.

  The DC-DC converter module according to the third embodiment is configured by mounting an IC chip on such a circuit element built-in substrate.

  In the following, with regard to the circuit element built-in substrate and the DC-DC converter module of the third embodiment, the description of the same matters as the first embodiment will be omitted as appropriate, and the differences from the first embodiment will be mainly described.

  In the multilayer substrate 10b of the third embodiment, the magnetic layers 125 and 126 constituting the magnetic layer 12 are added to the multilayer substrate 10 of FIG. 1, and the coil 31 is replaced with a coil from which a midpoint (tap) is drawn. Configured

  FIG. 10 is a top view showing an example of the arrangement of the conductors provided in each layer constituting the multilayer substrate 10b. FIG. 10 is expressed in the same notation as in FIG.

  An electrode P10 is added as a first electrode 18 on the front side of the nonmagnetic layer 15, that is, on the first main surface of the multilayer substrate 10b. The electrodes P <b> 1 to P <b> 5 and P <b> 10 are provided at positions in line symmetry with the symmetry axis X.

  An electrode Q10 is added as a second electrode 17 to the back side of the nonmagnetic layer 11, that is, the second main surface of the multilayer substrate 10b. The electrodes Q1 to Q5 and Q10 are provided at opposing positions of the electrodes P1 to P5 and P10, respectively. In other words, the electrodes Q1 to Q5 and Q10 are arranged at mirror positions of the electrodes P1 to P5 and P10, and are provided at positions in line symmetry with the symmetry axis Y.

  Of the connections between the first electrode 18 and the second electrode 17 facing each other, the connection between the electrode P10 and the electrode Q10 is added, and the connection between the electrode P4 and the electrode Q4 is deleted.

  In the magnetic layers 122 to 126, loop-shaped in-plane conductors W1 to W5 constituting a coil are formed. The in-plane conductors W1 to W4 are connected to the adjacent in-plane conductors W2 to W5 through the interlayer conductors. The ends of the in-plane conductors W1 and W5 respectively constitute the first end Wa and the second end Wb of the coil, and a part of the in-plane conductor W2 constitutes the tap Wc of the coil.

  The first end Wa of the coil is connected to the electrodes P5 and Q5 via the interlayer conductor and the in-plane conductor A, and the second end Wb is connected to the electrode P4 via the interlayer conductor and the in-plane conductor B There is. Further, the tap Wc of the coil is connected to the electrode Q4 through the interlayer conductor.

  The arrangement of the conductors in each layer constituting the multilayer substrate 10b is not limited to the example shown in FIG. For example, an appropriate change can be made, such as arranging the in-plane conductor on the opposite main surface of the adjacent layer.

  The description will continue on the coils formed in the multilayer substrate 10b.

  FIG. 11 is a schematic view equivalently showing a coil 35 formed in the multilayer substrate 10b according to the conductor arrangement of FIG. In FIG. 11, (a) represents the electrodes P4 and P5 at the top, and (b) represents the electrodes Q4 and Q5 at the top. The in-plane conductors W1 and W2 and the in-plane conductors W3, W4 and W5 are represented by different line types for the sake of clarity of illustration, and the electromagnetic characteristics of the in-plane conductors W1 to W5 are It may be the same or different.

  As can be seen from FIG. 11, in the electrodes P4 and P5, an inductance value corresponding to the entire coil 35 is obtained, and in the electrodes Q4 and Q5, an inductance value corresponding to a part of the coil 35 is obtained. Therefore, the inductance value obtained by the electrodes P4 and P5 and the inductance value obtained by the electrodes Q4 and Q5 are different from each other.

  (A) of FIG. 11 corresponds to, for example, the case where the first main surface of the multilayer substrate 10b is disposed on top and the coil 35 is used in the electrodes P4 and P5, and (b) of FIG. It may correspond to the case where the second main surface of the substrate 10b is disposed on top and the coil 35 is used in the electrodes Q4 and Q5.

  Thus, the multilayer substrate 10b can be used either on the front or back, and the inductance value of the coil 35 can be selected according to the surface to be used. As a result, the work of sorting the surface of the multilayer substrate 10b after singulation is improved from a simple work to a work having a function of selecting the inductance value of the coil 35.

  Further, according to the configuration of the multilayer substrate 10b, it is not necessary to separately prepare parts having two types of inductance values, which contributes to optimization of parts inventory. In addition, since parts having two types of inductance values can be taken at an arbitrary ratio from one collective substrate, it is also suitable for high-mix low-volume production of parts.

  Next, a DC-DC converter using the multilayer substrate 10b will be described.

  FIG. 12 is an exploded perspective view showing an example of the configuration of the DC-DC converter. The DC-DC converter shown in FIG. 12 is configured by mounting a DC-DC converter module 3 formed by mounting a control IC chip 36 on a multilayer substrate 10 b on a mother substrate MB.

  The IC chip 36 is an IC chip having substantially the same function as the IC chip 32 referred to in the first embodiment. Compared with the IC chip 32, the position of the feedback terminal FB is changed, and the coil connection terminal Lx is Is added. The feedback terminal FB and the coil connection terminal Lx are connected inside the IC chip 36.

In the mother board MB, the position of the load terminal P _OUT is changed, and a new dummy terminal NC is added.

  FIG. 12 shows the case where the IC chip 36 is mounted on the first main surface of the multilayer substrate 10b. In this case, the coil connection terminal Lx of the IC chip 36 and the output terminal Vout are connected to the electrodes P4 and P5, respectively. Here, the coil connection terminal LxFB and the output terminal Vout are an example of a first coil terminal and a second coil terminal, respectively, and the electrodes P4 and P5 are an example of a first coil electrode and a second coil electrode, respectively.

The feedback terminal FB of the IC chip 36 is connected to the coil connection terminal Lx inside the IC chip 36, and further to the load terminal P _OUT of the mother board MB through the electrode P10 of the multilayer board 10b, the internal conductor and the electrode Q10. Connected

  With such a connection, a DC-DC converter equivalent to that shown in FIG. 3 is configured using the coil 35 of the inductance value that can be seen by the electrodes P4 and P5. In addition, the same DC-DC converter can be comprised using the coil 35 of a different inductance value by using the multilayer board | substrate 10b for inversion.

  FIG. 13 is an exploded perspective view showing an example of the configuration of the DC-DC converter when the multilayer substrate 10b is used for turning over.

  FIG. 13 shows the case where the IC chip 36 is mounted on the second main surface of the multilayer substrate 10a. In this case, the coil connection terminal Lx of the IC chip 36 and the output terminal Vout are connected to the electrodes Q5 and Q4, respectively. Here, the coil connection terminal LxFB and the output terminal Vout are an example of a first coil terminal and a second coil terminal, respectively, and the electrodes Q5 and Q4 are an example of a fourth coil electrode and a third coil electrode, respectively.

The feedback terminal FB of the IC chip 36 is connected to the coil connection terminal Lx inside the IC chip 36, and further to the load terminal P _OUT of the mother board MB through the electrode Q10 of the multilayer board 10b, the internal conductor and the electrode P10. Connected

  With such a connection, a DC-DC converter equivalent to that shown in FIG. 4 is configured using the coil 35 of the inductance value visible by the electrodes Q4 and Q5.

  FIG. 14 is a circuit diagram corresponding to the DC-DC converter shown in FIG. 12 and FIG. The DC-DC converter of FIG. 14 is the same as the DC-DC converter of FIG. 5 in the rough configuration, and the details in the thick broken line frame change depending on whether the multilayer substrate 10a is used on the front or the back. The point to be The details (a) and (b) in the thick broken line frame shown enlarged correspond to the DC-DC converter module of FIG. 12 and FIG. 13 respectively.

  Thus, the DC-DC converter can be configured using coils with different inductance values depending on which of the front and back the multilayer substrate 10b is used. For example, in DC-DC converters with different ratings, coils with different inductance values may be used to optimize noise and ripple. In such a case, it is possible to manufacture a plurality of types of rated DC-DC converters using one type of component (that is, the multilayer substrate 10b) by selectively using the front and back of the multilayer substrate 10b. Cost benefits can be obtained.

(Modification)
As mentioned above, although the circuit element built-in board | substrate and DC-DC converter module which concern on embodiment of this invention were demonstrated, this invention is not limited to each embodiment. Without departing from the spirit of the present invention, various modifications that can be conceived by a person skilled in the art may be applied to the present embodiment, or a form constructed by combining components in different embodiments may be one or more of the present invention. It may be included within the scope of the embodiments.

  For example, the symmetry axis of the arrangement position of the electrodes does not necessarily have to be parallel to the side of the circuit element built-in substrate, and may be tilted from the side of the circuit element built-in substrate.

  FIG. 15 is an exploded perspective view showing an example of the configuration of the DC-DC converter. The DC-DC converter shown in FIG. 15 is configured by mounting on a mother substrate MB a DC-DC converter module 3 using a multilayer substrate 10c whose electrodes are arranged at symmetrical positions with respect to a symmetry axis Z inclined from the side. Be done.

  In FIG. 15, following the reference numerals of the terminals used in the mounting on the first main surface of the multilayer substrate 10c, the reference numerals of the terminals used in the mounting on the second main surface are parenthesized using the notation in FIG. It shows in writing. It can be understood from the reference numerals of the electrodes shown in FIG. 15 that the multilayer substrate 10c can also be used without distinction between the front and back as in the case of the multilayer substrates 10 and 10a described above. The DC-DC converter shown in FIG. 15 is the same as the DC-DC converter described in the first embodiment because of the agreement of the types of electrodes.

  Moreover, for example, it is not always necessary to make the external shape (contour in top view and bottom view) of the circuit element built-in substrate into the same line symmetrical shape as the electrode. Even if the outer shape of the circuit element built-in substrate is not axisymmetric, the circuit element built-in substrate can be used without distinction between the front and back, as long as the description of the embodiment regarding the arrangement position of the electrodes is satisfied. However, if the outer shape of the circuit element built-in substrate is axisymmetrical, the margin of the area occupied by the outer shape of the circuit element built-in substrate can be minimized, which is more preferable.

  Further, for example, direction marks capable of specifying the rotation direction in the plane may be provided on each of the first main surface and the second main surface of the circuit element built-in substrate. For example, when there are two or more symmetry axes in the arrangement position of the electrodes, such direction marks serve to specify the direction in the plane of the circuit element built-in substrate.

  Further, for example, electrodes not located in line symmetry may be further provided on the first main surface and the second main surface of the circuit element built-in substrate.

  FIG. 16 is a perspective view showing an example of the electrode arrangement of the multilayer substrate 10d having electrodes which are not in line symmetry positions. A multilayer substrate 10d of FIG. 16 is an example of a circuit element built-in substrate according to a modification, and is formed by extending the multilayer substrate 10 of FIG. 3 in the direction orthogonal to the symmetry axis X. Electrodes P11 to P14 whose arrangement is not line symmetrical and a direction mark Pm are provided in an extended portion of the first main surface (upper surface in FIG. 16) of the circuit element built-in substrate 10d. Further, electrodes Q11 to Q14 and a direction mark Qm are provided on the second main surface (the lower surface in FIG. 16) of the circuit element built-in substrate 10d at the opposing position of the electrodes P11 to P14 and the direction mark Pm. There is. Each of the electrodes P11 to P14 is connected to an opposing one of the electrodes Q11 to Q14.

  FIG. 17 is a perspective view showing an example of the electrode arrangement of the circuit element built-in substrate 10d. FIG. 17 shows the circuit element built-in substrate 10d of FIG. 16 upside down.

  The circuit element built-in substrate 10d is connected to a mother substrate or an IC chip corresponding to the front and back among a plurality of types of IC chips or mother substrates, for example, to configure a plurality of types of application devices (for example, DC-DC converter) You may In that case, the electrodes P1 to P5 and Q1 to Q5 are used independently of the type of the mother substrate or IC chip, and the electrodes P11 to P14 and Q11 to Q14 are selectively selected depending on the type of the mother substrate or IC chip It may be used.

  By selectively using the front and back of the multilayer substrate 10d, a plurality of types of application devices can be manufactured using one type of component (that is, the multilayer substrate 10d), and the cost merit due to the common use of components can be obtained.

  Also, for example, in the above embodiment, the coil is illustrated as the nonpolar two-terminal element built in the circuit element built-in substrate, but the two-terminal element is any of an inductance element, a capacitance element, and a resistance element. It may be. The inductance element may be a coil as described above or may be a meander line. In addition, as the resistance element, a varistor (voltage non-linear resistance), a spark gap type ESD protection element, or the like may be used. Further, the present invention is not limited to the lumped constant circuit element, and may be a distributed constant type circuit element such as a strip line or a microstrip line. In addition to the pattern element formed of the in-plane conductor and the interlayer conductor, a chip part may be used. According to this configuration, it is possible to incorporate, as the two-terminal element, components relatively frequently used in general electronic devices in the circuit element built-in substrate.

  Further, for example, in the above embodiment, the ceramic multilayer substrate formed by laminating a plurality of ceramic layers is exemplified as a substrate, but a resin multilayer substrate formed by laminating a plurality of resin layers may be used, or ceramic Or a single layer substrate of resin.

  Further, for example, in the above embodiment, although the IC chip performing the step-down operation is illustrated, the IC chip is not limited to one performing the step-down operation, and has a first coil terminal and a second coil terminal. In this case, either the step-up operation or the step-up / step-down operation may be performed.

  INDUSTRIAL APPLICABILITY The present invention can be widely used for electronic devices such as portable information terminals and digital cameras as ceramic multilayer substrates incorporating coils and ultra-small DC-DC converters using the ceramic multilayer substrates.

1, 2, 3, 4 DC-DC converter 10, 10a, 10b, 10c, 10d Multilayer substrate 11 nonmagnetic layer 12, 121 to 126 magnetic layer 15 nonmagnetic layer 16 transfer sheet 17 second electrode 18 first Electrode 19 In-plane conductor 20 Layer conductor 31, 35 coil 32, 32b, 36 IC chip 33, 34 chip capacitor

Claims (8)

Three or more first electrodes provided at line symmetrical positions on the first main surface of the substrate; and second electrodes provided at opposing positions of the first electrodes on the second main surface of the substrate;
A first conductor connecting each of the first electrodes to a second electrode at a position opposite to the first electrodes;
A non-polar two-terminal element which is formed in the substrate and whose first end and second end are respectively connected to the first electrode and the other first electrode which are in line symmetry positions of the first electrodes;
A second conductor for connecting a plurality of first electrodes which are in line symmetry among the first electrodes and to which the two-terminal element is not connected;
A circuit element built-in substrate comprising: The two-terminal element is any one of an inductance element, a capacitance element, and a resistance element.
The circuit element built-in substrate according to claim 1 . A first electrode and a second electrode provided at line symmetrical positions on the first main surface of the substrate;
A second electrode and a second electrode provided on the second main surface of the substrate at the facing position of the first electrode and the facing position of the second electrode, respectively;
And an inductance element formed in the substrate.
The first end of the inductance element is connected to the one first electrode and the one second electrode, and the second end of the inductance element is connected to the other first electrode, and the first end of the inductance element is connected to the other end. An intermediate point between the end and the second end is connected to the other second electrode,
Circuit element built-in board. An electrode not in line symmetry position is further provided on at least one of the first main surface and the second main surface of the substrate.
The circuit element built-in substrate according to any one of claims 1 to 3 . All the electrodes provided on the first main surface and the second main surface of the substrate are disposed at line symmetrical positions.
The circuit element built-in substrate according to any one of claims 1 to 3 . Three or more first electrodes provided at line symmetrical positions on the first main surface of the substrate; and second electrodes provided at opposing positions of the first electrodes on the second main surface of the substrate; A conductor for connecting each of the first electrodes to a second electrode at a position opposite to the first electrodes, and a conductor formed in the substrate, the first end and the second end being in line symmetry positions of the first electrodes A circuit element built-in substrate having an inductance element respectively connected to the first electrode and the other first electrode.
An IC chip having a first coil terminal and a second coil terminal connected to the inductance element and mounted on any one of the first main surface and the second main surface of the circuit element built-in substrate; , And
The one first electrode and the other first electrode of the circuit element built-in substrate are used as a first coil electrode and a second coil electrode, and the second electrode opposed to the first coil electrode and the second coil electrode is When using 3 coil electrode and 4th coil electrode,
The IC chip is mounted on the first main surface, and the first coil terminal and the second coil terminal of the IC chip are respectively connected to the first coil electrode and the second coil electrode, or
The IC chip is mounted on the second main surface, and the first coil terminal and the second coil terminal of the IC chip are connected to the fourth coil electrode and the third coil electrode, respectively.
DC-DC converter module. And a first chip capacitor and a second chip capacitor mounted on the one of the first main surface and the second main surface,
Of the first electrodes, each of two first electrodes in line symmetry positions is a first capacitor electrode and a second capacitor electrode, and each of other two first electrodes in line symmetry positions is a third capacitor electrode And a fourth capacitor electrode, and a second electrode facing the first capacitor electrode, the second capacitor electrode, the third capacitor electrode, and the fourth capacitor electrode respectively, the fifth capacitor electrode, the sixth capacitor electrode, and the seventh capacitor electrode , And the eighth capacitor electrode,
The first chip capacitor and the second chip capacitor are mounted on the first main surface, and the first end and the second end of the first chip capacitor are respectively connected to the first capacitor electrode and the third capacitor electrode, The first end and the second end of the two-chip capacitor are respectively connected to the second capacitor electrode and the fourth capacitor electrode, or
The first chip capacitor and the second chip capacitor are mounted on the second main surface, and the first end and the second end of the first chip capacitor are respectively connected to the sixth capacitor electrode and the eighth capacitor electrode. The first end and the second end of the second chip capacitor are respectively connected to the fifth capacitor electrode and the seventh capacitor electrode;
The DC-DC converter module according to claim 6 . Three or more first electrodes provided at line symmetrical positions on the first main surface of the substrate; and second electrodes provided at opposing positions of the first electrodes on the second main surface of the substrate; And an inductance element formed in the substrate, the first end and the second end being connected to the one first electrode and the other one first electrode of the first electrodes in line symmetry positions, A circuit in which a first electrode and a second electrode at a position opposite to the one first electrode are connected, and a middle point of the inductance element and a second electrode at a position opposite to the other first electrode are connected Element built-in substrate,
An IC chip having a first coil terminal and a second coil terminal connected to the inductance element and mounted on any one of the first main surface and the second main surface of the circuit element built-in substrate; , And
The one first electrode and the other first electrode of the circuit element built-in substrate are used as a first coil electrode and a second coil electrode, and the second electrode opposed to the first coil electrode and the second coil electrode is When using 3 coil electrode and 4th coil electrode,
The IC chip is mounted on the first main surface, and the first coil terminal and the second coil terminal of the IC chip are respectively connected to the first coil electrode and the second coil electrode, or
The IC chip is mounted on the second main surface, and the first coil terminal and the second coil terminal of the IC chip are connected to the fourth coil electrode and the third coil electrode, respectively.
DC-DC converter module.

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