JP6530672B2 - Method of manufacturing semiconductor device having magnetic sensor - Google Patents

Description

  The present invention relates to a magnetic sensor, and more particularly, to a method of manufacturing a semiconductor device having a magnetic sensor in which a sensing region of the magnetic sensor (or a Hall sensor) is disposed at the lower end of analog and digital circuits.

  As is known, a magnetic field sensing element is an element that examines the direction and magnitude of a magnetic field by utilizing a Hall effect in which a voltage is generated in a direction perpendicular to the current and the magnetic field when a magnetic field is applied to a conductor through which the current flows. It is. That is, with the magnetic field sensing element in a magnetic magnetic field (magnetic field) applied, two opposing electrodes of the four electrodes provide current flow, and the remaining two opposing electrodes are: By sensing the Hall voltage generated in the direction perpendicular to the current flow, the Hall voltage is sensed to sense the direction and magnitude of the magnetic field.

  And, such a magnetic field sensing element is applied to a magnetic sensor (or a Hall sensor) such as a digital compass or an electronic compass (eCompass) that senses the earth's magnetic field and provides direction information. .

  Such a magnetic sensor applies the Hall effect of a magnetic field sensing element to provide a function to indicate the direction of north and south, east and west of the earth, and recently mounted on portable digital devices such as smartphones. Is used. When applied to portable digital devices, it is usefully used in map applications as an application that utilizes location information as well as the direction of the earth using a mobile application (App).

  Here, in the magnetic sensor, both analog and digital circuits are necessarily used to process the sensing result of the magnetic field sensing element. Analog and digital circuits refer to various circuits for processing signals sensed by the magnetic field sensing element.

  Thus, although magnetic sensors are used with analog and digital circuits to process the signals output from the sensors, analog and digital circuits have been designed horizontally adjacent to the magnetic field sensing elements. For example, a magnetic field sensing element is configured, and analog and digital circuits are located in the lateral direction of the magnetic field sensing element. This is because it is necessary to separate and configure the magnetic sensor sensing area and the active area for forming the analog and digital circuits on the semiconductor substrate.

  As a result, there is a problem that the size of the magnetic sensor itself can not be reduced, which eventually leads to a problem that the entire size of the IC chip constituting the magnetic sensor can not be reduced.

  This has recently made it difficult to develop products that attempt to further reduce the size of various portable digital devices. That is, unless the size of the magnetic sensor and various circuits is reduced by itself, as described above, the size of the magnetic sensor chip entering the portable digital device by the design arrangement of the magnetic field sensing element and the analog / digital circuit. There is a limit to reducing In addition, if the size of the magnetic sensor is reduced, the sensitivity to the earth's magnetic field or magnetic force is reduced, so it is difficult to reduce the size beyond a certain extent.

  Thus, there is a need for a method of manufacturing a semiconductor device having a magnetic sensor structure with high sensing capability while securing the maximum area of the magnetic sensor by changing the position of the magnetic field sensing element and various circuits.

U.S. Pat. No. 4,965,517. U.S. Pat. No. 6,278,271 U.S. Pat. No. 6,545,462

  The present invention has been made in view of the above-mentioned problems with the conventional magnetic sensor, and the object of the present invention is to use an SOI wafer and secure an analog sensing region in order to ensure the maximum area of the magnetic sensor. It is another object of the present invention to provide a method of manufacturing a semiconductor device having a magnetic sensor in which a sensing region or a sensing element is disposed in the lower end region of a digital circuit.

  A method of manufacturing a semiconductor device having a magnetic sensor according to the present invention made to achieve the above object comprises the steps of preparing an SOI wafer in which an insulating layer and an SOI layer are sequentially formed on a P-type silicon single crystal substrate. Forming a sensing region of a first conductivity type in the P-type silicon single crystal substrate; and forming a circuit portion in the SOI layer.

  Preferably, the method further includes the step of forming a sensor contact that penetrates the SOI layer and the insulating layer and is connected to the sensing region.

  Preferably, the method further comprises the step of forming a semiconductor layer of a second conductivity type under the sensing region.

  The forming of the sensor contact may include forming an interlayer insulating film on the SOI layer, forming a trench for exposing the sensing region, and a heavily doped region of the first conductivity type on the exposed sensing region. And forming the trench with a conductive material.

  Preferably, the method further comprises the steps of: forming a contact plug connected to the circuit portion; and forming a metal wire connecting the contact plug.

  Preferably, a semiconductor layer of a second conductivity type is further formed on the sensing region.

  Preferably, the method further comprises the step of forming a magnetic focusing plate (IMC).

  The circuit unit recognizes a voltage generated by the sensing area and generates an output signal. A low noise amplifier (LNA), an automatic gain controller (AGC) block amplifying the output signal, and the amplified output signal It is preferable to include an analog-to-digital converter (ADC) to be converted into the digital domain.

  Preferably, the sensing area is formed under the circuit unit.

According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device having a magnetic sensor according to the present invention, comprising the steps of: forming a sensing region on a semiconductor substrate; forming an epi layer on the sensing region; Forming a plurality of sensor contacts connected to the sensing region in the epi layer; forming a sensor circuit portion in the epi layer; forming an interlayer insulating film on the upper surface of the epi layer; Forming a contact plug electrically connected to the sensor circuit portion to an interlayer insulating film, forming a metal wiring connecting the contact plug and the sensor contact, and forming a magnetic layer on the upper surface or the back surface of the semiconductor substrate have a forming a flux concentrator, form a sensing region on the semiconductor substrate That step, characterized in that it comprises a step of forming a semiconductor layer on top and bottom of the sensing area.

  Preferably, the sensing area is formed under the sensor circuit unit.

  The semiconductor layers above and below the sensing region preferably differ from the conductivity type of the sensing region.

  According to the method of manufacturing a semiconductor device having the magnetic sensor according to the present invention configured as described above, the following effects can be obtained.

  First, the present invention forms a sensing area in the handle wafer area under the insulating layer using an SOI wafer having a handle wafer, an insulating layer, and an SOI layer, and forms an analog on the SOI layer above the formed sensing area. By arranging the digital circuit, the magnetic sensor area can be optimized independently.

  In addition, it is possible to realize the optimized doping profile in the sensing region without affecting the circuit part, and to manufacture the semiconductor device having the magnetic sensor whose sensing ability is improved compared to the prior art.

  In addition, since there is no overlap with the circuit portion, there is an advantage that the sensing area can be maximized.

  Also, a magnetic concentrator can be placed not only on the magnetic sensor but also on the back of the SOI wafer, which is advantageous in terms of design.

  In addition, the present invention forms a P-type upper doping region and a P-type lower doping region in an N-type doping region of a semiconductor substrate to provide a narrow current path parallel to the surface of the semiconductor substrate. Therefore, current diffusion can be prevented, and the sensitivity of current detection can be improved. Then, the flow of current flowing between the electrodes can be improved regardless of various defects generated on the surface of the semiconductor substrate by the P-type upper doping region.

FIG. 6 is a cross-sectional view for explaining the method of manufacturing the semiconductor device having the magnetic sensor according to the first embodiment of the present invention. FIG. 6 is a cross-sectional view for explaining the method of manufacturing the semiconductor device having the magnetic sensor according to the first embodiment of the present invention. FIG. 6 is a cross-sectional view for explaining the method of manufacturing the semiconductor device having the magnetic sensor according to the first embodiment of the present invention. FIG. 6 is a cross-sectional view for explaining the method of manufacturing the semiconductor device having the magnetic sensor according to the first embodiment of the present invention. FIG. 6 is a cross-sectional view for explaining the method of manufacturing the semiconductor device having the magnetic sensor according to the first embodiment of the present invention. FIG. 6 is a cross-sectional view for explaining the method of manufacturing the semiconductor device having the magnetic sensor according to the first embodiment of the present invention. FIG. 6 is a cross-sectional view for explaining the method of manufacturing the semiconductor device having the magnetic sensor according to the first embodiment of the present invention. FIG. 6 is a cross-sectional view for explaining the method of manufacturing the semiconductor device having the magnetic sensor according to the first embodiment of the present invention. FIG. 6 is a cross-sectional view for explaining the method of manufacturing the semiconductor device having the magnetic sensor according to the first embodiment of the present invention. FIG. 6 is a cross-sectional view for explaining the method of manufacturing the semiconductor device having the magnetic sensor according to the first embodiment of the present invention. FIG. 6 is a cross-sectional view for explaining the method of manufacturing the semiconductor device having the magnetic sensor according to the first embodiment of the present invention. FIG. 6 is a cross-sectional view for explaining the method of manufacturing the semiconductor device having the magnetic sensor according to the first embodiment of the present invention. FIG. 6 is a cross-sectional view for explaining the method of manufacturing the semiconductor device having the magnetic sensor according to the first embodiment of the present invention. FIG. 6 is a cross-sectional view for explaining the method of manufacturing the semiconductor device having the magnetic sensor according to the first embodiment of the present invention. FIG. 6 is a cross-sectional view for explaining the method of manufacturing the semiconductor device having the magnetic sensor according to the first embodiment of the present invention. FIG. 16 is a plan view of the magnetic sensor manufactured by the method shown in FIGS. 1 to 15; It is sectional drawing for demonstrating the manufacturing method of the semiconductor element which has a magnetic sensor by 2nd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the semiconductor element which has a magnetic sensor by 2nd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the semiconductor element which has a magnetic sensor by 3rd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the semiconductor element which has a magnetic sensor by 3rd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the semiconductor element which has a magnetic sensor by 3rd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the semiconductor element which has a magnetic sensor by 3rd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the semiconductor element which has a magnetic sensor by 3rd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the semiconductor element which has a magnetic sensor by 3rd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the semiconductor element which has a magnetic sensor by 3rd Embodiment of this invention.

  Hereinafter, specific examples of embodiments of the method of manufacturing a semiconductor device having a magnetic sensor according to the present invention will be described with reference to the drawings.

The present invention discloses a method of manufacturing a semiconductor device having a sensing area and a magnetic sensor, wherein the magnetic sensor comprises a silicon on insulator (SOI) substrate structure, an SOI and an integrated magnetic concentrator (IMC). 2.) Parallel structure of epi layer (Epi) and buried layer (NBL), structure in which epi layer (Epi), buried layer (NBL) and deep trench isolation (DTI) structure are used together, A magnetic sensor is constructed on the basis of a structure having both an epi layer (Epi), a buried layer (NBL) and a magnetic focusing plate (IMC), and an analog / digital circuit above the sensing area Arrangement to be produced.
That is, a sensing element can be formed under the analog / digital circuit. The active area required by the analog / digital circuit and the active area occupied by the sensing element are separated up and down. In the past, they were located on the same plane, and thus occupied a wide active area, but as in the present invention, the SOI wafer is used to separate the circuit area and the sensing area across the insulating layer (box layer) If so, there is an advantage that the area of the active region is reduced to half as compared to the prior art.

  In the present embodiment, among the above structures, a manufacturing method using an SOI wafer and a manufacturing method of a semiconductor device having a magnetic sensor manufactured by growing an epi layer on a non-SOI wafer will be described.

  FIGS. 1 to 15 are cross-sectional views for explaining a method of manufacturing a semiconductor device having a magnetic sensor according to a first embodiment of the present invention, in particular, manufacturing a magnetic sensor based on an SOI wafer using a thick SOI layer. It is sectional drawing which showed the process. The manufacturing method will be described with reference to the cross sectional view.

  As shown in FIG. 1, an SOI wafer 100 in which a magnetic sensor is configured is provided. The SOI wafer 100 includes a P-type silicon single crystal substrate (hereinafter referred to as a “handle wafer”) 101 used as a handle wafer, and a buried insulating layer (Buried) formed on the handle wafer 101 with a predetermined thickness. And an SOI layer 104 formed of another silicon single crystal on the buried insulating layer 102. Here, the SOI layer may include layers in which a silicon epi layer is further formed on the SOI layer. The buried insulating layer (Box layer) 102 has a thickness of 0.1 μm to 1 μm, and the SOI layer 104 has a thickness of 0.1 μm to 0.5 μm.

  As shown in FIG. 2, a mask pattern 10 is formed on the SOI layer 104. The mask pattern 10 is for forming a sensing region in the SOI layer 104. Therefore, the mask pattern 10 is provided in the remaining area except the area where the magnetic sensing element is formed.

  In FIG. 3, an ion implantation step is performed. In the ion implantation, first, an impurity having an N-type conductivity type is implanted from the upper direction of the SOI layer 104. It is necessary to implant with high ion implantation energy to penetrate the SOI layer 104 and the buried insulating layer 102 to reach the handle wafer 101. Then, an N-type doped region, ie, an N-type sensing region 106 is formed on the surface of the handle wafer 101 as a region into which N-type ions are implanted for the current path. The N-type sensing area 106 is formed at a predetermined depth from the surface of the handle wafer 101. Then, an impurity having P-type conductivity is ion-implanted under the N-type sensing region 106 to form a P-type doping region (referred to as “P-type lower doping region”) 108 in a region deeper than the N-type sensing region 106. Do. The length of the P-type lower doping region 108 is substantially the same as the length of the N-type sensing region 106. Here, the N-type sensing region 106 and the P-type lower doping region 108 are not in a state in which the regions are defined. This is because the heat treatment and the diffusion process are to be performed.

  The P-type lower doping region 108 forms a current path so that the current flows parallel to the surface of the handle wafer 101 in combination with the P-type upper doping region described below, and in particular, the current path is further narrowed. To make the current flow better. That is, when only the n-type sensing area 106 is formed on the handle wafer 101, a current flow may occur from the n-type sensing area 106 to the lower side of the handle wafer 101. In that case, diffusion through the entire region may reduce the amount of current and reduce the sensitivity of measuring the strength of the magnetic field. On the other hand, when the P-type upper doping region and the P-type lower doping region 108 are formed in combination in the N-type sensing region 106, a current flows between the regions, and the current loss decreases in the handle wafer 101, and the current detection capability is improved. It can be increased. Therefore, the performance improvement of the magnetic sensor can be expected.

Above the N-type sensing region 106, the above-described P-type doping region (referred to as "P-type upper doping region") (not shown) may be further formed. The P-type upper doping region may have a lower ion implantation energy than the P-type lower doping region 108. The P-type upper doping region is formed to a predetermined depth on the surface of the handle wafer 101, and is formed by doping shallower than the N-type sensing region 106.
The P-type upper doping region offsets the surface non-uniformity of the handle wafer 101 or various defects that may occur in the manufacturing process. Therefore, the current path is guided to flow further from the surface of the handle wafer 101. That is, the sensing region between the two P-type doped regions is formed away from the interface between the oxide film and the silicon or the handle wafer surface, and the problem arising from the interface is eliminated to improve the sensing ability.

  The mask pattern 10 is removed, and a heat treatment process is performed on the SOI layer 104 under a series of conditions. Then, the N-type sensing region 106 and the P-type lower doping region 108 located in the SOI wafer 100 are diffused to be in the state as shown in FIG. That is, the N-type sensing region 106 and the P-type lower doping region 108 are as shown by reference numerals 110 and 112, respectively, and the N-type sensing region 110 is formed in the handle wafer 101 of the SOI wafer 100.

  Next, as shown in FIG. 5, a silicon epitaxial layer (Epitaxial Layer) 130 is formed on the SOI layer 104. Therefore, it can be said that the first embodiment utilizes a thick SOI layer.

  Next, as shown in FIG. 6, a trench isolation 132 penetrating the silicon epi layer 130 and the SOI layer 104 is formed. The trench isolation 132 is formed by filling an insulator inside a trench formed by etching the silicon epi layer 130 and the SOI layer 104. Such trench isolation 132 is provided to prevent the circuit portion 140 present therearound and the sensor contacts (161 and 162 (see FIG. 11) described later) from physically contacting each other.

  As shown in FIG. 7, after the trench isolation 132 is formed, a process of forming an analog-digital circuit unit (hereinafter referred to as “circuit unit”) 140 is performed. The circuit unit 140 is located above the N-type sensing region 110. The circuit unit 140 processes the value sensed by the N-type sensing region 110, and the N-type sensing region 110 and the circuit unit 140 are substantially combined to form a magnetic sensor. The circuit portion 140 is formed in the SOI layer 104 or the silicon epi layer 130 with the buried insulating layer (Buried Oxide) 102 interposed therebetween. In such a circuit unit 140, a low noise amplifier (LNA) that recognizes the voltage generated by the sensor and outputs an output signal, an automatic gain controller (AGC) block that amplifies the output signal, and an amplified output signal in a digital domain Components such as an analog-to-digital converter (ADC) and a controller to convert into

  As shown in FIG. 8, after the circuit unit 140 is formed, a first interlayer insulating film (ILD: Inter layer dielectric) 150 is deposited on the upper surface of the silicon epitaxial layer 130.

  Next, a process of electrically connecting the N-type sensing region 110 and the circuit unit 140 is performed. This is shown in FIG. Referring to FIG. 9, a mask pattern 20 is formed on the first interlayer insulating film 150. The mask pattern 20 is provided in the area excluding the contact area. In this state, a plurality of trenches (151, 152, 153) penetrating the first interlayer insulating film 150, the silicon epitaxial layer 130, the SOI layer 104, and the buried insulating layer 102 are formed. Among them, two trenches (151, 152) become trenches for sensor contacts (161, 162) connected to the N-type sensing region 110. Trench formation exposes the N-type sensing region 110. And, between the N-type sensing area 110 and the sensor contact (161, 162, 165), the heavily doped N-type doping area 113 is formed on the bottom of the trench (151, 152, 153) for ohmic contact. Form. The high concentration N-type doping region 113 is formed by ion implantation of an N-type dopant into the exposed N-type sensing region 110.

  Next, the mask pattern 20 is removed, and a heat treatment process is performed to diffuse the N-type dopant. Thereafter, as shown in FIG. 10, the trenches (151, 152, 153) are further etched to form trenches (154, 155, 156) deeper than the depths of the trenches shown in FIG. Deeper trenches (154, 155, 156) are formed through the heavily doped N-type doped region 113. Then, P-type dopants are ion-implanted into the end portions of the first trench 154 to the third trench 156 to form a high concentration P-type doping region 114. The high concentration P-type doping region 114 formed in FIG. 10 is for inducing a current path in the lateral direction.

  Next, as shown in FIG. 11, the deeper trenches (154, 155, 156) are filled with a conductive material that is a conductive material to form the first sensor contact 161, the second sensor contact 162, and the third sensor contact 165. Form. As the filling material, tungsten (W), titanium (Ti) metal or titanium nitride film (TiN), highly doped polysilicon or the like is used.

  The first sensor contact 161 and the second sensor contact 162 serve to connect the N-type sensing region 110 and the circuit unit 140, and the third sensor contact 165 is formed to be in contact with the P-type handle wafer Used for the ground of the handle wafer. Therefore, the third sensor contact 165 is a ground contact. The sensor contact is formed to penetrate the buried insulating layer 102, is connected to a metal wire located in a second interlayer insulating film described later, and reaches the N-type sensing region 110. Here, the above-described configuration, that is, the second interlayer insulating film, the metal wiring, and the high concentration N-type doping region will be described below.

  In FIG. 12, a contact plug 166 for electrically connecting to the circuit unit 140 is formed through metal wiring. The contact plug 166 is also metallized by filling a metal substance such as tungsten (W) or copper (Cu) inside.

  Next, as shown in FIG. 13, a second interlayer insulating film 170 is formed on the first interlayer insulating film 150. In the step of forming the second interlayer insulating film 170, the step of forming the metal wiring 172 in the second interlayer insulating film 170 is also performed. The metal wire 172 functions to electrically connect the circuit unit 140 and the contact plug 166. Here, although the second interlayer insulating film 170 is shown by only one layer, the present invention is not limited to this, and the second interlayer insulating film 170 may be formed of an insulating film in which a plurality of interlayer insulating films are sequentially deposited. In addition, a plurality of metal wires are formed for each interlayer insulating film.

  Then, as shown in FIG. 14, the second interlayer insulating film 170 is etched to form a via (VIA), and a bonding pad 182 connected to the via is formed. A passivation layer 180 is formed on the bonding pad 182.

Then, as shown in FIG. 15, a magnetic convergence plate (IMC) 400 is further formed on the top surface of the passivation layer 180. Alternatively, a magnetic concentrator (IMC) 400 is disposed on the back of the P-type substrate. When located on the back, it is very close to the N-type sensing area 110, and the noise is smaller, and the signal size is larger, so that a sensitive output signal is obtained. Here, the magnetic focusing plate 400 bends the horizontal magnetic field to induce a vertical component that is perpendicular to the sensing region. Thereby, in the sensing area, the vertical component of the horizontal magnetic field is detected. It also provides the effect of amplifying the magnetic field in the area where the magnetic sensor (or Hall sensor) is present.
The pattern of the magnetic focusing plate 400 is a magnetic having various types of patterns, such as a planar-type pattern, a non-planar pattern, a bent pattern, and a conformal pattern. A convergent plate is placed. Here, the conformal pattern is to be formed in the same pattern as the pattern of the insulating layer or passivation film under the magnetic focusing plate.

  In this way, the magnetic field sensing elements 120 can be formed in the handle wafer 101, and the circuit part 140 can be provided apart therefrom. Therefore, it is possible to independently implement the magnetic sensor having the optimum area. That is, the optimized sensor area can be implemented independently. In addition, the N-type sensing region 110 and the circuit unit 140 are formed in different active regions, ie, the N-type sensing region 110 in the active region in the handle wafer 101, and the circuit unit 140 may be SOI layer 104 or It is formed in the active region of the silicon epi layer 130. Therefore, the N-type sensing region 110 and the circuit unit 140 have an advantage that the doping profile can be optimized independently.

  On the other hand, FIG. 16 shows a plan view of the magnetic sensor manufactured by the method shown in FIGS. 1 to 15 described above.

  Referring to FIG. 16, four sensor contacts (160, 161, 162, 163) are formed, and there is a trench isolation region 132 surrounding the sensor contacts (160, 161, 162, 163). The four sensor contacts (160, 161, 162, 163) are electrically connected to the circuit unit 140, and are also connected to the metal wiring 172 as described in FIG. Two of the four sensor contacts sense voltage changes due to Hall effect and the remaining two are used to apply current. The four sensor contacts (160, 161, 162, 163) are disposed at the corners of the N-type doping area 106, but are in electrical contact with the N-type sensing area 110 of the sensing area 190. The remaining ground contacts 165 are used to apply ground or other bias voltage to the P-type handle wafer.

  Here, in the circuit unit 140, not only the sensor circuit unit mentioned above but also active elements, passive elements, etc., for example, logic circuits, analog circuits, power, hybrid circuits, input / output circuits, memory circuits, DPS, processors , Etc. may be formed on the top of the sensing area.

  17 and 18 are cross-sectional views for explaining a method of manufacturing a semiconductor device having a magnetic sensor according to a second embodiment of the present invention.

  The magnetic sensor of the second embodiment is manufactured using a thin SOI layer, not the thick SOI layer described in the first embodiment.

  The manufacturing process of the second embodiment will be briefly described. The N-type sensing region 210 and the P-type lower doping region 212 are formed in the SOI wafer 200, and the N-type sensing region 210 is in the handle wafer 201 of the SOI wafer 200. The formation is the same as the process of FIG. 4 described in the first embodiment described above. However, as shown in FIG. 17, it differs from the first embodiment in that a silicon epitaxial layer (Epitaxial Layer) is not formed on the SOI layer 203.

  The trench isolation 220 is formed by filling an insulator inside a trench formed by etching the SOI layer 203. It is also possible to form LOCOS besides isolation 220 by a trench process. The subsequent steps are performed in the same order as the steps after the step in FIG. 7 of the first embodiment. As described above, the second embodiment is different from the first embodiment in that the silicon epi layer is not formed on the SOI layer 203 constituting the SOI wafer 200. Therefore, only the SOI layer 203 is formed. Therefore, they are not relatively thick. In the subsequent steps, the circuit portion 230 separated from the sensing element region 214 is formed in the SOI layer 203. A cross-sectional view of the magnetic sensor completed by the manufacturing process of the second embodiment is shown in FIG.

  After the isolation 220 is formed in the SOI layer 203, the first sensor contact 240 and the second sensor contact 241 are formed. Therefore, as shown in FIG. 18, the isolation 220 is formed in contact with the outer surfaces of the first sensor contact 240 and the second sensor contact 241 unlike the first embodiment.

  As described above, in the second embodiment, since the isolation region 220 using the LOCOS process or the thin trench isolation (STI) process is formed on the SOI MCD (203), the number of processes is the same as that of the first embodiment. It can be further reduced compared to

  19 to 25 are cross-sectional views for explaining a method of manufacturing a semiconductor device having a magnetic sensor according to a third embodiment of the present invention. The third embodiment is a structure using a non-SOI wafer which does not use an SOI wafer.

  As shown in FIG. 19, a P-type substrate 300 is provided. Then, a screen oxide film is formed on the P-type substrate, and a mask pattern 30 is formed thereon. The mask pattern 30 is provided to form a sensing region in a P-type substrate. Therefore, the mask pattern 30 is provided in the remaining area except the area where the magnetic sensing element is formed. After the mask pattern 30 is formed, an ion implantation process is performed. In the ion implantation process, an impurity having an N-type conductivity is implanted to form an N-conduction region 310 and a lower portion of the N-type sensing region 310, ie, P region deeper than the N-type sensing region 310. In this step, an impurity having a type conductivity is ion-implanted to form a P-type doping region (referred to as a “P-type lower doping region”) 312. Here, a P-type doping region (referred to as a “P-type upper doping region”) may be formed on the top of the N-type sensing region 310.

  Next, the mask pattern 30 is removed, and a P-type epi layer 320 is formed as shown in FIG. The P-type epi layer 320 is grown and formed to have a thickness substantially the same as the thickness of the P-type substrate 300. Then, an N-type sensing region 310 is formed between the P-type substrate 300 and the P-type epi layer 320.

  Next, as shown in FIG. 21, the P-type epi layer 320 is formed with sensor contacts 330 spaced apart for contact with the sensing region. Here, the sensor contact 330 may be referred to as an N-type sinker. The sensor contact 330 is formed of a high concentration N-type region by ion implantation. Alternatively, it is formed using high concentration N-type doped polysilicon. In that case, a trench is formed and filled with N-doped polysilicon inside the trench. Before filling the high concentration N-type doped polysilicon, a low pressure CVD (LPCVD) type silicon oxide film is deposited first. This is because when the trench width is wide, a seam phenomenon may occur at the central portion when filling only with polysilicon. Alternatively, it may be formed by filling a metal layer such as tungsten.

  Thereafter, the circuit portion 340 is formed in the P-type epi layer 320 between the sensor contacts 330.

  In such a circuit unit 340, a low noise amplifier (LNA) that recognizes a voltage generated by a sensor and outputs an output signal, an automatic gain controller (AGC) block that amplifies an output signal, and an amplified output signal in a digital domain Components such as an analog-to-digital converter (ADC) and a controller to convert into After the circuit portion 340 is formed, a first interlayer dielectric (ILD) 350 is formed on the P-type epi layer 330 as shown in FIG.

  Then, as shown in FIG. 23, the contact plug 360 is formed in the first interlayer insulating film 350. The contact plug 360 is for connecting the N-type sensing region 310 and the circuit unit 340, and the contact plug 360 is formed using a patterned mask pattern. Here, the contact plug 360 is formed to be electrically connected to the circuit unit 340.

  After the contact plug 360 is formed in the first interlayer insulating film 350, as shown in FIG. 24, the second interlayer insulating film 370 and the passivation film 380 are formed in the same manner as described in the first embodiment. While forming, a process of forming the metal wiring 365, the bonding pad 375 and the like is performed. Then, as shown in FIG. 25, a magnetic convergence plate (IMC) 900 is further formed on the upper surface of the passivation layer 380. Alternatively, a magnetic focusing plate (IMC) 900 is disposed on the back of the P-type substrate. When located at the back, it is very close to the N-type sensing region 310, noise is smaller, and signal magnitude is larger, so that a sensitive signal is obtained. Here, the magnetic focusing plate 900 bends the horizontal magnetic field to induce a vertical component that is perpendicular to the sensing region. Thereby, in the sensing area, the vertical component of the horizontal magnetic field is detected. It also provides the effect of amplifying the magnetic field in the area where the magnetic sensor (or Hall sensor) is present.

  Thus, in the third embodiment, a sensing region is formed between the P-type substrate 300 and the P-type epi layer 320.

  As described above, according to the present invention, the magnetic field sensing region is formed inside the semiconductor substrate, and the structure is improved to position the analog-digital circuit above the sensing region to ensure the maximum sensing area. It is understood that the basic technical point is to provide a method of manufacturing a magnetic sensor capable of detecting a magnetic field.

  Therefore, the sensor area may be optimized to not increase the size of the semiconductor chip or the semiconductor die. Also, the doping profile of the semiconductor layer used for the magnetic sensor can be independently adjusted. This is because they are formed separately from the circuit portion. Also, the earth's magnetic field flowing above or below the substrate can be more sensitively sensed.

  As mentioned above, although the embodiment of the present invention has been described with reference to this, this is merely an example, and a person of ordinary skill in the technical field to which the present invention belongs can It will be clearly understood that various modifications, changes and other equivalent embodiments are possible without departing from the scope. Accordingly, the true technical scope of the present invention should be determined by the technical idea of the appended claims.

100 SOI wafer 101 P type silicon single crystal substrate (handle wafer)
102 Buried insulating layer (BOX layer)
104, 203 SOI layers 106, 110, 210, 310 N-type sensing region or N-type doping area 108, 112 P-type lower doping region 113 high concentration N-type doping region 114 high concentration P-type doping region 130 silicon epi layer 132 trench isolation 140, 230, 340 Circuit portion 150, 350 First interlayer insulating film 151, 152, 153, 154, 155, 156 Trench 160, 161, 162, 163, 165 Sensor contact 166, 360 Contact plug 170, 370 Second layer Insulation film 180, 380 passivation film (passivation layer)
400, 900 Magnetic Convergent (IMC)

Claims (12)

Preparing an SOI wafer in which an insulating layer and an SOI layer are sequentially formed on a P-type silicon single crystal substrate;
Forming a sensing region of a first conductivity type on the P-type silicon single crystal substrate;
Forming a circuit portion in the SOI layer;
A method of manufacturing a semiconductor device having a magnetic sensor, comprising:   The method according to claim 1, further comprising the step of forming a sensor contact penetrating the SOI layer and the insulating layer and connecting to the sensing region.   The method of manufacturing a semiconductor device having a magnetic sensor according to claim 2, further comprising the step of forming a semiconductor layer of a second conductivity type under the sensing region. The step of forming the sensor contact comprises
Forming an interlayer insulating film on the SOI layer;
Forming a trench exposing the sensing region;
Forming a heavily doped region of the first conductivity type in the exposed sensing region;
Filling the trench with a conductive material;
A method of manufacturing a semiconductor device having a magnetic sensor according to claim 2, comprising: Forming a contact plug connected to the circuit portion;
Forming a metal wire connecting the contact plug;
The method of manufacturing a semiconductor device having a magnetic sensor according to claim 1, further comprising:   4. The method of claim 3, further comprising forming a semiconductor layer of a second conductivity type on the sensing region.   The method of claim 1, further comprising forming a magnetic focusing plate (IMC). The circuit unit recognizes a voltage generated by the sensing area, and outputs a low noise amplifier (LNA) that outputs an output signal.
An automatic gain controller (AGC) block for amplifying the output signal;
An analog-to-digital converter (ADC) for converting the amplified output signal into a digital domain;
A method of manufacturing a semiconductor device having a magnetic sensor according to claim 1, comprising:   The method according to claim 1, wherein the sensing region is formed under the circuit unit. Forming a sensing region on the semiconductor substrate;
Forming an epi layer on the sensing region;
Forming a plurality of sensor contacts connected to the sensing region in the epi layer;
Forming a sensor circuit portion on the epi layer;
Forming an interlayer insulating film on the upper surface of the epi layer;
Forming a contact plug electrically connected to the sensor circuit portion to the interlayer insulating film;
Forming a metal wire connecting the contact plug and the sensor contact;
Forming a magnetic focusing plate on the top surface or the back surface of the semiconductor substrate;
I have a,
The step of forming a sensing region on the semiconductor substrate comprises the steps of
A method of manufacturing a semiconductor device having a magnetic sensor, comprising forming a semiconductor layer above and below the sensing region .   The method of claim 10, wherein the sensing region is formed under the sensor circuit unit. 11. The method of claim 10 , wherein the semiconductor layers above and below the sensing region are different from the conductive type of the sensing region.

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