JP6540587B2 - Power module - Google Patents

Description

  The present invention relates to the structure of a power module.

  BACKGROUND In recent years, power modules capable of high-voltage, large-current operation have been used in the field of vehicles, industrial machinery, or consumer equipment. In such a power module, since the mounted semiconductor element is heated to a high temperature by its own heat generation, high heat dissipation is required. Therefore, there has been proposed a power module in which a circuit board and a heat sink made of copper, which is excellent in thermal conductivity, are joined to both sides of a substrate. For example, in the power module of Patent Document 1, different copper alloy materials are used for the circuit board and the heat dissipation plate to give different plastic deformability to improve the adhesion to the substrate and to improve the heat dissipation.

JP 2012-23403 A

  However, in the power module of Patent Document 1, when a plurality of semiconductor devices are arranged on the surface of the circuit board on the same substrate, heat is concentrated in the central portion on the same substrate even if the same power is applied to the semiconductor devices. Therefore, there is a problem that heat generation unbalance between elements is generated and the heat radiation efficiency is deteriorated.

  The present invention has been made to solve the above-described problems, and it is an object of the present invention to obtain a power module that can be stably operated even at high temperatures since the heat generation unbalance of at least three semiconductor elements is suppressed. It is said that.

In a power module having a power semiconductor element mounted in a row on an insulating substrate in which a circuit pattern is bonded to one main surface, the power semiconductor element is mounted on the insulating substrate by bonding to the circuit pattern and at least three or more of the power semiconductor device, the first power semiconductor element and the thickness of the vertical direction with respect to the main surface of the circuit pattern directly under the third power semiconductor element located sandwiched between the second power semiconductor element located at both ends, the It is characterized in that the thickness is larger than the thickness in the direction perpendicular to the main surface of the circuit pattern directly below the one power semiconductor element or the second power semiconductor element.

According to the power module of the present invention, a power semiconductor element sandwiched by power semiconductor elements located at both ends of at least three or more power semiconductor elements mounted in a row on the same insulating substrate in the power module because there is a tendency that the element temperature is high, by increasing the circuit pattern directly under the power semiconductor element is sandwiched power semiconductor element located at both ends, the power semiconductor element located at both ends than the power semiconductor element located at both ends Since the heat radiation efficiency of the power semiconductor element sandwiched between the two is improved to suppress the heat generation unbalance, the power module can be stably operated even at high temperature.

FIG. 1 is a plan view showing a power module of Embodiment 1; FIG. 3 is a cross-sectional view taken along the line A-A ′ of FIG. 1 in the power module of the first embodiment. FIG. 3 is an enlarged view showing a portion surrounded by a dotted line 10 in FIG. 2 in the power module of the first embodiment. FIG. 7 is a cross-sectional view showing a power module of a second embodiment.

Embodiment 1
The power module in the first embodiment will be described. FIG. 1 is a plan view showing the power module of the first embodiment. FIG. 2 is a cross-sectional view taken along line AA 'of FIG. In FIGS. 1 and 2, the same reference numerals indicate the same or corresponding parts, and the same applies to the following. Power module 100 includes circuit patterns 2a, 2b, 2c in which semiconductor elements 1a, 1b, 1c (hereinafter sometimes represented by 1) are joined to one main surface (upper surface) of insulating substrate 3 via solder. The copper base 4 is bonded to the other surface (lower surface) of the insulating substrate 3 facing the main surface of the insulating substrate 3 (hereinafter sometimes represented by 2), and the copper base 4 is bonded via a solder. The copper base 4 is an example of a module substrate.

  In the power module shown in FIG. 1, the semiconductor elements 1a, 1b and 1c constitute a parallel circuit. The semiconductor element 1 is an IGBT which is a switching element, and is joined to the upper surface of the circuit pattern 2 in a row via solder. The semiconductor element may be a MOSFET or a diode other than the IGBT. Further, the number of semiconductor elements is not limited to three, and for example, six semiconductor elements may be combined to form an inverter circuit. The circuit pattern 2 forms a circuit pattern of copper or copper alloy, and is joined to the upper surface of the insulating substrate 3 via a solder or a brazing material. The circuit pattern 2 is connected to the back surface electrode of the semiconductor element 1, that is, to the collector electrode in the case of the IGBT, and spreads the heat generated during the operation of the semiconductor element 1 and dissipates heat to the insulating substrate 3 side. Play. Furthermore, the circuit patterns 2a, 2b and 2c are electrically connected by the metal wire 6 between the circuit patterns, and have terminals (not shown) for exchanging electrical signals with the outside.

  The insulating substrate 3 may be a ceramic substrate, a silicon nitride substrate, an aluminum nitride substrate, or an insulating substrate of other nitrides, borides, oxides, carbides, or a composite compound of these. The insulating substrate 3 is soldered to the upper surface of the copper base 4, and the semiconductor element 1 is connected on the same plane of the insulating substrate 3 via the circuit pattern 2 so that the copper base 4 and the semiconductor element 1 are electrically Insulated.

  The output pattern 5 is formed of copper or a copper alloy, and is joined to the upper surface of the insulating substrate 3 via a solder. The output pattern 5 is electrically connected to the surface electrode of the semiconductor element 1, that is, the emitter electrode in the case of an IGBT via the metal wire 6, and has a terminal (not shown) for outputting an electrical signal to the outside. The copper base 4 is formed of copper or a copper alloy and plays a role as a heat sink for dissipating heat generated during operation of the semiconductor device 1. The heat generated during the operation of the semiconductor element 1 is transmitted from the semiconductor element 1 to the insulating substrate 3 through the circuit pattern 2 and is further dissipated through the copper base 4.

  FIG. 3 is an enlarged view showing a portion surrounded by a dotted line 10 in FIG. Here, the heat radiation path of the heat generated in each of the semiconductor elements 1a and 1b when the same power is applied to the semiconductor elements 1a and 1b is indicated by arrows 11a and 11b. The heat generated by the semiconductor element 1a does not spread to the end portions 12a and 12d of the circuit pattern because the circuit pattern 2a is thin, and the spread of the heat is limited to the positions 12b and 12c where the circuit pattern is located. On the other hand, the heat generated in the semiconductor element 1b is thicker in the circuit pattern 2b and spreads to the end portions 13a and 13b of the circuit pattern, so that the heat radiation efficiency can be improved compared to the case where the circuit pattern is thin.

Assuming that the power module as shown in FIG. 2 is assumed, the semiconductor element 1b is located between the semiconductor elements 1a and 1c, and the element temperature of the semiconductor element 1b is higher than that of the semiconductor elements 1a and 1c. Such a phenomenon occurs because the heat generated from the semiconductor elements 1a and 1c is thermally conducted in the direction of the semiconductor element 1b positioned between the semiconductor elements 1a and 1c to relatively raise the element temperature. is there.
Further, in the case where there are three semiconductor elements mounted in a line on the same insulating substrate via the circuit pattern as shown in FIG. 2, one semiconductor element is sandwiched by two semiconductor elements located at both ends. Furthermore, when there are five semiconductor elements mounted on the same insulating substrate via a circuit pattern in a line, the three semiconductor elements are sandwiched by two semiconductor elements located at both ends. The present invention is not limited to the embodiment, and the number of semiconductor elements may be at least three and arranged in a line, for example, the semiconductor elements are arranged in a line with respect to a power module in which the semiconductor elements are arranged in an L shape. This makes it possible to miniaturize the power module.

  A semiconductor element which is located between the two semiconductor elements 1a and 1c located at both ends, being sandwiched between the semiconductor elements 1a and 1c and having a relatively high element temperature under the influence of thermal diffusion from the semiconductor elements 1a and 1c The thickness in the direction perpendicular to the top surface of the insulating substrate 3 of the circuit pattern 2b immediately below 1b is greater than the thickness in the direction perpendicular to the top surface of the insulating substrate of the circuit patterns 2a and 2b directly below the semiconductor elements 1a and 1c. The heat radiation efficiency of the semiconductor element 1b can be enhanced relative to the semiconductor elements 1a and 1c by increasing the size of the semiconductor element 1a. The circuit pattern 2 is not limited to the embodiment, and is formed so as to spread uniformly on the upper surface of the insulating substrate 3. Even if the circuit pattern 2 is partially thickened, the heat of the semiconductor element 1b is dissipated with respect to the semiconductor elements 1a and 1c. Efficiency can be improved. Furthermore, the thickness of the circuit pattern immediately below the semiconductor element located at the position sandwiched between the two semiconductor elements located at both ends is, for example, 1.5 with respect to the thickness of the circuit pattern located directly below the semiconductor elements located at both ends. It is preferable to make it about twice as large.

  According to the power module of the first embodiment, among the at least three semiconductor elements arranged in a line, the element temperature of the semiconductor element sandwiched by the semiconductor elements located at both ends tends to be relatively high. By increasing the circuit pattern immediately below the semiconductor element sandwiched by the semiconductor elements positioned at both ends, the heat radiation efficiency of the semiconductor elements sandwiched by the semiconductor elements positioned at both ends is improved more than the semiconductor elements positioned at both ends, This produces an effect that the heat generation imbalance can be suppressed as a whole.

Embodiment 2
The power module of the second embodiment will be described. FIG. 4 is a cross-sectional view showing the power module of the second embodiment. The power module of the second embodiment is different from the power module of the first embodiment in that the thickness of the insulating substrate on which the semiconductor element is mounted is the same, but the thickness of the insulating substrate is not the same.

  From FIG. 4, the insulating substrate 3 has a step between the semiconductor elements 1a and 1b and the semiconductor elements 1b and 1c, and the insulating substrate 3 located below the semiconductor element 1b is formed to have a recess. There is. The bottom surface of the recess of the insulating substrate 3 has a bonding portion at which the circuit pattern 2 b and the insulating substrate 3 are bonded, and from the bottom surface of the recess of the insulating substrate 3 to the lower surface of the insulating substrate 3 facing the upper surface of the insulating substrate 3 Is the insulating substrate portion 3b. Below the semiconductor elements 1a and 1c located at both ends, the insulating substrate 3 has a bonding portion at which the circuit patterns 2a and 2c and the insulating substrate 3 are bonded. The portions from the upper surface of the insulating substrate 3 positioned to the lower surface of the insulating substrate 3 are referred to as insulating substrate portions 3a and 3c. The semiconductor element 1b is positioned between the semiconductor elements 1a and 1c, and the semiconductor element 1b has a temperature higher than that of the semiconductor elements 1a and 1c located at both ends. The thickness in the direction perpendicular to the upper surface of the insulating substrate from the junction with the patterns 2a and 2c to the lower surface of the insulating substrate 3 is the insulating substrate 3 from the junction between the insulating substrate portion 3b and the circuit pattern 2b to the lower surface of the insulating substrate 3. Of the circuit pattern 2b directly below the semiconductor element 1b and relatively thick with respect to the circuit patterns 2a and 2c directly below the semiconductor elements 1a and 1c. The heat dissipation efficiency of the semiconductor element 1b can be further enhanced than that of the semiconductor elements 1a and 1c. The circuit pattern 2b located immediately below the semiconductor device 1b whose element temperature is higher than that of the semiconductor devices 1a and 1c is more thermally conductive than the circuit patterns 2a and 2c located immediately below the semiconductor devices 1a and 1c located at both ends. By changing to silver or the like which is a material having a high rate, the heat radiation efficiency of the semiconductor element 1b can be further improved than that of the semiconductor elements 1a and 1c.

  According to the power module of the second embodiment, among the at least three semiconductor elements arranged in a row, the element temperature of the semiconductor element sandwiched by the semiconductor elements located at both ends tends to be high. Insulating from the junction between the circuit pattern immediately below the semiconductor device located at the both ends of the circuit pattern directly below the semiconductor device and the insulating substrate, and the circuit pattern immediately below the semiconductor device sandwiched between the semiconductor devices located between two circuit patterns and the insulating substrate Heat dissipation imbalance is achieved by improving the heat radiation efficiency of the semiconductor element sandwiched by the semiconductor elements located at both ends by making the circuit pattern relatively thinner than the thickness to the lower surface of the substrate and making the circuit pattern thicker. The effect of suppressing the

  In addition, the portion of the circuit pattern immediately below the semiconductor element sandwiched by the semiconductor elements positioned at both ends is changed to silver or the like, which is a material having a better thermal conductivity than the portion of the circuit pattern directly below the semiconductor elements positioned at both ends. Thus, the heat dissipation efficiency of the semiconductor element sandwiched by the semiconductor elements positioned at both ends can be further improved than the semiconductor elements positioned at both ends.

  The present invention can freely combine each embodiment and modification within the scope of the invention, and can suitably modify or omit each embodiment.

  1a, 1b, 1c Semiconductor elements, 2a, 2b, 2c circuit patterns, 3 insulating substrates, 4 copper bases, 5 output patterns, 6 metal wires, 11a, 11b heat radiation path, 100 power modules.

Claims (3)

An insulating substrate having a circuit pattern joined to one main surface,
A power module having at least three or more power semiconductor elements joined to the circuit pattern and mounted on the insulating substrate in a line.
Among the power semiconductor device, the first power semiconductor element and the thickness of the direction perpendicular to the main surface of the circuit pattern directly under the third power semiconductor element located sandwiched between the second power semiconductor element located at both ends A power module characterized by having a thickness in a direction perpendicular to the main surface of the circuit pattern immediately below the first power semiconductor element or the second power semiconductor element. The direction perpendicular to the main surface from the junction of the circuit pattern directly below the first power semiconductor element or the second power semiconductor element and the main surface to the other surface of the insulating substrate facing the main surface The thickness of the insulating substrate is larger than the thickness of the insulating substrate in the direction perpendicular to the main surface from the bonding portion between the circuit pattern directly below the third power semiconductor element and the main surface to the other surface. The power module according to claim 1. The power module according to claim 1, wherein the circuit pattern located immediately below the third power semiconductor element is made of silver.

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