JP6561954B2 - Manufacturing method of semiconductor wafer - Google Patents

Description

  The present invention relates to a method for manufacturing a semiconductor wafer.

  In the manufacturing process of semiconductor wafers, semiconductor wafers that have been subjected to various types of processing are inspected before shipment, and based on the inspection results, non-defective and non-defective products that can be shipped as products are classified. Furthermore, a semiconductor wafer that has not been classified as a non-defective product is also subjected to a regeneration process to regenerate (see Patent Documents 1 and 2). In addition, semiconductor wafers that are not classified as non-defective products can be shipped as products with a degree of defects detected by inspection that can be shipped as products by reprocessing, and also shipped as products even after reprocessing. May be so severe that it is difficult. In such a case, it has also been proposed to perform a regeneration process by selecting a semiconductor wafer including defects that can be shipped as products by performing a regeneration process (see Patent Document 1).

JP-A-5-259015 JP 2002-175960 A

  As mentioned above, defective products that are difficult to ship as a product even if they are reprocessed by selecting a reproducible semiconductor wafer from the semiconductor wafers that have been detected defective by inspection. Can be removed from the target of playback processing in advance. As a result, waste that would otherwise be reclaimed can be eliminated, and the semiconductor wafer manufacturing process can be made more efficient. However, if further efficiency can be achieved, the production of semiconductor wafers can be achieved. It is possible to further improve the performance.

  Therefore, an object of the present invention is to achieve further efficiency improvement in the manufacturing process of a semiconductor wafer.

  As a result of intensive studies to achieve the above object, the present inventors have newly found the following method for manufacturing a semiconductor wafer.

That is, the manufacturing method of the semiconductor wafer of the present invention is:
In a production line including a plurality of processes, a semiconductor wafer (hereinafter, the semiconductor wafer is also simply referred to as “wafer”) is sequentially processed from the upstream process to the downstream process to prepare a processed semiconductor wafer. Wafer processing process;
An inspection process for subjecting the processed semiconductor wafer to a plurality of inspections;
Based on the inspection result of the inspection, according to a determination matrix prepared in advance, a determination step for determining a determination code of the processed semiconductor wafer,
Including
In the above inspection process, a classification code is determined for each inspection result of each of the plurality of inspections. The classification code is a non-defective product whose inspection result is determined to be a non-defective product level and a lower product that is lower than the non-defective product level. By carrying out all the processes from the most upstream to the most downstream of the above production line or the processes from the middle to the most downstream of the above production line by sequentially determining the allowable level that can be diverted for the production of semiconductor wafers. A correctable product that is determined to be able to be corrected to a non-defective product level or the above-mentioned acceptable level is classified into a defective product that is determined to be non-transferable and cannot be corrected, and correction is started for the correctable product on the production line. Classify processing,
The determination matrix determines a determination code according to the determination criteria shown in Table 1 below for each combination of the classification codes on the processed semiconductor wafer,
According to the determination code, the processing for correcting to the non-defective product level or the allowable level can be performed by sequentially performing the entire process from the most upstream to the most downstream of the production line or the process from the middle to the most downstream of the production line. If determined, all processes from the most upstream to the most downstream of the production line or processes from the middle of the production line to the most downstream of the processed semiconductor wafer are performed according to the determined determination code. A wafer correction process for correcting the processed semiconductor wafer by performing sequentially,
A method for manufacturing a semiconductor wafer,
It is.

In the semiconductor wafer manufacturing method, in a production line including a plurality of processes, a semiconductor wafer is sequentially processed in the order of upstream processing to downstream processing to prepare a processed semiconductor wafer, and then the processed semiconductor wafer is processed. Inspect and classify. That is, a processed semiconductor wafer can be inspected and classified after a series of processes without having to inspect each process or between processes. Furthermore, the wafer correction process performed on the semiconductor wafer determined to be correctable can be performed on the manufacturing line without separately preparing a correction processing line. The wafer correction process is started from a process determined by a classification code determined according to a determination matrix prepared in advance. Therefore, it is possible to regenerate the correctable product to a quality that can be shipped as a product wafer without having to consider and determine how to perform the wafer correction process for each determination. Furthermore, when it is determined that correction is started from a different process in the production line by a plurality of classification codes for a certain processed semiconductor wafer, the process performed from the most upstream in the production line is started. By starting the correction, the wafer correction process can be performed efficiently.
Thus, according to the semiconductor wafer manufacturing method, the semiconductor wafer manufacturing efficiency can be improved (that is, further efficiency can be achieved).

  In one aspect, a determination code is determined for each of a plurality of processed semiconductor wafers by performing the steps from the wafer processing step to the determination step on a plurality of semiconductor wafers, and correction is performed from the same processing on the manufacturing line. The same wafer correction process is performed on a plurality of processed semiconductor wafers to which a determination code to start is given.

  In one aspect, the manufacturing line includes an outer peripheral portion polishing process, a rough polishing process, a final polishing process, and a cleaning process in this order from upstream to downstream. In the present invention and the present specification, unless otherwise specified, “include in this order” means that various processes are performed continuously or intermittently in the order described. It is allowed that other processes are included between the processes.

  In one embodiment, the production line includes a rough polishing process, an outer periphery polishing process, a final polishing process, and a cleaning process in this order from upstream to downstream.

  In one aspect, the plurality of inspections include an inspection selected from the group consisting of a shape accuracy inspection, a cleanliness inspection, and an appearance inspection.

  ADVANTAGE OF THE INVENTION According to this invention, the further efficiency improvement of the manufacturing process of a semiconductor wafer can be achieved.

  Below, the manufacturing method of the semiconductor wafer of this invention is demonstrated in detail.

[Wafer processing process]
The wafer processing step is a step of preparing a processed semiconductor wafer by sequentially processing a semiconductor wafer in the order of upstream processing to downstream processing in a production line including a plurality of processing. Note that the terms “upstream” and “downstream” relating to the production line are not used in relation to the positional relationship of the locations where processing is performed. Among a plurality of processes, the earlier the order in which the processes are performed in the production line, the more upstream processes, and the slower the order in which processes are performed, the more downstream processes. Therefore, the “most upstream process” is a process performed first in the production line, and the “most downstream process” is a process performed last in the production line. In the manufacturing line, all of the plurality of processes may be continuously performed while transporting the semiconductor wafer to be processed using the transport unit. Alternatively, in the production line, all or some of the plurality of processes may be performed intermittently. For example, after a certain process is completed, the semiconductor wafer may be temporarily stored in a storage place, and then the semiconductor wafer may be taken out from the storage place and subjected to subsequent processing in the manufacturing line.

  The semiconductor wafer manufactured by the manufacturing method of the present invention can be various semiconductor wafers that can be used as a substrate (semiconductor substrate) of various devices such as a silicon wafer. Examples of the process included in the production line include various processes that are usually included in the semiconductor wafer manufacturing process. For example, in a manufacturing process of a silicon wafer which is an example of a semiconductor wafer, at least polishing treatment and cleaning treatment are usually performed on a wafer cut (sliced) from, for example, an ingot grown by the Czochralski method.

  In one aspect, the polishing process includes an outer peripheral part polishing process, a rough polishing process, and a final polishing process in this order. In another aspect, the polishing process includes a rough polishing process, an outer peripheral part polishing process, and a final polishing process in this order. The outer peripheral polishing process is a mirror polishing process performed on the outer peripheral part (chamfered part, notch part) of the wafer. On the other hand, the rough polishing process is a mirror polishing process that is performed to form a wafer product and to remove fine irregularities on the surface. On the other hand, the finish polishing process is a polishing process performed to remove haze that is a cloudy component of the surface after the rough polishing process. The various polishing processes described above can be performed by mechanical and / or chemical polishing that is usually performed in the manufacturing process of a semiconductor wafer.

  The cleaning process can be performed, for example, at least after the final polishing, and can be performed at any stage before and / or after the above-described various polishing processes. The cleaning process is a known cleaning method for semiconductor wafers, for example, SC1 cleaning (cleaning using ammonia, hydrogen peroxide and water), SC2 cleaning (cleaning using hydrochloric acid, hydrogen peroxide and water), RCA cleaning (SC1). The cleaning can be performed by a combination of cleaning and SC2 cleaning).

[Inspection process]
The processed semiconductor wafer that has been subjected to a plurality of processes in the wafer processing process is subjected to an inspection process. In the inspection process, a plurality of inspections are performed. The number of inspections performed in the inspection process is plural, that is, two or more, and may be three or more (for example, five or less as an example). Examples of the inspection include a shape accuracy inspection, a cleanness inspection, and an appearance inspection of the semiconductor wafer. The shape accuracy is inspected by, for example, a flatness measuring device, a nanotopography measuring device (nanotopography is a waviness component on the wafer surface and is included in flatness in a broad sense), a magic mirror inspection device, etc. be able to. The cleanliness inspection can be performed by foreign matter inspection, for example, particle inspection by a particle inspection apparatus, visual inspection, or the like. Further, the appearance can be inspected by, for example, irradiating the semiconductor wafer with a light source such as a fluorescent lamp, an incandescent lamp, and a condensing lamp and visually observing it.
Each of the above various inspections can be performed by a known inspection method as a method for inspecting a semiconductor wafer and / or using a commercially available or known inspection apparatus. Moreover, a certain test | inspection can also be performed by visual inspection, and you may perform both the test | inspection by an inspection apparatus and visual inspection. In the visual inspection, for example, the presence and / or extent of cracks, scratches, scratches, warpage, etc. of the processed semiconductor wafer can be determined by visual inspection. In the present invention and this specification, the number of inspections is counted for each inspection result to which a classification code is assigned. For example, as an example, when the cleanliness inspection is performed by an inspection device and visual inspection, when a classification code is independently assigned to the inspection result by the inspection device and the visual inspection result, the inspection by the inspection result and the visual inspection are Count the number of tests as a separate test.

  The inspection result of each inspection can be determined in at least two stages of pass and fail. A passing inspection result for one inspection means that the inspection result was a good product level. Moreover, about one certain test | inspection, it can also classify | categorize and determine the test result of a failure. For example, the rejected inspection result can be determined by classifying into two or more stages according to the type and / or degree of the defect detected by the inspection. A specific mode of classification of rejected test results will be exemplified later. On the other hand, whether a processed semiconductor wafer to be inspected is a non-defective product, a divertable product, a correctable product, or a defective product is determined according to a determination matrix described later in detail based on the inspection results of a plurality of inspections.

  In one aspect, in the wafer processing step, the semiconductor wafer is accommodated in a storage container from the most upstream process or an intermediate process in the production line, and the semiconductor wafer is taken out from the storage container at each processing position, and then processed. Re-accommodate in the storage container and carry it to the next processing position (for example, transport by a transport means), and sequentially perform the operations of taking out the semiconductor wafer from the storage container at the next processing position and performing the processing until the most downstream processing. You can also In this case, an inspection process can also be implemented for every container which accommodated the processed semiconductor wafer after a wafer processing process. Moreover, in one aspect, an inspection process is carried out for each storage container after the processed semiconductor wafer obtained after the wafer processing process is stored in the storage container regardless of whether the storage container is used in the wafer processing process. You can also. In this aspect, due to an erroneous operation of the operation of storing the semiconductor wafer in the storage container, the storage container without the processed semiconductor wafer may be subjected to the inspection process without being stored in the storage container. In addition, by performing sampling for extracting a wafer between processes included in the wafer processing process, a container without a wafer may be subjected to an inspection process. In such a case, the inspection result of “no processed semiconductor wafer (hereinafter also simply referred to as“ no wafer ”)” can be determined for the storage container as the inspection result.

[Judgment process]
In the above inspection process, a plurality of inspections are performed. Therefore, an inspection result can be obtained for each of a plurality of inspections with respect to a certain processed semiconductor wafer. In the classification process, based on the inspection results obtained in this way, each inspection result of the processed semiconductor wafer is classified into at least the following four types:
Good product level (good product);
An acceptable level that is lower than the non-defective product level (low level) and can be diverted to the production of the lower product semiconductor wafer (reusable product);
Correction can be made to a non-defective product level or the above acceptable level by sequentially performing all processing from the most upstream to the most downstream of the production line or from the middle to the most downstream of the production line (modifiable products);
Neither diversion nor correction is possible (defective product);
Classify either.
Further, for the correctable product, the process for starting the correction in the production line is classified.
An example of specific modes of the above classification will be described later, but the present invention is not limited to the specific modes described below. The above-mentioned non-defective product level means that the inspection result is a result sufficient to be attached to the next process for shipping as a product wafer having the target quality or the next process for processing into a product wafer. In addition, the above acceptable level is the next process for shipping as a product wafer if the inspection result is less than the above-mentioned non-defective product level but for the production of a product wafer of lower quality (lower quality) than the target quality. Or a result sufficient to be attached to the next process for processing into a product wafer. The specific quality and level of the target quality, the lower quality, the non-defective product level, and the acceptable level are not limited, and can be determined according to the quality and level required for a semiconductor wafer to be shipped as a product.

  In the determination step, the classification code of the processed semiconductor wafer that has undergone the wafer processing step and the inspection step is determined based on the determination matrix prepared in advance based on the inspection results of the plurality of inspections performed in the inspection step. The determination matrix includes a classification code determined for each inspection result for each inspection of a plurality of inspections performed in an inspection process for a certain processed semiconductor wafer. The classification code classifies the non-defective product, the divertable product, the correctable product, and the defective product, and classifies the process for starting the correction on the manufacturing line for the correctable product. The determination matrix can be created, for example, by conducting a preliminary experiment using a production line and an inspection apparatus used for actual production before actual production of the semiconductor wafer. Alternatively, a determination matrix may be created based on experience such as production results of product wafers.

  The determination matrix determines a determination code according to the determination criteria shown in Table 1 above for each combination of classification codes given to the processed semiconductor wafer for each of a plurality of inspections. Below, a specific aspect is shown and the determination matrix is further described. However, the present invention is not limited to the following specific embodiments. Hereinafter, a specific embodiment in which a processed semiconductor wafer is prepared in a production line including an outer peripheral portion polishing process, a rough polishing process, a final polishing process, and a cleaning process in this order from upstream to downstream will be described as an example. Therefore, in the following specific aspect, the correction of the correctable product is sequentially performed from the outer periphery polishing process which is the most upstream process of the manufacturing line or from any process after the outer periphery polishing process. Moreover, in the following specific aspect, the inspection process includes three inspections, inspection 1, inspection 2, and inspection 3. Inspection 1 is a shape accuracy inspection, inspection 2 is a cleanliness inspection, and inspection 3 is an appearance inspection.

  The determination matrix includes a classification code defined for each inspection result for each of a plurality of inspections performed on the processed semiconductor wafer. For example, the classification code can be determined for each inspection result by associating the inspection result code with the classification code. The classification codes are determined to create the determination matrix, but it is not essential that all the classification codes correspond to the inspection result codes. Some classification codes may not be used without corresponding to the inspection result codes.

  Table 2 shows a specific example of the definition of the inspection result code, and Table 3 shows a specific example of the classification code. Table 4 shows a specific example of a correspondence table between the inspection result codes and the classification codes according to the inspection results of the inspections 1, 2, and 3. Table 5 shows a specific example of a determination matrix for determining the determination code of the processed semiconductor wafer based on the inspection results of inspection 1, inspection 2 and inspection 3.

[Wafer correction process]
The processed semiconductor wafer determined as a non-defective product in the determination process described above can be subjected to the next process (cleaning, packing, etc.) for shipping as a product semiconductor wafer without going through the wafer correction process. Alternatively, the processed semiconductor wafer determined to be a non-defective product can be subjected to a subsequent process (for example, vapor phase growth for forming an epitaxial layer, ion implantation, etc.) for processing into a product semiconductor wafer.
Moreover, the processed semiconductor wafer determined to be defective in the determination process can be discarded without being subjected to a further process. Or you may use the processed semiconductor wafer determined as inferior goods as a sample for the destructive inspection performed for process control of the manufacturing process of a semiconductor wafer.

  On the other hand, in the determination process, the entire process from the most upstream to the most downstream of the production line or the process from the middle to the most downstream of the production line is performed to correct the semiconductor wafer having a non-defective product level or the allowable level. The correctable product determined to be possible is subjected to a wafer correcting process. In the method for manufacturing a semiconductor wafer according to the present invention, the wafer correction process performed on the correctable product is determined in advance in the above-described manufacturing line, that is, a manufacturing line in which a plurality of processes for obtaining a processed semiconductor wafer are performed. The process starts with a process defined by a determination code determined according to the matrix. In other words, the determination code determines from which process of the production line the wafer correction process is performed to the most downstream process. By storing multiple processed semiconductor wafers that have undergone the determination process together for each wafer that starts the wafer correction process from the same process on the production line, by performing the same wafer correction process on these multiple wafers, The wafer correction process can be performed efficiently. Also, lot management is performed to store multiple semiconductor wafers with the same judgment code in the same lot, and semiconductor wafers in the same lot are processed in the same next process (wafer correction process, next process for shipping as a product semiconductor wafer) The efficiency of the manufacturing process of the semiconductor wafer can be further improved by subjecting it to the next process for processing into a product semiconductor wafer, disposal, and the like.

According to the semiconductor wafer manufacturing method of the present invention described above, it is possible to perform the wafer correction process for obtaining a target quality product or a lower quality product semiconductor wafer with a smaller number of processes.
In addition, using a semiconductor wafer automatic transfer system controlled by a terminal, automatic generation, automatic storage, and automatic transfer of lots containing multiple semiconductor wafers with the same determination code (automatic transfer to the next process) It is possible to further improve the efficiency of the semiconductor wafer manufacturing process.

  The present invention is useful in the field of manufacturing semiconductor wafers that can be used as substrates for various devices.

Claims (5)

In a production line including a plurality of processes, a wafer processing step of preparing a processed semiconductor wafer by sequentially performing processing on the semiconductor wafer in the order of upstream processing to downstream processing;
An inspection step for subjecting the processed semiconductor wafer to a plurality of inspections;
Based on the inspection result of the inspection, according to a determination matrix prepared in advance, a determination step of determining a determination code of the processed semiconductor wafer;
Including
In the inspection step, for each inspection of the plurality of inspections, a classification code is defined for each inspection result, the classification code is a non-defective product whose inspection result is determined to be a non-defective product level, and a lower level that is lower than the non-defective product level. A divertable product determined to be an acceptable level that can be diverted for the production of a product semiconductor wafer, and all processes from the most upstream to the most downstream of the production line or the process from the middle to the most downstream of the production line are sequentially performed. Classifies the correctable product determined to be correctable to the non-defective product level or the allowable level, and the defective product determined to be unusable and divertable, and the correctable product is classified in the production line Classify the process that initiates the fix,
The determination matrix determines a determination code according to the determination criteria shown in Table 1 below for each combination of the classification codes on the processed semiconductor wafer,
Performing a process for correcting to the non-defective product level or the allowable level by sequentially executing all processes from the most upstream to the most downstream of the production line or processes from the middle to the most downstream of the production line according to the determination code. Is determined, all the processes from the most upstream to the most downstream of the production line or the processes from the middle of the production line to the most downstream are performed on the processed semiconductor wafer. A wafer correction process for correcting the processed semiconductor wafer by sequentially performing according to
A method for manufacturing a semiconductor wafer, further comprising:
By performing the steps from the wafer processing step to the determination step for a plurality of semiconductor wafers, a determination code is determined for each of the plurality of processed semiconductor wafers,
The semiconductor wafer manufacturing method according to claim 1, wherein the same wafer correction process is performed on a plurality of processed semiconductor wafers to which a determination code for starting correction from the same processing on the manufacturing line is given. The method for manufacturing a semiconductor wafer according to claim 1, wherein the manufacturing line includes an outer peripheral portion polishing process, a rough polishing process, a final polishing process, and a cleaning process in this order from upstream to downstream. The method for manufacturing a semiconductor wafer according to claim 1, wherein the manufacturing line includes a rough polishing process, an outer peripheral part polishing process, a final polishing process, and a cleaning process in this order from upstream to downstream. The semiconductor wafer manufacturing method according to claim 1, wherein the plurality of inspections include an inspection selected from the group consisting of a shape accuracy inspection, a cleanness inspection, and an appearance inspection.