JP6589787B2 - Inverter control device - Google Patents

Description

  The present invention relates to an inverter control device.

  Patent Document 1 discloses an inverter control device. The control device changes the carrier frequency of the inverter when the carrier frequency of the inverter approaches the resonance frequency of the motor. For this reason, resonance between the carrier frequency of the inverter and the motor can be avoided.

JP 2009-284719 A

  However, in the control device described in Patent Document 1, the set value of the carrier frequency after the change is limited. For this reason, if a plurality of resonance frequencies exist in the motor, resonance between the carrier frequency of the inverter and the motor may not be avoided.

  The present invention has been made to solve the above-described problems. An object of the present invention is to provide an inverter control device that can more reliably avoid the carrier frequency of the inverter and resonance with the motor.

The inverter control device according to the present invention includes a frequency analysis unit that calculates a frequency having a large power spectrum from an acceleration or speed detected by a detector attached to a motor driven in accordance with the operation of the inverter, and the frequency analysis. If the absolute value of the difference between the large frequency of the power spectrum calculated by the unit and a positive integer multiple of the current carrier frequency of the inverter is equal to or greater than a threshold value , the carrier frequency of the inverter is not changed and the absolute value is A carrier frequency setting unit configured to change the carrier frequency of the inverter to a new carrier frequency so that resonance between the carrier frequency of the inverter and the motor is avoided when the frequency is less than the threshold value;
An inverter control device according to the present invention includes a frequency analysis unit that calculates a frequency having a large power spectrum from an acceleration or speed detected by a detector attached to a motor driven in accordance with the operation of the inverter, A carrier frequency setting unit that changes the carrier frequency of the inverter to a new carrier frequency so that resonance between the carrier frequency and the motor is avoided, and the carrier frequency setting unit changes the carrier frequency of the inverter It is determined whether or not resonance between the carrier frequency of the inverter and the motor is avoided by comparing the peak values of the power spectra before and after.

  According to the present invention, when the absolute value of the difference between the large frequency of the power spectrum and the positive integer multiple of the current carrier frequency of the inverter is less than the threshold value, the carrier frequency of the inverter is changed to a new carrier frequency. For this reason, the carrier frequency of the inverter and the resonance with the motor can be avoided more reliably.

1 is a configuration diagram of a motor system to which an inverter control device according to Embodiment 1 of the present invention is applied. It is a figure which shows the frequency analysis result by the control apparatus of the inverter in Embodiment 1 of this invention. It is a flowchart for demonstrating the outline | summary of operation | movement of the control apparatus of the inverter in Embodiment 1 of this invention. It is a hardware block diagram of the control apparatus of the rolling line in Embodiment 1 of this invention. It is a block diagram of the motor system with which the control apparatus of the inverter in Embodiment 2 of this invention is applied. It is a flowchart for demonstrating the outline | summary of operation | movement of the control apparatus of the inverter in Embodiment 2 of this invention. It is a flowchart for demonstrating the outline | summary of operation | movement of the control apparatus of the inverter in Embodiment 3 of this invention.

  A mode for carrying out the invention will be described with reference to the accompanying drawings. In addition, the same code | symbol is attached | subjected to the part which is the same or it corresponds in each figure. The overlapping explanation of the part is appropriately simplified or omitted.

Embodiment 1 FIG.
1 is a configuration diagram of a motor system to which an inverter control apparatus according to Embodiment 1 of the present invention is applied.

  In the motor system of FIG. 1, the motor 1 is provided so as to rotate a rotating body (not shown). For example, the motor 1 is provided so that the roll of the rolling mill of the rolling line which is not shown in figure can be rotated. The drive device 2 includes an inverter 2a. The output unit of the drive device 2 is connected to the input unit of the motor 1. The detector 3 is attached to the motor 1. For example, the detector 3 is an acceleration pickup. For example, the detector 3 is attached to the stator core of the motor 1.

  The control device 4 includes a frequency analysis device 4a, a programmable logic controller 4b, and a housing 4c.

  The input unit of the frequency analyzer 4 a is connected to the output unit of the detector 3. The input unit of the programmable logic controller 4b is connected to the output unit of the frequency analyzer 4a. The output unit of the programmable logic controller 4 b is connected to the input unit of the drive device 2. The housing 4c houses the frequency analysis device 4a and the programmable logic controller 4b.

  The drive device 2 performs PWM control on the inverter 2a at the set carrier frequency. The motor 1 is driven according to the operation of the inverter 2a. The detector 3 detects acceleration or speed associated with the vibration of the motor 1.

  The frequency analysis device 4a functions as a frequency analysis unit. Specifically, the frequency analyzer 4 a analyzes the vibration frequency from the acceleration or velocity detected by the detector 3. The frequency analysis device 4a calculates a frequency with a large power spectrum from the acceleration or velocity detected by the detector 3.

  The programmable logic controller 4b functions as a carrier frequency setting unit. Specifically, the programmable logic controller 4b is programmable when the absolute value of the difference between the large frequency of the power spectrum calculated by the frequency analyzer 4a and the current carrier frequency of the inverter 2a is less than a threshold. The logic controller 4b changes the carrier frequency of the inverter 2a to a new carrier frequency so that resonance between the carrier frequency of the inverter 2a and the motor 1 is avoided.

Next, a method for setting a new carrier frequency will be described with reference to FIG.
FIG. 2 is a diagram showing a frequency analysis result by the inverter control device in Embodiment 1 of the present invention. The horizontal axis in FIG. 2 is the frequency (Hz). The vertical axis in FIG. 2 is the amplitude (mm).

  As shown in FIG. 2, when there are a plurality of resonance frequencies, the amplitude increases at each of these frequencies.

  The programmable logic controller 4b sets a frequency different from these frequencies as a new carrier frequency so that resonance between the carrier frequency of the inverter 2a and the motor 1 is avoided.

Next, the outline | summary of operation | movement of the control apparatus 4 is demonstrated using FIG.
FIG. 3 is a flowchart for illustrating an outline of the operation of the inverter control apparatus according to Embodiment 1 of the present invention.

In step S1, the frequency analyzer 4a reads acceleration or velocity from the acceleration pickup. Thereafter, the frequency analyzer 4a performs the operation of step S2. In step S2, the frequency analyzer 4a calculates a frequency f _n having a large power spectrum by fast Fourier transform. At this time, n represents the order. n is an integer of 1 or more.

Thereafter, the programmable logic controller 4b performs the operation of step S3. In step S3, the programmable logic controller 4b determines whether the absolute value is less than or positive real number δ of the difference between the positive integer k times the large frequency f _n and carrier frequency f _c of the power spectrum.

If the absolute value of the difference between the positive integer k times the large frequency f _n and carrier frequency f _c of the power spectrum is not less than a positive real number δ in step S3, the programmable logic controller 4b performs the operation of step S4. In step S4, the programmable logic controller 4b sets the carrier frequency _{f c} of the current as a new carrier frequency _{f c.}

Thereafter, the programmable logic controller 4b performs the operation of step S5. In step S5, the programmable logic controller 4b outputs a new carrier frequency _{f c.} Thereafter, the programmable logic controller 4b ends the operation.

If the absolute value of the difference between the positive integer k times the large frequency f _n and carrier frequency f _c of the power spectrum is less than a positive real number δ in step S3, the programmable logic controller 4b performs the operation of step S6. In step S6, the programmable logic controller 4b, a value of the average value obtained by dividing the k a frequency f _{n + 1} of the large frequency f _n and the next order of the power spectrum as a new carrier frequency f _c.

Thereafter, the programmable logic controller 4b performs the operation of step S6. In step S5, the programmable logic controller 4b outputs information of the new carrier frequency f _c. Thereafter, the programmable logic controller 4b ends the operation.

  According to Embodiment 1 described above, when the absolute value of the difference between the frequency having a large power spectrum and a positive integer multiple of the carrier frequency is less than a positive real number δ, the carrier frequency of the inverter 2a is a new carrier frequency. Changed to For example, when the detector 3 is attached to the stator core of the motor 1, resonance between the carrier frequency of the inverter 2a and the natural frequency of the stator core of the motor 1 is avoided. For this reason, the resonance of the carrier frequency of the inverter 2a and the motor 1 can be avoided more reliably. As a result, the life of the motor 1 can be extended. Furthermore, the noise of the motor 1 can be suppressed.

Next, an example of the control device 4 will be described with reference to FIG.
FIG. 4 is a hardware configuration diagram of the rolling line control apparatus according to Embodiment 1 of the present invention.

  Each function of the control device 4 can be realized by a processing circuit. For example, the processing circuit includes at least one processor 5a and at least one memory 5b. For example, the processing circuit comprises at least one dedicated hardware 6.

  When the processing circuit includes at least one processor 5a and at least one memory 5b, each function of the control device 4 is realized by software, firmware, or a combination of software and firmware. At least one of software and firmware is described as a program. At least one of software and firmware is stored in at least one memory 5b. At least one processor 5a implements each function of the control device 4 by reading and executing a program stored in at least one memory 5b. The at least one processor 5a is also referred to as a CPU (Central Processing Unit), a central processing unit, a processing unit, an arithmetic unit, a microprocessor, a microcomputer, and a DSP. For example, the at least one memory 5b is a nonvolatile or volatile semiconductor memory such as RAM, ROM, flash memory, EPROM, or EEPROM, a magnetic disk, a flexible disk, an optical disk, a compact disk, a mini disk, a DVD, or the like.

  If the processing circuit comprises at least one dedicated hardware 6, the processing circuit is implemented, for example, as a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC, an FPGA, or a combination thereof. The For example, each function of the control device 4 is realized by a processing circuit. For example, each function of the control device 4 is collectively realized by a processing circuit.

  Some of the functions of the control device 4 may be realized by dedicated hardware 6 and the other part may be realized by software or firmware. For example, the function of the frequency analyzer 4a is realized by a processing circuit as dedicated hardware 6, and the function of the programmable logic controller 4b is read by at least one processor 5a reading a program stored in at least one memory 5b. It may be realized by executing.

  As described above, the processing circuit realizes each function of the control device 4 by the hardware 6, software, firmware, or a combination thereof.

Embodiment 2. FIG.
5 is a block diagram of a motor system to which an inverter control device according to Embodiment 2 of the present invention is applied. In addition, the same code | symbol is attached | subjected to the same part as Embodiment 1, or an equivalent part. The description of this part is omitted.

  The control device 4 according to the second embodiment includes a display 4d. The display 4d is attached to the housing 4c.

  In the second embodiment, the programmable logic controller 4b determines whether resonance between the carrier frequency of the inverter 2a and the motor 1 is avoided by comparing the peak values of the power spectrum before and after the change of the carrier frequency of the inverter 2a. To do. When resonance is avoided, the programmable logic controller 4b causes the display 4d to display “resonance avoidance”.

Next, the outline | summary of operation | movement of the control apparatus 4 is demonstrated using FIG.
FIG. 6 is a flowchart for illustrating the outline of the operation of the inverter control apparatus according to Embodiment 2 of the present invention.

Step S11 is the same as step S1 in FIG. Thereafter, the frequency analyzer 4a performs the operation of step S12. In step S12, the frequency analyzer 4a calculates the frequency f _{n having} a large power spectrum and the peak value P _n of the power spectrum by fast Fourier transform. At this time, n represents the order. n is an integer of 1 or more.

  After step S12, the programmable logic controller 4b performs the operations from step S13 to step S16. Steps S13 to S16 are the same as steps S3 to S6 in FIG.

  After step S12, the programmable logic controller 4b also performs the operations from step S17 to step S19.

In step S17, the programmable logic controller 4b determines that the absolute value of the difference between the peak value P _n of the power spectrum calculated by the frequency analyzer 4a and the peak value Q _n of the power spectrum at the frequency f _n in the immediately preceding sampling period is positive. It is determined whether it is larger than the real number d.

When the absolute value of the difference between the peak value P _n of the power spectrum calculated by the frequency analyzer 4a in step S17 and the peak value Q _n of the power spectrum at the frequency f _n in the immediately preceding sampling period is equal to or less than a positive real number d, The programmable logic controller 4b determines that resonance is not avoided. Thereafter, the programmable logic controller 4b performs the operation of step S18.

At step S18, the programmable logic controller 4b updates the peak value of the power spectrum of the frequency _{f n} from the peak value _{P n} to the peak value _{Q n.} Thereafter, the programmable logic controller 4b ends the operation.

When the absolute value of the difference between the peak value P _n of the power spectrum calculated by the frequency analyzer 4a in step S17 and the peak value Q _n of the power spectrum at the frequency f _n in the immediately preceding sampling period is greater than the positive real number d The programmable logic controller 4b determines that resonance has been avoided. Thereafter, the programmable logic controller 4b performs the operation of step S19.

  In step S19, the programmable logic controller 4b displays “resonance avoidance” on the display 4d. Thereafter, the programmable logic controller 4b performs the operation of step S18.

At step S18, the programmable logic controller 4b updates the peak value of the power spectrum of the frequency _{f n} from the peak value _{P n} to the peak value _{Q n.} Thereafter, the programmable logic controller 4b ends the operation.

  According to the second embodiment described above, the programmable logic controller 4b avoids resonance between the carrier frequency of the inverter 2a and the motor 1 by comparing the peak values of the power spectrum before and after the change of the carrier frequency of the inverter 2a. It is determined whether or not it has been done. For this reason, it can be confirmed more reliably whether resonance between the carrier frequency of the inverter 2a and the motor 1 is avoided.

  At this time, if resonance is avoided, the display 4d displays “resonance avoidance”. For this reason, the avoidance of resonance can be reliably notified to the outside.

Embodiment 3 FIG.
FIG. 7 is a flowchart for explaining the outline of the operation of the inverter control apparatus according to Embodiment 3 of the present invention. The same reference numerals are given to the same or corresponding parts as those in the first embodiment or the second embodiment. The description of this part is omitted.

  In the third embodiment, the programmable logic controller 4b sets a new carrier frequency so as to be equal to or lower than a preset upper limit value.

Specifically, in step S0, the programmable logic controller 4b sets an upper limit value f _max of the carrier frequency. For example, the programmable logic controller 4b sets the upper limit value f _max of the carrier frequency based on an external operation. Thereafter, the programmable logic controller 4b performs the operations from step S21 to step S24. Steps S21 to S24 are the same as steps S11 to S14 in FIG.

After step S24, the programmable logic controller 4b performs the operation of step S25. At step S25, the programmable logic controller 4b determines the carrier frequency _{f c} is whether less than the upper limit value _{f max.}

If the carrier frequency _{f c} is less than the upper limit value _{f max} in step S25, the programmable logic controller 4b performs the operation of step S26. In step S26, the programmable logic controller 4b outputs a new carrier frequency _{f c.} Thereafter, the programmable logic controller 4b ends the operation.

If the absolute value of the difference between the positive integer k times the large frequency f _n and carrier frequency f _c of the power spectrum is less than a positive real number δ in step S23, the programmable logic controller 4b performs the operation of step S27.

In step S27, the programmable logic controller 4b sets the value of the average value obtained by dividing the k a frequency f _{n + 1} of the large frequency f _n and the next order of the power spectrum as a new carrier frequency f _c. After step S27, the programmable logic controller 4b performs the operation of step S25.

If the carrier frequency _{f c} is equal to or greater than the upper limit value _{f max} in step S25, the programmable logic controller 4b performs the operation of step S28. At step S28, the programmable logic controller 4b sets the value of the average value obtained by dividing the k a frequency f _n-1 orders before and large frequency f _n of the power spectrum as a new carrier frequency f _c.

Thereafter, the programmable logic controller 4b performs the operation of step S26. In step S26, the programmable logic controller 4b outputs a new carrier frequency _{f c.} Thereafter, the programmable logic controller 4b ends the operation.

  After step S22, the programmable logic controller 4b also performs operations from step S29 to step S31. Steps S29 to S31 are the same as steps S17 to S19 in FIG.

  According to the third embodiment described above, the programmable logic controller 4b sets a new carrier frequency so as to be equal to or lower than a preset upper limit value. For this reason, the carrier frequency can be appropriately set even for the inverter 2a of the PWM control system having a restriction on the carrier frequency.

  1 motor, 2 drive device, 2a inverter, 3 detector, 4 control device, 4a frequency analyzer, 4b programmable logic controller, 4c housing, 4d display, 5a processor, 5b memory, 6 hardware

Claims (3)

A frequency analysis unit that calculates a large frequency of the power spectrum from acceleration or speed detected by a detector attached to a motor driven according to the operation of the inverter;
If the absolute value of the difference between the large frequency of the power spectrum calculated by the frequency analysis unit and a positive integer multiple of the current carrier frequency of the inverter is greater than or equal to a threshold, the carrier frequency of the inverter is not changed, If the absolute value is less than the threshold, a carrier frequency setting unit that changes the carrier frequency of the inverter to a new carrier frequency so that resonance between the carrier frequency of the inverter and the motor is avoided;
Inverter control device comprising: A frequency analysis unit that calculates a large frequency of the power spectrum from acceleration or speed detected by a detector attached to a motor driven according to the operation of the inverter;
A carrier frequency setting unit that changes the carrier frequency of the inverter to a new carrier frequency so that resonance between the carrier frequency of the inverter and the motor is avoided;
With
The carrier frequency setting unit, Louis converter to determine whether resonance between the carrier frequency of the inverter motor is avoided by comparing the peak value of the power spectrum before and after the change of the carrier frequency of the inverter Control device.   The inverter control device according to claim 1, wherein the carrier frequency setting unit sets the new carrier frequency so as to be equal to or lower than a preset upper limit value.

Images