JP6595334B2 - Plasma processing apparatus and plasma processing method - Google Patents

Description

  The present invention relates to a plasma processing apparatus such as a dry etching apparatus and a plasma processing method. In particular, the present invention relates to a plasma processing apparatus and a plasma processing method that are effective when applied to a dry etching process in which a wafer is electrostatically attracted to an electrode for electrostatic attraction higher than the temperature of the transferred wafer.

  In a plasma processing apparatus, particularly a dry etching apparatus, the demand for the element shape of a semiconductor formed on a substrate to be processed has become severe year by year as the node width is reduced. Particularly, in recent semiconductor elements, there are various element materials, and it is required to process a film in which these different materials are laminated by a single plasma treatment.

  In such a plasma treatment, it is indispensable to manufacture a suitable semiconductor element by changing a plasma treatment condition such as a gas according to a film to be treated and performing a treatment under a suitable condition of the film. Among these conditions, one of the parameters that greatly affects the processing result is the temperature of the electrode / sample table on which the wafer is placed.

  In the etching process, in order to control the temperature of the wafer appropriately, an electrostatic adsorption voltage is applied to the electrode to hold the wafer by electrostatic adsorption, and heat conduction such as He (helium) is promoted between the wafer and the electrode. Gas to be introduced. At this time, if the temperature of the electrode is higher than the temperature of the transferred wafer and the temperature difference is large, the difference in thermal expansion coefficient between the wafer and the electrode, the difference in heat capacity between the electrode and the wafer, the thermal resistance between the electrode and the wafer As a result, rubbing occurs between the adsorbed wafer and the electrode surface, and the back surface of the wafer is damaged or the electrode surface is consumed, resulting in a problem that the life of the electrode is shortened.

  As a conventional technique for suppressing such wear between the wafer and the electrode surface, Japanese Patent Application Laid-Open No. 2014-195009 (Patent Document 1) is known. In this conventional technique, a processing chamber in which a plasma is formed inside a vacuum vessel that is decompressed, and a sample to be processed using the plasma is placed on the upper surface of the processing chamber that is disposed in the lower portion of the processing chamber. A sample stage, a dielectric film made of a dielectric material constituting a mounting surface on which the sample on the sample stage is placed, and the sample film disposed in the dielectric film. And an electrode to which electric power for adsorption and holding is supplied, and the sample to be processed conveyed into the decompressed processing chamber inside the vacuum vessel constitutes the upper surface of the sample stage arranged in the processing chamber The sample is held on the sample table until the sample temperature reaches a predetermined temperature or a predetermined time elapses while the sample is placed on the dielectric film, and then the sample is placed on the electrode disposed in the dielectric film. Power for electrostatic adsorption is supplied and held on the sample stage. Configuration processing in the processing chamber to form a plasma is initiated is disclosed.

  Japanese Patent Application Laid-Open No. 2007-217733 (Patent Document 2) is formed by placing a wafer to be processed on an electrostatic chuck disposed in a processing chamber and then supplying an inert gas into the processing chamber. The wafer is heated before processing using radiant heat from the plasma, and when the wafer temperature reaches the wafer thermal equilibrium temperature during plasma processing, the wafer is adsorbed and held by the electrostatic chuck, and plasma processing gas is introduced. A technique for performing plasma processing is disclosed.

Japanese Patent Application Laid-Open No. 2014-195009 JP 2007-217733 A

  In the above-described prior art, the following points have been insufficiently considered, causing problems.

  That is, in the above-mentioned Patent Document 1, heat is transferred between the dielectric film upper surface constituting the sample table upper surface and a gas having a heat transfer property supplied between the samples. In the configuration, there is a problem that the temperature rise of the sample is slow.

  Further, in Patent Document 2, since the wafer has the same potential as the floating potential of the plasma in a state where plasma is generated, a potential difference is generated between the electrostatic chuck and an unintended electrostatic attracting force is generated. . Furthermore, when high frequency (RF) power is applied to the electrode of the sample stage on which the electrostatic chuck is mounted, the wafer becomes a self-bias potential, and the potential difference between the electrostatic chuck and the wafer further increases, resulting in large electrostatic adsorption. Force is generated. Wafer temperature rise and thermal expansion occur in a state where electrostatic chucking force is generated between the electrostatic chuck and the wafer, so that the sliding between the wafer back surface and the electrostatic chuck surface and the resulting dust There was a problem that it was not possible to solve the occurrence of alien substances.

  It is an object of the present invention to generate an unintended electrostatic adsorption force due to a difference between a wafer potential and a sample table potential when heating by forming plasma or supplying high frequency power before adsorbing a wafer to the sample table surface. An object of the present invention is to provide a plasma processing apparatus or a plasma processing method that suppresses this, reduces the generation of substances that cause foreign matters from the wafer, and improves the processing yield.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  In one embodiment, a plasma processing apparatus includes a processing chamber disposed inside a vacuum vessel and generating plasma inside, and a wafer to be processed using the plasma placed on the upper surface of the processing chamber. A sample stage that is electrostatically attracted; and a film-like electrode that is disposed on the upper surface of the sample stage and is supplied with electric power for electrostatically attracting the wafer. Further, the electrode is formed so as to reduce a difference between a potential generated in the wafer by the plasma and a potential of the electrode during a period in which the plasma is formed in the processing chamber and the wafer is heated before the processing of the wafer is increased. A controller for adjusting the power supplied to the device. Alternatively, the potential generated in the wafer by high-frequency power supplied from a high-frequency power source connected to the sample stage during a period in which plasma is formed in the processing chamber and the wafer is heated before the processing of the wafer is increased. A controller is provided for adjusting the power supplied to the electrode so as to reduce the difference from the potential of the electrode.

  In one embodiment of the plasma processing method, a wafer to be processed is placed on the upper surface of a sample table placed in a processing chamber inside a vacuum vessel and electrostatically adsorbed, and plasma is formed in the processing chamber to process the wafer. This is a plasma processing method. Then, a plasma is formed in the processing chamber in a state where the wafer is placed on the upper surface of the sample table, and a potential generated in the wafer by the plasma and an electric power for electrostatically adsorbing the wafer on the upper surface of the sample table. The wafer is heated for a predetermined period while adjusting the power so as to reduce the difference from the potential of the supplied electrode, and then the processing of the wafer is increased. Alternatively, the wafer is placed on the upper surface of the sample stage and the potential generated in the wafer by high-frequency power supplied to the sample stage in a state where plasma is formed in the processing chamber while the wafer is placed on the upper surface of the sample stage. The wafer is heated for a predetermined period while adjusting the electric power so as to reduce the difference from the potential of the electrode to which electric power for electrostatic adsorption is supplied, and then the processing of the wafer is increased.

  The effects obtained by typical ones of the inventions disclosed in the present application will be briefly described as follows.

  According to one embodiment, it is possible to reduce sliding between the back surface of the wafer and the surface of the dielectric film on the upper part of the sample table and the generation of dust and fine particles due to this. As a result, damage to the back surface of the wafer and generation of foreign matter can be suppressed, and the reliability of the sample stage can be improved over a long period of time.

It is a longitudinal section showing an outline of composition of a plasma treatment apparatus concerning one embodiment of the present invention typically. It is a longitudinal cross-sectional view which expands and shows the outline of the structure of the sample stand of the plasma processing apparatus shown in FIG. 1 typically. It is a time chart which shows the flow of operation | movement of the process of the wafer which the plasma processing apparatus shown in FIG. 1 implements. It is a longitudinal cross-sectional view which expands and shows the outline of the structure of the sample stand concerning the modification of the plasma processing apparatus shown in FIG. 1 typically. 6 is a time chart showing a flow of wafer processing operations performed by the plasma processing apparatus according to the modification shown in FIG. 4.

  In the following embodiments, when it is necessary for the sake of convenience, the description will be divided into a plurality of sections or embodiments. However, unless otherwise specified, they are not irrelevant and one is the other. There are some or all of the modifications, details, supplementary explanations, and the like.

  Also, in the following embodiments, when referring to the number of elements (including the number, numerical value, quantity, range, etc.), particularly when clearly indicated and when clearly limited to a specific number in principle, etc. Except, it is not limited to the specific number, and may be more or less than the specific number.

  Further, in the following embodiments, the constituent elements (including element steps and the like) are not necessarily indispensable unless otherwise specified and clearly considered essential in principle. Needless to say.

  Similarly, in the following embodiments, when referring to the shape, positional relationship, etc., of components, etc., unless otherwise specified, and in principle, it is considered that this is not clearly the case. Including those that are approximate or similar to the shape. The same applies to the above numerical values and ranges.

  Hereinafter, embodiments will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted. In order to make the drawings easy to understand, hatching may be omitted even in a sectional view, and hatching may be added even in a plan view.

[One Embodiment]
A plasma processing apparatus and a plasma processing method according to an embodiment will be described with reference to FIGS. The present embodiment relates to a plasma processing apparatus such as a dry etching apparatus and a plasma processing method, and in particular, in dry etching processing in which a wafer is electrostatically attracted to an electrode for electrostatic attraction higher than the temperature of the transferred wafer. The present invention relates to a plasma processing apparatus and a plasma processing method that are effective when applied.

<Plasma processing equipment>
FIG. 1 is a longitudinal sectional view schematically showing the outline of the configuration of the plasma processing apparatus according to the present embodiment. In this embodiment, after the wafer 1 to be processed is placed on the upper surface of the sample stage 2 placed in the processing chamber 101 inside the vacuum vessel, plasma is formed in the processing chamber 101 to preheat the wafer 1. After being performed, the wafer 1 is electrostatically adsorbed on the upper surface of the sample stage 2, and a heat transfer gas is introduced on the rear surface thereof.

  The plasma processing apparatus according to the present embodiment shown in FIG. 1 is a vacuum vessel having a cylindrical shape including a processing chamber 101 having a cylindrical shape that is connected to and connected to a vacuum pump (not shown) to be evacuated and decompressed. It has. A plate member 105 having a dielectric circular shape constituting the vacuum vessel is arranged above the upper end of the side wall of the vacuum vessel surrounding the cylindrical portion of the processing chamber 101, and the upper end of the side wall and the plate member 105 placed on the upper side of the side wall are arranged. The inner and outer surfaces of the processing chamber 101 are hermetically sealed by contacting the lower surface of the outer peripheral edge with a seal member such as an O-ring interposed therebetween.

  Outside the vacuum vessel above the upper surface of the plate member 105, a coil-shaped antenna 102 for supplying a high-frequency electric field for generating plasma is disposed in the processing chamber 101. The antenna 102 has a matching unit 103 at one end thereof. And a high-frequency power source 104 that supplies high-frequency power for forming a high-frequency electric field, and the other end is electrically connected to the ground electrode. Although not shown, a gas supply pipe for supplying a processing gas for forming plasma in the processing chamber 101 is connected to the vacuum vessel, and a processing gas introduction hole is provided in the processing chamber 101. Is arranged.

  Below the space where the plasma in the processing chamber 101 is formed, a position that approximates the extent that the sample base 2 having a cylindrical shape matches or can be regarded as the cylindrical central axis of the processing chamber 101. It is arranged according to. The sample stage 2 of the present embodiment constitutes the surface of the mounting electrode of the wafer 1 having a circular shape with the upper part of the cylindrical portion covered with a dielectric film containing ceramics such as alumina or yttria. .

  Further, in the dielectric film, a film-like electrode to which direct current power for electrostatic attraction using the electrostatic force generated by the wafer 1 placed thereon is supplied is disposed (not shown). It is electrically connected to the electrostatic attraction DC power source 106 through a low-pass filter. In addition, another metal disk or cylindrical electrode is disposed inside the sample stage 2, and the other electrode is electrically connected to the high frequency bias power source 107 to form plasma in the processing chamber 101. While the wafer 1 is being processed, high frequency power for supplying a bias potential corresponding to the plasma potential is supplied to the upper surface of the wafer 1.

  The vacuum chamber including the processing chamber 101 is provided with a transfer chamber (not shown), the side wall of which is another vacuum vessel (not shown), a decompressed space inside thereof, and the wafer 1 to be processed is transferred. The wafer 1 is placed and held on the front end of the arm of the arm 1 and transported, and the gate, which is a passage through which the wafer 1 passes, is opened and hermetically closed by communicating between the transport chamber and the processing chamber 101. With the gate valve opened, the arm of the robot is extended and the tip of the arm on which the wafer 1 is placed enters the processing chamber 101, and the wafer 1 is delivered to the sample stage 2. When the arm contracts and leaves the processing chamber 101, DC power from the electrostatic attraction DC power source 106 is supplied to the electrostatic attraction electrode in the dielectric film, and the wafer 1 constitutes the upper surface of the sample stage 2. A processing gas is introduced from a gas introduction hole that is electrostatically adsorbed and held on the upper surface of the body film and is disposed in the processing chamber 101 above the upper surface of the sample stage 2, and a high-frequency electric field is applied to the plate member 105 from the antenna 102. The plasma gas is generated by exciting the atoms or molecules of the processing gas into the processing chamber 101 by inductive coupling of the high-frequency electric field.

  When the plasma is formed, the high frequency power from the high frequency bias power source 107 is supplied to the bias potential forming electrode in the dielectric film to form a bias potential above the upper surface of the wafer 1, and charged particles such as ions are generated from the plasma. From a plurality of film layers including a mask layer for forming a circuit of a semiconductor device previously formed on the surface of the wafer 1 by being attracted to and collided with the surface of the wafer 1 according to the potential difference between the bias potential and the plasma potential. An etching process of the configured film structure is started. When the etching process proceeds and the end point determination device (not shown) determines the end of the process, the supply of the high frequency power from the high frequency bias power source 107 to the sample stage 2 is stopped, the plasma is extinguished and the wafer 1 is extinguished. The etching process of the film structure is finished.

  When the electrostatic attraction of the wafer 1 is released, the arm of the robot in the transfer chamber is extended through the gate opened by the operation of the gate valve while the wafer 1 is lifted and separated above the upper surface of the sample stage 2 and the tip The processing unit 101 enters the processing chamber 101, the processed wafer 1 is transferred to the upper surface of the wafer holding unit at the tip, and is unloaded from the processing chamber 101 into the transfer chamber by contraction of the arm. If there is an unprocessed wafer 1 to be processed next, the wafer 1 is transferred into the processing chamber 101 through the opened gate and placed on the upper surface of the sample stage 2 to perform the above processing. The When it is determined that there is no wafer 1 to be processed, the gate is hermetically closed by the operation of the gate valve, and the processing operation in the processing chamber 101 is completed.

<Sample stage>
In FIG. 2, the structure of the sample stand 2 is expanded and shown. FIG. 2 is a longitudinal sectional view schematically showing an enlarged schematic configuration of the sample stage 2 of the plasma processing apparatus shown in FIG.

  The sample stage 2 having a cylindrical shape includes a base material 201 having a cylindrical shape made of a metal such as titanium or aluminum. Inside the base material 201, a refrigerant which is arranged in a spiral or multiple concentric arrangement around the central axis of the cylinder or disk, and whose temperature is adjusted by a temperature controller such as a chiller unit (not shown) is contained therein. A refrigerant flow path 206 that flows therethrough is arranged.

  A dielectric film 202 made of ceramics such as alumina or yttria is disposed above the circular upper surface of the substrate 201, and the surface on which the wafer 1 is placed is formed by covering the circular upper surface. . The dielectric film 202 of the present embodiment is formed as a film by spraying a large number of ceramic particles in a semi-dissolved state on the upper surface of the base material 201 by thermal spraying. A film-like electrostatic adsorption electrode 204 that adsorbs the wafer 1 placed on the upper side by electrostatic force generated by the electric charges formed and accumulated in the body film 202 is disposed.

  On the upper surface of the dielectric film 202, a groove 203 that forms a gap with the back surface of the wafer 1 filled with a gas having heat transfer properties such as He (helium) through the inside in a state where the wafer 1 is placed. Are arranged radially from the center of the mounting surface. In place of such a groove 203, a concave portion is provided on the outer peripheral edge of the mounting surface in a ring shape and is disposed on the inner side of the convex portion that comes into contact with the back surface of the wafer 1 and has a height lower than the upper surface of the convex portion. You may do it.

  Further, a film-like heater electrode 205 that generates heat when DC power is supplied is disposed in the dielectric film 202, and the heater electrode 205 is electrically connected to a heater power supply 109 that supplies DC power thereto. ing.

  The electrostatic attraction electrode 204 is electrically connected to an electrostatic attraction DC power source 106 and supplied with DC power. Using the Coulomb force acting between the wafer 1 and the electrostatic adsorption electrode 204 due to the electrostatic force between the charges formed inside the dielectric film 202 and the wafer 1, or the Johnson Rahbek force generated by the surface current, The wafer 1 is attracted and held on the surface of the dielectric film 202.

  In the present embodiment, one or a plurality of electrostatic adsorption electrodes 204 may be provided, and in any case, the electrostatic adsorption electrode 204 is a monopole to which a single polarity is given in the dielectric film 202 by DC power. Further, a controller 108 that adjusts the power supplied to the electrostatic attraction electrode 204 is connected to the electrostatic attraction DC power source 106 to detect a voltage output from the electrostatic attraction DC power source 106. FB (feedback) control is performed so that this becomes a value within a predetermined range.

  In the present embodiment, the base material 201 is connected to a high frequency bias power source 107 having a frequency of 400 KHz-13.56 MHz, and the high frequency power from the high frequency bias power source 107 is passed through the dielectric film 202 to the wafer 1. And a bias potential corresponding to the plasma potential is formed above the upper surface of the wafer 1. In accordance with the potential difference between the high frequency bias and the plasma, charged particles such as ions are attracted from the plasma toward the surface of the wafer 1, and the surface of the film structure including the film layer to be processed and the particles disposed on the surface By this collision, the etching process of the wafer 1 in the direction of the collision is further promoted, and the anisotropy of the process is realized. Such high-frequency power may be supplied not to the substrate 201 but to another electrode disposed in the dielectric film 202, for example, the electrostatic adsorption electrode 204.

  The wafer 1 being processed is transmitted to the base material 201 through the dielectric film 202 and flows through the coolant channel 206 through the amount of heat supplied from the plasma, the amount of heat generated by the heater electrode 205 by the supplied DC power, and the dielectric film 202. The temperature is adjusted to a temperature within a predetermined range suitable for plasma processing based on the balance with the amount of heat exchanged with the refrigerant. A heat transfer gas such as He introduced into the gap between the back surface of the wafer 1 and the upper surface of the dielectric film 202 from the opening of the introduction hole disposed on the upper surface of the dielectric film 202 by a cooling gas introduction mechanism (not shown) It fills the entire back surface of the wafer 1 through the inside of the groove 203 or the dent, promotes heat conduction between the wafer 1 and the dielectric film 202, and increases the range, responsiveness and accuracy of temperature adjustment of the wafer 1. Improve.

  The sample stage 2 of the present embodiment is provided with a dielectric film 202 formed by spraying particles of a material such as ceramic on the upper surface of the base material 201, but a ceramic material such as alumina or aluminum nitride is used. Alternatively, an electrostatic chucking electrode or the like may be disposed inside and sintered to form a disk shape, and this sintered plate may be bonded and bonded to the upper surface of the substrate 201.

<Plasma treatment method>
With reference to FIG. 3, the flow of the plasma processing operation of the wafer 1 performed in the present embodiment will be described. FIG. 3 is a time chart showing a flow of processing operations of the wafer 1 performed by the plasma processing apparatus shown in FIG. Here, as an example, an operation flow of the etching process is shown.

  In the processing according to the present embodiment, the sample is transferred at a temperature within a range that is the same as or equivalent to the temperature in the room of the building in which the transfer chamber or the plasma processing apparatus main body is installed. The wafer 1 placed on the upper surface is processed after the heat from the sample stage 2 is transmitted before the processing is started and heated to a temperature suitable for processing higher than the temperature. In order to efficiently transfer heat from the sample stage 2 to the wafer 1 when the difference between the temperature during processing and the temperature of the wafer 1 before heating (in this embodiment, equivalent to the room temperature) is large, the wafer 1 1 is electrostatically adsorbed on the upper surface of the dielectric film 202, and this is heated, the wafer 1 expands in the process of rising to the processing start temperature. Rubbing with the upper end surface of the surface of 202 causes sliding.

  In a contact portion where the pressure formed by the electrostatic force between the two is large, the sliding between the wafer 1 and the dielectric film 202 causes wear on at least one surface, and the back surface of the wafer 1 is damaged or the dielectric is damaged. A part of the upper surface of the body membrane 202 is lost, and minute fragments and particles are generated. If these adhere to the surface of the slid wafer 1 or another wafer 1 and become foreign matter, the yield of semiconductor elements manufactured from the wafer 1 through the processing steps will deteriorate.

  Further, since the surface of the dielectric film 202 is worn or missing, the shape of the surface of the sample table 2 changes, and the magnitude of the electrostatic adsorption force, the amount of leaking heat transferable gas, and the pressure value. However, since the allowable range in which the expected performance can be satisfied is exceeded, there is a problem that the period until replacement is shortened and the frequency of stopping and maintaining the plasma processing apparatus is increased. For this reason, the processing efficiency of the plasma processing apparatus is impaired.

  In order to avoid such a problem, if the wafer 1 is heated to a predetermined temperature without electrostatically attracting the wafer 1 to the upper surface of the dielectric film 202, the period becomes relatively large. Therefore, in order to shorten the heating period, it is conceivable to increase the amount of heat transferred to the wafer 1 by generating plasma in the processing chamber 101.

  However, it is known that the potential of the wafer 1 at this time is a positive or negative potential called a floating potential. Therefore, when power is not supplied from the electrostatic attraction DC power supply 106 to the electrostatic attraction electrode 204 and the voltage generated at the electrostatic attraction electrode 204 is 0 V, the wafer 1 and the electrostatic attraction electrode 204 A potential difference based on the floating potential is generated between the two and an electrostatic attraction force is generated. In this state, when the wafer 1 is heated by plasma or heat from the heater electrode 205, the wafer 1 slides between the back surface of the wafer 1 abutted by electrostatic adsorption force and the upper end portion of the upper surface of the dielectric film 202. It will occur and the above problem will occur.

  Further, after the wafer 1 is transferred, plasma is generated in the processing chamber 101 and high frequency power from the high frequency bias power source 107 is applied to the base material 201 to form a bias potential, and from the plasma together with heat input transmitted from the plasma. It is conceivable that the wafer 1 is heated by the collision of charged particles to shorten the heating period of the wafer 1 up to the temperature at which processing is started. However, it is known that the potential of the wafer 1 becomes a self-bias potential in a state in which high-frequency power is applied to the substrate 201.

  The self-bias potential has a correlation with the value of Vpp (Peak to Peak Voltage) of the applied high-frequency power, and the inventors have found that the self-bias potential is approximately 1/2 to 1/3 Vpp. ing. That is, when Vpp increases, a large self-bias potential is generated. When there is no output from the electrostatic attraction DC power supply 106 and the voltage of the electrostatic attraction electrode 204 is 0 V, the wafer 1 and Sliding with the dielectric film 202 occurs.

  In the present embodiment, when the wafer 1 is heated and thermally expanded by the transfer of heat from the plasma as described above, an electrostatic adsorption force is generated by the application of the plasma and the high frequency bias power, The wafer 1 is processed according to the procedure shown in FIG. 3 for the purpose of suppressing the generation of dust and particles that cause foreign matter and cause sliding on the surface of the dielectric film 202. In particular, in this embodiment, an example in which a monopole type electrostatic adsorption electrode 204 is used will be described.

  First, a processing gas is introduced into the processing chamber 101 from a gas inlet (not shown) (T1), and a high-frequency electric field formed by high-frequency power from a high-frequency power source 104 supplied to the antenna 102 is supplied. Plasma is generated using the processing gas (T2). In this state, no heat transferable gas such as He is introduced into the gap between the wafer 1 including the groove 203 disposed on the upper surface of the dielectric film 202 and the dielectric film 202, but the position of the wafer 1 The heat-transferable gas may be supplied so that the pressure in the gap does not deviate.

  In the state where electric power is not supplied from the electrostatic attraction DC power source 106 to the electrostatic attraction electrode 204 due to the formation of the plasma, the potential of the wafer 1 becomes a positive or negative value called a floating potential. In the present embodiment, in a state where plasma is generated, the controller 108 transmits a command signal to output the electrostatic adsorption DC power supply 106 and the electrostatic adsorption electrode 204 has the same potential as the floating potential. Adjust to an approximate value that can be regarded as this. That is, the controller 108 adjusts the power supplied to the electrostatic chucking electrode 204 so as to reduce the difference between the potential generated on the wafer 1 by the plasma and the potential of the electrostatic chucking electrode 204.

  With this configuration, no potential difference is generated between the wafer 1 and the electrostatic chucking electrode 204, or the potential difference is negligibly small. Therefore, no electrostatic chucking force is generated between the wafer 1 and the dielectric film 202. Or it is made small so that the bad influence by the said sliding can be reduced remarkably. In the present embodiment, in the state where the plasma is formed and the electrostatic attraction force is suppressed, the high frequency bias forming power is not supplied.

  Next, power for forming a high frequency bias is output from the high frequency bias power source 107 to the substrate 201 (T3). At this time, in a state where the output from the electrostatic attraction DC power supply 106 is not changed, the potential of the wafer 1 becomes equal to a self-bias potential that is a predetermined negative DC potential.

  In the present embodiment, the controller 108 transmits a command signal, and the output of the electrostatic attraction DC power source 106 in accordance with the output of the high frequency power from the high frequency bias power source 107 is changed to the potential of the electrostatic attraction electrode 204. Is adjusted to be a value that is the same as the self-bias potential or an approximate value that can be regarded as this. In other words, the controller 108 supplies the electrostatic chucking electrode 204 to reduce the difference between the potential generated on the wafer 1 by the high frequency power supplied from the high frequency bias power source 107 and the potential of the electrostatic chucking electrode 204. Adjust the power. With this configuration, no potential difference is generated between the wafer 1 and the electrostatic chucking electrode 204, or the potential difference is negligibly small. Therefore, no electrostatic chucking force is generated between the wafer 1 and the dielectric film 202. Or it is made small so that the bad influence by the said sliding can be reduced remarkably.

  In this state, when a predetermined period elapses and the controller 108 determines that the temperature of the wafer 1 is heated and reaches a predetermined value or more, a command signal is transmitted from the controller 108. The electrostatic attracting DC power source 106 generates electrostatic attracting force that attracts the wafer 1 with a pressure larger than the pressure of the gas in the gap between the wafer 1 and the dielectric film 202 at least. The potential of the electrode 204 is adjusted. That is, electric power is supplied to the electrostatic adsorption electrode 204 so that the potential difference between the wafer 1 and the electrostatic adsorption electrode 204 becomes large (T4).

  Further, in response to a command signal from the controller 108, a heat transfer gas is introduced into the gap between the wafer 1 and the dielectric film 202, and the inside of the gap between the back surface of the wafer 1 and the dielectric film 202 is introduced. The pressure is increased to a pressure at which a temperature suitable for processing the film layer to be processed on the surface of the wafer 1 can be maintained and maintained, and the processing of the film layer proceeds (T5). Through the steps as described above, the value of the power supplied to the electrostatic chucking electrode 204 is adjusted according to the generation of plasma and the supply of high-frequency bias power, and the wafer 1 is electrostatically attracted to the upper surface of the dielectric film 202. Heating while adjusting the force reduces the sliding between the wafer 1 and the dielectric film 202 and the generation of dust and fine particles that cause foreign matters, thereby reducing the processing yield of the wafer 1 and the semiconductor device. Productivity is expected to improve.

  In the above embodiment, the controller 108 may be configured to receive and detect the output from the measurement probe arranged in the processing chamber 101 during the processing of the wafer 1 in advance. A data storage device such as a flash-ROM or a RAM, which is detected for each condition and is arranged in the controller 108 from data obtained in an executed test or experiment, or an external storage device such as an HDD which is communicably connected. The value of the floating potential may be calculated or selected using a value stored in advance. Similarly, even if the controller 108 calculates the self-bias potential using the output from the detector (not shown) as the output Vpp from the high-frequency bias power supply 107, the value detected from the data obtained in advance is used. It may be configured to be used.

  In addition, the determination of the point in time when the electrostatic adsorption force suitable for the processing of the film layer to be processed is generated after the process of forming the plasma and heating the wafer 1 while adjusting the potential of the electrostatic adsorption electrode 204 is performed. A configuration may be provided that detects the passage of a predetermined time after the start of the heating, and is determined from a result of comparing the result of detecting the temperature of the wafer 1 with a fluorescence thermometer or other temperature measuring method with a predetermined threshold value. You may provide the structure to do.

  Further, the plasma formed before increasing the adsorption force by the electrostatic adsorption electrode 204 to be suitable for processing and promoting the etching process of the film layer is a gas having the same composition as that used for the processing. May be generated using a different composition, for example, another gas such as an inert gas, or may be generated by changing conditions such as a flow rate and a pressure in the processing chamber 101. In addition, when gases having different compositions are used in the process of promoting the heating of the wafer 1 and the process of promoting the processing of the film layer, the plasma may be extinguished once before and after, and the plasma may be ignited again. The gas may be replaced while continuing the ignition state.

<Modification>
A modification of the plasma processing apparatus shown in FIG. 1 will be described below with reference to FIGS. In this modification, a dipole electrostatic chucking electrode 204 is used in the plasma processing apparatus of FIG. 1 instead of the monopole electrostatic chucking electrode 204. Also according to the present modification, adverse effects caused by sliding of the wafer 1 and the dielectric film 202 due to the thermal expansion of the wafer 1 heated by transferring heat from plasma are reduced.

  In this modification, the sample stage 2 shown in FIG. 4 is mounted on the plasma processing apparatus shown in FIG. 1 instead of the sample stage 2 shown in FIG. FIG. 4 is a longitudinal cross-sectional view schematically showing an outline of the configuration of the sample stage 2 according to a modification of the plasma processing apparatus shown in FIG.

  The sample stage 2 of the present modification includes a second electrostatic adsorption electrode 207 in addition to the electrostatic adsorption electrode 204 in a dielectric film 202 constituting the upper surface. The second electrostatic attraction electrode 207 of the present modification is one or more film-like elements arranged in an arc shape or a ring shape on the outer peripheral side of the electrostatic attraction electrode 204 having a circular shape, a sector shape, or an arc shape. In the same manner as the electrostatic adsorption electrode 204, the electrode is made of a metal material such as tungsten and formed in a film shape by thermal spraying or coating.

  A second electrostatic adsorption DC power source 110 is electrically connected to the second electrostatic adsorption electrode 207, and the inside or the The electric potential is different from that of the electrostatic adsorption electrode 204 arranged on the center side, and a different polarity can be realized.

  Depending on the potential difference between the electrostatic attraction electrode 204 and the second electrostatic attraction electrode 207, the dielectric film 202 disposed above and the charge formed and accumulated in the region of the wafer 1 A Johnson-Rahbek force is formed by a Coulomb force or a surface current flowing between these electrodes, and the wafer 1 is attracted to the dielectric film 202 and held above the upper surface of the sample stage 2. Furthermore, the second electrostatic adsorption DC power supply 110 is also connected to the controller 108, and its output is adjusted in the same manner as the electrostatic adsorption DC power supply 106.

  Next, the flow of the plasma processing operation of the wafer 1 in this modification will be described with reference to FIG. FIG. 5 is a time chart showing a flow of processing operations of the wafer 1 performed by the plasma processing apparatus according to the modification shown in FIG.

  In FIG. 5, similarly to the process of the embodiment shown in FIG. 3, first, a processing gas is introduced into the processing chamber 101 from a gas inlet (not shown) (T11) and supplied to the antenna 102. A high-frequency electric field formed by high-frequency power from the high-frequency power source 104 is supplied, and plasma is generated using a processing gas (T12). As in the embodiment of FIG. 3, in this state, heat transferable gas such as He is present in the gap between the wafer 1 including the groove 203 disposed on the upper surface of the dielectric film 202 and the dielectric film 202. Although not introduced, heat transfer gas may be supplied so that the pressure in the gap is such that the position of the wafer 1 does not shift.

  In the state where electric power is not supplied from the electrostatic attraction DC power source 106 to the electrostatic attraction electrode 204 due to the formation of the plasma, the potential of the wafer 1 becomes a positive or negative value called a floating potential. In this modification, the controller 108 transmits a command signal in a state where plasma is generated, and outputs the electrostatic adsorption DC power supply 106 and the second electrostatic adsorption DC power supply 110 to electrostatic adsorption. It adjusts so that the electric potential of the electrode for electrode 204 and the second electrode for electrostatic attraction 207 may be the same potential as the floating potential or an approximate value that can be regarded as this.

  With this configuration, a potential difference does not occur between the wafer 1 and the electrostatic adsorption electrode 204 and the second electrostatic adsorption electrode 207 or is negligibly small. During this period, the electrostatic attraction force is not generated, or is reduced to such an extent that the adverse effect due to the sliding can be remarkably reduced. Also in this modification, in the state where the plasma is formed and the electrostatic attraction force is suppressed, the power for forming the high frequency bias is not supplied.

  Next, power for forming a high frequency bias is output from the high frequency bias power source 107 to the substrate 201 (T13). At this time, in a state where the output from the electrostatic attraction DC power supply 106 is not changed, the potential of the wafer 1 becomes equal to a self-bias potential that is a predetermined negative DC potential.

  In this modification, the controller 108 transmits a command signal, and outputs of the electrostatic attraction DC power source 106 and the second electrostatic attraction DC power source 110 in accordance with the output of the high frequency power from the high frequency bias power source 107. Are adjusted so that the potentials of the electrostatic chucking electrode 204 and the second electrostatic chucking electrode 207 are the same as the self-bias potentials or approximate to the extent that they can be considered. With this configuration, a potential difference does not occur between the wafer 1 and the electrostatic adsorption electrode 204 and the second electrostatic adsorption electrode 207 or is negligibly small. During this period, the electrostatic attraction force is not generated, or is reduced to such an extent that the adverse effect due to the sliding can be remarkably reduced.

  In this state, when a predetermined period elapses and the controller 108 determines that the temperature of the wafer 1 is heated and reaches a predetermined value or more, a command signal is transmitted from the controller 108. The outputs of the electrostatic attraction DC power source 106 and the second electrostatic attraction DC power source 110 adsorb the wafer 1 at a pressure larger than at least the gas pressure in the gap between the wafer 1 and the dielectric film 202. Adjustment is made so that the electric potential of the electrostatic adsorption electrode 204 that generates an electrostatic adsorption force is obtained. That is, power is supplied to the electrostatic chucking electrode 204 so that the difference in potential between the wafer 1 and the electrostatic chucking electrode 204 is large, and the second static electricity has a polarity different from that of the electrostatic chucking electrode 204. Power is supplied from the second electrostatic attraction DC power source 110 to the electrode for electroadsorption 207 (T14).

  Further, in response to a command signal from the controller 108, a heat transfer gas is introduced into the gap between the wafer 1 and the dielectric film 202, and the inside of the gap between the back surface of the wafer 1 and the dielectric film 202 is introduced. The pressure is increased to a pressure at which a temperature suitable for processing the target film layer of the film structure on the surface of the wafer 1 can be realized and maintained, and the processing of the film layer proceeds (T15). Through the steps as described above, the value of the power supplied to the electrostatic chucking electrode 204 is adjusted according to the generation of plasma and the supply of high-frequency bias power, and the wafer 1 is electrostatically attracted to the upper surface of the dielectric film 202. Heating while adjusting the force reduces the sliding between the wafer 1 and the dielectric film 202 and the generation of dust and fine particles that cause foreign matters, thereby reducing the processing yield of the wafer 1 and the semiconductor device. Productivity is expected to improve.

  Here, the selection and setting of the value of the floating potential and the self-bias, the determination of the transition from the step of promoting the heating of the wafer 1 using plasma to the step of promoting the etching process, and the conditions for forming the plasma The selection and setting can be the same as those in the embodiment.

<Effect>
According to the above embodiment and modification, it is possible to realize a plasma processing apparatus or a plasma processing method in which the generation of substances that cause foreign substances from the wafer 1 is reduced and the processing yield is improved. More specifically, before the wafer 1 is adsorbed on the surface of the sample stage 2, it is not intended due to the difference between the potential of the wafer 1 and the potential of the sample stage 2 when performing plasma formation or heating by supplying high-frequency power. It is possible to suppress the generation of electrostatic attraction force. As a result, it is possible to reduce sliding between the back surface of the wafer 1 and the surface of the dielectric film 202 at the top of the sample table 2 and the generation of dust and fine particles due to this. As a result, damage to the back surface of the wafer 1 and generation of foreign matter can be suppressed, and the reliability of the sample stage 2 can be increased over a long period of time.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  For example, the above-described embodiment has been described in detail for easy understanding of the present invention, and is not necessarily limited to one having all the configurations described. In addition, it is possible to add, delete, and replace other configurations for a part of the configuration of the embodiment.

DESCRIPTION OF SYMBOLS 1 ... Wafer 2 ... Sample stage 101 ... Processing chamber 102 ... Antenna 103 ... Matching device 104 ... High frequency power source 105 ... Plate member 106 ... Electrostatic adsorption DC power source 107 ... High frequency bias power source 108 ... Controller 109 ... Heater power source 110 ... Static DC power supply for electroadsorption (second)
201 ... Base material 202 ... Dielectric film 203 ... Groove 204 ... Electrostatic adsorption electrode 205 ... Heater electrode 206 ... Refrigerant flow path 207 ... Electrostatic adsorption electrode (second)

Claims (10)

A processing chamber arranged inside the vacuum vessel and forming plasma inside,
A sample stage placed in the processing chamber and electrostatically attracted by placing a wafer to be processed using the plasma on its upper surface;
A film-like electrode that is arranged on the upper surface of the sample stage and is supplied with electric power for electrostatically attracting the wafer;
Before the processing of the wafer is increased, plasma is formed in the processing chamber and supplied to the electrode so as to reduce the difference between the potential generated in the wafer by the plasma and the potential of the electrode during a period of heating the wafer. A controller for adjusting the power to be
A plasma processing apparatus comprising: A processing chamber arranged inside the vacuum vessel and forming plasma inside,
A sample stage placed in the processing chamber and electrostatically attracted by placing a wafer to be processed using the plasma on its upper surface;
A film-like electrode that is arranged on the upper surface of the sample stage and is supplied with electric power for electrostatically attracting the wafer;
Before the processing of the wafer is increased, the potential generated in the wafer by the high frequency power supplied from the high frequency power source connected to the sample stage in the period in which plasma is formed in the processing chamber and the wafer is heated. A controller for adjusting the power supplied to the electrode so as to reduce the difference from the potential;
A plasma processing apparatus comprising: The plasma processing apparatus according to claim 1,
The controller reduces a difference between a potential generated in the wafer by the plasma and a potential of the electrode during a period in which the plasma is formed in the processing chamber and the wafer is heated before the processing of the wafer proceeds. After the power supplied to the electrode is adjusted and before the processing of the wafer is increased, plasma is formed in the processing chamber and the wafer is heated from a high frequency power source connected to the sample stage. A plasma processing apparatus that adjusts the power supplied to the electrode so as to reduce a difference between a potential generated in the wafer and a potential of the electrode by the supplied high-frequency power. A plasma processing apparatus according to any one of claims 1 to 3,
The plasma processing apparatus, wherein the controller increases processing of the wafer by increasing an amount of gas supplied to a gap between the wafer and the upper surface of the sample stage or a pressure in the gap. A plasma processing apparatus according to any one of claims 1 to 4,
A plasma processing apparatus, wherein a condition for forming plasma during a period of heating the wafer is different from a condition for forming plasma to increase processing of the wafer. A plasma processing method for processing a wafer by placing a wafer to be processed on an upper surface of a sample table disposed in a processing chamber inside a vacuum vessel and electrostatically adsorbing it, forming plasma in the processing chamber,
With the wafer placed on the upper surface of the sample table, plasma is formed in the processing chamber, and a potential generated in the wafer by the plasma and electric power for electrostatically adsorbing the wafer on the upper surface of the sample table are supplied. A plasma processing method of heating the wafer for a predetermined period while adjusting the electric power so as to reduce a difference from the potential of the electrode, and thereafter increasing the processing of the wafer. A plasma processing method for processing a wafer by placing a wafer to be processed on an upper surface of a sample table disposed in a processing chamber inside a vacuum vessel and electrostatically adsorbing it, forming plasma in the processing chamber,
With the wafer placed on the upper surface of the sample table and with plasma formed in the processing chamber, the potential generated in the wafer by the high frequency power supplied to the sample table and the wafer electrostatically formed on the upper surface of the sample table. A plasma processing method of heating the wafer for a predetermined period while adjusting the power so as to reduce a difference from the potential of an electrode supplied with power for adsorption, and thereafter increasing the processing of the wafer. The plasma processing method according to claim 6,
With the wafer placed on the upper surface of the sample table, plasma is formed in the processing chamber, and a potential generated in the wafer by the plasma and electric power for electrostatically adsorbing the wafer on the upper surface of the sample table are supplied. The potential generated in the wafer by high-frequency power supplied from a high-frequency power source connected to the sample stage after heating the wafer for a predetermined period while adjusting the power to reduce the difference from the potential of the electrode A plasma processing method of heating the wafer while adjusting power supplied to the electrode so as to reduce a difference between the potential of the electrode and the electrode, and thereafter increasing the processing of the wafer. A plasma processing method according to any one of claims 6 to 8,
A plasma processing method for increasing processing of the wafer by increasing an amount of gas supplied to a gap between the wafer and the upper surface of the sample stage or a pressure in the gap. A plasma processing method according to any one of claims 6 to 9,
A plasma processing method, wherein a condition for forming plasma during a period of heating the wafer is different from a condition for forming plasma to increase processing of the wafer.

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