JP6606405B2 - Display device - Google Patents

Description

  The present invention relates to a display device that displays an image.

  Conventionally, a liquid crystal display device that displays an image based on a synchronization signal input together with a video signal for a cathode ray tube, detects a relative position shift between the video data signal and the horizontal / vertical synchronization signal, and detects the detected shift. There is known a liquid crystal display device that automatically adjusts the display position to a normal position by changing the number of dot clocks to the horizontal / vertical start position of the video display period or the count value of the number of horizontal periods (for example, (See Patent Document 1 below.)

JP 7-44125 A

  However, the above-described conventional technique has a problem that a circuit for detecting a display shift such as a column shift caused by a shift between the output timing of data to be written and the write destination switching timing becomes large.

  An object of the present invention is to provide a display device capable of detecting a display shift while suppressing an increase in circuit scale in order to solve the above-described problems caused by the related art.

  In order to solve the above-described problems and achieve the object, a display device according to the present invention is a display device that displays an image on a display screen including a plurality of pixel groups, and each data to be displayed on the plurality of pixel groups. Output a first value at a timing at which data for display on a specific pixel group included in the plurality of pixel groups is output from the first output unit, A second output that outputs a second value different from the first value at a timing when data for display on a pixel group different from the specific pixel group is output from the first output unit. A pixel group, a register capable of writing a value output from the second output unit, and a pixel group to which data output from the first output unit among the plurality of pixel groups is sequentially switched, When the specific pixel group among a plurality of pixel groups is used as the write destination, a value output from the second output unit is written in the register, and the specific pixel group among the plurality of pixel groups is set. When the pixel group different from the pixel group is used as the write destination, the switching unit that sets the value output from the second output unit not to be written to the register, and based on the value written to the register, Among the plurality of pixel groups, a pixel group to which data output from the first output unit is to be written, and a pixel group to which data output from the first output unit among the plurality of pixel groups is written A detection unit that detects a gap between the two.

  As a result, the value written to the register changes according to the occurrence state of display deviation such as column (pixel group) deviation.

  According to one aspect of the present invention, it is possible to detect a display shift while suppressing an increase in circuit scale.

FIG. 1 is a diagram illustrating an example of the display device according to the first embodiment. FIG. 2 is a diagram illustrating an example of a display screen of the display device according to the first embodiment. FIG. 3 is a diagram illustrating an example of a recording apparatus to which the display device according to the first embodiment is applicable. FIG. 4 is a diagram of an example of the display device according to the second embodiment. FIG. 5 is a diagram of an example of the display device according to the third embodiment. FIG. 6 is a diagram of an example of the display device according to the fourth embodiment. FIG. 7 is a diagram illustrating an example of a screen display by the display device according to the fifth embodiment. FIG. 8 is a diagram illustrating another example of the screen display by the display device according to the fifth embodiment.

  Embodiments of a display device according to the present invention will be described below in detail with reference to the drawings.

(Embodiment 1)
(Display device according to the first embodiment)
FIG. 1 is a diagram illustrating an example of the display device according to the first embodiment. As shown in FIG. 1, the display device 100 according to the first embodiment includes a first output unit 110, a second output unit 120, registers 131 to 134,..., Column drivers 141 to 144,. A register 151, a column control circuit 160, a confirmation I / O 170, and a display screen (not shown) are provided. Although the display screen of the display device 100 will be described later (see, for example, FIG. 2), each display cell specified by a combination of columns and rows in the display screen of the display device 100 has N pixels. (N pixels). N is a natural number of 1 or more.

  The first output unit 110 sequentially outputs each data to be displayed on a plurality of columns (a plurality of pixel groups) included in a display screen (for example, see FIG. 2) in the display device 100. Note that the plurality of columns (a plurality of pixel groups) may be a part of all the columns on the display screen. The data output from the first output unit 110 is branched and input to each of the registers 131 to 134,. That is, the same data output from the first output unit 110 is sequentially input to each of the registers 131 to 134.

  For example, the first output unit 110, for each operation clock in the display device 100, the first column data, the second column data, the third column data, the fourth column data, ..., the first column data, .. Are sequentially output to the registers 131 to 134,.

  Specifically, the first output unit 110 includes a data bus I / O 111, registers 112 and 113, and a data processing circuit 114. For example, each data (each N bits) to be displayed on the plurality of columns is input to the data bus I / O 111. The data bus I / O 111 sequentially outputs each input data to the register 112.

  The register 112 is an N-bit register that stores data output from the data bus I / O 111 and outputs the stored data to the register 113. The register 113 is an N-bit register that stores the data output from the register 112 and outputs the stored data to the data processing circuit 114.

  The data processing circuit 114 performs processing (for example, determination processing) on the data output from the register 113. Then, the data processing circuit 114 branches the processed data and outputs the branched data to the registers 131 to 134,.

  As described above, in the first output unit 110, data is transmitted at a timing based on the operation clock of the display device 100 by each pipelined circuit (the registers 112 and 113 and the data processing circuit 114). For this reason, an error may occur in the timing at which data is output from the first output unit 110 due to various factors such as design errors. Note that the order of each circuit (data bus I / O 111, registers 112 and 113, and data processing circuit 114) in the first output unit 110 may be changed, or some of the circuits may be omitted. May be added.

  The second output unit 120 outputs the first value to the redundancy register 151 at a timing at which data for display in a specific column is output from the first output unit 110 to the registers 131 to 134. Here, the specific column is the first column. In addition, the second output unit 120 outputs data to be displayed in a column (second column, third column,...) Different from a specific column (first column) from the first output unit 110 to the registers 131 to 134. At the timing, the second value is output to the redundancy register 151. The second value is different from the first value. Here, the first value is “1” and the second value is “0”.

  Specifically, the second output unit 120 includes a confirmation bit generation unit 121 and registers 122 and 123. The confirmation bit generation unit 121 generates the first value or the second value (1 bit) described above in synchronization with the data output from the data bus I / O 111 and outputs it to the register 122. The register 122 is a 1-bit register that stores the value output from the confirmation bit generation unit 121 and outputs the stored data to the register 123. The register 123 is a 1-bit register that stores the value output from the register 122 and outputs the stored data to the redundancy register 151.

  As described above, in the second output unit 120, data is transmitted by each pipelined circuit (the confirmation bit generation unit 121 and the registers 122 and 123) in the same manner as the first output unit 110. The timing at which “1” is output from the register 123 to the redundancy register 151 and the timing at which data to be written to the first column is output from the data processing circuit 114 to the registers 131 to 134,... Adjusted.

  The registers 131 to 134,... Are registers corresponding to the first column, the second column, the third column, the fourth column,. Each data written in the registers 131 to 134,... Is displayed on the corresponding column of the columns of the display screen. For example, the data written in the register 131 is displayed on the row (row) pixel of the display screen designated by the row control circuit (not shown) among the pixels of the first column of the display screen. Further, the data written in the register 132 is displayed on a row pixel of the display screen designated by a row control circuit (not shown) among the pixels of the second column of the display screen.

  For example, the data output from the data processing circuit 114 is written to one of the registers 131 to 134,... That is set in a writable state by the column control circuit 160. On the other hand, the data output from the data processing circuit 114 is not written to each of the registers 131 to 134,.

  Column drivers 141 to 144,... Are drivers corresponding to the first column, the second column, the third column, the fourth column,. The column drivers 141 to 144,... Respectively write the data written in the registers 131 to 134,... Among the pixels of the first column, the second column, the third column, the fourth column,. Then, it is displayed on the pixels in the row of the display screen designated by the row control circuit (not shown). For example, the column driver 141 displays the data written in the register 131 on the pixels in the first column of the display screen. Further, the column driver 142 displays the data written in the register 132 on the pixels in the second column of the display screen.

  The redundancy register 151 is a 1-bit register different from the registers 131 to 134. For example, when the column control circuit 160 sets the redundant register 151 in a writable state, the data output from the second output unit 120 is written into the redundant register 151. In addition, when the redundancy register 151 is set in a non-writable state by the column control circuit 160, the data output from the second output unit 120 is not written to the redundancy register 151. For example, “1” is written in the redundancy register 151 as an initial value.

  The column control circuit 160 is a switching unit that sequentially switches the write destination column of data output from the first output unit 110 among the columns of the display screen. Specifically, the column control circuit 160 sequentially switches a register to which data output from the first output unit 110 among the registers 131 to 134,.

  Further, the column control circuit 160 sets the redundancy register 151 in a writable state when the register 131 corresponding to the first column among the registers 131 to 134,. As a result, when the data write destination from the first output unit 110 is the first column, the value output from the second output unit 120 can be written into the redundancy register 151.

  Further, the column control circuit 160 makes any one of the registers 132, 133,... Corresponding to the second column, the third column,. In this case, the redundancy register 151 is set in a state in which writing is impossible. As a result, when the data write destination from the first output unit 110 is any one of the second column, the third column,..., The value output from the second output unit 120 is not written to the redundancy register 151. can do.

  An operation example of the column control circuit 160 will be described. For example, the column control circuit 160 sets the redundancy register 151 and the register 131 in a writable state and writes the registers 132 to 134,... At the timing when the data write destination from the first output unit 110 is the first column. Make it impossible. Further, the column control circuit 160 sets the register 132 in a writable state at a timing when the data write destination from the first output unit 110 is set to the second column, and makes the redundant register 151 and the registers 131, 133, 134,. Is not writable.

  In addition, the column control circuit 160 sets the register 133 in a writable state at the timing when the data write destination from the first output unit 110 is set to the third column, and makes the redundant register 151 and the registers 131, 132, 134,. Is not writable. Further, the column control circuit 160 sets the register 134 in a writable state at the timing when the data write destination from the first output unit 110 is set to the fourth column, and sets the redundancy register 151 and the registers 131 to 133, 135,. Is not writable.

  With the above operation of the column control circuit 160, the value written in the redundancy register 151 can be made different depending on whether or not a column shift has occurred. Specifically, the value written in the redundancy register 151 is “1” when no column shift occurs, and the value written in the redundancy register 151 is “0” when a column shift occurs. become.

  The column shift is the column in which the data output from the first output unit 110 in each column of the display screen is to be written, and the data output from the first output unit 110 in each column of the display screen is actually written. This is a deviation from the column to be read. This column shift is caused by a shift between the output timing of data from the first output unit 110 to the registers 131 to 134, and the switching timing of the write destination column by the column control circuit 160. Such a shift is caused by various factors such as a logical error in the timing of data transfer in the pipelined first output unit 110, for example.

  It should be noted that there is a large difference between the timing of data output from the first output unit 110 to the registers 131 to 134 and the value output timing from the second output unit 120 to the redundancy register 151 (for example, operation It is assumed that there is no deviation of one clock cycle or more.

  The confirmation I / O 170 is a detection unit that detects a column shift based on the value written in the redundancy register 151. The confirmation I / O 170 outputs the detection result of the column shift. For example, when the value written in the redundancy register 151 becomes “1”, the confirmation I / O 170 notifies the design developer, user, administrator, or the like of the display device 100 that the occurrence of the column shift has been detected. . As an example, the confirmation I / O 170 outputs the value written in the redundancy register 151.

  Although the case where the specific column is the first column has been described, the specific column may be the second and subsequent columns. Moreover, although the case where the first value is “1” and the second value is “0” has been described, the first value and the second value may be interchanged, or the first value and the second value may be interchanged. May be different from “1” and “0”.

  According to the display device 100 shown in FIG. 1, column shift can be reduced by adding a simple circuit (for example, the second output unit 120, the redundancy register 151, and the confirmation I / O 170) and control (for example, control by the column control circuit 160). Can be detected. That is, it is possible to detect a display shift (column shift) while suppressing an increase in circuit scale.

  In a display device used for a recording device such as a holographic memory, for example, writing to the display screen is performed at a speed that cannot be understood by the human eye, or digital data that cannot be understood by a human is displayed on the display screen. However, by using the display device 100, it becomes easy to detect a display shift (column shift).

  Further, by using a redundant register 151 different from the registers 131 to 134,..., Display deviation (column deviation) can be detected without affecting the display on the display screen. Further, since the value (“1”) is written to the redundancy register 151 at the same time as the data is written to a specific column among the columns, the display shift (column) is not affected without switching the write destination column. Deviation) can be detected.

(Display screen of the display device according to the first embodiment)
FIG. 2 is a diagram illustrating an example of a display screen of the display device according to the first embodiment. The display device 100 according to the first embodiment includes a display screen 200 shown in FIG. 2, for example. The display screen 200 is a display device such as LCOS (Liquid Crystal On Silicon) in which a plurality of display cells are arranged in a matrix. In the example shown in FIG. 2, the display screen 200 is a 5 × 6 matrix display screen including rows 211 to 215 and columns 221 to 226. Each display cell of the display screen 200 includes N pixels (N pixels). That is, the display screen 200 is a 5 × 6 × N pixel display screen.

  On the display screen 200, writing is performed while scanning one pixel at a time and N pixels at a time. For example, first, writing is performed on the N pixels of the display cells corresponding to the row 211 and the column 221, and then writing is performed on the N pixels of the display cells corresponding to the row 211 and the column 222. As described above, writing is performed while sequentially switching the columns with respect to the display cells of the row 211. When writing to the display cells of the row 211 is completed, writing to the display cells of the row 212 is performed next. The column control circuit 160 shown in FIG. 1 switches the write destination column among these controls.

  However, the display screen of the display device 100 according to the first embodiment is not limited to the display screen 200 illustrated in FIG. 2, for example, a display screen having more display cells than the display screen 200 or a display cell having fewer display cells than the display screen 200. May be a display screen. The display screen of the display device 100 according to the first embodiment may be a display screen with one row and a plurality of columns (for example, 1 × 6).

(Recording apparatus to which the display device according to the first embodiment is applicable)
FIG. 3 is a diagram illustrating an example of a recording apparatus to which the display device according to the first embodiment is applicable. The recording apparatus 300 according to the first embodiment includes a light source 301, a collimator lens 302, a polarization variable element 303, a PBS prism 304, a beam expander 306, a phase mask 307, a relay lens 308, and a PBS prism 309. LCOS 310, relay lens 311, spatial filter 312, objective lens 313, mirror 314, mirror 315, galvano mirror 316, scanner lens 317, optical information recording medium 318, and quarter-wave plate. 319, a galvano mirror 320, an image sensor 321, and a control unit 322.

  The recording apparatus 300 records information on the optical information recording medium 318 by irradiating the optical information recording medium 318 with signal light spatially modulated by the LCOS 310. In addition, the recording apparatus 300 reads information by converting reproduction light obtained by irradiating the optical information recording medium 318 with reference light into an electric signal by the image sensor 321.

  The light source 301 emits a light beam to the collimating lens 302. The light beam emitted from the light source 301 can be, for example, continuous light with a predetermined linear polarization. For example, an LD (Laser Diode) can be used as the light source 301. The collimating lens 302 collimates the light beam emitted from the light source 301 into a light beam having a predetermined beam diameter, and emits the collimated light beam to the polarization variable element 303.

  The polarization variable element 303 adjusts the polarization state of the light beam emitted from the collimator lens 302 according to the drive waveform supplied from the control unit 322. For example, the polarization variable element 303 sets the polarization state of the light beam to a polarization state including P-polarized light and S-polarized light when recording information on the optical information recording medium 318.

  Also, the polarization variable element 303 sets the polarization state of the light beam to S-polarized light when reproducing information from the optical information recording medium 318. The polarization variable element 303 emits a light beam whose polarization state is adjusted to the PBS prism 304. As the polarization variable element 303, for example, FLC (Ferroelectric Liquid Crystal), AFLC (Anti Ferroelectric Liquid Crystal), TN (Twisted Nematic) liquid crystal, or the like can be used.

  The PBS prism 304 is a PBS (Polarization Beam Splitters) that transmits the P-polarized light beam emitted from the polarization variable element 303 and emits it as signal light to the beam expander 306. Further, the PBS prism 304 reflects the S-polarized light beam emitted from the polarization variable element 303 and emits it to the mirror 314 as reference light. Accordingly, when information is recorded on the optical information recording medium 318, P-polarized signal light is emitted to the beam expander 306, and S-polarized reference light is emitted to the mirror 314. In addition, when reproducing information from the optical information recording medium 318, S-polarized reference light is emitted to the mirror 314.

  The beam expander 306 expands the beam diameter of the signal light emitted from the PBS prism 304 to a predetermined beam diameter, and emits the signal light having the expanded beam diameter to the phase mask 307. The signal light emitted from the beam expander 306 to the phase mask 307 is emitted to the PBS prism 309 via the phase mask 307 and the relay lens 308.

  The PBS prism 309 transmits the P-polarized signal light emitted from the relay lens 308 and emits it to the LCOS 310. The PBS prism 309 reflects the signal light emitted from the LCOS 310 and emits it to the relay lens 311. The signal light emitted from the PBS prism 309 to the relay lens 311 is emitted to the optical information recording medium 318 via the relay lens 311, the opening of the spatial filter 312 and the objective lens 313.

  The LCOS 310 spatially modulates the signal light emitted from the PBS prism 309 based on the modulation information. For example, the LCOS 310 performs modulation based on a drive waveform indicating two-dimensional image data (modulation information) output from the control unit 322. LCOS 310 then emits the modulated signal light to PBS prism 309. For example, FLLC or AFLC can be used as the LCOS 310.

  The reference light emitted from the PBS prism 304 to the mirror 314 is emitted to the galvano mirror 316 via the mirrors 314 and 315. The galvanometer mirror 316 reflects the reference light emitted from the mirror 315 at a variable angle and emits it to the scanner lens 317. The angle control of the galvanometer mirror 316 can be performed by the control unit 322, for example. The scanner lens 317 emits reference light emitted from the galvanometer mirror 316 to the optical information recording medium 318.

  As the optical information recording medium 318, for example, various optical information recording media such as a photorefractive crystal such as lithium niobate and a photosensitive resin material (photopolymer) can be used. Further, the optical information recording medium 318 may be displaceable by control from the control unit 322, for example.

  At the time of information recording, the signal light emitted from the objective lens 313 and the reference light emitted from the scanner lens 317 are incident on the optical information recording medium 318 so as to overlap each other. Thereby, an interference fringe pattern is formed on the optical information recording medium 318, and the optical information recording medium 318 records the formed interference fringe pattern as a hologram. Further, angle multiplex recording can be performed by changing the incident angle of the reference light with respect to the optical information recording medium 318 by controlling the angle of the galvanometer mirror 316. In the present embodiment, this hologram is called a “page”, and a recording area where the page is angle-multiplexed is called a “book”.

  At the time of reproducing information, the reference light emitted from the scanner lens 317 enters the optical information recording medium 318. The quarter-wave plate 319 passes the reference light emitted from the scanner lens 317 and transmitted through the optical information recording medium 318, and emits the reference light to the galvanometer mirror 320.

  The galvanometer mirror 320 reflects the reference light emitted from the quarter-wave plate 319 at a variable angle. The angle control of the galvanometer mirror 320 can be performed by the control unit 322, for example. At this time, the angle control of the galvanometer mirror 320 is performed in conjunction with the angle control of the galvanometer mirror 316, so that the reference light is reflected substantially vertically by the galvanometer mirror 320 and the reference light is folded back to the quarter-wave plate 319. .

  Therefore, the reference light emitted from the scanner lens 317 and transmitted through the optical information recording medium 318 is converted from S-polarized light to P-polarized light by passing through the quarter-wave plate 319 twice, and is emitted to the optical information recording medium 318. The Thereby, the reproduction light corresponding to the information recorded on the optical information recording medium 318 is emitted to the objective lens 313 as P-polarized diffracted light.

  The reproduction light emitted from the optical information recording medium 318 to the objective lens 313 is emitted to the PBS prism 309 via the objective lens 313 and the relay lens 311. At this time, only the reproduction light that is diffracted light from the reproduction target book is transmitted to the PBS prism 309 through the opening of the spatial filter 312 between the relay lenses 311.

  The PBS prism 309 transmits the P-polarized reproduction light emitted from the relay lens 311 and emits it to the image sensor 321.

  The image sensor 321 converts the reproduction light emitted from the PBS prism 309 into an electric signal. Thereby, an electrical signal indicating information recorded on the optical information recording medium 318 is obtained. The image sensor 321 outputs the converted electric signal. The electrical signal output from the image sensor 321 is output to the outside of the recording apparatus 300, for example. As the image sensor 321, for example, a solid-state image sensor such as a CMOS (Complementary Metal Oxide Semiconductor: complementary metal oxide film semiconductor) can be used.

  The control unit 322 controls the LCOS 310 and the polarization variable element 303 when recording information on the optical information recording medium 318 and reproducing information from the optical information recording medium 318.

  For example, the control unit 322 supplies (writes) a drive waveform indicating information to be recorded (modulation information) to the LCOS 310 and records signal light and reference light from the PBS prism 304 when recording information on the optical information recording medium 318. Is supplied to the polarization variable element 303 so as to be emitted. However, the control unit 322 supplies a drive waveform to the polarization variable element 303 so that signal light is not emitted from the PBS prism 304 when information is written to the LCOS 310 even when information is recorded on the optical information recording medium 318. To do.

  Further, the control unit 322 supplies a drive waveform to the polarization variable element 303 so that only the reference light is emitted from the PBS prism 304 at the time of reproducing information from the optical information recording medium 318.

  Further, the control unit 322 controls the book to be recorded and the like by controlling the angle of the galvanometer mirror 316 when recording information on the optical information recording medium 318. The control unit 322 controls the book to be reproduced and the like by controlling the angle of the galvanometer mirrors 316 and 320 when reproducing the information from the optical information recording medium 318. In FIG. 3, the connection relationship between the control unit 322 and the galvanometer mirrors 316 and 320 is not shown. Further, the control unit 322 may move the book to be recorded by changing the position of the optical information recording medium 318 with respect to the objective lens 313.

  The display device 100 shown in FIG. 1 can be applied to the LCOS 310 of the recording device 300, for example. In this case, for example, the data bus I / O 111 illustrated in FIG. 1 outputs the information to be recorded (modulation information) output from the control unit 322 to the LCOS 310 as the N-bit data described above. Further, the display screen of the display device 100 shown in FIG. 1 (for example, the display screen 200 shown in FIG. 2) emits the displayed image (signal light) to the PBS prism 309. By applying the display apparatus 100 to the recording apparatus 300, it is possible to detect a column shift in the LCOS 310 with the simple configuration shown in FIG. The column shift in the LCOS 310 causes an error in writing data to the optical information recording medium 318, for example.

  As described above, according to the display device 100 according to the first embodiment, the confirmation bit that is the first value is generated only at the timing when the data to be displayed on the specific column is output, and the data is stored in the specific column. By setting the confirmation bit to the redundancy register 151 only when the write destination is the write destination, the column shift can be detected while suppressing an increase in circuit scale. For this reason, the design and development of the display device 100 can be facilitated, and management such as monitoring during operation of the display device 100 can be facilitated.

  Although the detection of the column shift has been described, if the column and the row are exchanged in the display device 100 described above, it is possible to detect the row shift. A configuration for detecting both column shift and row shift will be described later (see, for example, FIG. 6).

(Embodiment 2)
In the second embodiment, parts different from the first embodiment will be described. In the second embodiment, a configuration for automatically eliminating the generated column shift based on the detection result of the column shift will be described.

(Display Device According to Second Embodiment)
FIG. 4 is a diagram of an example of the display device according to the second embodiment. 4, parts that are the same as the parts shown in FIG. 1 are given the same reference numerals, and descriptions thereof will be omitted. As illustrated in FIG. 4, the display device 100 according to the second embodiment includes a column shift determination circuit 410 instead of the confirmation I / O 170 illustrated in FIG. 1.

  The column shift determination circuit 410 is a detection unit that detects a column shift based on the value written in the redundancy register 151, similarly to the confirmation I / O 170 shown in FIG. Further, the column shift determination circuit 410 outputs a column shift detection result to the column control circuit 160.

  The column control circuit 160 switches the timing for switching the write destination column of the data output from the first output unit 110 in each column of the display screen (hereinafter simply referred to as the write destination column switching timing). This is a control unit that performs control based on the detection result of the column shift output from the determination circuit 410.

  For example, when a column shift is detected by the column shift determination circuit 410, the column control circuit 160 changes the write destination column switching timing until no column shift is detected by the column shift determination circuit 410. Thereby, when a column shift occurs, the generated column shift can be automatically resolved.

  For example, it is assumed that switching of the data writing destination by the column control circuit 160 is performed at the cycle of the operation clock in the display device 100. In this case, the column control circuit 160 changes the switching timing of the write destination column with the length of the operation clock cycle in the display device 100 as one unit.

  The change direction of the write destination column switching timing by the column control circuit 160 can be a direction in which the write destination column switching timing is advanced, a direction in which the write destination column switching timing is delayed, or a combination thereof. As an example, the column control circuit 160 first delays the switching timing of the write destination column by 1 unit, then advances the switching timing of the write destination column by 2 units, and then sets the switching timing of the write destination column by 3 units. Then, the switching timing of the write destination column may be advanced by 4 units, and the change direction may be switched alternately as shown in FIG.

  In addition, although the case where the column control circuit 160 controls the write destination column switching timing based on the detection result of the column shift by the column shift determination circuit 410 has been described, the present invention is not limited to such a configuration. For example, the timing at which the first output unit 110 outputs data to the registers 131-133,... May be controlled based on the detection result of the column shift by the column shift determination circuit 410.

  In this case, the first output unit 110 is provided with a timing control unit (for example, a delay circuit) that controls the timing of outputting data to the registers 131 to 133. The method for controlling the data output timing by the timing control unit is the same as the method for controlling the write destination column switching timing by the column control circuit 160 described above. In this case, the timing at which the second output unit 120 outputs a value to the redundancy register 151 is also adjusted to match the timing at which the first output unit 110 outputs data.

  By controlling the data output timing by the timing control unit as described above, when a column shift occurs, the generated column shift can be automatically resolved. Further, based on the detection result of the column shift by the column shift determination circuit 410, both the control of the data output timing by the timing control unit and the control of the write destination column switching timing by the column control circuit 160 are performed. It is good also as a structure.

  As described above, according to the display device 100 according to the second embodiment, the write destination column switching timing in the column control circuit 160 and the first output unit 110 based on the detection result of the column shift by the column shift determination circuit 410. Can control at least one of the timing of outputting data. Thereby, when a column shift occurs, the generated column shift can be automatically resolved. For this reason, the design and development of the display device 100 can be facilitated, and the display quality during the operation of the display device 100 can be improved.

(Embodiment 3)
The third embodiment will be described with respect to differences from the second embodiment. In the third embodiment, a configuration for detecting the amount and direction of column deviation by using a plurality of redundant registers corresponding to a plurality of columns will be described.

(Display device according to Embodiment 3)
FIG. 5 is a diagram of an example of the display device according to the third embodiment. In FIG. 5, the same parts as those shown in FIG. As illustrated in FIG. 5, the display device 100 according to the third embodiment includes redundant registers 552 to 554 in addition to the configuration illustrated in FIG. 4.

  The redundant registers 151, 552 to 554 correspond to the registers 131 to 134, that is, the first to fourth columns, respectively. The value (first value or second value) output from the second output unit 120 is output to each of the redundancy registers 151, 552 to 554.

  The column control circuit 160 writes the value output from the second output unit 120 to the redundant register corresponding to the column to which the current data is written, among the redundant registers 151, 552 to 554, and is not the current writing destination. It is assumed that the value output from the second output unit 120 is not written in the redundant register corresponding to the column.

  An operation example of the column control circuit 160 according to the third embodiment will be described. For example, the column control circuit 160 sets the redundancy register 151 and the register 131 in a writable state at the timing when the data write destination from the first output unit 110 is the first column, and sets the redundancy registers 552 to 554 and the register 132 to be writable. ... To 134 are made unwritable. In addition, the column control circuit 160 sets the redundant register 552 and the register 132 in a writable state at the timing when the data write destination from the first output unit 110 is the second column, and sets the redundant registers 151, 553, 554, and The registers 131, 133, and 134 are set in a non-writable state.

  Further, the column control circuit 160 sets the redundant register 553 and the register 133 in a writable state at the timing when the data write destination from the first output unit 110 is set to the third column, and sets the redundant registers 151, 552, 554, and The registers 131, 132, and 134 are set in a non-writable state. Further, the column control circuit 160 makes the redundant register 554 and the register 134 writable at the timing when the data write destination from the first output unit 110 is set to the fourth column, and sets the redundant registers 151, 552, 553, and The registers 131 to 133 are set in a non-writable state.

  The column shift determination circuit 410 detects the amount of column shift based on the values written in the redundancy registers 151, 552 to 554. The column shift determination circuit 410 may further detect the column shift direction based on the values written in the redundancy registers 151, 552 to 554.

  For example, the column shift determination circuit 410 outputs the first output when the values sequentially written from the redundancy register 151 to the redundancy registers 552 to 554 are “1”, “0”, “0”, and “0”, respectively. It can be determined that the column to which the data output from the unit 110 is to be written matches the column to which the data output from the first output unit 110 is actually written, that is, no column shift has occurred. it can. In this case, the column control circuit 160 does not change the write destination column switching timing.

  The column shift determination circuit 410 also outputs the first output when the values sequentially written from the redundancy register 151 to the redundancy registers 552 to 554 are “0”, “1”, “0”, and “0”, respectively. It can be determined that the column in which the data output from the first output unit 110 is actually written is shifted (slower) by one column with respect to the column to which the data output from the unit 110 is to be written. In this case, the column control circuit 160 delays the write destination column switching timing by one unit. Thereby, column shift can be eliminated.

  The column shift determination circuit 410 outputs the first output when the values sequentially written from the redundancy register 151 to the redundancy registers 552 to 554 are “0”, “0”, “1”, and “0”, respectively. It can be determined that the column in which the data output from the first output unit 110 is actually written is shifted (slow) by two columns with respect to the column to which the data output from the unit 110 is to be written. In this case, the column control circuit 160 delays the write-in column switching timing by 2 units. Thereby, column shift can be eliminated.

  Further, the column shift determination circuit 410 outputs the first output when the values sequentially written from the redundancy register 151 to the redundancy registers 552 to 554 are “0”, “0”, “0”, and “1”, respectively. It can be determined that the column in which the data output from the first output unit 110 is actually written is shifted (slow) by three columns with respect to the column to which the data output from the unit 110 is to be written. In this case, the column control circuit 160 delays the write destination column switching timing by 3 units. Thereby, column shift can be eliminated.

  In the example illustrated in FIG. 5, the configuration in which the redundant registers 151 and 552 to 554 corresponding to the first to fourth columns are described. However, a configuration in which redundant registers corresponding to the fifth and subsequent columns may be further provided. This makes it possible to detect a column shift amount of four columns or more.

  For example, the redundant register 554 may be omitted from the redundant registers 151, 552 to 554. Also in this case, it is possible to detect the column shift amount up to two columns. The redundant registers 553 and 554 may be omitted from the redundant registers 151 and 552 to 554. Also in this case, it is possible to detect the column shift amount up to one column.

  Moreover, although the case where the specific column is the first column has been described, the specific column may be the second and subsequent columns. For example, a specific column is set as the second column. In this case, the column shift determination circuit 410 determines that the column sequential determination circuit 410 determines that the values sequentially written from the redundancy register 151 to the redundancy registers 552 to 554 are “0”, “1”, “0”, “0”. It can be determined that no deviation has occurred. In this case, the column control circuit 160 does not change the write destination column switching timing.

  The column shift determination circuit 410 also outputs the first output when the values sequentially written from the redundancy register 151 to the redundancy registers 552 to 554 are “1”, “0”, “0”, and “0”, respectively. It can be determined that the column in which the data output from the first output unit 110 is actually written is shifted by one column (fast) with respect to the column to which the data output from the unit 110 is to be written. In this case, the column control circuit 160 advances the write destination column switching timing by one unit. Thereby, column shift can be eliminated.

  In the example illustrated in FIG. 5, a configuration in which the registers 131 to 134 and the redundant registers 151 and 552 to 554 are alternately arranged one by one is illustrated. However, the arrangement of the registers 131 to 134 and the redundant registers 151, 552 to 554 is illustrated. However, the arrangement is not limited to this, and various arrangements can be adopted.

  As described above, according to the display device 100 according to the third embodiment, by using a plurality of redundant registers (for example, the redundant registers 151, 552 to 554) corresponding to a plurality of columns, the amount and direction of the column shift are detected. It becomes possible to do. As a result, for example, column shift can be efficiently eliminated by controlling the write destination column switching timing in the column control circuit 160.

  In the example illustrated in FIG. 5, the configuration for performing the control for eliminating the column shift based on the detection result of the column shift has been described. However, the display device 100 according to the third embodiment is not limited to such a configuration. For example, it may be configured to notify the design developer, user, administrator, or the like of the display device 100 of the amount and direction of the detected column shift.

(Embodiment 4)
In the fourth embodiment, parts different from the third embodiment will be described. In the fourth embodiment, a configuration for detecting both column shift and row shift will be described.

(Display device according to Embodiment 4)
FIG. 6 is a diagram of an example of the display device according to the fourth embodiment. In FIG. 6, the same parts as those shown in FIG. As shown in FIG. 6, in addition to the configuration shown in FIG. 5, the display device 100 according to the fourth embodiment includes redundant registers 612, 613,..., A row control circuit 620, a row deviation determination circuit 630, Is provided.

  In addition to the registers 131 to 134,... And the column drivers 141 to 144,... Corresponding to the respective columns (columns) of the display screen, the display device 100 includes a plurality of corresponding to each row (row) of the display screen. And a plurality of row drivers.

  The second output unit 120 outputs the first value (“1”) at the timing when the data to be displayed on the display cell in the specific column and specific row on the display screen is output from the first output unit 110 to the registers 131 to 134. ) Is output to the redundancy register 151. Here, a specific column is a first column and a specific row is a first row. In this case, the display cell in the specific column and the specific row is, for example, the upper left display cell of the display screen 200 shown in FIG.

  Further, the second output unit 120 outputs the second output data from the first output unit 110 to the registers 131 to 134 at a timing at which data for display in a display cell different from a specific column and a specific row of display cells is output. The value of “0” is output to the redundancy register 151.

  The redundancy registers 151, 612, and 613 are 1-bit registers provided corresponding to the first to third rows (rows) of the display screen, respectively. For example, when the redundancy register 151 is set in a writable state by both the column control circuit 160 and the row control circuit 620, the data output from the second output unit 120 is written into the redundancy register 151. In addition, when the redundancy register 151 is set in a non-writable state by at least one of the column control circuit 160 and the row control circuit 620, the data output from the second output unit 120 is not written to the redundancy register 151.

  In addition, when the redundancy control register 612 is set in a writable state by the row control circuit 620, the data output from the second output unit 120 is written to the redundancy register 612. When the row control circuit 620 sets the redundant register 612 to a non-writable state, the data output from the second output unit 120 is not written to the redundant register 612.

  In addition, when the redundancy register 613 is set in a writable state by the row control circuit 620, the data output from the second output unit 120 is written into the redundancy register 613. In addition, when the redundancy control register 613 is set in a write-disabled state by the row control circuit 620, the data output from the second output unit 120 is not written to the redundancy register 613.

  The row control circuit 620 is a row switching unit that sequentially switches the row to which data is written from the first output unit 110 in each row of the display screen. The row control circuit 620 sets the redundancy register 151 in a writable state when the row to which data is written from the first output unit 110 is the first row. As a result, when the data write destination from the first output unit 110 is the first row of the first column, the value output from the second output unit 120 can be written into the redundancy register 151.

  In addition, the row control circuit 620 sets the redundancy register 612 in a writable state when the row to which data from the first output unit 110 is written is the second row. As a result, when the data write destination from the first output unit 110 is the second row, the value output from the second output unit 120 can be written into the redundancy register 612.

  In addition, the row control circuit 620 sets the redundancy register 612 in a writable state when the write destination row of data from the first output unit 110 is the third row. As a result, when the data write destination from the first output unit 110 is the third row, the value output from the second output unit 120 can be written into the redundancy register 613.

  The row shift determination circuit 630 is a row detection unit that detects a row shift on the display screen based on values written in the redundancy registers 151, 612, and 613. For example, when the values written in the redundancy registers 151, 612, and 613 are “1”, “0”, and “0”, the row deviation determination circuit 630 uses the data output from the first output unit 110, respectively. It can be determined that the row to be written matches the row in which the data output from the first output unit 110 is actually written, that is, no row deviation has occurred. In this case, the row control circuit 620 does not change the switching timing of the row to which the data from the first output unit 110 is written.

  In addition, the row shift determination circuit 630 outputs the data output from the first output unit 110 when the values written in the redundancy registers 151, 612, and 613 are “0”, “1”, and “0”, respectively. It can be determined that the row in which the data output from the first output unit 110 is actually written is shifted (slow) by one row with respect to the row to be written. In this case, the row control circuit 620 advances the switching timing of the row to which the data from the first output unit 110 is written by one unit (row switching cycle × 1). As a result, the row shift can be eliminated.

  In addition, the row shift determination circuit 630 outputs the data output from the first output unit 110 when the values written in the redundancy registers 151, 612, and 613 are “0”, “0”, and “1”, respectively. It can be determined that the row in which the data output from the first output unit 110 is actually written is shifted (slow) by two rows with respect to the row to be written. In this case, the row control circuit 620 advances the switching timing of the row to which data is written from the first output unit 110 by two units (row switching cycle × 2). As a result, the row shift can be eliminated.

  As described above, according to the display device 100 according to the fourth embodiment, the row shift can be detected by using the redundant registers 151, 612, and 613 corresponding to the respective columns, similarly to the detection of the column shift described above. it can.

  In the example illustrated in FIG. 6, the configuration for performing the control for eliminating the row shift based on the detection result of the row shift has been described. However, the display device 100 according to the fourth embodiment is not limited to such a configuration. For example, it may be configured to notify the design developer, user, administrator, or the like of the display device 100 of the detected amount and direction of the low deviation.

  In the example illustrated in FIG. 6, the configuration for detecting both the column shift and the row shift has been described. However, the display device 100 according to the fourth embodiment is not limited to such a configuration, for example, only the row shift. It is good also as a structure which detects. In this case, for example, the redundant registers 552 to 554 can be omitted.

  Further, in the example illustrated in FIG. 6, the amount of the row shift and the configuration to detect are described. However, the display device 100 according to the fourth embodiment is not limited to such a configuration, for example, only the occurrence of the row shift. It is good also as a structure to detect. In this case, for example, the redundant registers 612 and 613 can be omitted.

  In the example illustrated in FIG. 6, the configuration in which the redundant register 151 serves as both the redundant register (first register) used for detecting the column shift and the redundant register (second register) used for detecting the row shift has been described. However, it is not limited to such a configuration. For example, a redundant register (second register) used for detecting a row shift may be provided separately from the redundant register 151.

(Embodiment 5)
In the fifth embodiment, data that does not change with time is used as data to be written to a part of pixel areas, so that an increase in circuit scale is suppressed and data is written based on data written to part of pixel areas. A configuration for detecting a display shift such as a shift will be described.

(Screen display by the display device according to the fifth embodiment)
FIG. 7 is a diagram illustrating an example of a screen display by the display device according to the fifth embodiment. A display screen 700 illustrated in FIG. 7 is a screen display by the display device according to the fifth embodiment. In the example illustrated in FIG. 7, the display screen is a 6 × 7 matrix, but the size of the screen display by the display device according to the fifth embodiment is not limited to this. The display device according to the fifth embodiment can be applied to, for example, the LCOS 310 shown in FIG.

  A pixel area 710 (second to seventh columns) included in the display screen 700 is a pixel area that displays an image based on image data that is input to the display device according to the fifth embodiment and changes with time. A pixel area 720 (first column) included in the display screen 700 is a pixel area used for confirming a column shift in the display screen 700.

  The display device according to the fifth embodiment is, for example, image data in which specific pixel cells 721 included in the pixel area 720 are displayed in black and the remaining pixel cells 722 to 726 included in the pixel area 720 are displayed in white. Thus, the pixel area 720 is driven using image data that does not change with time. As a result, when the pixel cell 721 displays white instead of black, it can be determined that a low shift has occurred. Further, when a row shift occurs, the amount and direction of the row shift can be determined depending on which of the pixel cells 722 to 726 has displayed black.

  The display determination in the pixel area 720 may be performed by detecting the signal light of the image displayed in the pixel area 720, or display data stored in a register of each display cell included in the pixel area 720. It may be performed by detecting.

  The black display and white display described above may be interchanged. Moreover, although the case where the pixel cell 721 in the pixel area 720 is the specific pixel cell has been described, any of the pixel cells 722 to 726 in the pixel area 720 may be the specific pixel cell. Further, although the case where one pixel cell in the pixel area 720 is set as a specific pixel cell has been described, a plurality of pixel cells in the pixel area 720 (however, a part of the pixel area 720) is specified as the specific pixel cell. It is good.

  The detection of the display shift in the display device according to the fifth embodiment illustrated in FIG. 7 can be performed, for example, when the display device according to the fifth embodiment is not in operation (for example, at the time of design development or idle).

(Another example of screen display by the display device according to the fifth embodiment)
FIG. 8 is a diagram illustrating another example of the screen display by the display device according to the fifth embodiment. A display screen 700 shown in FIG. 8 is an example different from FIG. 7 of the screen display by the display device according to the fifth embodiment. In the example illustrated in FIG. 8, the pixel area 710 that displays an image based on image data that is input to the display device according to the fifth embodiment and changes with time is used as the first to seventh columns included in the display screen 700. . In the example illustrated in FIG. 8, the display device according to the fifth embodiment includes a replica pixel area 810 in addition to the pixel area 710.

  The replica pixel area 810 is a replica of the display cell included in the pixel area 720. However, the replica pixel area 810 can be a register for storing display data without performing display such as liquid crystal driving. The replica pixel area 810 may be one pixel cell or a plurality of pixel cells.

  The display device according to the fifth embodiment can detect a row shift in the display screen 700 by using the replica pixel area 810 in the same manner as the pixel area 720 illustrated in FIG. For example, in the display device according to the fifth embodiment, black display data is stored in specific pixel cells included in the replica pixel area 810, and white display data is stored in the remaining pixel cells included in the replica pixel area 810. The replica pixel area 810 is driven using the image data that is processed and does not change with time.

  In addition, the display device according to the fifth exemplary embodiment includes a detection unit that detects data stored in the replica pixel area 810. The detection unit can determine the occurrence of a row shift and the amount and direction of the generated row shift.

  As described above, according to the display device according to the fifth embodiment, by using data that does not change with time as data to be written to some pixel areas (for example, the pixel area 720 and the replica pixel area 810), the circuit scale can be obtained. It is possible to detect a row shift based on data written in a part of the pixel area while suppressing an increase in the number of pixels. In addition, by using time-varying image data as image data to be written in the remaining pixel area (for example, pixel area 710), it is possible to detect a row shift in a state close to the operation of the display device.

  In the example illustrated in FIGS. 7 and 8, the configuration in which the row shift is detected using a part of the pixel cells in the column direction (the pixel area 720 and the replica pixel area 810) has been described. The pixel shift may be detected using the pixel cells. Further, it may be configured to detect both the row shift and the column shift using a part of the pixel cells in the column direction and a part of the pixel cells in the row direction.

  As described above, according to the display device, it is possible to detect a display shift while suppressing an increase in circuit scale. By detecting the display shift, for example, it can be confirmed whether or not data is written at a correct position in a matrix display device.

  As described above, the display device according to the present invention is useful for a display device having a matrix display screen, and is particularly suitable for a display device such as LCOS.

100 Display Device 110 First Output Unit 111 Data Bus I / O
112, 113, 122, 123, 131 to 134,..., Register 114, data processing circuit 120, second output unit 121, confirmation bit generation unit 141 to 144, column driver 151, 552 to 554, 612, 613 redundancy register 160 column control circuit 170 I / O for confirmation
200,700 Display screen 211-215 Row 221-226 Column 300 Recording device 301 Light source 302 Collimating lens 303 Polarization variable element 304,309 PBS prism 306 Beam expander 307 Phase mask 308,311 Relay lens 310 LCOS
312 Spatial filter 313 Objective lens 314, 315 Mirror 316, 320 Galvano mirror 317 Scanner lens 318 Optical information recording medium 319 1/4 wavelength plate 321 Image sensor 322 Control unit 410 Column shift determination circuit 620 Row control circuit 630 Row shift determination circuit 710 720 pixel area 721-726 pixel cell 810 replica pixel area

Claims (4)

In a display device that displays an image by a display screen including a plurality of pixel groups,
A first output unit that sequentially outputs each data to be displayed on the plurality of pixel groups;
A first value is output at a timing when data for display on one specific pixel group (referred to as a “specific pixel group”) included in the plurality of pixel groups is output from the first output unit. A second value different from the first value is output at a timing when data for displaying in a pixel group different from the specific pixel group among the plurality of pixel groups is output from the first output unit. A second output unit;
A register capable of writing a value output from the second output unit;
The pixel group to which data output from the first output unit among the plurality of pixel groups is sequentially switched, and the specific pixel group of the plurality of pixel groups is used as the writing destination. Output from the second output unit when the value output from the second output unit is written to the register and a pixel group different from the specific pixel group among the plurality of pixel groups is set as the write destination A switching unit that sets a value that is not written to the register;
Based on the value written in the register, the pixel group to which data output from the first output unit of the plurality of pixel groups is to be written, and the first output unit of the plurality of pixel groups. A detection unit for detecting a shift between the pixel group to which the output data is written, and
A display device comprising:   And a control unit that controls at least one of a timing at which the switching unit switches the writing destination and a timing at which the first output unit outputs data based on a detection result by the detection unit. The display device according to claim 1. The registers each include a plurality of registers corresponding to different pixel groups of the plurality of pixel groups,
The switching unit writes a value output from the second output unit to a register corresponding to the writing destination pixel group among the plurality of registers, and is different from the corresponding register among the plurality of registers. The register outputs a value output from the second output unit, and
The detection unit detects at least one of the shift amount and the shift direction based on values written in the plurality of registers.
The display device according to claim 1, wherein the display device is a display device. The pixel group is a column of the display screen,
The first output unit sequentially outputs each data to be displayed on a plurality of display cells included in the display screen,
The second output unit outputs the first value at a timing at which data for displaying on a display cell corresponding to a specific column and a specific row among the plurality of display cells is output from the first output unit. Outputting and outputting the second value at a timing at which data for displaying on a display cell different from the specific display cell among the plurality of display cells is output from the first output unit;
A second register that is the same as or different from the register (referred to as "first register");
When sequentially switching the write destination row of the data output from the first output unit among the plurality of rows included in the display screen and setting the specific row of the plurality of rows as the write destination Output from the second output unit when the value output from the second output unit is written to the second register and the write destination is a row different from the specific row among the plurality of rows A row switching unit in which the value thus written is not written to the second register;
Based on the value written in the second register, the data to be written from the first output unit of the plurality of rows and the output from the first output unit of the plurality of rows A row detection unit for detecting a shift between the row in which the written data is written, and
The display device according to claim 1, further comprising:

Images