JP6690293B2 - Image processing device - Google Patents

Description

  The present invention relates to an image processing device that performs image processing according to parameters set in a register.

  In a printer or the like, various parameters are set in the image processing circuit and the look-up table is rewritten using the period of the invalid image area between pages.

  FIG. 11 shows a configuration example of a conventional general image processing circuit that performs a plurality of image processes by pipeline processing, and FIG. 12 shows a timing chart of its operation. The image processing circuit of FIG. 11 executes processing in a pipeline system in the order of image processing unit A → image processing unit B → image processing unit C. Each of the image processing units A to C includes a register unit, and executes image processing according to the parameters set in the register unit.

  After the CPU sets the parameters in the register units of the image processing units A to C, the processing of the first page is started, and when the image processing is finished in the image processing unit C at the final stage, the image processing unit C sends to the CPU. A page end signal is output as an interrupt. When receiving the page end signal, the CPU writes the parameters for the next page into the register units of the image processing units A to C.

  As shown in FIG. 12, the time allowed for writing the parameter for the next page to the register unit (register write allowable time) is from the receipt of the page end signal until the start of the next effective image area (image of the first stage). This is the time obtained by subtracting the CPU response time (X) from the time until the effective image area of the next page starts in the processing unit A).

  In recent years, the speed of printing has tended to shorten the time in the invalid image area between pages, and along with this, the register write allowable time has decreased. Furthermore, the amount of parameters is increasing due to the complexity of image processing. As a result, it is necessary to rewrite the register between pages at a higher speed.

  Japanese Patent Application Laid-Open No. 2004-242242 discloses a technique for updating parameters at high speed between pages by configuring a parameter setting packet to flow in the image data bus.

JP, 2007-243444, A

  In the technique disclosed in Patent Document 1, it is necessary to transmit the parameter flowing from the image data bus to the processing unit in the subsequent stage without performing the image processing, so that a dedicated path for bypassing the processing unit is required inside, The circuit scale increases. In addition, if the number of pipeline processes increases, the amount of parameters sent to the image data bus increases, making it difficult to set all parameters to the image data bus by using the invalid image area between pages. .

  SUMMARY OF THE INVENTION The present invention is intended to solve the above problems, and an object thereof is to provide an image processing apparatus capable of reliably updating parameters set in a register unit even when pages are short.

  The gist of the present invention for achieving such an object resides in the inventions of the following items.

[1] An image processing unit that has a register unit and performs image processing according to the parameters set in the register unit;
A parameter temporary storage memory for storing parameters to be set in the register section;
A parameter transfer unit that transfers and sets the parameters stored in the parameter temporary storage memory to the register unit;
A CPU for writing parameters in the parameter temporary storage memory,
Have
The parameter transfer unit transmits a transfer completion signal to the CPU when transfer of the parameters of one page from the parameter temporary storage memory to the register unit is completed,
Wherein said CPU for receiving the transfer completion signal, as parameters for the next page in the period in which the image processing unit is processing the image data of one page is already stored in the parameter temporary storage memory, said parameter Write the parameters for the next page to the temporary storage memory,
The image processing unit outputs a page end signal to the parameter transfer unit when image processing of one page is completed,
Upon receiving the page end signal, the parameter transfer unit reads a parameter for the next page to be set next in the register unit from the parameter temporary storage memory, transfers the parameter to the register unit, and sets the parameter. Image processing device.

In the above invention, while the image processing unit is processing the image data of one page, the parameter for the next page is written and prepared in the parameter temporary storage memory. When the image processing unit completes the image processing of one page, the parameter transfer unit transfers the parameters prepared in the parameter temporary storage memory to the register unit, so that the overhead of the CPU does not occur at that timing, and the parameter The update can be done in a short time. Further, in the above invention, it is possible to secure a long time in which the CUP can write the parameters for the next page in the parameter temporary storage memory while minimizing the required capacity of the parameter temporary storage memory.

[2] A plurality of image processing units are provided to perform pipeline processing,
Upon receiving the page end signal, the parameter transfer unit reads the parameter for the next page to be set next in the register unit of the image processing unit that is the output source of the page end signal from the parameter temporary storage memory, and reads the page. When the parameter of one page is transferred to the register unit of the image processing unit that is the output source of the end signal and is set , and when the parameter of one page is transferred to the register unit of the image processing unit at the final stage of the pipeline processing, The image processing apparatus according to [1], which transmits the transfer completion signal .

  In the above invention, the plurality of image processing units perform pipeline processing. The parameters set in the register unit of each image processing unit are updated individually at the timing when the image processing is completed in each image processing unit. The parameters can be rewritten in a shorter inter-page time as compared with the case where the parameter setting for the plurality of image processing units is collectively performed at the time when the image processing unit at the final stage of the pipeline processing finishes the processing.

[3] The parameter transfer unit receives a second page end signal from another image processing unit while performing the transfer based on the first page end signal received from one image processing unit. In this case, after the transfer based on the first page end signal is completed, the transfer based on the second page end signal is started. The image processing device according to [2].

  In the above-mentioned invention, the operations are arbitrated so that the processes for a plurality of page end signals that occur almost at the same time do not compete.

[ 4 ] The image processing device according to any one of [1] to [ 3 ], wherein the parameter temporary storage memory is a DRAM.

  According to the image processing apparatus of the present invention, it is possible to reliably update the parameters set in the register unit even if the page interval is short.

It is a block diagram showing the composition of the image processing device concerning an embodiment of the invention. It is a figure which shows operation | movement when each image processing part AC of an image processing apparatus is performing the image processing with respect to the image data of the Nth page. FIG. 6 is a diagram showing an operation immediately after the image processing unit A completes image processing on image data of N pages. FIG. 11 is a diagram showing an operation immediately after the image processing unit A starts the processing of the (N + 1) th page and the image processing unit B completes the image processing of the image data of the Nth page. FIG. 16 is a diagram showing an operation immediately after the image processing unit B starts the processing of the (N + 1) th page and the image processing unit C completes the image processing of the image data of the Nth page. It is a figure which shows operation | movement immediately after receiving a transfer completion signal. It is a figure which shows the timing chart in a series of operation demonstrated in FIGS. FIG. 13 is a diagram showing a timing chart when the image processing apparatus according to the exemplary embodiment of the present invention is applied to a printer having the same inter-page time as in FIG. 12. 9 is a flowchart showing a process performed by a CPU regarding writing parameters to a parameter temporary storage memory. 9 is a flowchart showing a process performed by a parameter transfer unit of the image processing circuit. It is a figure which shows the structural example of the conventional image processing circuit. FIG. 12 is a diagram showing a timing chart of the operation of the image processing circuit shown in FIG. 11.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 shows the configuration of an image processing apparatus 2 according to the embodiment of the present invention. The image processing apparatus 2 is applied to, for example, an image forming apparatus that prints an image on a recording sheet such as a printer or a multifunction peripheral, and performs various kinds of image processing on image data to be printed. Here, the image processing apparatus 2 is provided immediately upstream of the print head, and the image processing apparatus 2 processes the image data read from the page memory or the like in accordance with the printing operation one after another and outputs the image data to the print head. It has become.

  The image processing device 2 is configured to include an image processing circuit 3, a CPU (Central Processing Unit) 5 including a microprocessor, and a parameter temporary storage memory 7. The image processing apparatus 2 is also provided with a memory for storing programs executed by the CPU 5 and a memory serving as a work area for temporarily storing various data when the CPU 5 executes processing, but these are not shown. To do.

  The image processing circuit 3 includes an image processing unit A, an image processing unit B, an image processing unit C, and a parameter transfer unit 15. The image processing unit A, the image processing unit B, and the image processing unit C are cascade-connected in this order to perform pipeline processing. The image processing circuit 3 is a semiconductor chip such as an ASIC (application specific integrated circuit) or an FPGA (field-programmable gate array).

  The image processing unit A has a register unit 11 and executes image processing based on the parameters set in the register unit 11. Image data is sequentially input to the image processing unit A from the upstream in accordance with the operation of the print engine. The image processing unit B has a register unit 12 and executes image processing based on the parameters set in the register unit 12. The image data output from the image processing unit A is input to the image processing unit B. The image processing unit C has a register unit 13 and executes image processing based on the parameters set in the register unit 13. The image data output from the image processing unit B is input to the image processing unit C. The image processing unit C outputs the processed image data to the outside (for example, a print head or the like).

  The parameter temporary storage memory 7 is a memory in which the parameters set in the register units 11 to 13 of the image processing circuit 3 are temporarily stored. Here, a DRAM (Dynamic Random Access Memory) is used as the parameter temporary storage memory 7.

  The CPU 5 has a function of writing parameters in the parameter temporary storage memory 7.

  The parameter transfer unit 15 has a function of transferring and setting the parameters stored in the parameter temporary storage memory 7 to the register units 11 to 13. The temporary parameter storage memory 7 can be freely accessed from the CPU 5 and the parameter transfer unit 15 at any time.

  When the image processing unit A completes the image processing for one page, the image processing unit A outputs the page end signal 16 a to the parameter transfer unit 15. The image processing unit B outputs the page end signal 16b to the parameter transfer unit 15 when the image processing for one page is completed. When the image processing unit C completes the image processing for one page, the image processing unit C outputs the page end signal 16c to the parameter transfer unit 15.

  Upon receiving the page end signal 16a from the image processing unit A, the parameter transfer unit 15 reads the parameter to be set next for the image processing unit A from the parameter temporary storage memory 7 and transfers it to the register unit 11 of the image processing unit A. Set. More specifically, when the page end signal 16a is received, a read request and a predetermined address are output to the parameter temporary storage memory 7, the parameters are read from the parameter temporary storage memory 7, and the read parameters are stored in the register unit 11. Transfer and set.

  Similarly, when the parameter transfer unit 15 receives the page end signal 16b from the image processing unit B, the parameter transfer unit 15 reads the parameter to be set next for the image processing unit B from the parameter temporary storage memory 7, and the register unit of the image processing unit B is read. When the page end signal 16c is received from the image processing unit C, the parameter to be set next for the image processing unit C is read from the parameter temporary storage memory 7 and stored in the register unit 13 of the image processing unit C. Transfer and set.

  When the parameters to be transferred to the register unit 13 of the final-stage image processing unit C are read from the parameter temporary storage memory 7 and transfer is completed, a transfer end signal 17 is output to the CPU 5 as an interrupt signal.

  When the page end signal is received from a plurality of the image processing units A to C, the parameter transfer unit 15 arbitrates these and executes the transfer. For example, when the page end signal 16b is received from the image processing unit B while the parameters are transferred based on the page end signal 16a received from the image processing unit A, after the transfer based on the page end signal 16a is completed. , And starts the transfer based on the page end signal 16b. Specifically, the page end signals 16a to 16c from the image processing units A to C are fetched into the queue on a first-come-first-served basis, and the page end signals are sequentially fetched from the head of the queue and the corresponding transfer is executed. .

  Next, the operation of the image processing device 2 will be described.

  Here, a case where parameters are transferred to the register units 11 to 13 of the image processing units A to C between the image processing of the Nth page and the image processing of the N + 1th page will be described as an example.

  FIG. 2 shows the operation when each of the image processing units A to C of the image processing apparatus 2 is performing image processing on the image data of the Nth page. While performing the image processing on the image data of the Nth page, the CPU 5 writes the parameters for the N + 1th page in the parameter temporary storage memory 7. This writing may be completed before the image processing unit A at the first stage completes the image processing of the Nth page. Note that, in FIGS. 2 to 6, the broken signal line indicates a state where it is not used.

  FIG. 3 shows the operation immediately after the image processing unit A completes the image processing on the image data of N pages. At this time, the image processing units B and C are still processing the image data of the Nth page. The image processing unit A outputs the page end signal 16a to the parameter transfer unit 15, and notifies the parameter transfer unit 15 that the processing of the Nth page is completed.

  Upon receiving the page end signal 16a, the parameter transfer unit 15 reads the parameters for the N + 1 page and the image processing unit A from the parameter temporary storage memory 7, transfers them to the register unit 11 of the image processing unit A, and sets them. As a result, the image processing unit A is ready to start the image processing of the (N + 1) th page.

  FIG. 4 illustrates the operation immediately after the image processing unit A starts the processing of the (N + 1) th page and the image processing unit B completes the image processing of the image data of the Nth page. At this time, the image processing unit C is still executing the image processing for the Nth page. The image processing unit B outputs the page end signal 16b to the parameter transfer unit 15 to notify the parameter transfer unit 15 that the processing of the Nth page is completed.

  Upon receiving the page end signal 16b, the parameter transfer unit 15 reads the parameters for the N + 1 page and the image processing unit B from the temporary parameter storage memory 7, transfers them to the register unit 12 of the image processing unit B, and sets them. As a result, the image processing unit B is ready to start the image processing of the (N + 1) th page.

  FIG. 5 shows the operation immediately after the image processing unit B starts the processing of the (N + 1) th page and the image processing unit C completes the image processing of the image data of the Nth page. At this time, the image processing unit A is performing image processing on the (N + 1) th page. The image processing unit C outputs the page end signal 16c to the parameter transfer unit 15, and notifies the parameter transfer unit 15 that the processing of the Nth page is completed.

  Upon receiving the page end signal 16c, the parameter transfer unit 15 reads the parameters for the N + 1 page and the image processing unit C from the temporary parameter storage memory 7, transfers them to the register unit 13 of the image processing unit C, and sets them. As a result, the image processing unit C is ready to start the image processing of the (N + 1) th page.

  Further, the parameter transfer unit 15 outputs the transfer end signal 17 to the CPU 5 as an interrupt signal when the parameters for the N + 1 page and the image processing unit C are read out from the temporary parameter storage memory 7 and the transfer is completed.

  FIG. 6 shows the operation immediately after receiving the transfer end signal 17. The image processing units A to C respectively perform image processing on the image data of the (N + 1) th page. While each of the image processing units A to C is performing image processing on the image data of the (N + 1) th page, the CPU 5 writes the parameters for the (N + 2) th page in the parameter temporary storage memory 7. This writing may be completed before the first-stage image processing unit A completes the image processing of the (N + 1) th page.

  FIG. 7 is a diagram showing a timing chart in the series of operations described in FIGS. As can be seen from this figure, after the processing of the self-image processing unit is completed, each of the image processing units A to C has a register unit of the self-image processing unit even if another image processing unit is still processing. Immediately rewrite the parameters of. Further, during the processing of the Nth page, the parameters for the N + 1th page are prepared in the parameter temporary storage memory 7, and the parameter transfer unit 15 transfers the parameters from the parameter temporary storage memory 7 to the respective register units 11 to 13. At the time of the transfer, no interrupt is generated in the CPU 5, the overhead of the CPU processing is eliminated, and the preparation for the next page can be completed early. This allows many parameters to be updated in a short time between pages.

  Further, the CPU 5 receives the transfer end signal 17 relating to the parameter for the N + 1 page and, until the image processing section A completes the image processing of the N + 1 page (parameter writing allowable time), the CPU 5 for the N + 2 page. Since it suffices to write the parameter in the parameter temporary storage memory 7, the parameter can be written in the parameter temporary storage memory 7 without being restricted by pages and with a sufficient margin.

  FIG. 8 shows a timing chart when the image processing apparatus 2 according to the embodiment of the present invention is applied to a printer having the same inter-page time as that of FIG. 12 shown as a conventional example. There is a sufficient time margin from the writing of the parameters to the register units 11 to 13 of the image processing units A to C until the start of the image processing of the next page. Also, the parameter writing allowable time is sufficiently long.

  FIG. 9 is a flow chart showing a process performed by the CPU 5 for writing parameters in the parameter temporary storage memory 7. First, the parameters for the first page are written in the temporary parameter storage memory 7 (step S101). Next, an initial setting instruction is transmitted to the parameter transfer unit 15 of the image processing circuit 3 (step S102). Upon receiving the initial setting instruction, the parameter transfer unit 15 reads the parameters of the first page from the parameter temporary storage memory 7 and transfers them to the register units 11 to 13 of the image processing units A to C to set them.

  After that, the image data of the first page is sequentially input to the image processing circuit 3, and the image processing on the image data of the first page is executed by the image processing circuit 3.

  When the interrupt by the transfer end signal 17 occurs (step S103; Yes), the CPU 5 confirms the presence or absence of the next page (step S104), and if there is the next page (step S104; Yes), sets the parameter for the next page. The parameter temporary storage memory 7 is written (step S105), and the process returns to step 103 to continue the process. If there is no next page (step S104; No), the process ends.

  FIG. 10 is a flowchart showing a process performed by the parameter transfer unit 15 of the image processing circuit 3. When the initial setting instruction is received from the CPU 5 (step S201), the parameters of the first page are read from the parameter temporary storage memory 7 and transferred to the register sections 11 to 13 of the image processing sections A to C to be set (step S202). . When the transfer of the parameters to the register unit 13 of the image processing unit C at the final stage is completed, the transfer end signal 17 is output to the CPU 5 (step S203).

  After that, the image data of the first page is sequentially input to the image processing circuit 3, and the image processing on the image data of the first page is executed by each of the image processing units A to C.

  When the parameter transfer unit 15 receives the page end signal 16a from the image processing unit A (step S204; Yes), the parameters for the next page and the image processing unit A are read from the parameter temporary storage memory 7 (step S205). Is transferred to and set in the register unit 11 of the image processing unit A (step S206). Then, it returns to step 204 and continues a process.

  Similarly, when the page end signal 16b is received from the image processing unit B (step S207; Yes), the parameters for the next page and the image processing unit B are read from the parameter temporary storage memory 7 (step S208), and the image processing is performed. It is transferred to the register section 12 of the section B and set (step S209). Then, it returns to step 204 and continues a process.

  When the page end signal 16c is received from the image processing unit C (step S210; Yes), the parameters for the next page and the image processing unit C are read from the parameter temporary storage memory 7 (step S211), and the transfer end signal 17 is sent to the CPU 5. It outputs to (step S212). Further, the parameters for the next page and for the image processing unit C read from the temporary parameter storage memory 7 are transferred to the register unit 13 of the image processing unit C and set (step S213), and the process returns to step 204 to continue the processing. . The image processing circuit 3 finishes the process when a reset signal or the like is input, for example.

  Although the embodiments of the present invention have been described above with reference to the drawings, the specific configurations are not limited to those shown in the embodiments, and there are changes and additions within the scope not departing from the gist of the present invention. Also included in the present invention.

  In the embodiment, the CPU 5 and the parameter temporary storage memory 7 are provided outside the image processing circuit 3, but the image processing circuit 3 and the parameter temporary storage memory 7 and the CPU 5 may be formed on one semiconductor chip.

  In the embodiment, the DRAM is used as the parameter temporary storage memory 7, but the type of memory is not limited to this.

  In the embodiment, the parameter transfer unit 15 of the image processing circuit 3 outputs the transfer end signal 17 to the CPU 5. However, the function of outputting the transfer end signal 17 may be omitted. For example, the CPU 5 may write the parameter for the next page in the parameter temporary storage memory 7 based on a signal generated from the printer engine for each page (for example, a signal output according to the feeding of the paper). Good.

  Further, it may be configured such that an area for storing parameters for a plurality of pages is secured in the parameter temporary storage memory 7 and these are used cyclically. In this case, parameters for several pages can be written in the parameter temporary storage memory 7 in advance, so that it becomes easy to manage the parameter write timing in the parameter temporary storage memory 7.

  Although the image processing circuit 3 shown in the embodiment includes the plurality of image processing units A to C, it may have a configuration including only one image processing unit. Even in this case, the effect of applying the present invention can be obtained. That is, the parameter for N + 1 pages is written in the parameter temporary storage memory 7 to be prepared while the image processing unit is processing N pages, so that the overhead by the CPU when transferring from the parameter temporary storage memory 7 to the register unit. Can be eliminated, and the time required to rewrite the parameters of the register section can be shortened. When the CPU writes a parameter in the register unit in response to an interrupt by a page end signal output at the timing when the image processing unit finishes processing as in the conventional art, it takes time for the CPU to respond to the interrupt. Since the CPU writes the parameters, the time required for the writing becomes longer than when the parameter transfer unit 15 performs the DMA transfer.

  The transfer end signal 17 is output when the parameters have been read from the parameter temporary storage memory 7 and the transfer has been completed. This timing may be the timing at which the parameters have been read from the parameter temporary storage memory 7 or the final stage register. It may be the time when the parameters have been set in the unit 13. The former is preferable when the parameter read from the parameter temporary storage memory 7 is temporarily held in the internal memory of the parameter transfer unit 15 and then transferred to the register unit for setting. When the DMA transfer is directly performed to the unit 13, the former or the latter may be used.

  The image processing apparatus 2 according to the present invention is not limited to application to a printer or a multifunction machine.

2 ... Image processing device 3 ... Image processing circuit 5 ... CPU
7 ... Parameter temporary storage memory 11 ... Image processing unit A register unit 12 ... Image processing unit B register unit 13 ... Image processing unit C register unit 15 ... Parameter transfer unit 16a ... Image processing unit A page end signal 16b ... Page end signal 16c of image processing unit B ... Page end signal of image processing unit C 17 ... Transfer end signal A ... Image processing unit B ... Image processing unit C ... Image processing unit

Claims (4)

An image processing unit that has a register unit and performs image processing according to the parameters set in the register unit;
A parameter temporary storage memory for storing parameters to be set in the register section;
A parameter transfer unit that transfers and sets the parameters stored in the parameter temporary storage memory to the register unit;
A CPU for writing parameters in the parameter temporary storage memory,
Have
The parameter transfer unit transmits a transfer completion signal to the CPU when transfer of the parameters of one page from the parameter temporary storage memory to the register unit is completed,
Wherein said CPU for receiving the transfer completion signal, as parameters for the next page in the period in which the image processing unit is processing the image data of one page is already stored in the parameter temporary storage memory, said parameter Write the parameters for the next page to the temporary storage memory,
The image processing unit outputs a page end signal to the parameter transfer unit when image processing of one page is completed,
Upon receiving the page end signal, the parameter transfer unit reads a parameter for the next page to be set next in the register unit from the parameter temporary storage memory, transfers the parameter to the register unit, and sets the parameter. Image processing device. A plurality of image processing units are provided to perform pipeline processing,
Upon receiving the page end signal, the parameter transfer unit reads the parameter for the next page to be set next in the register unit of the image processing unit that is the output source of the page end signal from the parameter temporary storage memory, and reads the page. When the parameter of one page is transferred to the register unit of the image processing unit that is the output source of the end signal and is set , and when the parameter of one page is transferred to the register unit of the image processing unit at the final stage of the pipeline processing, The image processing apparatus according to claim 1, wherein the transfer completion signal is transmitted . When the parameter transfer unit receives a second page end signal from another image processing unit while performing the transfer based on the first page end signal received from one image processing unit, The image processing apparatus according to claim 2, wherein the transfer based on the second page end signal is started after the transfer based on the first page end signal is completed. The image processing device according to claim 1, wherein the parameter temporary storage memory is a DRAM.